JP2006170816A - Pulse specifications detection circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To resolve the problem that, in a pulse specifications detection circuit which sets a constant slice level and analyzes the specifications of an arriving signal exceeding the level, when there is an interference input such as noise exceeding the level or other radio waves, their specifications are analyzed and pulse specifications detection cannot be conducted until the interference disappears no matter how intense an arriving pulse is. <P>SOLUTION: A slice-level setting function 51 sets a first slice level exceeding a noise level. When a level decision function 53 decides that a signal exceeding the first slice level has arrived, specifications measurement function 54 analyzes its specifications. When the signal exceeding the first slice level is a CW signal which is longer than a predetermined duration, a second slice level which is higher than the signal level is set. Pulse specifications detection can be thereby conducted when a signal superimposed on the CW signal is a larger level signal than the CW signal. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a pulse specification detection circuit that detects specifications of a pulse signal such as the frequency and pulse width of an incoming radio wave.

In a radar apparatus or a radio communication receiver, it is necessary to detect specifications (pulse specifications such as frequency, signal intensity, pulse time length) of a received signal (high-frequency signal in the present invention). In order to detect the specifications, first, it is necessary to identify and extract a target high frequency signal from the received high frequency signal.
Since a high-frequency signal is generally received mixed with noise, as an identification method thereof, for example, in Patent Document 1, after grasping the noise level, a certain S / N ratio (for example, 3 db) with respect to the noise level. There is disclosed a technique in which a slice level is provided at a level provided with a signal, and when a signal having an amplitude exceeding the slice level is input, a specification detection operation is performed on this signal.

JP 2004-191090

  In the conventional pulse specification detection method, when a signal exceeding the slice level is input, a pulse specification detection operation is performed on this signal. Therefore, when a CW signal having an amplitude exceeding this slice level (in this invention, a continuous signal having a time longer than the time length of the pulse whose specification is to be detected is collectively referred to as a CW signal) or noise is input, A signal exceeding the level is always input, and the specification of the CW signal and noise is detected, and the original pulse specification detection operation cannot be started until the CW signal and noise disappear. That is, while a CW signal or noise exceeding the slice level is being input, there is a problem that the pulse specification cannot be detected even if the originally intended pulse signal is input at a stronger level.

  The present invention has been made to solve the above problem. Even when a high-level CW signal or noise is input, if another pulse having a level higher than the CW signal or noise arrives, the pulse specifications can be detected. An object of the present invention is to obtain a pulse specification detection circuit.

The pulse specification detection circuit according to the present invention comprises a high-frequency signal receiving means,
Amplitude measuring means for measuring the amplitude of the received high-frequency signal;
When the first slice level is set based on the amplitude output of the receiving means during a predetermined period, and the state where the amplitude exceeds the first slice level continues for a predetermined period Level setting means for setting a second slice level based on the amplitude; storage means for storing the first slice level and the second slice level;
Level determination means for comparing the amplitude of the received signal with the latest slice level stored in the storage means and outputting a command signal when the amplitude exceeds the latest slice level, based on the command signal And a specification detection circuit for detecting the specification of the high-frequency signal.

  The pulse specification detection circuit according to the present invention can detect the pulse specification of a signal when a larger signal arrives even when a CW signal or noise having a level higher than the slice level is input.

Embodiment 1 FIG.
FIG. 1 shows a pulse specification detection circuit according to a first embodiment of the present invention. A two-distributor 1 that distributes a signal received by an antenna 10 and amplified by an amplifier circuit 11 into two, and a two-distributor 1 DFD (Digital Frequency Descriptor) 2 that is connected to one output terminal and calculates the frequency of the signal, and DLVA (Detective Log Video Amp) 3 that is connected to the other output terminal of the two distributor 1 and detects the level of the signal And an A / D conversion circuit 4 connected to the output terminal of the DLVA 3, and a specification detection circuit 5 that receives the output of the DFD 2 and the output of the A / D converter 4 and detects the specification of the signal. Yes. The specification detection circuit 5 can detect a pulse repetition period, a pulse width, a level, and the like. The frequency can be read from DFD2. The antenna 10 and the amplifier circuit 11 are high-frequency receiving means according to the present invention.

FIG. 2 is a diagram showing a detailed configuration of the specification detection circuit 5 of FIG. The specification detection circuit 5 includes a microcomputer (not shown), and achieves the functions shown in FIG. 2 in the form of software processed by the microcomputer.
FIG. 3 is a waveform diagram for explaining the operation of the specification detection circuit 5 of FIG.
1 will be described with reference to FIGS. 2 and 3. FIG.
The pulse specification detection circuit of FIG. 1 divides the input signal into two by the two distributor 1, and then one system calculates the frequency of the input signal by the DFD 2. In the other system, the input signal is converted into a LOG video signal by the DLVA 3, and the signal level of the video signal is A / D converted by the A / D converter 4 to digitally calculate the level of the input signal.

FIG. 3 shows the change of the antenna input signal during the lapse of a certain time (t0 to t5) in terms of the level of the video signal output from the DLVA3. In the following description, the input signal level refers to the output level of DLVA3.
First, the noise level is digitally calculated in advance in a no-input state. This noise level is shown as noise level 21 in FIG. From time t0 to time t1, some signal or noise, that is, a signal 100 (or noise itself) of an extent corresponding to the noise level 21 is felt. In response to this noise level, the slice level determination function 51 in FIG. 2 is higher than the noise level 21 by a level higher than an identifiable S / N ratio, for example, +3 db (can be arbitrarily set), a first slice level. 22 is provided and stored in the slice level storage function 52.

  The signal level comparison / determination function 53 always compares the level of the input signal with the latest level stored in the slice level storage function 52, and when a signal exceeding this level is input, A command is issued to the specification measuring function 54 so as to detect the specification. For example, when the input signal level 100 changes to the signal level 101 exceeding the first slice level 22 at time t1, the signal level comparison / determination function 53 stores the first slice level stored in the slice level storage function 52. If it is determined that a signal exceeding this level has been input, a command is issued to the specification measuring function 54 to detect the specification of this input signal, and pulse specification detection is performed.

Between time t1 and time t2 in FIG. 3, the input signal 101 is not a pulse, but a CW signal (in the present invention, a continuous signal having a time longer than the time length of a pulse for detecting the specification is generically named. This is an example of a CW signal. That is, after the time t1, the state where the level of the signal 101 exceeds the first slice level 22 continues longer than the time width of the pulse to be detected (which can be arbitrarily set). Therefore, when the input signal 101 continues for a certain period of time exceeding the first slice level 22, the slice level setting function 51 determines that the input signal is not a pulse but a CW signal is input. The second slice level 23 is newly provided at a level higher than the S / N ratio that can be identified based on the received CW signal level 101 (for example, an arbitrary level higher by +3 db), and the slice level storage function 52 stores the second slice level 23 To add. That is, a second slice level 23 is newly stored separately from the storage of the first slice level 22.
As a result, the signal level comparison / determination function 53 performs a level comparison of signals input thereafter based on the second slice level 23 that is the latest storage level. As a result, when the signal 102 exceeding the second slice level 23 is input even at CW input at time t2, pulse specification detection can be performed on the signal 102. Thereafter, the same operation is repeated when a high level signal 103 is sensed from t4 to t5.

  When the level of the signal input at the time of FIG. 3 falls below the second slice level 23 exceeds a predetermined time length (for example, 10 times the pulse length), the slice level storage function 52 The newly stored second slice level 23 is deleted, and the initial state (same as at time t1) is restored. Thereafter, when the state in which the input signal level exceeds the first slice level continues for a predetermined time or longer, the second slice level is set again based on the input signal level at this time. The second slice level described first and the reset second slice level are not necessarily the same level.

Embodiment 2. FIG.
In the first embodiment, once the set level of the second slice level 23 is set, the input signal becomes extremely small and decreases to a level lower than the first slice level 22, and the second slice level 23 is reduced. Is not updated unless the second slice level is set again.
However, the input CW signal level 101 is rarely constant and constantly fluctuates due to fading and a change in radio wave state accompanying movement of the transmission source. Only the pulse signal exceeding the second slice level can be detected while the CW signal level is between the second slice level 23 and the first slice level 22 and is at a low level close to the first slice level. The problem arises.

Therefore, once the second slice level is set, if it is determined that the CW signal level has subsequently decreased, the specification of lower level pulses can be detected by lowering the second slice level. can do.
FIG. 4 is a feature detection circuit 6 according to Embodiment 2 of the present invention, characterized in that the set second slice level varies. 4 denote the same parts as in FIG. 2, and a detailed description thereof will be omitted.
The level setting function 51a of the specification detection circuit 6 of FIG. 4 has a level update function 51aa. The level update function 51aa is for changing the set second slice level in accordance with the level of the input signal when the level of the input CW signal has fluctuated over a predetermined time length. . As a result, the slice level can be lowered when the CW signal level is lowered, and the slice level can be raised when the CW signal level is raised, thereby improving the pulse detection sensitivity.

This operation will be described with reference to FIG. Near the time t7, the level of the input signal decreased from the level of the reference numeral 101 to the level of the reference numeral 105, and this state continued for a predetermined time (reference numeral 106) longer than the target pulse time width. The level update function 51aa constantly monitors the input signal, and when a certain difference occurs in the difference between the input signal level and the latest stored slice level for more than the aforementioned time, this difference is The second slice level 23 set so as to decrease is changed to the third slice level 23a.
The example of FIG. 5 shows only the case where the level is lowered, but the same applies to the case where the level is raised.

Embodiment 3 FIG.
FIG. 6 shows a pulse specification detection circuit 7 according to the third embodiment of the present invention, which is characterized by avoiding erroneous detection by frequency comparison.
The pulse specification detection circuits 5 and 6 according to the first embodiment and the second embodiment mistakenly assume that a new pulse is input when the level of the input CW signal suddenly fluctuates. May be detected. Since the second slice level change performed in the second embodiment also does not operate unless it is after a predetermined time length, the follow-up is not in time.

  A configuration for preventing such erroneous detection is shown in FIG. 6 that are the same as those in FIG. 2 indicate the same parts, and detailed descriptions thereof are omitted. When the level determination function 53 detects the arrival of a signal exceeding a predetermined level, it sends a command to the frequency check function 54 a to compare the frequency with the frequency of the CW signal stored in the storage function 52. If the frequency is different, the frequency check function 54a issues a specification measurement command to the specification measurement function 54 as the arrival of a new pulse, and if the frequency is the same, it is not the arrival of a new pulse, but simply the amplitude of the CW signal. It is determined that it has changed, and no command is given to the specification measurement function 54.

The above operation will be described in detail with reference to FIG. First, when a new slice level is set for the CW signal 101 at time t10, the frequency of the CW signal is detected by the DFD 2 and this frequency is stored in the storage function 52. When a new pulse is detected at time t11, the frequency of this pulse is detected from the DFD 2 and compared with the stored frequency of the CW signal. If the frequencies are the same, the pulse is not regarded as a new input signal, and specification detection is not performed.
The frequency check function 54a shown in FIG. 6 is the second frequency check means according to the present invention.

Embodiment 4 FIG.
However, in the case of the configuration of the third embodiment, if it takes too much time to check and compare the frequencies, it is determined that the frequencies are not the same, and the pulse disappears when trying to detect the specifications. It may happen that it is impossible to detect the above. In order to prevent the occurrence of such a situation, a configuration as shown in FIG. 8 may be adopted. In the case of the configuration of FIG. 8, frequency comparison by the frequency check function 54 a and specification measurement by the specification measurement function 54 are simultaneously performed. In other words, specification measurement is performed regardless of the frequency comparison result. The measurement result is output via the gate 54b. If the frequency comparison results are different, the gate 54b is opened, and if they are the same, the gate 54b is not opened. When the frequencies are the same, the measured measurement results are discarded.
FIG. 9 shows the operation of FIG. Since the specification is detected simultaneously with the frequency comparison, there is an effect that there is no operation delay. The frequency check function 54a and the gate 54b of FIG. 8 are the first frequency check means according to the present invention.

The level setting function 51 of the specification detection circuit is a level setting means according to the present invention. The storage function 52 is a storage means. The level determination function 53 is level determination means.
The specification measurement function 54 is specification measurement means. The level update function 51aa is a level update unit.
In FIG. 1, the signal amplitude is converted into data using the DLVA 3 and the A / D converter 4, but it goes without saying that it may be configured using a simple detection circuit and voltage measurement circuit.

  The pulse specification detection circuit of the present invention can be used for identification of reflected radio waves of a radar device, analysis of radar interference waves, and analysis of radar radio waves emitted from an object.

FIG. 3 is a configuration diagram of a pulse specification detection circuit according to the first embodiment. It is a partial detailed block diagram of the block diagram of FIG. It is a time chart explaining the operation | movement of FIG. FIG. 6 is a partial detailed configuration diagram of a pulse specification detection circuit according to a second embodiment. It is a time chart explaining the operation | movement of FIG. FIG. 6 is a partial detailed configuration diagram of a pulse specification detection circuit according to a third embodiment. It is a time chart explaining the operation | movement of FIG. It is a block diagram which shows the structure which deform | transformed FIG. It is a time chart explaining the operation | movement of FIG.

Explanation of symbols

1 2 distributor, 2 DFD, 3 DLVA, 4 D / A converter,
5 specification detection circuit, 6 second specification detection circuit, 7 third specification detection circuit,
10 antenna, 11 amplifier circuit, 21 noise level,
22 first slice level, 23 second slice level,
23a Updated slice level,
51, 51a level setting function, 51aa level update function,
52 memory function, 53 level judgment function, 54 specification measurement function,
54a Frequency check function,
54b Gate, 100-103, 105 CW signal.

Claims (6)

Means for receiving high-frequency signals;
Amplitude measuring means for measuring the amplitude of the received high-frequency signal;
When the first slice level is set based on the amplitude output of the receiving means during a predetermined period, and the state where the amplitude exceeds the first slice level continues for a predetermined period Level setting means for setting the second slice level based on the amplitude;
Storage means for storing the first slice level and the second slice level;
Level determination means for comparing the amplitude of the received signal with the latest slice level stored in the storage means and outputting a command signal when the amplitude exceeds the latest slice level;
A pulse specification detection circuit comprising a specification detection circuit for detecting the specification of the high-frequency signal based on the command signal.   2. The pulse specification detection circuit according to claim 1, wherein the specifications include any one of the amplitude of the high-frequency signal as a pulse amplitude, a time length as a pulse width, and a frequency as a pulse frequency.   2. The pulse specification detection circuit according to claim 1, wherein the level setting means sets the first slice level with respect to a noise level output from the high-frequency signal receiving means.   When the state in which the amplitude is lower than the stored latest slice level continues for a predetermined period, the level updating unit updates the latest slice level based on the amplitude, and the storage unit 4. The pulse specification detection circuit according to claim 1, wherein the latest slice level stored is replaced with the updated slice level and stored. Frequency measuring means for measuring the frequency of the high-frequency signal when the first or second slice level is set, and storing the frequency in the storage means;
When the level determination means outputs the command signal, a first result of comparing the frequency of the high frequency signal with the stored frequency and discarding the detection result of the specification detection circuit if the frequency is the same as each other. 4. The pulse specification detection circuit according to claim 1, further comprising frequency check means. Means for receiving high-frequency signals;
Amplitude measuring means for measuring the amplitude of the received high-frequency signal;
When the first slice level is set based on the amplitude output of the receiving means during a predetermined period, and the state where the amplitude exceeds the first slice level continues for a predetermined period Level setting means for setting the second slice level based on the amplitude;
Storage means for storing the first slice level and the second slice level;
Level determination means for comparing the amplitude of the received signal with the latest slice level stored in the storage means and outputting a command signal when the amplitude exceeds the latest slice level;
Frequency measuring means for measuring the frequency of the high-frequency signal when the first or second slice level is set, and storing the frequency in the storage means;
When the level determination means outputs the command signal, a second frequency for sending a specification detection command to the specification detection circuit if the frequency of the signal is different from that of the stored frequency. 2. The pulse specification detection circuit according to claim 1, further comprising check means.

Images