JP2006155100A - Power supply circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power supply circuit which can avoid decline in a ripple removal rate even if power source noise is produced to a reference generation voltage. <P>SOLUTION: A voltage dividing means 12 which generates a reference voltage Vref10 by dividing the reference creation voltage V2 through a 15th to 19th voltage dividing resistors Z15 to Z19 and supplies it to a differential amplifier A10, and a capacitor C11 for filtering connected to an input terminal of the differential amplifier A10 are provided. Low-pass filters LP1 to LP3 or LP4 are formed by the capacitor C11 for filtering and the 15th resistor Z15 to the 17th resistor Z17 or a 18th resistor Z18 from a 3rd node N3 to voltage dividing points P11 to P13 or P14. Therefore, the reference voltage Vref10 is obtained by removing the power source noise from the reference voltage V2, and power output can be formed and a voltage power supply circuit 10 which can avoid decline in ripple removal rate can be realized. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a power supply circuit, and is preferably applied to a voltage power supply circuit that is provided in various devices such as a mobile phone and a PDA (Personal Digital Assistance), and that can change a setting for a constant voltage value of an output voltage that is a power output. It is a thing.

  As shown in FIG. 5, in the conventional first voltage power supply circuit 1, the output terminal of the differential amplifier A1 is connected to the gate of the output transistor Q1. The output transistor Q1 has a source connected to an input terminal Tin1 of an input voltage Vin supplied from a voltage source such as a battery, and a drain connected to the output terminal Tout1 of the first voltage power supply circuit 1. Further, an output capacitor C1 and a load L1 are connected in parallel between the output terminal Tout1 and the ground point of the ground potential Vss. Further, between the output terminal Tout1 and the ground point, a plurality of first to fifth resistors (hereinafter referred to as this) for dividing the output voltage Vout1 generated at the output terminal Tout1 for feedback to the differential amplifier A1. (Referred to as first to fifth feedback resistors) Z1 to Z5 are connected in series. Further, the midpoint of connection between the fifth feedback resistor Z5 closest to the ground point and the fourth feedback resistor Z4 adjacent to the fifth feedback resistor Z5 is a voltage dividing point P1 for dividing the output voltage Vout1. It is connected to the non-inverting input terminal of the differential amplifier A1.

  A reference voltage Vref1, which is a reference when generating the output voltage Vout1, is input to the inverting input terminal of the differential amplifier A1. Further, the non-inverting input terminal of the differential amplifier A1 has a first resistance value closer to the output terminal Tout1 than the voltage dividing point P1 in the first to fifth feedback resistors Z1 to Z5, and the voltage dividing point P1. A divided voltage Vz1 obtained by dividing the output voltage Vout1 by a ratio (that is, a voltage dividing ratio) with the second resistance value on the grounding point side (that is, the resistance value of the fifth feedback resistor Z5) is input. The

  Accordingly, the differential amplifier A1 amplifies the difference voltage between the reference voltage Vref1 and the divided voltage Vz1, and supplies the amplified difference voltage to the gate of the output transistor Q1 as a control signal to increase or decrease the on-resistance of the output transistor Q1. Control. The output transistor Q1 controls the current value of the drain-source current that flows between the drain and source according to the control of the on-resistance by the control signal. Accordingly, the first voltage power supply circuit 1 generates an output voltage Vout1 having a constant voltage value at the output terminal Tout1 according to the drain-source current flowing through the output transistor Q1, and supplies the output voltage Vout1 to the load L1.

  By the way, the first voltage power supply circuit 1 includes the first to fifth feedback resistors Z1 to Z5, the second to second feedback resistors Z5 other than the fifth feedback resistor Z5 and the first feedback resistor Z1 closest to the output terminal Tout1. The voltage dividing ratio change-over switches SW1 to SW3 are respectively connected in parallel to the four feedback resistors Z2 to Z4.

  The multiplexer MUX1 controls the opening / closing of the voltage dividing ratio change-over switches SW1 to SW3 according to a control signal D1 or D2 given from the outside. Thus, when the multiplexer MUX1 opens the voltage dividing ratio switching switches SW1 to SW3, the multiplexer MUX1 converts the current flowing through the first feedback resistor Z1 into the second to fourth feedback resistors in parallel with the opened voltage dividing ratio switching switches SW1 to SW3. The current flows through the fifth feedback resistor Z5 through Z2 to Z4. On the other hand, when the multiplexer MUX1 closes the voltage dividing ratio changeover switches SW1 to SW3, the current flowing through the first feedback resistor Z1 does not pass through the second to fourth feedback resistors Z2 to Z4, and the closed voltage dividing ratio is closed. By bypassing the selector switches SW1 to SW3, the current flows through the fifth feedback resistor Z5.

  In this way, the multiplexer MUX1 uses all or only a part of the first to fourth feedback resistors Z1 to Z4 arbitrarily selected between the output terminal Tout1 and the voltage dividing point P1 for dividing the output voltage Vout1. Thus, the first resistance value between the output terminal Tout1 and the voltage dividing point P1 (that is, the combined resistance value of the feedback resistance between the output terminal Tout1 and the voltage dividing point P1) is varied. As a result, the multiplexer MUX1 has the formula (1) according to an arbitrary selection for the first resistance value.

As shown, the setting of the voltage division ratio Pa with respect to the output voltage Vout1 is varied. However, in the equation (1), the first resistance value on the output terminal Tout1 side from the voltage dividing point P1 is R1, and the second resistance value on the ground point side from the voltage dividing point P1 is R2. Therefore, in the first voltage power supply circuit 1, the expression (2) is set according to the setting of the voltage division ratio Pa.

As shown, the setting of the gain G of the differential amplifier A1 that is the reciprocal of the voltage dividing ratio Pa is also variable. As a result, the differential amplifier A1 controls the on-resistance of the output transistor Q1 so that the divided voltage Vz1 is substantially equal to the reference voltage Vref1, and thus the equation (3).

As shown, the output voltage Vout1 having a constant voltage value obtained by multiplying the reference voltage Vref1 by a gain G is generated.

  In this way, the first voltage power circuit 1 varies the setting for the constant voltage value of the output voltage Vout1 together with the gain G of the differential amplifier A1 by increasing or decreasing the first resistance value R1.

  Further, as shown in FIG. 6, in the conventional second voltage power circuit 2, the output terminal of the differential amplifier A2 is connected to the gate of the output transistor Q2, similarly to the first voltage power circuit 1. The output transistor Q2 has a source connected to the input terminal Tin2 of the input voltage Vin supplied from the voltage source and a drain connected to the output terminal Tout2 of the second voltage power supply circuit 2. Further, an output capacitor C2 and a load L2 are connected in parallel between the output terminal Tout2 and the ground point of the ground potential Vss. Between the output terminal Tout2 and the ground point, a plurality of sixth to tenth feedback resistors Z6 to Z10 for dividing the output voltage Vout2 generated at the output terminal Tout2 for feedback to the differential amplifier A2. Are connected in series.

  However, in the case of the second voltage power supply circuit 2, the connection midpoint of the sixth and seventh feedback resistors Z6 and Z7, the connection midpoint of the seventh and eighth feedback resistors Z7 and Z8, and the eighth and ninth The connection midpoints of the feedback resistors Z8 and Z9 and the connection midpoints of the ninth and tenth feedback resistors Z9 and Z10 are respectively selectable voltage dividing points P6 to P9, and the voltage dividing ratio changeover switch SW6. To the non-inverting input terminal of the differential amplifier A2 through SW9.

  The multiplexer MUX2 controls the opening / closing of the voltage dividing ratio change-over switches SW6 to SW9 according to the control signal D3 or D4 given from the outside, and closes only one of the voltage dividing ratio changing switches SW6,..., SW8 or SW9. To. Accordingly, the multiplexer MUX2 uses one of the arbitrarily selected ones while using all the sixth to tenth feedback resistors Z6 to Z10 for dividing the output voltage Vout2 between the output terminal Tout2 and the ground point of the ground potential Vss. The third resistance value from the voltage dividing point P6,..., P8 or P9 to the output terminal Tout2 (that is, the combined resistance value of the feedback resistance between the output terminal Tout2 and the voltage dividing point P6,..., P8 or P9) The fourth resistance value from the one voltage dividing point P6,..., P8 or P9 to the ground point (that is, the combined resistance value of the feedback resistors between the ground point and the voltage dividing points P6,..., P8 or P9). To the ratio (that is, the voltage division ratio of the output voltage Vout2). Therefore, also in the second voltage power supply circuit 2, the gain setting of the differential amplifier A2 that is the reciprocal of the voltage dividing ratio is varied according to the voltage dividing ratio setting with respect to the output voltage Vout2.

  A reference voltage Vref2 that serves as a reference when generating the output voltage Vout2 is input to the inverting input terminal of the differential amplifier A2. Further, the non-inverting input terminal of the differential amplifier A2 has a third resistance value on the output terminal Tout2 side from the voltage dividing points P6,..., P8 or P9 in the sixth to tenth feedback resistors Z6 to Z10, and A divided voltage Vz2 obtained by dividing the output voltage Vout2 by a ratio (that is, a voltage division ratio) with the fourth resistance value closer to the ground point than the voltage dividing point P6,..., P8 or P9 is input. .

  Therefore, the differential amplifier A2 amplifies the difference voltage between the reference voltage Vref2 and the divided voltage Vz2, and controls the on-resistance of the output transistor Q2 using the amplified difference voltage as a control signal. The output transistor Q2 controls the current value of the drain-source current according to the control of the on-resistance by the control signal. As a result, the second voltage power supply circuit 2 generates an output voltage Vout2 having a constant voltage value at the output terminal Tout2 according to the drain-source current flowing in the output transistor Q2, and supplies the output voltage Vout2 to the load L2.

In this way, the second voltage power circuit 2 can vary the setting of the output voltage Vout2 with respect to the constant voltage value together with the gain of the differential amplifier A2 by varying the ratio of the third and fourth resistance values. . Then, in the state where the constant voltage value of the output voltage Vout2 is set as described above, the second voltage power supply circuit 2 causes the output transistor Q2 to make the divided voltage Vz2 substantially equal to the reference voltage Vref2 by the differential amplifier A2. The output voltage Vout2 having the constant voltage value obtained by multiplying the reference voltage Vref2 by a gain is generated in the same manner as the above-described equation (3) (see, for example, Patent Document 1).
JP 2003-330551 A (pages 4 to 8, FIGS. 1 to 4)

  By the way, for the first and second voltage power supply circuits 1 and 2 having such a configuration, ripples (that is, pulsation) generated in the output voltages Vout1 and Vout2 are reduced in order to stably operate the loads L1 and L2. In this way, it is required to increase the ripple rejection ratio indicating the ratio of the ripple on the output side to the ripple on the input side of the first and second voltage power supply circuits 1 and 2 as much as possible.

  However, the first and second voltage power supply circuits 1 and 2 are supplied with, for example, reference voltages Vref1 and Vref2 generated from an input voltage Vin supplied from a voltage source. In the first and second voltage power supply circuits 1 and 2, noise (hereinafter referred to as “power supply noise”) remaining in the input voltage Vin of the voltage source with respect to the reference voltages Vref 1 and Vref 2 remains. The power supply noise is amplified by the differential amplifiers A1 and A2, and appears as ripples in the output voltages Vout1 and Vout2. For this reason, the first and second voltage power supply circuits 1 and 2 have a ripple rejection ratio (ie, a power supply rejection ratio (PSRR)) when power supply noise is generated with respect to the reference voltages Vref1 and Vref2. In the following, this is simply referred to as PSRR).

  The present invention has been made in consideration of the above points, and an object of the present invention is to propose a power supply circuit capable of avoiding a reduction in the ripple rejection rate even when power supply noise occurs with respect to the reference generation voltage.

  In order to solve such a problem, in the present invention, a reference voltage and a divided voltage obtained by dividing the output voltage are supplied to a differential amplifier, and a differential voltage between the reference voltage and the divided voltage by the differential amplifier. A power supply circuit that generates a power supply output by controlling an output controller based on the reference generator, having a plurality of voltage dividing resistors connected to a voltage supply point of a reference generation voltage, and supplied to the voltage supply point Voltage dividing means for dividing the voltage through a plurality of voltage dividing resistors at an arbitrarily selected voltage dividing ratio to generate a reference voltage and supplying it to the input terminal of the differential amplifier, and to the input terminal of the differential amplifier A capacitor having one end connected and the other end connected to a node of a predetermined potential, the capacitor, and a voltage dividing resistor provided between the voltage supply point and the voltage dividing point for the reference generation voltage; The low-pass filter It was to be formed.

  Therefore, in the present invention, the reference generation voltage is divided through the plurality of voltage dividing resistors of the voltage dividing means to obtain a reference voltage in which power supply noise generated in the reference generation voltage is reduced, and the reference The power supply noise remaining in the voltage can be removed by the low-pass filter and supplied to the input terminal of the differential amplifier. As a result, in the present invention, it is possible to generate a power output based on the difference voltage between the reference voltage from which the power supply noise is removed and the divided voltage, and thus the influence of the power supply noise generated on the reference generation voltage. It is possible to avoid the occurrence of ripple with respect to the power output.

  According to the present invention, a reference voltage and a divided voltage obtained by dividing an output voltage are supplied to a differential amplifier, and output control is performed by the differential amplifier based on a differential voltage between the reference voltage and the divided voltage. A power supply circuit that generates a power supply output by controlling a voltage generator, having a plurality of voltage dividing resistors connected to a voltage supply point of a reference generation voltage, and dividing the reference generation voltage supplied to the voltage supply point into a plurality of A voltage dividing means that generates a reference voltage by dividing the voltage at an arbitrarily selected voltage dividing ratio via a voltage resistor and supplies the voltage to the input terminal of the differential amplifier, and one end connected to the input terminal of the differential amplifier, A low-pass filter including a capacitor having the other end connected to a node having a predetermined potential, and a voltage dividing resistor provided between the voltage supply point and the voltage dividing point for the reference generation voltage. According to the formation of The reference voltage obtained by removing the power supply noise from the reference generation voltage by the voltage dividing and low-pass filter is supplied to the input terminal of the differential amplifier, and the difference between the reference voltage from which the power supply noise is removed and the divided voltage is obtained. A power supply output can be generated based on the voltage, and thus a power supply circuit that can avoid a drop in the ripple rejection ratio even when power supply noise occurs with respect to the reference generation voltage can be realized.

  Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings.

  In FIG. 1, reference numeral 10 denotes a voltage power supply circuit 10 according to the present invention as a whole, which is a constant voltage generator 11 and a division resistance type reference having a function of a digital-analog converter disposed in front of the constant voltage generator 11. The voltage value setting unit 12 is configured.

  In this case, the constant voltage generator 11 has a differential amplifier A10 formed of an operational amplifier, and the output terminal of the differential amplifier A10 is connected to the gate of a P-channel MOS (Metal Oxide Semiconductor) type output transistor Q10. Yes. The output transistor Q10 has a source connected to an input terminal Tin10 of an input voltage Vin supplied from a voltage source such as a battery (not shown), and a drain connected to an output terminal Tout10 of the voltage power supply circuit 10.

  Further, an output capacitor C10 and a load L10 are connected in parallel between the output terminal Tout10 and the ground point of the ground potential Vss. Between the output terminal Tout10 and the ground point, a plurality of eleventh and twelfth feedbacks for dividing the output voltage Vout10 as a power supply output generated at the output terminal Tout10 for feedback to the differential amplifier A10. Resistors Z11 to Z12 are connected in series. Further, the connection midpoint of the eleventh and twelfth feedback resistors Z11 to Z12 is connected to the non-inverting input terminal of the differential amplifier A10 as a fixed voltage dividing point P10 for dividing the output voltage Vout10. Accordingly, in the differential amplifier A10, the 11th and 12th feedback resistors Z11 and Z12 are fixedly used without changing the voltage dividing point P10 between the output terminal Tout10 and the ground point, so that the gain is also fixed accordingly. It is set as a value.

  The differential amplifier A10 is connected to a first node N1 having a first potential and a second node N2 having a second potential (for example, a ground potential) lower than the first potential. To a predetermined voltage V1 supplied from the first node N1. In this case, a reference voltage Vref10 serving as a reference when generating the output voltage Vout10 is input to the inverting input terminal of the differential amplifier A10. The non-inverting input terminal of the differential amplifier A10 has a resistance value of the eleventh feedback resistor Z11 closer to the output terminal Tout10 than the voltage dividing point P10 in the eleventh and twelfth feedback resistors Z11 to Z12, and the divided voltage. A divided voltage Vz10 obtained by dividing the output voltage Vout10 by a ratio (that is, a voltage division ratio) with the resistance value of the twelfth feedback resistor Z12 closer to the ground point than the point P10 is input.

  Therefore, the differential amplifier A10 amplifies the differential voltage between the reference voltage Vref10 and the divided voltage Vz10, and supplies the amplified differential voltage as a control signal to the gate of the output transistor Q10 to increase or decrease the on-resistance of the output transistor Q10. Control. The output transistor Q10 controls the current value of the drain-source current that flows between the drain and source in accordance with the control of the on-resistance by the control signal. Accordingly, the voltage power supply circuit 10 generates the output voltage Vout10 having a constant voltage value at the output terminal Tout10 so as to charge the output capacitor C10 by the drain-source current flowing in the output transistor Q10, and the output voltage Vout10 is supplied to the load L10. To supply.

  The voltage power supply circuit 10 generates the output voltage Vout10 having a constant voltage value as set at the output terminal Tout10. For example, when the load L10 increases transiently, the charge charged in the output capacitor C10 Release into load L10. As a result, when the voltage value of the output voltage Vout10 decreases, the voltage power supply circuit 10 feeds back the decrease in the voltage value of the output voltage Vout10 to the differential amplifier A10 as the divided voltage Vz10. Therefore, the voltage power supply circuit 10 controls the on-resistance of the output transistor Q10 according to the change in the differential voltage between the reference voltage Vref10 and the divided voltage Vz10 by the differential amplifier A10. As a result, the voltage power circuit 10 charges the output capacitor C10 by increasing the drain-source current flowing through the output transistor Q10 so as to compensate for the decrease in the voltage value with respect to the output voltage Vout10, thus increasing the voltage value of the output voltage Vout10. Let

  In this way, the voltage power supply circuit 10 sequentially detects the voltage value of the output voltage Vout10 as the voltage value of the divided voltage Vz10 by the feedback loop through the eleventh and twelfth feedback resistors Z11 and Z12 for the differential amplifier A10. However, the on-resistance of the output transistor Q10 is controlled in accordance with the detection result (that is, based on the voltage difference between the reference voltage Vref10 and the divided voltage Vz10). When the voltage value of the output voltage Vout10 returns to the set constant voltage value, the voltage power supply circuit 10 detects the constant voltage value of the output voltage Vout10 as the voltage value of the divided voltage Vz10 and feeds back to the differential amplifier A10. Let Therefore, at this time, the voltage power supply circuit 10 determines the on-resistance of the output transistor Q10 based on the difference voltage between the reference voltage Vref10 and the divided voltage Vz10 obtained by dividing the output voltage Vout10 having a constant voltage value by the differential amplifier A10. To control. As a result, the voltage power supply circuit 10 reduces the difference between the drain-source current flowing through the output transistor Q10 and the load current flowing from the output terminal Tout10 to the load L10 to charge the output capacitor C10 to the set voltage, and thus the output terminal. The constant voltage value of the output voltage Vout10 generated at Tout10 is maintained.

  In addition to such a configuration, in the case of the voltage power supply circuit 10, the reference voltage value setting unit 12 includes a voltage supply circuit (not shown) such as a voltage source, a band gap reference circuit, or another voltage power supply circuit in the previous stage. To a third node N3 of a third potential as a voltage supply point to which a voltage V2 having a predetermined voltage value (hereinafter referred to as a reference generation voltage) V2 used for generating the reference voltage Vref10 is supplied. . The reference voltage value setting unit 12 supplies the reference generation voltage V2 between the third node N3 and the fourth node N4 having a fourth potential (for example, ground potential) lower than the third potential. A plurality of fifteenth through nineteenth resistors (hereinafter referred to as fifteenth through nineteenth voltage dividing resistors) Z15 through Z19 for voltage division are connected in series.

  Further, in the reference voltage value setting unit 12, the connection midpoints between the fifteenth to nineteenth voltage dividing resistors Z15 to Z19 adjacent to each other (that is, the connection midpoints of the fifteenth and sixteenth voltage dividing resistors Z15 and Z16, 16 and 17th voltage dividing resistors Z16 and Z17, midpoint of connection of 17th and 18th voltage divider resistors Z17 and Z18, and midpoint of connection of 18th and 19th voltage divider resistors Z18 and Z19) Are voltage selection points P11 to P14 that can be arbitrarily selected for the reference generation voltage V2, respectively, and are connected to the inverting input terminal of the differential amplifier A10 via voltage division ratio changeover switches SW10 to SW13.

  Then, the multiplexer MUX10 provided in the reference voltage value setting unit 12 controls the opening / closing of the voltage division ratio changeover switches SW10 to SW13 according to the control signal D5 or D6 given from the outside, and any one of the voltage division ratio changeover switches SW10. ,..., Close only SW12 or SW13. As a result, the multiplexer MUX10 uses all the fifteenth to nineteenth voltage dividing resistors Z15 to Z19 to divide the reference generation voltage V2 between the third and fourth nodes N3 and N4, and any one of the voltage dividers. A fifth resistance value from one voltage dividing point P11,..., P13 or P14 arbitrarily selected by closing the contact of the pressure ratio switch SW10,..., SW12 or SW13 to the third node N3 (ie, , The combined resistance value of the voltage dividing resistor between the third node N3 and the voltage dividing point P11,..., P13 or P14) and the one voltage dividing point P11,..., P13 or P14 to the fourth node N4. To the sixth resistance value (that is, the combined resistance value of the voltage dividing resistors between the fourth node N4 and the voltage dividing point P11,..., P13 or P14) (that is, the voltage dividing ratio with respect to the reference generation voltage V2) To change the settings of.

  Therefore, the inverting input terminal of the differential amplifier A10 has a fifth resistance value on the third node N3 side from the reference voltage value setting unit 12 arbitrarily selected from the voltage dividing points P11,..., P13 or P14. And the voltage obtained by dividing the reference generation voltage V2 by a ratio (that is, a voltage division ratio) to the sixth resistance value on the fourth node N4 side from the voltage dividing points P11,..., P13 or P14. The voltage is input as the reference voltage Vref10. Then, since the gain of the differential amplifier A10 is set as a fixed value, the voltage power supply circuit 10 has a constant voltage of the output voltage Vout10 according to the reference voltage value of the reference voltage Vref10 set by the reference voltage value setting unit 12. The setting for the value is variable.

  By the way, in general, as shown in FIG. 2, for example, the differential amplifier has a reference voltage in a band from 0 to a predetermined frequency (hereinafter referred to as a band maximum frequency) f2 (hereinafter referred to as an operation band), When a voltage difference from the divided voltage is amplified, if a power supply noise is generated in the reference voltages Vref1 and Vref2, a predetermined frequency within the operation band (hereinafter referred to as this) is generated due to the internal configuration of the differential amplifier. (Referred to as characteristic change frequency) to the maximum frequency f2 of the band, the PSRR with respect to the reference voltage is abruptly deteriorated (that is, power noise generated in the reference voltage is amplified). In the conventional first and second voltage power supply circuits 1 (FIG. 5) and 2 (FIG. 6), when power supply noise is generated in the reference voltages Vref1 and Vref2, the differential amplifier A1 having such operating characteristics. And A2 multiply the difference voltage between the reference voltages Vref1 and Vref2 and the divided voltages Vz1 and Vz2 by a gain. Therefore, the first and second voltage power supply circuits 1 and 2 generate the output voltages Vout1 and Vout2 based on the differential voltage multiplied by the gain of the differential amplifiers A1 and A2, and as a result, output together with the reference voltages Vref1 and Vref2. The PSRR of the voltages Vout1 and Vout2 also deteriorated rapidly (that is, the ripple generated in the output voltages Vout1 and Vout2 was increased).

  For this reason, the constant voltage generator 11 has one end of a capacitor C11 (hereinafter, specifically referred to as a filter capacitor) connected to the inverting input terminal of the differential amplifier A10, and the other end of the filter capacitor C11 connected to the inverting input terminal. It is connected to a fifth node N5 having a fifth potential (eg, ground potential) lower than the third potential. As a result, as shown in FIGS. 3A to 4B, in the voltage power supply circuit 10, arbitrarily selected voltage dividing points P <b> 11 from the third node N <b> 3 in the reference voltage value setting unit 12. , P13 or P14 up to the fifteenth voltage dividing resistor Z15,..., The seventeenth voltage dividing resistor Z17 or the eighteenth voltage dividing resistor Z18, and the filter capacitor C11 include a low-pass filter (LPF). ) LP1, ..., LP3 or LP4 is formed.

  The filter capacitor C11 includes a fifteenth voltage dividing resistor Z15,..., A seventeenth voltage dividing resistor Z17 or an eighteenth voltage divider between the third node N3 and the voltage dividing points P11,. With the resistor Z18, for example, the capacitance is selected so that the frequency near the characteristic change frequency at which PSRR begins to deteriorate rapidly in the differential amplifier A10 is set as the cutoff frequency f1. However, in the voltage power circuit 10, the third node N3 and the selected voltage dividing points P11,..., P13 or P14 depending on which voltage dividing points P11 to P14 are selected by the reference voltage value setting unit 12. The combined resistance value of the voltage dividing resistor between the voltage and the voltage changes.

  With this configuration, as shown in FIG. 2, the voltage power supply circuit 10 causes the power supply noise generated in the reference generation voltage V2 to first pass through the 15th to 19th voltage dividing resistors Z15 to Z19 together with the reference generation voltage V2. To reduce the pressure. The voltage power supply circuit 10 supplies power noise that is equal to or higher than the cutoff frequency f1 of the low-pass filters LP1 to LP4 among power noise remaining in the reference voltage Vref10 obtained by dividing the reference generation voltage V2. It is removed by the low-pass filters LP1 to LP4. As a result, the voltage power supply circuit 10 has the PSRR for the reference voltage Vref10 in the differential amplifier A10 even if the PSRR with respect to the reference generation voltage V2 is reduced (that is, the power supply noise is generated for the reference generation voltage V2). Can be prevented from abruptly deteriorating above the characteristic change frequency. As a result, even when the differential amplifier A10 gain-multiplies the difference voltage between the reference voltage Vref10 and the divided voltage Vz10 as it is, the voltage power circuit 10 generates the output voltage Vout10 that is generated based on the gain-multiplied difference voltage. On the other hand, it is avoided that the ripple resulting from power supply noise arises and PSRR deteriorates.

  In addition to this, in the reference voltage value setting unit 12, parasitic capacitance exists in the circuit elements constituting each of the voltage division ratio changeover switches SW10 to SW13 and the multiplexer MUX10. In the reference voltage value setting unit 12, if power supply noise is generated with respect to an operation voltage having a predetermined voltage value supplied from a voltage source or the like in order to operate the reference voltage value setting unit 12, the power supply noise is parasitic. It flows into the fifteenth through nineteenth voltage dividing resistors Z15 through Z19 via the capacitance. As a result, the reference voltage value setting unit 12 superimposes the power supply noise flowing from the parasitic capacitance to the fifteenth to nineteenth voltage dividing resistors Z15 to Z19 on the reference voltage Vref10 generated by dividing the reference generation voltage V2. May be.

  However, in the voltage power supply circuit 10, the parasitic capacitance of the reference voltage value setting unit 12 and the filter capacitor C11 are electrically connected, so that the parasitic capacitance and the filter capacitor C11 determine the connection midpoint between them. It functions as a pressure dividing point and a voltage dividing resistor having a mutual impedance ratio as a voltage dividing point. In the voltage power supply circuit 10, the parasitic capacitance is located on the input side and the filter capacitor C11 is located on the output side with respect to the power supply noise path. For this reason, the capacitance of the filter capacitor C11 is selected to be sufficiently larger than the parasitic capacitance of the reference voltage value setting unit 12 in addition to the selection that takes into account the operating band of the differential amplifier A10. As a result, the voltage power supply circuit 10 substantially eliminates the power supply noise flowing in from the parasitic capacitance and superimposed on the reference voltage Vref10 by dividing the power supply noise by the ratio of the parasitic capacitance and the impedance of the filter capacitor C11 (that is, the voltage division ratio). ing.

  In the above configuration, the voltage power supply circuit 10 arbitrarily selects the reference generation voltage V2 supplied from the voltage supply circuit via the 15th to 19th voltage dividing resistors Z15 to Z19 of the reference voltage value setting unit 12. The divided voltage is divided by the divided voltage ratio to obtain a divided voltage in which power supply noise generated in the reference generation voltage V2 is reduced. The voltage power supply circuit 10 removes the power supply noise remaining in the divided voltage by the low-pass filters LP1,..., LP3 or LP4 to obtain the reference voltage Vref10, and the reference voltage Vref10 is converted to the differential amplifier A10. Is supplied to the inverting input terminal. The voltage power supply circuit 10 divides the output voltage Vout10 generated at the output terminal Tout10 through the eleventh and twelfth feedback resistors Z11 and Z12, and the obtained divided voltage Vz10 is ratio-inverted by the differential amplifier A10. Return to the input terminal.

  As a result, the voltage power supply circuit 10 amplifies the differential voltage between the reference voltage Vref10 and the divided voltage Vz10 in the differential amplifier A10, and supplies the amplified differential voltage to the gate of the output transistor Q10 as a control signal to reduce the on-resistance. By controlling, the current value of the drain-source current flowing through the output transistor Q10 is controlled. Thus, the voltage power supply circuit 10 generates the output voltage Vout10 having a desired constant voltage value at the output terminal Tout10 according to the drain-source current flowing through the output transistor Q10.

  In this way, the voltage power supply circuit 10 generates the reference voltage Vref10 by dividing the reference generation voltage V2 at a pre-stage of the differential amplifier A10 by an arbitrarily selected voltage dividing ratio, thereby generating a reference voltage Vref10. Even if the gain is set constant, the setting for the constant voltage value of the output voltage Vout10 can be varied. The voltage power supply circuit 10 divides the reference generation voltage V2 and passes the divided voltage obtained by the voltage division to the low-pass filters LP1,..., LP3 or LP4, thereby generating the reference generation voltage V2. The reference voltage Vref10 is generated by removing the power supply noise generated in step.

  According to the above configuration, in the voltage power supply circuit 10, the reference generation voltage V2 supplied from the voltage supply circuit can be arbitrarily set via the fifteenth to nineteenth voltage dividing resistors Z15 to Z19 of the reference voltage value setting unit 12. The divided voltage obtained by dividing the obtained voltage by the voltage dividing ratio selected by the filter capacitor C11 and the voltage dividing point P11,..., P13 or P14 arbitrarily selected from the filter capacitor C11 and the third node N3. The reference voltage Vref10 is generated through a low-pass filter LP1, LP3 or LP4 formed by the voltage dividing resistors Z15,..., The seventeenth voltage dividing resistor Z17 or the eighteenth voltage dividing resistor Z18. Since the generated reference voltage Vref10 is supplied to the inverting input terminal of the differential amplifier A10, the difference between the reference voltage Vref10 from which power supply noise is removed and the divided voltage Vz10 is obtained. The output voltage Vout10 can be generated by amplifying the voltage, thus preventing the output voltage Vout10 from causing ripple due to power supply noise even if power supply noise is generated with respect to the reference generation voltage V2. It is possible to realize the voltage power supply circuit 10 that can avoid the reduction of the ripple removal rate.

  Further, the voltage power supply circuit 10 is configured such that the capacitance of the filter capacitor C11 is selected to be sufficiently larger than the parasitic capacitance existing in the circuit element of the reference voltage value setting unit 12, so that the reference voltage value setting unit 12 Even if power supply noise wraps around and is superimposed on the reference voltage Vref10 from the parasitic capacitance, the power supply noise superimposed on the reference voltage Vref10 can be removed by the parasitic capacitance and the filter capacitor C11. A decrease in rate can be avoided more reliably.

  By the way, according to the conventional first and second voltage power supply circuits 1 (FIG. 5) and 2 (FIG. 6), the first to fifth feedback resistors Z1 to Z5 and the sixth to tenth feedback resistors Z6 to Z10. On the other hand, a function for feedback of the output voltages Vout1 and Vout2 and a function for variable setting for the constant voltage values of the output voltages Vout1 and Vout2 are provided. In the first and second voltage power supply circuits 1 and 2, to some extent, from the input terminal Tin10 to the first to fifth feedback resistors Z1 to Z5 and the sixth to tenth feedback resistors Z6 to Z10 due to operational characteristics. Since a current is flowing, the resistance values of the first to fifth feedback resistors Z1 to Z5 and the sixth to tenth feedback resistors Z6 to Z10 cannot be selected so much.

  On the other hand, in the voltage power supply device 10 according to the present embodiment, the setting variable function for the constant voltage value of the output voltage Vout10 is separated from the eleventh and twelfth feedback resistors Z11 and Z12 of the constant voltage generator 11. The fifteenth to nineteenth voltage dividing resistors Z15 to Z19 having a function for changing the setting with respect to the constant voltage value of the output voltage Vout10 are provided in the reference voltage value setting unit 12 before the constant voltage generating unit 11. Accordingly, in the voltage power supply circuit 10, the resistance values of the fifteenth to nineteenth resistors Z15 to Z19 are set to the values corresponding to the fifteenth to nineteenth voltage dividing resistors Z15 to Z19, because the current does not need to flow from the input terminal Tin10. The resistance values of the first to fifth feedback resistors Z1 to Z5 and the sixth to tenth feedback resistors Z6 to Z10 of the conventional first and second voltage power supply circuits 1 and 2 can be selected. For this reason, in the voltage power supply circuit 10, the current flowing through the reference voltage value setting unit 12 can be reduced, and the power consumption in the reference voltage value setting unit 12 can be reduced. In the voltage power supply circuit 10, by increasing the resistance values of the fifteenth to nineteenth voltage dividing resistors Z15 to Z19, the resistance values of the fifteenth to nineteenth voltage dividing resistors Z15 to Z19 and the filter The cut-off frequency f1 of the low-pass filters LP1 to LP4 depending on the reciprocal of the multiplication result with the capacitance of the capacitor C11 can be set low. Therefore, in the voltage power supply circuit 10, even when the characteristic change frequency is relatively low within the operating band of the differential amplifier A10, the cut-off frequency f1 of the low-pass filters LP1 to LP4 can be easily matched with the characteristic change frequency. Can be set to

  Further, according to the conventional first and second voltage power supply circuits 1 and 2, the gains of the first and second voltage power supply circuits 1 and 2 are 1 or more, and the reference voltages Vref1 and Vref2 are externally differential. The differential amplifiers A1 and A2 are directly supplied to the amplifiers A1 and A2, and the differential amplifiers A1 and A2 amplify a difference voltage between the reference voltages Vref1 and Vref2 and the divided voltages Vz1 and Vz2. Therefore, the voltage value is higher than that of the reference voltages Vref1 and Vref2. Only high output voltages Vout1 and Vout2 can be generated. On the other hand, in the voltage power supply circuit 10 according to the present embodiment, the reference generation voltage V2 corresponding to the conventional reference voltages Vref1 and Vref2 is divided to generate the reference voltage Vref10 used to generate the output voltage Vout10. Therefore, it is possible to easily generate the output voltage Vout10 having a small constant voltage value as compared with the conventional first and second voltage power supply circuits 1 and 2, and thus to the load L10 having a relatively small operating voltage value. However, the output voltage Vout10 having a relatively small constant voltage value can be easily supplied.

  Further, according to the conventional first and second voltage power supply circuits 1 and 2, the gains of the differential amplifiers A1 and A2 are varied in order to vary the constant voltage values of the output voltages Vout1 and Vout2. When the gain is varied, the frequency response performance of the differential amplifiers A1 and A2 changes accordingly. Therefore, in the conventional first and second voltage power supply circuits 1 and 2, in order to satisfy the frequency response performance with all variable gains in the differential amplifiers A1 and A2, such differential amplifiers A1 and A2 are used. The design becomes extremely complicated. On the other hand, in the voltage power supply circuit 10 according to the present embodiment, since the gain of the differential amplifier A10 is a fixed value, the setting for the constant voltage value of the output voltage Vref10 can be varied. Compared to the voltage power supply circuits 1 and 2, the design of the differential amplifier A10 can be greatly simplified.

  Further, as described above, the first and second voltage power supply circuits 1 and 2 according to the related art have the first to fifth feedback resistors Z1 to Z5 and the sixth to tenth feedback resistors Z6 to Z10 to generate the original output voltage Vout1. In addition to the feedback function for the output voltages Vout2 and Vout2, the setting variable function for the constant voltage values of the output voltages Vout1 and Vout2 is also used. Therefore, each of the first and second voltage power supply circuits 1 and 2 is generated as one IC (integrated circuit) chip.

  On the other hand, in the voltage power supply circuit 10 according to the present embodiment, as described above, the setting variable function for the constant voltage value of the output voltage Vout10 from the eleventh and twelfth feedback resistors Z11 and Z12 of the constant voltage generator 11 is provided. And the fifteenth to nineteenth voltage dividing resistors Z15 to Z19 having a function of changing the setting for the constant voltage value of the output voltage Vout10 are provided in the reference voltage value setting unit 12 before the constant voltage generating unit 11. I made it. Therefore, in the voltage power supply circuit 10, the constant voltage generation unit 11 and the reference voltage value setting unit 12 can be generated as individual IC chips. According to the voltage power supply circuit 10, only the constant voltage generation unit 11 is prepared for each load L 10, and the reference voltage value setting unit 12 generates the constant voltage having the same variable range with respect to the constant voltage value of the output voltage Vout 10, for example. It can also be used for the part 11. Therefore, according to the voltage power supply circuit 10, the reference voltage value setting unit 12 can be used for several constant voltage generation units 11. The mounting area of the constant voltage generation unit 11 and the reference voltage value setting unit 12 of the circuit board on the IC chip can be remarkably reduced, so that the circuit board can be downsized, and the power consumption of the entire circuit board can be significantly reduced. be able to.

  In the above-described embodiments, the case where the power supply circuit according to the present invention is applied to the voltage power supply circuit 10 described above with reference to FIGS. 1 to 4 is described. The configuration is almost the same as that of the circuit 10, and the present invention can also be applied to a current power supply circuit that generates an output current as a power output using the input terminal Tin10 as an output terminal.

  In the above-described embodiment, the P-channel MOS output transistor Q10 described above with reference to FIGS. 1 to 4 is used as the output controller controlled by the differential amplifier based on the difference voltage between the reference voltage and the divided voltage. However, the present invention is not limited to this, and various other output controllers such as an N-channel MOS type output transistor can be widely applied.

  Furthermore, in the above-described embodiment, the reference generation voltage has a plurality of voltage dividing resistors connected to the voltage supply point of the reference generation voltage, and the reference generation voltage supplied to the voltage supply point is passed through the plurality of voltage division resistors. As a voltage dividing means that generates a reference voltage by dividing by an arbitrarily selected voltage dividing ratio and supplies it to the input terminal of the differential amplifier, the divided resistor type reference voltage value setting unit described above with reference to FIGS. However, the present invention is not limited to this, and a resistor that can form a low-pass filter together with the filter capacitor C11, such as a ladder-resistance type reference voltage value setting unit. In other words, the voltage dividing means having various configurations can be widely applied.

  Further, in the above-described embodiment, the case where the multiplexer MUX10 described above with reference to FIGS. 1 to 4 is applied as the opening / closing control means for controlling the opening / closing of the voltage dividing ratio changeover switch has been described, but the present invention is not limited thereto. If the changeover switch can be controlled to open and close, various other open / close control means can be widely applied.

  The present invention can be used for a power supply circuit provided in various devices such as a mobile phone and a PDA.

1 is a block diagram showing an embodiment of an overall configuration of a voltage power circuit according to the present invention. It is a basic diagram with which it uses for description of the output voltage produced | generated by the reference voltage which removed the power supply noise. It is a block diagram which shows the structure (1) of the low-pass filter formed in a voltage power supply circuit according to selection of the voltage dividing point by a voltage dividing ratio switch. It is a block diagram which shows the structure (2) of the low-pass filter formed in a voltage power supply circuit according to selection of the voltage dividing point by a voltage dividing ratio switch. It is a block diagram which shows the structure of the conventional 1st voltage power supply circuit. It is a block diagram which shows the structure of the conventional 2nd voltage power supply circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Voltage power supply circuit, 11 ... Constant voltage generation part, 12 ... Reference voltage value setting part, A10 ... Differential amplifier, C11 ... Filter capacitor, MUX10 ... Multiplexer, P10, P11, P12, P13 , P14... Dividing point, Q11... Output transistor, SW10, SW11, SW12, SW13... Dividing ratio switch, Vout10... Output voltage, Vref10... Reference voltage, Vz10. Reference generation voltage, Z11... 11th feedback resistor, Z12... 12th feedback resistor, Z15... 15th voltage dividing resistor, Z16... 16th voltage dividing resistor, Z17. Pressure resistance, Z18... 18th voltage dividing resistance, Z19... 19th voltage dividing resistance.

Claims (3)

A reference voltage and a divided voltage obtained by dividing the output voltage are supplied to a differential amplifier, and the output controller is controlled by the differential amplifier based on a differential voltage between the reference voltage and the divided voltage. In the power supply circuit that generates the power supply output,
A plurality of voltage dividing resistors connected to a voltage supply point of a reference generation voltage, and the reference generation voltage supplied to the voltage supply point is arbitrarily selected via the plurality of voltage dividing resistors; Voltage dividing means for generating the reference voltage by dividing the voltage by a voltage dividing ratio and supplying the reference voltage to the input terminal of the differential amplifier;
A capacitor having one end connected to the input terminal of the differential amplifier and the other end connected to a node having a predetermined potential;
A low-pass filter is formed by the capacitor and the voltage dividing resistor provided between the voltage supply point and the voltage dividing point with respect to the reference generation voltage. The low pass filter is
2. The power supply circuit according to claim 1, wherein the cutoff frequency is selected to be substantially the same frequency as a frequency at which a ripple rejection rate starts to deteriorate rapidly with respect to an operating band of the differential amplifier. The voltage dividing means is
A voltage division ratio changeover switch for switching the voltage division ratio with respect to the reference generation voltage;
And an open / close control means for controlling the open / close of the voltage dividing ratio switch,
The capacitor is
2. The power supply circuit according to claim 1, wherein a capacitance is selected to be larger than a parasitic capacitance existing in the voltage division ratio changeover switch and the switching control means.

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