JP2006140521A - Manufacturing method of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device with improved reliability by providing a trench isolation technique that prevents formation of secondary components such as nitride.
A silicon oxide film 2, a polysilicon film 3, and a silicon nitride film 4 are sequentially formed on a semiconductor substrate 1 and then a trench 5 is formed. Next, the substrate is dry oxidized at 1050 ° C. to round the trench corners. Subsequently, by performing pyro oxidation at 800 to 950 ° C., the nitride layer 10 generated at the corner portion of the trench 5 by dry oxidation is oxidized. Since the nitride layer 10 can be removed simultaneously with the silicon oxide film 2 with a hydrofluoric acid-based etchant, film quality deterioration of the gate oxide film 8 can be prevented.
[Selection] Figure 1

Description

  The present invention relates to a method for manufacturing a semiconductor device using a trench isolation technique.

  An element isolation technique such as STI (Shallow Trench Isolation) for forming a trench in a semiconductor substrate to form an element isolation insulating film is frequently used instead of LOCOS (LOcal Oxidation of Silicon).

  An example of a conventional method for manufacturing a semiconductor device using the trench isolation technique will be described with reference to the drawings.

  10 (a) to 10 (d) and FIGS. 11 (a) to 11 (c) are cross-sectional views showing a part of a conventional MOS transistor manufacturing method.

  First, in the step shown in FIG. 10A, a semiconductor substrate 101 made of Si (silicon) or the like is prepared. Next, a silicon oxide film 102 having a thickness of 20 nm is formed on the semiconductor substrate 101 by a thermal oxidation method. Subsequently, a 50 nm thick polysilicon film 103 and a 150 nm thick silicon nitride film 104 are sequentially grown on the silicon oxide film 102 by low pressure CVD.

  Next, in the step shown in FIG. 10B, a resist film (not shown) is formed on the silicon nitride film 104 so as to cover a region to be an element region of the semiconductor device and have an element isolation region as an opening. To do. Then, by performing plasma etching using this resist film as a mask, a trench 105 having a depth of 300 nm provided on the semiconductor substrate 101 is formed through the silicon nitride film 104, the polysilicon film 103, and the silicon oxide film 102. .

Next, in the step shown in FIG. 10C, after removing the resist film, the substrate is dry-oxidized at 1050 ° C. in an O ₂ atmosphere to form the trench 105 in the semiconductor substrate 101 and the polysilicon film 103. Then, a coating oxide film 106 made of SiO ₂ and having a thickness of 30 nm is grown. Here, the reason why the substrate is dry-oxidized at a high temperature is to “round” the corner portion of the trench 105. More specifically, the corner portion of the trench 105 is rounded to ensure a sufficient radius of curvature of the semiconductor substrate 101 and prevent sharpening. Thereby, the thickness of the coating oxide film 106 can be made uniform also in the corner portion of the trench 105. In addition, since the electric field concentration is prevented by sufficiently securing the radius of curvature of the semiconductor substrate 101, the withstand voltage of the gate insulating film 108 can be ensured even at the corner portion of the trench. The dry oxidation also has a meaning of reducing the leakage current by oxidizing the damaged portion when the trench 105 is formed.

  Here, conditions for dry oxidation in this step will be described.

  FIG. 12 is a diagram showing the growth conditions of the coating oxide film in the conventional MOS transistor manufacturing method.

First, the substrate is put into a heating furnace, and the substrate is processed at 800 ° C. for 20 minutes while supplying nitrogen (N ₂ ) gas at 20 L / min (2 × 10 ⁴ mL / min) as shown in FIG. Here, the “substrate” means the entire semiconductor substrate 101 and the layers provided thereon.

  In the subsequent period A, the substrate temperature is raised to 1100 ° C. over 40 minutes with the nitrogen flow rate kept at 20 L / min.

Next, in period B, supply of nitrogen is stopped, and oxygen (O ₂ ) gas is supplied at a flow rate of 10 L / min (1 × 10 ⁴ mL / min) instead, and the substrate is dry-oxidized at 1100 ° C. for 10 minutes. . As a result, the exposed portion of the polysilicon film 103 in which the trench is formed and the exposed portion of the semiconductor substrate 101 are oxidized, and in the trench corner portion, the coating oxide film 106 causes a viscous flow due to the growth at this high temperature. Relieve stress at the part. This stress relaxation can prevent the growth rate of the coating oxide film in the corner portion from being lowered, and the corners of the semiconductor substrate can be rounded.
Note that the temperature of dry oxidation is not limited to 1100 ° C., but may be 1050 ° C. or higher or the viscous flow temperature (about 1050 ° C. to 1100 ° C.) of the coating oxide film 106 (here, silicon oxide film). It is preferable that the temperature is 100 ° C. higher than the viscous flow temperature. Nitrogen or argon (Ar) for dilution may be supplied simultaneously with oxygen.

  Next, in period C, the supply of oxygen is stopped, and the substrate temperature is lowered to 800 ° C. over 80 minutes while supplying nitrogen again at a flow rate of 20 L / min. And it hold | maintains at 800 degreeC for 20 minute (s), leaving the nitrogen flow rate as it is.

  Dry oxidation is performed as described above.

Following the dry oxidation, in a step shown in FIG. 10D, a SiO ₂ film 107 having a thickness of about 600 nm is formed on the substrate by a CVD (Chemical Vapor Deposition) method or the like. Thereafter, the substrate is heat-treated at 1000 ° C. or higher in a nitrogen atmosphere to sufficiently relax the stress of the SiO ₂ film 107.

Next, in the step shown in FIG. 11A, the SiO ₂ film 107 is polished by CMP (Chemical Mechanical Polishing) until the silicon nitride film 104 is exposed, and the upper surface of the substrate is planarized. Thereby, the trench 105 is filled, and an element isolation insulating film 107a made of SiO ₂ is formed.

Subsequently, in the step shown in FIG. 11B, the silicon nitride film 104 is removed using phosphoric acid, and then the mixture is mixed with NH ₄ OH (ammonia water) / H ₂ O ₂ (hydrogen peroxide) mixed solution. The silicon film 103 is removed. Next, after a diffusion layer (not shown) is formed in a predetermined region of the semiconductor substrate 101, the silicon oxide film 102 is removed using a hydrofluoric acid-based etching agent.

Next, in a step illustrated in FIG. 11C, the gate insulating film 108 is formed over the semiconductor substrate 101 by heat treatment or the like, and the gate electrode 109 of the transistor is formed over the gate insulating film 108. Thereafter, a conventional MOS transistor is completed through various processes such as ion implantation and sidewall formation.
Japanese Patent Laid-Open No. 08-335668 Japanese Patent Laid-Open No. 2001-7194

  According to the conventional method for manufacturing a semiconductor device, adjacent active regions can be electrically separated as described above.

By the way, in the conventional method of manufacturing a semiconductor device, when the substrate is dry-oxidized in the step shown in FIG. 10C, a nitride layer 110 made of silicon nitride is formed in the corner portion of the trench 105 in the semiconductor substrate 101. The nitride layer 110 is considered to be generated by a slight amount of ammonia (NH ₃ ) remaining in the silicon nitride film 104 being detached during the formation of the coating oxide film 106 and reacting with the semiconductor substrate 101.

  Since the nitride layer 110 is resistant to a hydrofluoric acid chemical solution, the nitride layer 110 is removed simultaneously with the removal of the silicon oxide film 102 using a hydrofluoric acid chemical solution as shown in FIG. I can't. For this reason, the gate insulating film 108 grows on the nitride layer 110. As a result, a portion of the gate insulating film 108 above the nitride layer 110 is thinned, resulting in a decrease in insulation resistance when an electric field is applied, resulting in a decrease in reliability of the semiconductor device.

As a method of inhibiting the formation of the nitride layer 110, a method of suppressing the detachment of NH ₃ from the silicon nitride film 104 by suppressing the growth temperature of the covering oxide film 106 to 1000 ° C. or less can be considered. However, according to this method, the radius of curvature of the corner of the trench 105 becomes smaller and sharper, thereby reducing the reliability of the gate insulating film 108. A decrease in the reliability of the gate insulating film 108 leads to a decrease in the reliability of the semiconductor device.

  As described above, according to the conventional trench isolation technique, a semiconductor device having sufficient reliability may not be obtained.

  An object of the present invention is to provide a trench isolation technique in which formation of secondary components such as a nitride film on a semiconductor substrate is prevented, thereby providing a semiconductor device with improved reliability.

  According to a first method of manufacturing a semiconductor device of the present invention, there is provided a step (a) of forming a silicon nitride film above a silicon oxide film provided on a semiconductor substrate, and penetrating the silicon nitride film and the silicon oxide film. (B) forming a trench extending into the semiconductor substrate, and thermally oxidizing the semiconductor substrate to oxidize the inner wall of the trench in the semiconductor substrate and form a coating oxide film surrounding the trench. The step (c), the step (d) in which the semiconductor substrate is thermally oxidized in an atmosphere having a stronger oxidizing power than the thermal oxidation in the step (c) to further grow the coating oxide film, and the trench are insulated. And (e) forming an element isolation insulating film after filling with a body.

  With this method, even when a silicon nitride film is formed in the corner portion of the trench of the semiconductor substrate in the step (c), the silicon nitride film is oxidized by thermal oxidation having a stronger oxidizing power. In the process, the silicon oxide film on the semiconductor substrate can be removed at the same time. As a result, a gate insulating film having a uniform thickness and film quality can be formed on the semiconductor substrate after the element isolation insulating film is formed. In other words, according to the first method for manufacturing a semiconductor device of the present invention, it is possible to improve the reliability of the gate insulating film and thus improve the operation reliability of the semiconductor device having the gate insulating film such as MISFET. .

  The thermal oxidation in the step (c) is any one of dry oxidation performed in a dry atmosphere containing oxygen, thermal oxidation performed in an atmosphere containing water vapor, or thermal oxidation containing oxygen and a halogen gas. In addition, when the temperature of the semiconductor substrate is set to 1050 ° C. or more and 1200 ° C. or less, the secondary nitride film can be oxidized quickly. In addition, the crystal defects generated on the inner wall of the trench in the step (b) can be repaired, the thickness of the coating oxide film can be made uniform, and the corner of the trench can be rounded.

  When the thermal oxidation in the step (d) is pyrogenic oxidation performed in an atmosphere containing hydrogen and oxygen, silicon nitride is formed in the corner portion of the trench in the step (c). However, this silicon nitride can be oxidized quickly.

  In the step (d), by further including a halogen gas in the atmosphere, the film thickness controllability can be improved when the growth of the coating oxide film is advanced.

The thermal oxidation in the step (d) is preferably performed under a pressure of 1 × 10 ⁵ Pa or higher in an oxygen-containing atmosphere at a temperature of the semiconductor substrate of 700 ° C. or higher and 1000 ° C. or lower.

  In the step (d), thermal oxidation is performed by lamp annealing in an atmosphere containing oxygen and hydrogen, and oxygen radicals are generated by reacting the oxygen and hydrogen on the semiconductor substrate. Thus, even if silicon nitride is produced as a secondary in step (c), it can be oxidized quickly.

  The increase in the thickness of the coating oxide film in the step (d) is not less than 5 nm and not more than 20 nm, so that the silicon nitride film is formed even when a silicon nitride film is formed at the corner of the trench in the semiconductor substrate. The film can be sufficiently oxidized.

  According to a second method of manufacturing a semiconductor device of the present invention, a step (a) of forming a silicon nitride film above a silicon oxide film provided on a semiconductor substrate, and penetrating the silicon nitride film and the silicon oxide film. (B) forming a trench extending into the semiconductor substrate, and oxidizing the inner wall of the trench in the semiconductor substrate to form a covering oxide film surrounding the trench in an atmosphere containing at least oxygen and oxygen radicals And a step (d) of forming an isolation insulating film after filling the trench with an insulator.

According to this method, when NH ₃ or the like remains in the silicon nitride film in the step (c), the covering oxide film can be formed more rapidly than the diffusion of NH ₃ , so that the nitride at the corner portion of the trench can be formed. Formation can be suppressed. For this reason, since nitride does not remain on the semiconductor substrate after the element isolation insulating film is formed, for example, a gate insulating film with good film quality can be formed. That is, according to the second method for manufacturing a semiconductor device of the present invention, the reliability of the gate insulating film can be improved.

  In the step (c), thermal oxidation is performed by lamp annealing in an atmosphere further containing hydrogen, and the oxygen radicals are generated by reacting the oxygen and the hydrogen on the semiconductor substrate. In particular, since oxidation can be performed rapidly, formation of nitrides at the corners of the trench can be suppressed.

  The thermal oxidation in the step (c) can also suppress the formation of nitride at the corners of the trench by performing it in an atmosphere further containing ozone.

  In the step (c), the oxygen radical may be generated by oxygen plasma.

  In the step (c), by setting the temperature of the semiconductor substrate to 1050 ° C. or more and 1150 ° C. or less, the corner portion of the trench can be rounded out of the semiconductor substrate, and the growth rate is not lowered and more uniform. A coating oxide film having a thickness can be grown.

According to a third method of manufacturing a semiconductor device of the present invention, a step (a) of forming a silicon nitride film over a silicon oxide film provided on a semiconductor substrate, and N ₂ , Ar after the step (a). Or a step (b) of performing a heat treatment of the semiconductor substrate in an atmosphere containing an inert gas to release NH ₃ remaining in the silicon nitride film, penetrating the silicon nitride film and the silicon oxide film, and A step (c) of forming a trench extending into the semiconductor substrate, and a step of oxidizing the inner wall of the trench in the semiconductor substrate by thermally oxidizing the semiconductor substrate to form a covering oxide film surrounding the trench (d) And a step (e) of forming an element isolation insulating film after filling the trench with an insulator.

By this method, NH ₃ remaining in the nitride layer is released in the step (b), so that in the step (d), it is possible to prevent the nitride from being formed in the corner portion of the trench. it can.

  In the step (b), the semiconductor substrate is preferably heat-treated at 1000 ° C. or more and 1200 ° C. or less.

  In the first to third methods of manufacturing a semiconductor device of the present invention, the step (a) relieves stress from the silicon nitride film after the formation of the silicon oxide film and before the formation of the silicon nitride film. Forming a buffer layer on the silicon oxide film, and forming the silicon nitride film on the buffer layer, so that the silicon oxide film has an effect of stress from the silicon nitride film. You can prevent it.

  In the first to third semiconductor device manufacturing methods of the present invention, it is preferable that the buffer layer is made of polysilicon or amorphous silicon.

According to a fourth method of manufacturing a semiconductor device of the present invention, a first barrier layer made of refractory metal and having a function of suppressing the passage of NH ₃ is formed above a silicon oxide film provided on a semiconductor substrate. After the step (a) and the step (a), a step (b) of forming a silicon nitride film above the first barrier layer, and penetrating the silicon nitride film and the silicon oxide film, the semiconductor A step (c) of forming a trench extending into the substrate; and a step (d) of oxidizing the inner wall of the trench in the semiconductor substrate by thermally oxidizing the semiconductor substrate to form a covering oxide film surrounding the trench. And after the step (d), a step (e) of forming an element isolation insulating film after filling the trench with an insulator.

By this method, even when NH ₃ remains in the nitride layer, the first barrier layer suppresses the passage of NH ₃ , so in step (c), the nitride is secondarily formed at the corner of the trench of the semiconductor substrate. Can be prevented from forming. For this reason, no nitride remains on the semiconductor substrate after the element isolation insulating film is formed, so that it is possible to form a highly reliable and highly reliable gate insulating film.

  Before the step (a), the method further includes a step of forming a buffer layer on the silicon oxide film to relieve stress from the silicon nitride film, whereby the silicon oxide film receives stress from the silicon nitride film. Can be prevented from being affected.

  The buffer layer is preferably made of polysilicon or amorphous silicon.

  Before the step (a), after the buffer layer is formed, a step of forming a second barrier layer on the buffer layer for preventing the buffer layer and the first barrier layer from contacting each other. By further including, even if the buffer layer and the first barrier layer react with each other, nitrides can be prevented from being formed at the corners of the trench.

  It is preferable to use Ti as the material of the first barrier layer and TiN as the second barrier layer.

  In the method of manufacturing a semiconductor device according to the present invention, in the formation process of the covering oxide film when forming the insulating film for element isolation filling the trench, the dry oxidation for setting the processing temperature of the substrate to 1050 ° C. or higher and the subsequent processing are performed. Pyrooxidation is performed at a temperature of 800 ° C. or higher and 950 ° C. or lower. As a result, the nitride film generated at the corner of the trench during dry oxidation is oxidized during pyro-oxidation, so that it can be removed simultaneously with the silicon oxide film on the semiconductor substrate. As a result, a gate insulating film with good film quality can be formed. Therefore, according to the method for manufacturing a semiconductor device of the present invention, a semiconductor device with higher reliability than the conventional one can be provided.

(First embodiment)
As a first embodiment of the present invention, a method of manufacturing a MOS transistor provided with an STI using a polysilicon layer as a buffer layer will be described.

  1A to 1D and 2A to 2D are cross-sectional views illustrating a part of the manufacturing process of the semiconductor device according to the present embodiment.

  First, in the process shown in FIG. 1A, a semiconductor substrate 1 made of silicon is prepared. Next, a silicon oxide film 2 having a thickness of 20 nm is formed on the semiconductor substrate 1 by thermal oxidation. Subsequently, a 50 nm thick polysilicon film 3 and a 150 nm thick silicon nitride film 4 are sequentially grown on the silicon oxide film 2 by low pressure CVD. The polysilicon film 3 functions as a buffer layer that relieves stress from the silicon nitride film 4.

  Next, in the step shown in FIG. 1B, a resist film (not shown) is formed on the silicon nitride film 4 so as to cover a region to be an element region of the semiconductor device and to have an element isolation region as an opening. To do. Then, by performing plasma etching using this resist film as a mask, a trench 5 having a depth of 300 nm provided on the semiconductor substrate 1 is formed through the silicon nitride film 4, the polysilicon film 3, and the silicon oxide film 2. .

Next, in the step shown in FIG. 1C, after removing the resist film, the substrate is set in a heating furnace. Then, the substrate is heated to 1050 ° C. or a temperature higher by about 0 to 100 ° C. than the viscous flow temperature (1050 ° C. to 1100 ° C.) of the silicon oxide film, and dry-oxidized in an O ₂ atmosphere. Thereby, a coating oxide film 6 made of SiO ₂ and having a thickness of 15 nm to 35 nm is grown on the portion of the semiconductor substrate 1 and the polysilicon film 3 where the trench 5 is provided. Thereby, the corner portion of the trench 5 in the semiconductor substrate 1 is processed into a round shape.

In the vicinity of the corner portion of the trench 5, a nitride layer 10 made of silicon nitride is generated between the semiconductor substrate 1 and the silicon oxide film 2. Although dry oxidation is performed in an O ₂ atmosphere, O ₂ may be diluted with nitrogen or argon.

  Next, in the step shown in FIG. 1D, the substrate is pyrooxidized at 800 to 950 ° C., and additional oxidation is performed until the film thickness of the coating oxide film increased by this step reaches 5 nm to 20 nm. In this specification, “pyrooxidation” refers to so-called pyrogenic oxidation. Here, since the oxidation rate of Si in pyro-oxidation is much higher than the oxidation rate in dry oxidation, the nitride layer 10 is oxidized. Therefore, the nitride layer 10 is not shown in FIG. Further, the exposed surface of the silicon nitride film 4 is also participated at the same time, but the oxide film thickness is not shown because it is sufficiently thin (˜1 nm). In addition, this process is performed in the same heating furnace as the dry oxidation shown in FIG.1 (c).

  Here, conditions for dry oxidation shown in FIG. 1C and pyro-oxidation shown in FIG.

  FIG. 3 is a diagram showing conditions for dry oxidation and pyrooxidation in the method of manufacturing a MOS transistor of this embodiment.

First, the substrate is put into a heating furnace, and the substrate is processed at 800 ° C. for 20 minutes while supplying nitrogen of 20 L / min (2 × 10 ⁴ mL / min) as shown in FIG.

  In the subsequent period A, the substrate temperature is raised to 1100 ° C. over 40 minutes with the nitrogen flow rate kept at 20 L / min.

Next, in period B, supply of nitrogen is stopped, and oxygen is supplied at a flow rate of 10 L / min (1 × 10 ⁴ mL / min) instead, and the substrate is dry-oxidized at 1100 ° C. for 10 minutes. As a result, the exposed portion of the polysilicon film 3 in which the trench is formed and the exposed portion of the semiconductor substrate 1 are oxidized, and in the trench corner portion, the coating oxide film 6 causes a viscous flow due to the growth at this high temperature. Relieve stress at the part. This stress relaxation can prevent a decrease in the growth rate of the coating oxide film 6 in the corner portion, and the corners of the semiconductor substrate 1 can be rounded. The temperature of dry oxidation is not limited to 1100 ° C., but is 1050 ° C. or higher, or about 100 ° C. higher than the viscous flow temperature (about 1050 ° C. to 1100 ° C.) of the coating oxide film 6 (here, silicon oxide film). It is preferable that it is below ℃. Here, if the temperature of dry oxidation is lower than 1050 ° C., a tensile stress may be applied to the corner portion of the trench, resulting in a thin film. Moreover, since the melting point of SiO ₂ is 1250 ° C., the upper limit temperature in the production process is preferably 1200 ° C.

Nitrogen or argon (Ar) for dilution may be supplied simultaneously with oxygen. Further, water vapor, halogen gas (a gas containing HCl such as HCl, Cl ₂ ), ozone, or the like may be added. By adding a halogen gas, metal impurities are removed, so that the film thickness controllability is improved.

  Next, in period C, the supply of oxygen is stopped, and the substrate temperature is lowered to 850 ° C. over 80 minutes while supplying nitrogen again at a flow rate of 20 L / min.

  Next, in the period D, supply of nitrogen is stopped, oxygen is supplied at a flow rate of 10 L / min, and hydrogen is supplied into the heating furnace at a flow rate of 2 L / min. Then, the substrate temperature is kept at 850 ° C. for 10 minutes, and the substrate is additionally oxidized. As a result, the nitride layer 10 is oxidized and becomes removable with a hydrofluoric acid chemical. Although the temperature of the additional oxidation is 850 ° C. here, the nitride layer 10 can be oxidized quickly if the temperature is 700 ° C. or higher and 1000 ° C. or lower. The upper limit is set to 1000 ° C. because a new nitride layer is formed when the temperature is exceeded. Here, water vapor, halogen gas, ozone, or the like may be added to the atmosphere.

  Next, supply of oxygen and hydrogen is stopped and nitrogen is supplied at a flow rate of 20 L / min to lower the substrate temperature to 800 ° C. over 10 minutes. Subsequently, the nitrogen flow rate is kept as it is, and the temperature is maintained at 800 ° C. for 20 minutes.

  As described above, dry oxidation and pyrooxidation are performed.

Next, in the step shown in FIG. 2A, the SiO ₂ film 7 having a thickness of about 600 nm or sufficient to fill the trench 5 is formed on the substrate by CVD or the like. Thereafter, the substrate is heat-treated at 1000 ° C. or higher in a nitrogen or argon atmosphere to sufficiently relax the stress of the SiO ₂ film 7.

Next, in the step shown in FIG. 2B, the SiO ₂ film 7 is polished by CMP until the silicon nitride film 4 is exposed, and the upper surface of the substrate is flattened. As a result, the trench 5 is filled and an element isolation insulating film 7a made of SiO ₂ is formed.

2C, after removing the silicon nitride film 4 using phosphoric acid, the polysilicon film 3 is removed using an NH ₄ OH / H ₂ O ₂ mixed solution. Next, after forming an impurity diffusion layer (not shown) in a predetermined region of the semiconductor substrate 1, a silicon oxide film 2 and an oxidized nitride layer 10 (not shown) using a hydrofluoric acid-based etching agent are used. Remove.

  Next, in the step shown in FIG. 2D, the gate insulating film 8 is formed on the semiconductor substrate 1 by heat treatment or the like, and the gate electrode 9 is formed on the gate insulating film 8. Thereafter, the MOS transistor of this embodiment is completed through various processes such as ion implantation and sidewall formation.

  According to the manufacturing method of the MOS transistor of this embodiment, the corner portion of the trench in the semiconductor substrate 1 can be rounded and the nitride layer 10 can be removed by combining dry oxidation and pyrooxidation.

  A nitride layer 10 is once formed on the semiconductor substrate 1 in the dry oxidation process shown in FIG. However, since the nitride layer 10 is oxidized by the subsequent pyrooxidation, the nitride layer 10 is easily removed simultaneously with the silicon oxide film 2 in the step shown in FIG. Therefore, the gate insulating film 8 having a uniform thickness can be formed in the step shown in FIG. As a result, the leakage of current from the vicinity of the element isolation insulating film 7a in the gate insulating film 8 can be significantly reduced as compared with the prior art, so that the reliability of the semiconductor device can be improved.

The method for manufacturing a semiconductor device according to the present embodiment is very effective not only for MOS transistors but also for MISFETs in which the gate insulating film is made of a material other than SiO ₂ . The same applies to other embodiments.

  In the pyrooxidation of this embodiment, the flow rate ratio of oxygen to hydrogen is 5: 1, but other ratios may be used.

  In the method of manufacturing the semiconductor device according to the present embodiment, the polysilicon film 3 is used as the buffer layer. However, other materials such as amorphous silicon can be used as the buffer layer material. Further, even when the buffer layer is not provided, a semiconductor device with improved reliability can be manufactured using the method of this embodiment. The same applies to the following embodiments.

Further, in the method for manufacturing the semiconductor device of this embodiment, the nitride layer 10 can be oxidized even if dry oxidation is performed under a high pressure of 1 × 10 ⁵ Pa or more instead of the pyrooxidation shown in FIG. it can.

(Second Embodiment)
As a second embodiment of the present invention, a description will be given of a method of manufacturing a MOS transistor in which the coating oxide film 6 is formed by oxidation using lamp heating.

  4A to 4D are cross-sectional views showing a part of the manufacturing process of the MOS transistor according to this embodiment. In addition, about the member which is common in FIG.1 and FIG.2, it shows with the same code | symbol.

  In the step shown in FIG. 4A, a semiconductor substrate 1 made of silicon is prepared. Next, a silicon oxide film 2 having a thickness of 20 nm is formed on the semiconductor substrate 1 by thermal oxidation. Subsequently, a 50 nm thick polysilicon film 3 and a 150 nm thick silicon nitride film 4 are sequentially grown on the silicon oxide film 2 by low pressure CVD.

  Next, in the step shown in FIG. 4B, a resist film (not shown) is formed on the silicon nitride film 4 so as to cover a region to be an element region of the semiconductor device and to have an element isolation region as an opening. To do. Then, by performing plasma etching using this resist film as a mask, a trench 5 having a depth of 300 nm provided on the semiconductor substrate 1 is formed through the silicon nitride film 4, the polysilicon film 3, and the silicon oxide film 2. . The steps so far are the same as those in the first embodiment.

  Next, in the step shown in FIG. 4C, after removing the resist film, RTA (Rapid Thermal Annealing) is performed under the condition of supplying hydrogen and oxygen. In this case, the substrate temperature is preferably 1050 ° C. or higher and 1150 ° C. or lower. Here, when the substrate temperature falls below 1050, the viscous flow of the coating oxide film 6 hardly occurs, and the corner portion is not sufficiently rounded. Further, although the substrate temperature may be higher than 1150 ° C. and 1200 ° C. or lower, distortion due to thermal stress increases in the semiconductor substrate, so that crystal defects are likely to occur.

  Through the above steps, the coating oxide film 6 is formed on the inner wall portion of the trench 5 of the semiconductor substrate 1.

  Here, RTA conditions in this step will be described.

  FIG. 5 is a diagram showing the RTA conditions shown in FIG. 4C in the MOS transistor manufacturing method of the present embodiment.

  First, the substrate is placed in a lamp heating apparatus, oxygen is supplied at a flow rate of 10 mL / min, and the substrate temperature is held at 400 ° C. for 30 seconds.

  Next, in period A shown in FIG. 5, the substrate temperature is raised to 1100 ° C. over 90 seconds with the oxygen flow rate kept at 10 mL / min.

Subsequently, in period B, hydrogen is supplied at a flow rate of 5 mL / min with the oxygen flow rate kept at 10 mL / min, and the substrate is heated at 1100 ° C. for 300 seconds. The pressure in the apparatus at this time is 1.33 × 10 ³ Pa or more and 1.01 × 10 ⁵ Pa or less (10 Torr or more and 760 Torr or less). The temperature range is not limited to 1100 ° C., and may be 1050 ° C. or more and 1150 ° C. or less. A hydrogen: oxygen flow rate ratio (hydrogen flow rate / oxygen flow rate) in the range of 0.05 or more and 0.5 or less is preferable because the uniformity of the coating film thickness within the wafer surface can be improved.

  In the lamp heating apparatus, unlike the furnace, the temperature other than the substrate does not become high, so the supplied oxygen and hydrogen do not react until they reach the surface of the substrate, but react on the substrate surface to generate oxygen radicals. . Since the oxygen radical is very reactive, the exposed portion of the silicon nitride film 4, the exposed portion of the polysilicon film 3, the portion where the trench 5 of the semiconductor substrate 1 is provided, etc. are rapidly oxidized. For this reason, the corner portion of the trench 5 is rounded simultaneously with the formation of the coating oxide film 6.

In this step, since the oxidation rate of the semiconductor substrate 1 is sufficiently high and the heating time is short, it is difficult for NH ₃ to be detached from the silicon nitride film 4. There is no nitride film between them. Even if a nitride film is formed, it is rapidly oxidized. .

  Next, in period C, the substrate temperature is lowered to 400 ° C. over 30 seconds. At this time, supply of oxygen and hydrogen is stopped, and nitrogen is supplied at a flow rate of 10 mL / min. And it hold | maintains for 30 second, making the flow volume of nitrogen 10 mL / min and the substrate temperature of 400 degreeC.

  As described above, the coating oxide film 6 is formed by RTA.

Next, as shown in FIG. 4D, after depositing SiO ₂ on the substrate, the substrate is heat-treated at 1000 ° C. or higher in a nitrogen atmosphere. Then, an element isolation insulating film 7a of SiO ₂ substrate top surface is flattened by CMP. Subsequently, after removing the silicon nitride film 4 using phosphoric acid, the polysilicon film 3 is removed using an NH ₄ OH / H ₂ O ₂ mixed solution. Next, after forming an impurity diffusion layer (not shown) in a predetermined region of the semiconductor substrate 1, the silicon oxide film 2 is removed using a hydrofluoric acid-based etching agent. Next, the gate insulating film 8 is formed on the semiconductor substrate 1 by heat treatment or the like, and the gate electrode 9 is formed on the gate insulating film 8.

  Thereafter, the MOS transistor of this embodiment is completed through various processes such as ion implantation and sidewall formation. The steps after FIG. 4C are the same as those in the first embodiment.

  According to the MOS transistor manufacturing method of the present embodiment, no nitride film is formed near the corner of the trench 5 in the semiconductor substrate 1 when the covering oxide film 6 is formed, so that the gate insulating film 8 has a uniform thickness. It is possible to suppress problems such as current leakage. That is, according to the manufacturing method of this embodiment, a highly reliable MOS transistor can be manufactured.

  In the present embodiment, an example in which a MOS transistor is manufactured has been described. However, a semiconductor device such as a highly reliable MIS transistor can be manufactured by a similar method.

In the MOS transistor manufacturing method of this embodiment, oxygen radicals are generated by the reaction of oxygen and hydrogen in the step shown in FIG. 4C, but (oxygen) plasma is generated by means such as high-frequency discharge, You may utilize the oxygen radical contained in the plasma.
Oxygen radicals may be generated by oxygen plasma. Further, the coating oxide film 6 can be formed in an atmosphere containing oxygen and ozone.

  Note that the oxidation method for generating oxygen radicals by RTA described in this embodiment can be used instead of the pyrooxidation of the first embodiment. Further, since the nitride film 10 (see FIG. 1) generated by dry oxidation can be oxidized by oxygen plasma treatment or treatment in an atmosphere containing ozone and oxygen, the nitride film 10 is removed in a later step. can do.

(Third embodiment)
As a third embodiment of the present invention, a method of manufacturing a MOS transistor in which a heat treatment is performed on the substrate after the formation of the silicon nitride film 4 will be described.

  6A to 6D are cross-sectional views illustrating a part of the manufacturing process of the MOS transistor according to this embodiment.

  First, the semiconductor substrate 1 made of silicon is prepared in the step shown in FIG. Next, a silicon oxide film 2 having a thickness of 20 nm is formed on the semiconductor substrate 1 by thermal oxidation. Subsequently, a 50 nm thick polysilicon film 3 and a 150 nm thick silicon nitride film 4 are sequentially grown on the silicon oxide film 2 by low pressure CVD.

Next, the substrate is heat-treated at 1100 ° C. in a nitrogen or argon atmosphere, and NH ₃ remaining in the silicon nitride film 4 is released to the outside. The conditions for this heat treatment will be described below.

  FIG. 7 is a diagram showing the heat treatment conditions shown in FIG. 6A in the MOS transistor manufacturing method of the present embodiment.

  First, the substrate is put into a heating furnace, nitrogen is supplied at a flow rate of 20 L / min, and held at 800 ° C. for 20 minutes. Note that the supply amount of nitrogen is maintained at 20 L / min throughout the heat treatment.

  Next, the substrate temperature is raised from 800 ° C. to 1100 ° C. over 40 minutes.

Subsequently, heat treatment is performed for 30 minutes while keeping the substrate temperature at 1100 ° C. Thereby, the elimination of NH ₃ remaining in the silicon nitride film 4 proceeds promptly. Note that the substrate temperature here is not limited to 1100 ° C. and may be 1000 ° C. or more and 1200 ° C. or less.

  Next, the substrate temperature is lowered from 1100 ° C. to 800 ° C. over 80 minutes. Thereafter, the substrate is treated at 800 ° C. for 20 minutes.

  As described above, the heat treatment of the substrate is performed. In the MOS transistor manufacturing method of this embodiment, the subsequent steps are the same as the conventional method.

  That is, in the step shown in FIG. 6B, a trench 5 having a depth of 300 nm provided on the semiconductor substrate 1 is formed through the silicon nitride film 4, the polysilicon film 3, and the silicon oxide film 2 by plasma etching. .

Next, in the step shown in FIG. 6 (c), the substrate was set in a heating furnace to heat the substrate 1050 ° C., or a temperature higher about 100 ° C. than viscous flow temperature of the silicon oxide film, O ₂ atmosphere Oxidize with dry. Thereby, a coating oxide film 6 made of SiO ₂ and having a thickness of 15 nm to 35 nm is grown on the portion of the semiconductor substrate 1 and the polysilicon film 3 where the trench 5 is provided. Thereby, the corner portion of the trench 5 in the semiconductor substrate 1 is processed into a round shape. In the present embodiment, NH ₃ is removed from the silicon nitride film 4 in the step shown in FIG. 6A, so that a nitride film may be formed at the corner of the trench 5 of the semiconductor substrate 1 in this step. Absent.

Next, as shown in FIG. 6D, after depositing SiO ₂ on the substrate, the substrate is heat-treated at 1000 ° C. or higher in a nitrogen atmosphere. Then, an element isolation insulating film 7a of SiO ₂ substrate top surface is flattened by CMP. Subsequently, after removing the silicon nitride film 4 using phosphoric acid, the polysilicon film 3 is removed using an NH ₄ OH / H ₂ O ₂ mixed solution. Next, after forming an impurity diffusion layer (not shown) in a predetermined region of the semiconductor substrate 1, the silicon oxide film 2 is removed using a hydrofluoric acid-based etching agent. Next, the gate insulating film 8 is formed on the semiconductor substrate 1 by heat treatment or the like, and the gate electrode 9 is formed on the gate insulating film 8.

  Thereafter, the MOS transistor of this embodiment is completed through various processes such as ion implantation and sidewall formation. The processes after FIG. 6C are the same as those in the first and second embodiments.

According to the manufacturing method of the MOS transistor of this embodiment, the residual NH ₃ in the silicon nitride film 4 is released in the step shown in FIG. 1A. Therefore, during the dry oxidation shown in FIG. Formation of a nitride film at the corner of the trench 5 is prevented. For this reason, the gate insulating film 8 with good film quality and good thickness uniformity is formed. As a result, the withstand voltage of the gate insulating film 8 is improved, so that a MOS transistor with higher reliability than the conventional one can be obtained. The improvement in breakdown voltage here means improvement in applied voltage at the time of dielectric breakdown, so-called initial breakdown voltage, extension of time until dielectric breakdown when electric field is continuously applied, so-called improvement in reliability. Including both. In addition, there is an effect of reducing current leakage from the gate insulating film 8.

  In the present embodiment, an example in which a MOS transistor is manufactured is shown, but a MIS transistor can also be manufactured in the same manner.

Further, the formation of the nitride film can be prevented more reliably by combining the method of the present embodiment with the method of the first or second embodiment. That is, NH ₃ in the silicon nitride film 4 may be released by heat treatment before the trench 5 is formed, and then additional oxidation in the first embodiment, RTA in the second embodiment, or the like may be performed.

The heat treatment shown in FIG. 6A is performed in an N ₂ or argon atmosphere, but may be performed in an inert gas atmosphere such as He.

(Fourth embodiment)
As a fourth embodiment of the present invention, a method of manufacturing a MOS transistor in which a barrier layer for preventing diffusion of NH ₃ is provided below the silicon nitride film 4 will be described.

  FIGS. 8A to 8D and FIGS. 9A to 9C are cross-sectional views showing a part of the manufacturing process of the MOS transistor according to this embodiment.

  First, the semiconductor substrate 1 made of silicon is prepared in the step shown in FIG. Next, a silicon oxide film 2 having a thickness of 20 nm is formed on the semiconductor substrate 1 by thermal oxidation. Subsequently, a polysilicon film 3 having a thickness of 50 nm is grown on the silicon oxide film 2 by low pressure CVD.

Subsequently, a TiN (titanium nitride) film 11 having a thickness of 10 nm is sequentially grown on the polysilicon film 3 and a Ti film 12 having a thickness of 10 nm is sequentially grown on the TiN film 11 by sputtering. Then, a silicon nitride film 4 having a thickness of 150 nm is formed on the Ti film 12 by low pressure CVD. Here, the TiN film 11 is provided as a barrier layer that prevents the Ti film 12 from reacting with the polysilicon film 3 to salicide, but may not be provided in some cases. The Ti film 12 functions as a barrier layer against NH ₃ by nitriding the upper surface side with NH ₃ to become TiN when the silicon nitride film 4 is grown. Therefore, the film thickness range of the Ti film 12 is 5 nm to 30 nm. This is a film thickness that allows the Ti region to remain except for the TiN layer.

  Next, in the step shown in FIG. 8B, a resist film (not shown) is formed on the silicon nitride film 4 so as to cover a region to be an element region of the semiconductor device and to have an element isolation region as an opening. . Then, by performing plasma etching using this resist film as a mask, the silicon nitride film 4, the Ti film 12, the TiN film 11, the polysilicon film 3, and the silicon oxide film 2 are penetrated to form a depth provided on the semiconductor substrate 1. A trench 5 having a thickness of 300 nm is formed.

Next, in the step shown in FIG. 8C, after removing the resist film, the substrate is set in a heating furnace. Then, the substrate is heated to 1050 ° C. or about 100 ° C. higher than the viscous flow temperature of the silicon oxide film, and dry-oxidized in an O ₂ atmosphere. Thus, a coating oxide film 6 made of SiO ₂ and having a thickness of 15 nm to 35 nm is grown on the inner wall of the trench 5 in the semiconductor substrate 1 and the polysilicon film 3. Thereby, the corner portion of the trench 5 in the semiconductor substrate 1 is processed into a round shape. Although dry oxidation is performed in an O ₂ atmosphere, O ₂ may be diluted with nitrogen or argon. Further, the film thickness of the coating oxide film 6 may be outside the range of 15 to 35 nm as long as it can secure a sufficient radius of curvature at the trench corner.

According to the manufacturing method of the MOS transistor of the present embodiment, NH ₃ desorbed from the silicon nitride film in this step is trapped by reacting with the Ti film 12, so that NH ₃ diffuses below the Ti film 12. Is suppressed. Therefore, formation of a nitride film between the semiconductor substrate 1 and the silicon oxide film 2 is also suppressed.

Next, in the step shown in FIG. 8D, the SiO ₂ film 7 having a thickness of about 600 nm or sufficient to fill the trench 5 is formed on the substrate by CVD or the like. Thereafter, the substrate is heat-treated at 1000 ° C. or higher in a nitrogen or argon atmosphere to sufficiently relax the stress of the SiO ₂ film 7.

Next, in the step shown in FIG. 9A, the SiO ₂ film 7 is polished by CMP until the silicon nitride film 4 is exposed, and the upper surface of the substrate is flattened. As a result, the trench 5 is filled and an element isolation insulating film 7a made of SiO ₂ is formed.

Subsequently, in the step shown in FIG. 9B, after the silicon nitride film 4 is removed using phosphoric acid, the Ti film 12 and the TiN film 11 are removed using hydrogen peroxide. Further, the polysilicon film 3 is removed using a NH ₄ OH / H ₂ O ₂ mixed solution. Next, after forming an impurity diffusion layer (not shown) in a predetermined region of the semiconductor substrate 1, the silicon oxide film 2 is removed using a hydrofluoric acid-based etching agent.

  Next, in the step shown in FIG. 2D, the gate insulating film 8 is formed on the semiconductor substrate 1 by heat treatment or the like, and the gate electrode 9 is formed on the gate insulating film 8. Thereafter, the MOS transistor of this embodiment is completed through various processes such as ion implantation and sidewall formation.

  According to the manufacturing method of the MOS transistor of this embodiment, since the nitride film is not formed on the semiconductor substrate 1 in the vicinity of the element isolation insulating film 7a as described above, the gate insulating film having a uniform film thickness and good film quality. 8 can be provided. For this reason, a leak current from the gate insulating film 8 is reduced, and a MOS transistor with improved operational reliability can be manufactured.

In the MOS transistor manufacturing method of this embodiment, a refractory metal other than Ti may be used instead of the Ti film 12. For example, since refractory metals such as Ta (tantalum) and Co (cobalt) react with NH ₃ to form nitrides, they can be used as a material for a barrier layer against NH ₃ as with Ti.

  Further, in the present embodiment, even when the polysilicon layer 3 is not provided, it is possible to manufacture a semiconductor device having a gate insulating film with higher reliability than conventional. In this case, since the Ti film 12 is not silicided, the formation of the TiN film 11 can be omitted.

  Further, the manufacturing method of the present embodiment in which the Ti film 12 and the TiN film 11 are provided at the time of forming the element isolation insulating film may be combined with the first to third embodiments.

(A)-(d) is sectional drawing which shows to the process of performing pyrooxidation in the manufacturing method of the MOS transistor which concerns on the 1st Embodiment of this invention. (A)-(d) is sectional drawing which shows to the process of forming a gate electrode in the manufacturing method of the MOS transistor which concerns on the 1st Embodiment of this invention. It is a figure which shows the conditions of dry oxidation and pyrooxidation in the manufacturing method of the MOS transistor which concerns on 1st Embodiment. (A)-(d) is sectional drawing which shows a part of manufacturing process of the MOS transistor which concerns on the 2nd Embodiment of this invention. FIG. 6 is a diagram showing RTA conditions shown in FIG. 4C in the MOS transistor manufacturing method according to the second embodiment. (A)-(d) is sectional drawing which shows a part of manufacturing process of the MOS transistor which concerns on the 3rd Embodiment of this invention. FIG. 7 is a diagram showing the heat treatment conditions shown in FIG. 6A in the MOS transistor manufacturing method according to the third embodiment. (A) ~ (d) is a method of manufacturing a MOS transistor according to a fourth embodiment of the present invention, it is a cross-sectional view showing the steps required to form a SiO ₂ film. (A)-(c) is sectional drawing which shows the process until it forms a gate electrode in the manufacturing method of the MOS transistor which concerns on the 4th Embodiment of this invention. (A) ~ (d) is the manufacturing method of the conventional MOS transistor is a sectional view showing the steps required to form a SiO ₂ film. (A)-(c) is sectional drawing which shows the process until it forms a gate electrode in the manufacturing method of the conventional MOS transistor. It is a figure which shows the growth conditions of a coating oxide film in the manufacturing method of the conventional MOS transistor.

Explanation of symbols

1 semiconductor substrate 2 silicon oxide film 3 polysilicon film 4 silicon nitride film 5 trench 6 coated oxide film 7 SiO ₂ film 7a isolation insulating film 8 the gate insulating film 9 gate electrode 10 nitride layer 11 TiN film 12 Ti film

Claims (9)

Forming a silicon nitride film above a silicon oxide film provided on a semiconductor substrate;
Forming a trench penetrating the silicon nitride film and the silicon oxide film and reaching the semiconductor substrate;
A step (c) of oxidizing the inner wall of the trench in the semiconductor substrate and forming a covering oxide film surrounding the trench in an atmosphere containing at least oxygen and oxygen radicals;
And (d) forming a device isolation insulating film after filling the trench with an insulator. In the manufacturing method of the semiconductor device according to claim 1,
In the step (c), thermal oxidation is performed by lamp annealing in an atmosphere further containing hydrogen, and the oxygen radicals are generated by reacting the oxygen and the hydrogen on the semiconductor substrate. A method for manufacturing a semiconductor device. In the manufacturing method of the semiconductor device according to claim 2,
The method of manufacturing a semiconductor device, wherein the thermal oxidation in the step (c) is performed in an atmosphere further containing ozone. In the manufacturing method of the semiconductor device as described in any one of Claims 1-3,
A method of manufacturing a semiconductor device, wherein in the step (c), the oxygen radical is generated by oxygen plasma. In the manufacturing method of the semiconductor device according to any one of claims 1 to 4,
In the step (c), the temperature of the semiconductor substrate is set to 1050 ° C. or higher and 1150 ° C. or lower. Forming a silicon nitride film above a silicon oxide film provided on a semiconductor substrate;
(B) after the step (a), performing a heat treatment of the semiconductor substrate in an atmosphere containing N ₂ , Ar or an inert gas to release NH ₃ remaining in the silicon nitride film;
Forming a trench penetrating the silicon nitride film and the silicon oxide film and reaching the semiconductor substrate;
A step (d) of oxidizing the inner wall of the trench in the semiconductor substrate by thermally oxidizing the semiconductor substrate and forming a covering oxide film surrounding the trench;
And (e) forming an element isolation insulating film after filling the trench with an insulator. In the manufacturing method of the semiconductor device according to claim 6,
In the step (b), the semiconductor substrate is heat-treated at 1000 ° C. or higher and 1200 ° C. or lower. In the manufacturing method of the semiconductor device according to any one of claims 1 to 7,
The step (a) includes a step of forming a buffer layer on the silicon oxide film for relieving stress from the silicon nitride film after forming the silicon oxide film and before forming the silicon nitride film. In addition,
A method of manufacturing a semiconductor device, wherein the silicon nitride film is formed on the buffer layer. In the manufacturing method of the semiconductor device according to claim 8,
The method of manufacturing a semiconductor device, wherein the buffer layer is made of polysilicon or amorphous silicon.

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