JP2006108654A - Radio chip - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the size of an ID tag or the size of an IC, make effective use of a limited area in the chip, reduce an electric power consumption, and prevent the deterioration of a communication distance in the ID tag capable of communicating data by radio communication. <P>SOLUTION: A laminate structure, including an integrated circuit, a resonant capacitance section, the IC chip provided with a retention section, an antenna provided so as to allow at least parts thereof to be superimposed through an insulating film on the IC chip, and wiring or a semiconductor film forming the antenna, is provided, and the laminate structure configures the capacitative element of one or both of the resonant capacitance section and retention section. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor device such as a wireless chip capable of communicating data by wireless communication.

  In recent years, with the spread of the Internet, IT (Information Technology) has permeated the whole world and brought about a major change. In recent years, in particular, an environment that can access a network anytime and anywhere has been prepared, as is called a ubiquitous information society. In such an environment, attention has been paid to a solid recognition technique in which an ID (solid identification number) is given to each target object to clarify the history of the target object, which is useful for production, management, and the like. Among them, RFID (Radio Frequency Identification) such as wireless chips (also referred to as ID tags, IC tags, IC chips, RF tags (Radio Frequency), wireless tags, and electronic tags) has been experimentally tested in companies and markets. Has begun to be introduced. Such a semiconductor device such as a wireless chip is mounted on a card or the like, and recently, application to various fields has been proposed. (For example, Patent Document 1)

  In general, the wireless chip 100 includes an antenna 101 and an IC chip 102 as illustrated in FIG. 8A, and the antenna 101 and the IC chip 102 are separately formed and attached so as to be electrically connected. Often formed together.

  Further, the IC chip 102 mainly includes a power generation unit 103, a control unit 104, a storage unit 105, and a resonance capacitor 106 (FIG. 8B). The power generation means 103 generates a DC voltage by smoothing the AC signal received by the antenna after rectification. Further, the power generation means 103 has a capacitor element called a storage capacitor portion 107 for smoothing the AC signal after rectification and holding charges. The control means 104 controls signals such as taking out a data signal or a clock signal from the AC signal received by the antenna, or transmitting a modulated AC signal from the antenna. The storage unit 105 stores unique ID data of the semiconductor device. The resonant capacitor 106 is provided in order to receive the AC signal having the specified frequency most efficiently.

Here, FIG. 9 shows a schematic diagram of the capacitor 110. The capacitor 110 includes two electrodes, a first electrode 111 and a second electrode 112, and the two electrodes are provided with an insulating film interposed therebetween (FIG. 9A). In general, a capacitor element is provided with a wiring of an integrated circuit constituting a logic unit such as a power generation unit, a control unit, or a storage unit, or a semiconductor film into which impurities are introduced as one electrode (for example, the first electrode 111). A semiconductor film into which another wiring or an impurity is introduced is provided as the other electrode (for example, the second electrode 112), and the two electrodes are formed with an insulating film 113 interposed therebetween (FIG. 9B).
JP 2001-260580 A

  In general, in a wireless chip, when an antenna and an IC chip are arranged so as to overlap each other, an integrated circuit included in the IC chip may malfunction, and thus the antenna and the IC chip are arranged so as not to overlap. However, when the antenna and the IC chip are arranged so as not to overlap with each other, most of the area of the wireless chip is occupied by the area of the antenna and the IC chip. Magnetic flux generated by electromagnetic induction is difficult to pass. Furthermore, when the area occupied by the capacitive element such as the storage capacitor portion and the resonance capacitor portion is large, the size of the IC chip increases, and accordingly, the size of the wireless chip itself increases.

  Further, as described above, when the size of the wireless chip or the size of the IC chip is large, the amount of current necessary for circuit operation increases. As a result, current consumption increases and the power supply may drop in voltage, which may reduce the communication distance and eventually stop responding.

  In view of the above situation, the present invention reduces the size of a wireless chip and the size of an IC chip in a wireless chip capable of data communication by wireless communication, effectively uses a limited area in the chip, and consumes current. It is an object to prevent reduction and a decrease in communication distance.

  In order to solve the above-described problems, the present invention provides a wireless chip having the following configuration.

  The wireless chip of the present invention includes an IC chip provided with a capacitor element, and an antenna provided on the IC chip so as to overlap at least partly via an insulating film. Of the two electrodes of the capacitor element, An antenna is provided as one electrode. In the present invention, a capacitive element provided in the IC chip is disposed in a portion where the IC chip and the antenna overlap. In addition, the capacitor element may be selectively provided in a portion where the IC chip and the antenna overlap.

  Further, another structure of the wireless chip of the present invention is an IC chip including an integrated circuit, a resonance capacitor portion, and a storage capacitor portion, and is provided so that at least a part thereof overlaps with the IC chip via an insulating film. The integrated circuit includes a semiconductor film including at least an impurity region, a gate electrode provided over the semiconductor film via a gate insulating film, and an interlayer insulating film provided to cover the gate electrode A resonance capacitor unit having a source or drain electrode provided on the interlayer insulating film and a laminated structure of a wiring provided on the interlayer insulating film, an insulating film provided to cover the wiring, and an antenna. And the capacity | capacitance of one or both of the storage capacity | capacitance part is formed. Further, the wiring can be provided using the same material as the source or drain electrode, and may be provided so as to be electrically connected to the source or drain electrode. In the present invention, it is preferable that the resonance capacitor portion and the holding capacitor portion provided in the IC chip are arranged in a portion where the IC chip and the antenna overlap, and the integrated circuit is arranged in a portion where they do not overlap. Note that the capacitance of the resonant capacitor holds the charge generated by resonating the antenna and the capacitor of the resonant capacitor in parallel.

  Further, according to the present invention, in the above structure, the resonant capacitor section and the storage capacitor are provided by a laminated structure including a wiring provided on the gate insulating film, a wiring provided on the gate insulating film, an interlayer insulating film, an insulating film, and an antenna. One or both of the capacities of the parts are formed. In this case, the wiring can be provided using the same material as the gate electrode, and may be provided so as to be electrically connected to the gate electrode.

  Further, according to the present invention, in the above configuration, the resonant capacitor unit and the wiring are provided on the insulating surface, and the laminated structure including the wiring provided on the insulating surface, the gate insulating film, the interlayer insulating film, the insulating film, and the antenna. One or both of the capacities of the storage capacitor portions are formed. In this case, a wiring (also referred to as a semiconductor film into which an impurity is introduced) can be provided using the same material as the impurity region of the semiconductor film.

  Further, another configuration of the wireless chip of the present invention includes an IC chip including a resonance capacitor portion and a holding capacitor portion, and an antenna provided on the IC chip so as to at least partially overlap with an insulating film. The resonance capacitor unit and the storage capacitor unit are arranged so as to overlap each other. Of the two electrodes of the capacitor element provided in the resonance capacitor unit, the antenna is provided as one electrode, and the other electrode is provided in the storage capacitor unit. The capacitor is provided in the same manner as one electrode of the capacitor element provided. Note that at least a part of the resonance capacitor unit and the storage capacitor unit may overlap.

  Further, another structure of the wireless chip of the present invention is an IC chip including an integrated circuit, a resonance capacitor portion, and a storage capacitor portion, and is provided so that at least a part thereof overlaps with the IC chip via an insulating film. The integrated circuit includes a semiconductor film including at least an impurity region, a gate electrode provided over the semiconductor film via a gate insulating film, and an interlayer insulating film provided to cover the gate electrode A source or drain electrode provided on the interlayer insulating film, and an insulating film provided so as to cover the source or drain electrode, and the resonance capacitor portion and the storage capacitor portion are arranged to overlap each other, and on the gate insulating film A capacitance of the storage capacitor portion is formed by a stacked structure of the first wiring provided on the interlayer insulating film, the interlayer insulating film, and the second wiring provided on the interlayer insulating film, and the second wiring and the insulating film And the laminated structure of the antenna By, it is characterized in that the capacitance of the resonance capacitor portion is formed. The first wiring can be provided using the same material as the gate electrode and may be provided so as to be electrically connected to the gate electrode. The second wiring can be provided using the same material as the source or drain electrode and may be provided so as to be electrically connected to the source or drain electrode.

  Further, another structure of the wireless chip of the present invention is an IC chip including an integrated circuit, a resonance capacitor portion, and a storage capacitor portion, and is provided so that at least a part thereof overlaps with the IC chip via an insulating film. The integrated circuit includes a semiconductor film including at least an impurity region provided over an insulating surface, a gate electrode provided over the semiconductor film via a gate insulating film, and covering the gate electrode An interlayer insulating film provided; and a source or drain electrode provided on the interlayer insulating film, wherein the resonance capacitor portion and the storage capacitor portion are arranged to overlap each other, and a first wiring provided on the insulating surface; The capacitance of the storage capacitor portion is formed by the laminated structure of the gate insulating film, the interlayer insulating film, and the second wiring provided on the interlayer insulating film, and the laminated structure of the second wiring, the insulating film, and the antenna, The capacity of the resonant capacitor is It is characterized in that have been made. Further, the first wiring can be provided using the same material as the impurity region of the semiconductor film. The second wiring can be formed using the same material as the source or drain electrode and may be provided so as to be electrically connected to the source or drain electrode.

  Note that the wireless chip in the present invention includes all IC chips, RF tags, wireless tags, electronic tags, and the like that can communicate data by wireless communication.

  The antenna and the IC chip are integrally formed, the antenna and the IC chip are overlapped, and one end of two electrodes of a capacitive element such as a holding capacitor and a resonance capacitor included in the IC chip is used as an antenna, so that the size of the wireless chip and the IC It is possible to reduce the size of the chip, effectively use a limited area in the chip, reduce current consumption, and prevent a decrease in communication distance.

Embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below. Note that in the structures of the present invention described below, the same reference numeral is used in different drawings.
(Embodiment 1)

  In this embodiment, a structural example of a wireless chip of the present invention will be described with reference to drawings.

  As shown in FIG. 1A, a wireless chip 200 described in this embodiment is formed by stacking an antenna 201 and an IC chip 202 over the same substrate 210, and at least part of the antenna 201 and the IC chip 202. Are stacked with an insulating film interposed therebetween. The IC chip 202 has a resonance capacitor unit 204 and a logic unit 205 including a power generation unit, a control unit, a storage unit, and the like. The logic unit 205 is provided with a storage capacitor unit 203. Note that the resonance capacitor unit 204 and the storage capacitor unit 203 are selectively arranged in a portion where the antenna 201 and the IC chip 202 overlap. Note that both ends of the antenna 201 are electrically connected to the integrated circuit of the logic unit 205.

  Capacitance elements provided in the storage capacitor portion 203, the resonance capacitor portion 204, and the like have two electrodes via an insulating film. In this embodiment mode, the antenna 201 is provided as one electrode of a capacitor provided in the storage capacitor portion 203 or the resonance capacitor portion 204. That is, in the storage capacitor portion 203 or the resonance capacitor portion 204, the antenna 201 arranged in a region where the capacitor element is provided is used as one electrode of the capacitor element. Hereinafter, a case where one electrode of the capacitive element of the resonance capacitor unit 204 is an antenna and a case where one electrode of the capacitive element of the storage capacitor unit 203 is an antenna will be described with reference to the drawings.

  FIG. 1B is a cross-sectional view of the resonance capacitor portion 204, and an integrated circuit 211, a resonance capacitor portion 204, and an antenna 201 that form a logic portion 205 are provided over a substrate 210. Note that FIG. 1B corresponds to a cross section between A1 and A2 in the wireless chip 200 in FIG.

  The integrated circuit 211 includes semiconductor films 901a and 901b including at least impurity regions, a gate electrode 903 provided over the semiconductor films 901a and 901b with a gate insulating film 902 interposed therebetween, and a first electrode provided to cover the gate electrode 903. And a source or drain electrode 905 which is provided on the first interlayer insulating film 904 and electrically connected to the impurity regions of the semiconductor films 901a and 901b.

  In addition, the resonance capacitor portion 204 has a configuration in which the wiring 212 and the antenna 201 are provided via the second interlayer insulating film 213. Thus, a capacitor is formed in the capacitor element 214 of the resonance capacitor unit 204 by the laminated structure including the wiring 212, the second interlayer insulating film 213, and the antenna 201. That is, in this embodiment mode, of the two electrodes of the capacitor 214, the antenna 201 is provided as one electrode and the wiring 212 is provided as the other electrode. In this case, it is preferable to form the second interlayer insulating film 213 thin in order to increase the capacitance.

  Next, a method for manufacturing the above structure will be briefly described below.

  First, the substrate 210 is prepared. As the substrate 210, for example, a glass substrate such as barium borosilicate glass or alumino borosilicate glass, a quartz substrate, a ceramic substrate, or the like can be used. Alternatively, a metal substrate containing stainless steel or a semiconductor substrate with an insulating film formed on the surface thereof may be used. A substrate made of a synthetic resin having flexibility such as plastic generally tends to have a lower heat resistant temperature than the above substrate, but can be used as long as it can withstand the processing temperature in the manufacturing process. . Note that the surface of the substrate 210 may be planarized by polishing such as a CMP method.

  Next, the integrated circuit 211 constituting the logic unit 205 is formed over the substrate 210 by a known method. The integrated circuit 211 includes at least semiconductor films 901a and 901b, a gate electrode 903 provided over the semiconductor films 901a and 901b via a gate insulating film 902, and a first interlayer insulating film provided to cover the gate electrode 903 904 and a source or drain electrode 905 provided on the first interlayer insulating film 904.

  The semiconductor films 901a and 901b are an amorphous semiconductor, a semiconductor in which an amorphous state and a crystalline state are mixed, a microcrystalline semiconductor in which crystal grains of 0.5 nm to 20 nm can be observed in the amorphous semiconductor, and It may have any state selected from crystalline semiconductors. In this embodiment, an amorphous semiconductor film is formed and a crystalline semiconductor film crystallized by heat treatment is formed. The heat treatment can be performed using a heating furnace, laser irradiation, irradiation of light emitted from a lamp instead of laser light (lamp annealing), or a combination thereof.

  Next, a gate insulating film 902 is formed so as to cover the semiconductor films 901a and 901b. The gate insulating film 902 can be formed by stacking a single layer or a plurality of layers using, for example, silicon oxide, silicon nitride, silicon nitride oxide, or the like. As a film formation method, a plasma CVD method, a sputtering method, or the like can be used.

  Subsequently, gate electrodes 903 are formed above the semiconductor films 901a and 901b with the gate insulating film 902 interposed therebetween. The gate electrode 903 may be formed as a single layer or a stack of a plurality of metal films. As the gate electrode, tantalum (Ta), tungsten (W), titanium (Ti), molybdenum (Mo), aluminum (Al), copper (Cu), chromium (Cr), neodymium are used by CVD or sputtering. An element selected from (Nd), or an alloy material or a compound material containing the element as a main component can be used. In this embodiment mode, the first conductive layer and the second conductive layer are sequentially stacked, tantalum nitride is used as the first conductive layer, and tungsten (W ).

  Next, an impurity imparting n-type or p-type conductivity is selectively added to the semiconductor films 901a and 901b using the gate electrode 903 or a resist pattern formed and patterned as a mask. The semiconductor films 901a and 901b each have a channel formation region and an impurity region (including a source region, a drain region, and an LDD region), and an n-channel thin film transistor (hereinafter referred to as an “n-channel TFT” depending on the conductivity type of the added impurity element. And a p-channel thin film transistor (hereinafter also referred to as “p-channel TFT”).

  In FIG. 1, the n-channel TFT has a sidewall on the side wall of the gate electrode 903, and a source region, a drain region, and an LDD region in which an impurity imparting n-type conductivity is selectively added to the semiconductor film 901b. Is formed. In the p-channel TFT, a source region and a drain region to which an impurity imparting p-type conductivity is selectively added are formed in the semiconductor film 901a. Here, a structure in which a sidewall is formed on the side wall of the gate electrode 903 and an LDD region is selectively formed in an n-channel TFT is shown; however, the present invention is not limited to this structure, and an LDD region is also formed in a p-channel TFT. It may be formed, or the p-channel TFT may not be provided with a sidewall. Alternatively, a CMOS structure in which an n-channel TFT and a p-channel TFT are complementarily combined may be formed.

  Next, a first interlayer insulating film 904 is formed so as to cover the gate electrode 903. The first interlayer insulating film 904 includes oxygen or nitrogen such as silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy) (x> y), silicon nitride oxide (SiNxOy) (x> y), or the like. It can be formed using a single layer structure of an insulating film having a layer structure or a stacked structure of these. In addition, resin materials such as epoxy resin, acrylic resin, phenol resin, novolac resin, melamine resin, urethane resin, and silicon resin can be used. It is also formed using organic materials such as benzocyclobutene, parylene, flare, polyimide, compound materials made by polymerization of siloxane polymers, composition materials containing water-soluble homopolymers and water-soluble copolymers, etc. Also good.

  Thereafter, a source or drain electrode 905 is formed over the first interlayer insulating film 904. The source or drain electrode 905 is electrically connected to the impurity regions of the semiconductor films 901a and 901b. In FIG. 1, the wiring 212 is formed using the same material as the source or drain electrode 905. As the source or drain electrode 905 and the wiring 212, aluminum (Al), tungsten (W), titanium (Ti), tantalum (Ta), molybdenum (Mo), nickel (Ni), and platinum are formed by CVD or sputtering. Mainly selected from elements selected from (Pt), copper (Cu), gold (Au), silver (Ag), manganese (Mn), neodymium (Nd), carbon (C), and silicon (Si) An alloy material or a compound material as a component, which is formed as a single layer or a laminated layer. The alloy material containing aluminum as a main component corresponds to, for example, a material containing aluminum as a main component and containing nickel, or an alloy material containing aluminum as a main component and containing nickel and one or both of carbon and silicon. The source or drain electrode 905 and the wiring 212 are, for example, a laminated structure of a barrier film, an aluminum silicon (Al—Si) film, and a barrier film, or a laminated film of a barrier film, an aluminum silicon (Al—Si) film, a titanium nitride film, and a barrier film. A structure should be adopted. Note that the barrier film corresponds to a thin film formed of titanium, titanium nitride, molybdenum, or molybdenum nitride. Aluminum and aluminum silicon have low resistance and are inexpensive, and thus are optimal materials for forming the source or drain electrode 905 and the wiring 212. In addition, when an upper layer and a lower barrier layer are provided, generation of hillocks of aluminum or aluminum silicon can be prevented. In addition, when a barrier film made of titanium, which is a highly reducing element, is formed, even if a thin natural oxide film is formed on the crystalline semiconductor film, the natural oxide film is reduced, and the crystalline semiconductor film is excellent. Contact can be made.

  Subsequently, a second interlayer insulating film 213 is formed so as to cover the source or drain electrode 905 and the wiring 212. The second interlayer insulating film 213 can be formed using any of the materials shown for the first interlayer insulating film.

  After that, the antenna 201 is formed over the second interlayer insulating film 213 and the protective film 215 is formed over the antenna 201, whereby the wireless chip is completed. The antenna 201 is formed using a conductive material by a CVD method, a sputtering method, a screen printing method, a droplet discharge method, or the like. The conductive material is an element selected from aluminum (Al), titanium (Ti), silver (Ag), copper (Cu), gold (Au), nickel (Ni), or an alloy containing these elements as a main component. The material or compound material is formed in a single layer structure or a laminated structure. In addition, the material of the protective film 215 can be formed using any of the materials shown for the first interlayer insulating film. FIG. 1 shows a case where a coiled antenna 201 having two turns is provided as one electrode of the capacitive element 214 of the resonance capacitor unit 204, but the present invention is not limited to this, and the antenna is wound one or more times. May be used as one electrode of the capacitor 214.

  Next, the case where the antenna is used as one of the two electrodes of the capacitor of the storage capacitor 203 will be described.

  FIG. 1C illustrates a cross-sectional view of the storage capacitor portion 203, in which an integrated circuit 211, a storage capacitor portion 203, and an antenna 201 that form a logic portion 205 are provided over a substrate 210. Note that FIG. 1C corresponds to a cross section between B1 and B2 in the wireless chip 200 in FIG.

  As described above, the integrated circuit 211 covers the semiconductor films 901a and 901b including at least the impurity regions, the gate electrode 903 provided over the semiconductor films 901a and 901b with the gate insulating film 902 interposed therebetween, and the gate electrode 903. The first interlayer insulating film 904 is provided, and the source or drain electrode 905 is provided on the first interlayer insulating film 904 and electrically connected to the impurity region.

  In addition, the storage capacitor portion 203 has a structure in which a wiring 216 and an antenna 201 which are formed in the same manner as the source or drain electrode 905 included in the integrated circuit are provided via a second interlayer insulating film 213. A capacitor is formed in the capacitor element 217 of the storage capacitor portion 203 by the stacked structure of the wiring 216, the second interlayer insulating film 213, and the antenna 201. That is, in this embodiment, of the two electrodes of the capacitor 217, the antenna 201 is provided as one electrode and the wiring 216 is provided as the other electrode.

  Further, the storage capacitor 203 can be formed in the same manner as the resonance capacitor 204. Note that here, a case where the coiled antenna 201 that is wound once is provided as one electrode of the capacitor element 217 of the storage capacitor portion 203 is not limited thereto, but an antenna that is wound a plurality of times is provided. It may be used as one end.

  In the present embodiment, a capacitor is formed by using an antenna as one of the two electrodes of the capacitive element such as the storage capacitor 203 and the resonant capacitor 204 included in the IC chip 202. In this case, the above configuration may be applied to only one of the capacitive elements of the storage capacitor unit 203 and the resonant capacitor unit 204, or the above configuration may be applied to both. FIG. 2 shows a case where the above-described configuration is applied to each of the capacitive element of the storage capacitor unit 203 and the capacitive element of the resonant capacitor unit 204.

  2B is a cross-sectional view of the storage capacitor portion 203 and the resonance capacitor portion 204. The integrated circuit 211, the storage capacitor portion 203, the resonance capacitor portion 204, and the antenna 201 that constitute the logic portion 205 over the substrate 210 are shown. Is provided. Note that FIG. 2B corresponds to a cross section taken along line C1-C2 in the wireless chip 200 in FIG.

  In FIG. 2, the antenna 201 is provided in common as one of the two electrodes in the capacitive elements of the resonant capacitor unit 204 and the storage capacitor unit 203. The wiring 212 is provided as the other electrode of the capacitive element 214 of the resonant capacitor unit 204, and the wiring 216 is provided as the other electrode of the capacitive element 217 of the storage capacitor unit 203.

  In this manner, by providing the wiring 212 and the wiring 216, the second interlayer insulating film 213, and the antenna 201 in a stacked manner, capacitors can be formed in the capacitor elements 214 and 217. The wiring 212 and the wiring 216 can be formed using the same material as the source or drain electrode 905 included in the integrated circuit 211. Note that one electrode of the capacitor element 217 of the storage capacitor unit 203 and the capacitor element 214 of the resonance capacitor unit 204 uses a coiled antenna. However, the number of turns of the antenna may be one, or a plurality of antennas may be used. You may provide as an electrode of a capacitive element.

  Note that although the case where one electrode of the capacitor is provided as an antenna and the other electrode is provided as a wiring is described in this embodiment mode, the present invention is not limited thereto, and the other electrode is provided using a semiconductor film to which an impurity is added. Alternatively, a wiring formed of the same material as the gate electrode may be provided.

  With the above structure, the size of the wireless chip and the size of the IC chip can be reduced, the limited area in the chip can be effectively used, current consumption can be reduced, and a reduction in communication distance can be prevented.

(Embodiment 2)
In this embodiment, a structure different from that in the above embodiment in a wireless chip is described with reference to drawings. Specifically, a structure in which an antenna is provided as one of two electrodes of a capacitor and a semiconductor film or a gate wiring is provided as the other electrode is described. Note that in this embodiment, the same reference numerals are used to indicate the same components as those in the above embodiment.

  FIG. 3B is a cross-sectional view of the resonance capacitor portion 204, and the integrated circuit 211, the resonance capacitor portion 204, and the antenna 201 that form the logic portion 205 are provided over the substrate 210. Note that FIG. 3B corresponds to a cross section between A1 and A2 in the wireless chip 200 in FIG.

  In FIG. 3B, the resonant capacitor 204 includes a semiconductor film 252 formed of the same material as the impurity regions of the semiconductor films 901a and 901b included in the integrated circuit 211, the antenna 201, and the gate insulating film 902 and the first interlayer. The insulating film 904 and the second interlayer insulating film 213 are provided. As described above, a capacitor is formed in the capacitor 254 by the stacked structure of the semiconductor film 252 into which the impurity is introduced, the gate insulating film 902, the first interlayer insulating film 904, the second interlayer insulating film 213, and the antenna 201. . That is, of the two electrodes of the capacitor 254, the antenna 201 is provided as one electrode, and the semiconductor film 252 into which an impurity is introduced is provided as the other electrode. Note that in the structure illustrated in FIG. 3B, the capacitor 212 is provided by replacing the wiring 212 illustrated in FIG. 1B with a semiconductor film 252 into which an impurity is introduced.

  As described above, the semiconductor film 252 into which the impurity is introduced can be used as an electrode of the capacitor 254. The semiconductor film 252 into which the impurity is introduced can be formed in a manner similar to the impurity regions of the semiconductor films 901a and 901b. That is, when an impurity is added to the semiconductor films 901a and 901b to form a source or drain region or an LDD region, the impurity is simultaneously added to the entire surface of the semiconductor film formed in the resonant capacitor 204. A semiconductor film 252 is formed.

  Similarly to the resonant capacitor unit 204, the storage capacitor unit 203 includes the antenna 201 as one electrode of the two electrodes of the capacitor element, and the semiconductor film 256 into which the impurity is introduced as the other electrode. A capacitor can be formed in the capacitor 257 (FIG. 3C) As described above, the semiconductor film 256 into which the impurity is introduced, the gate insulating film 902, the first interlayer insulating film 904, and the second interlayer insulating film. A capacitor is formed in the capacitor 257 by the stacked structure of the antenna 213 and the antenna 201. Note that the structure illustrated in FIG 3C is a semiconductor film in which impurities are introduced into the wiring 216 illustrated in FIG 1C. The capacitor 257 is provided instead of the capacitor 256.

  Next, in the case where the antenna is provided as one of the two electrodes of the capacitive element of the resonant capacitor 204 and the holding capacitor 203 and the wiring formed simultaneously with the gate electrode is provided as the other electrode in FIG. Show.

  FIG. 4B illustrates the semiconductor film 252 into which the impurity which is one electrode of the capacitor 254 illustrated in FIG. 3B is replaced with a wiring 262. Similarly, FIG. 4C is obtained by replacing the semiconductor film 256 into which the impurity which is one electrode of the capacitor 257 illustrated in FIG. That is, in FIG. 4B, a stacked structure of the wiring 262, the first interlayer insulating film 904, the second interlayer insulating film 213, and the antenna 201, which is formed using the same material as the gate electrode 903 included in the integrated circuit. A capacitor is formed in the capacitor element 264 of the resonance capacitor unit 204. 4C, a stacked structure of a wiring 266, a first interlayer insulating film 904, a second interlayer insulating film 213, and an antenna 201 which are formed using the same material as the gate electrode 903 included in the integrated circuit. Thus, a capacitor is formed in the capacitor 267 of the storage capacitor portion 203. 4B and 4C correspond to cross sections between A1 and A2 and between B1 and B2 in the wireless chip 200 in FIG. 4A, respectively.

  As described above, the wiring 262 can be used as an electrode of the capacitor 264, and the wiring 266 can be used as an electrode of the capacitor 267. Note that the wirings 262 and 266 may be formed as a single layer similarly to the gate electrode 903 or may be formed by stacking a plurality of metal films. Further, even when the gate electrode 903 is formed by stacking a plurality of metal films, the gate electrode 903 may be formed by a single layer, or may be formed by stacking a plurality of metal films like the gate electrode. Good.

  In this embodiment, a capacitor can be formed by combining the above structures. That is, of the two electrodes of the capacitor element of the storage capacitor portion 203 and the resonance capacitor portion 204, the antenna 201 is provided as one electrode, and the other electrode is introduced with the wiring and impurities described in Embodiments 1 and 2, respectively. It is possible to form any combination of these semiconductor films.

  As a specific example, the antenna 201 can be provided on one electrode of the capacitor of the resonance capacitor portion 204 and the storage capacitor portion 203, and the wirings 262 and 266 can be provided on the other electrode (FIG. 5A). In addition, the antenna 201 is provided on one electrode of the capacitive element of the resonance capacitor portion 204 and the storage capacitor portion 203, and the wiring 262 and the impurity are introduced into the other electrode (FIG. 5B). Alternatively, the wiring 212, the wiring 266 (FIG. 5C), or the like can be provided, and any combination may be used as long as the structure is described above, which can be appropriately selected by the practitioner. FIG. 5 corresponds to a cross section taken along line C1-C2 in the wireless chip 200 in FIG.

  3 to 5 show an example in which the antenna 201 is provided over the second interlayer insulating film 213, but the present invention is not limited thereto, and the antenna 201 may be formed over the first interlayer insulating film 904. Good (FIG. 15). With such a structure, the thickness of the insulating film between the two electrodes of the capacitor 294 can be reduced, so that the capacitance can be increased. 15 has a structure in which the antenna of FIG. 3B is provided over the first interlayer insulating film 904 (FIG. 15A). The antenna 201 may have a structure (FIG. 15B) provided over the first interlayer insulating film 904 with an insulating film 907 interposed therebetween. 4B, an antenna may be provided over the first interlayer insulating film 904.

Note that this embodiment can be freely combined with the above embodiment.
(Embodiment 3)

  In the present embodiment, one of the two electrodes of the capacitive element of the resonant capacitor 334 included in the IC chip 202 is provided as the antenna 201, and the other electrode is the two electrodes of the capacitive element of the holding capacitor 333. A mode provided in common with one electrode, that is, a case where a storage capacitor portion and a resonance capacitor portion are provided in an overlapping manner is shown (FIG. 6A).

  FIG. 6B is a cross-sectional view of a stacked structure of the storage capacitor portion 333 and the resonance capacitor portion 334. The integrated circuit 211, the storage capacitor portion 333, and the resonance capacitor portion that constitute the logic portion 205 on the substrate 210 are shown. 334 and an antenna 201 are provided. Note that FIG. 6B corresponds to a cross section D1-D2 in the wireless chip 200 in FIG.

  In FIG. 6B, a wiring 316 and a wiring 312 are provided via a first interlayer insulating film 904, and the storage capacitor portion 333 is formed by a stacked structure of the wiring 316, the first interlayer insulating film 904, and the wiring 312. A capacitor is formed in the capacitor element 317. Further, in this embodiment mode, the wiring 312 and the antenna 201 are provided via the second interlayer insulating film 213, and the resonance capacitor portion 334 is formed by the stacked structure of the wiring 312, the second interlayer insulating film 213, and the antenna 201. A capacitor is formed in the capacitor element 314.

  The wiring 316 and the wiring 312 are obtained by forming each with the same material as the gate electrode, the source, or the drain electrode included in the integrated circuit 211.

  Further, this embodiment is not limited to the above structure, and the wiring 316 which is one electrode of the capacitor of the storage capacitor portion 333 can be replaced with another structure. This case is shown in FIG.

  In FIG. 7A, the wiring 316 shown in FIG. 6B is provided as a semiconductor film 326 into which an impurity is introduced. In FIG. 7A, a capacitor is formed in the capacitor 327 in the storage capacitor portion 333 by a stacked structure of the semiconductor film 326 into which the impurity is introduced, the first interlayer insulating film 904, and the wiring 312. Further, the semiconductor film 326 into which the impurity is introduced can be formed in a manner similar to the impurity region of the semiconductor film included in the integrated circuit 211.

  In FIG. 7B, a wiring 336 is provided over the first interlayer insulating film 904, a wiring 332 is provided over the second interlayer insulating film 213, and the wiring 332 is covered over the second interlayer insulating film 213. Further, a structure in which a third interlayer insulating film 318 is provided is shown. Therefore, in FIG. 7B, the wiring 336 and the wiring 332 are provided via the second interlayer insulating film 213, and the storage capacitor portion is formed by a stacked structure of the wiring 336, the second interlayer insulating film 213, and the wiring 332. A capacitor is formed in the capacitor element 337 of 333. Further, the wiring 332 and the antenna 201 are provided via the third interlayer insulating film 318, and the capacitor 344 of the resonance capacitor 334 has a capacitance due to the stacked structure of the wiring 332, the third interlayer insulating film 318 and the antenna 201. Is formed. The wiring 336 can be formed using the same material as the source or drain electrode included in the integrated circuit 211.

  With the above configuration, the size of the wireless chip and the size of the IC chip can be reduced, effective use of a limited area in the chip, reduction of current consumption, and reduction of communication distance can be prevented.

  Note that this embodiment can be freely combined with the above embodiment.

(Embodiment 4)
In this embodiment, a structure different from the arrangement of the antenna and the IC chip in the wireless chip described in the above embodiment will be described with reference to FIGS.

  In the above embodiment, the structures of the antenna 201 and the IC chip 202 in the wireless chip 200 are shown to be the same (FIGS. 1 to 7), but the present invention is not limited to this, and the antenna 201 and the IC chip 202 You may arrange as follows.

  As described above, in the present invention, the IC chip 202 is provided so as to overlap with the antenna 201. However, if the integrated circuit constituting the IC chip 202 is disposed so as to overlap with the antenna, there is a risk of malfunction of the integrated circuit. Therefore, the capacitor is selectively provided in a portion overlapping with the antenna 201, and the integrated circuit is provided so as not to overlap with the antenna as much as possible. In other words, the wireless chip may be formed in any manner as long as the antenna and the IC chip are arranged as described above. For example, the wireless chip may be provided as shown in FIGS.

  That is, the resonance capacitor portion 204, the holding capacitor portion 203, and the like are provided at an end portion of the wireless chip 200 where the antenna 201 is formed, and an integrated circuit is provided at the center side of the wireless chip 200 where the antenna 201 is not formed. However, in this case, it is necessary to provide the magnetic flux generated by electromagnetic induction so as not to pass.

  As described above, by providing an antenna and an IC chip in the wireless chip, the size of the wireless chip and the size of the IC chip are reduced, the limited area in the chip is effectively used, the current consumption is reduced, and the communication distance is reduced. Can be prevented.

(Embodiment 5)
In this embodiment, a structure different from the integrated circuit in the wireless chip described in the above embodiment will be described with reference to FIGS.

  FIG. 13 illustrates a structure in which a lower electrode is added to the structure of the integrated circuit 211 illustrated in FIG. That is, as shown in FIG. 13, the channel regions of the semiconductor films 901a and 901b are sandwiched between the lower electrodes 513a and 513b and the gate electrode 903 via the insulating film.

  The lower electrodes 513a and 513b can be formed using a metal or a polycrystalline semiconductor to which an impurity of one conductivity type is added. When using a metal, W, Mo, Ti, Ta, Al, or the like can be used. Further, although a silicon nitride film 514 and a silicon oxynitride film (SiOxNy) (x> y) 515 functioning as a base insulating film are provided, the material and the order of stacking are not limited.

  Thus, a structure having a lower electrode may be used as the integrated circuit 211. In general, when the size of the TFT is reduced and the clock frequency for operating the circuit is improved, the power consumption of the integrated circuit is increased. Therefore, a method of applying a bias voltage to the lower electrode is effective for suppressing an increase in power consumption. By changing this bias voltage, the threshold voltage of the TFT can be changed.

  Application of a negative bias voltage to the lower electrode of the n-channel TFT increases the threshold voltage and reduces leakage. On the other hand, the application of a positive bias voltage lowers the threshold voltage and makes it easier for current to flow through the channel, and the TFT operates at a higher speed or at a lower voltage. The effect of the bias voltage on the lower electrode of the p-channel TFT is the opposite. Thus, the characteristics of the integrated circuit can be greatly improved by controlling the bias voltage applied to the lower electrode.

  By using this bias voltage to control the threshold voltage of the n-channel TFT and the p-channel TFT, the characteristics of the integrated circuit can be improved. At this time, in order to reduce power consumption, both the power supply voltage and the bias voltage applied to the lower electrode may be controlled. When the circuit is in standby mode, a large reverse bias voltage is applied, and during operation, a weak reverse bias voltage is applied when the load is small, and a weak forward bias voltage is applied when the load is large. The application of the bias voltage may be switched by providing a control circuit depending on the operation state of the circuit or the load state. With such a method, power consumption and TFT performance can be controlled to maximize circuit performance.

  Note that this embodiment can be freely combined with the above embodiment.

(Embodiment 6)
A communication procedure using the wireless chip 306 of the present invention will be briefly described below (FIG. 10). In FIG. 10, the antenna 305 is not overlapped with the IC chip 304 for convenience of explanation, but is assumed to overlap as in the present invention. First, the antenna 305 included in the wireless chip 306 receives radio waves from the reader / writer 307. Then, an electromotive force is generated in the power generation means 303 by a resonance action. Then, the IC chip 304 included in the wireless chip 306 is activated, and the data in the storage unit 301 is converted into a signal by the control unit 302. Next, a signal is transmitted from the antenna 305 included in the wireless chip 306. Then, the signal transmitted by the antenna included in the reader / writer 307 is received. The received signal is transmitted to a data processing device via a controller included in the reader / writer 307, and data processing is performed using software. Note that the above communication procedure exemplifies a case of using an electromagnetic induction method using a magnetic flux generated by induction between a coil of a wireless chip and a reader / writer using a coil type antenna. You may use the radio system using the radio wave.

  The wireless chip 306 has a wide directivity depending on the point of performing contactless communication, the point that multiple reading is possible, the point that data can be written, the point that it can be processed into various shapes, and the frequency to be selected. This has advantages such as a wide recognition range. The wireless chip 306 is an IC tag that can identify individual information of a person or an object by non-contact wireless communication, a label that can be attached to a target by applying label processing, a wristband for an event or an amusement, etc. Can be applied to. Further, the wireless chip 306 may be molded using a resin material, or may be directly fixed to a metal that hinders wireless communication. Further, the wireless chip 306 can be used for system operations such as an entrance / exit management system and a payment system.

  Next, one mode when the wireless chip 306 is actually used will be described. A reader / writer 320 is provided on the side surface of the portable terminal including the display portion 321, and a wireless chip 323 is provided on the side surface of the article 322 (FIG. 11A). When the reader / writer 320 is held over the wireless chip 323 included in the product 322, information about the product such as the description of the product, such as the raw material and origin of the product, the inspection result for each production process, the history of the distribution process, and the like are displayed on the display unit 321. The Further, when the item 328 is conveyed by a belt conveyor, the item 328 can be inspected using the reader / writer 324 and the wireless chip 325 provided in the item 328 (FIG. 11B). In this manner, by using a wireless chip in the system, information can be easily acquired, and high functionality and high added value are realized.

  Note that this embodiment can be freely combined with the above embodiment.

(Embodiment 7)
In this embodiment, application of the wireless chip described in the above embodiment will be described. The wireless chip 250 includes, for example, banknotes, coins, securities, bearer bonds, certificates (driver's license, resident's card, etc., FIG. 12A), packaging containers (wrapping paper, bottles, etc. B)), recording media such as DVD software, CD and video tape (FIG. 12C), vehicles such as cars, motorcycles and bicycles (FIG. 12D), personal items such as bags and glasses (FIG. 12). (E)), can be used in foods, clothing, daily necessities, electronic devices and the like. Electronic devices refer to liquid crystal display devices, EL display devices, television devices (also simply referred to as televisions or television receivers), cellular phones, and the like.

  Note that the wireless chip can be fixed to the article by being attached to the surface of the article or embedded in the article. For example, a book may be embedded in paper, and a package made of an organic resin may be embedded in the organic resin. Forgery can be prevented by providing wireless chips on banknotes, coins, securities, bearer bonds, certificates, etc. In addition, by providing wireless chips in packaging containers, recording media, personal items, foods, clothing, daily necessities, electronic devices, etc., it is possible to improve the efficiency of inspection systems and rental store systems. In addition, forgery and theft can be prevented by providing a wireless chip in vehicles. In addition, by embedding in creatures such as animals, it is possible to easily identify individual creatures. For example, by burying a wireless tag in a living creature such as livestock, it is possible to easily identify the year of birth, sex, type, or the like.

  As described above, the wireless chip of the present invention can be provided and used for any article (including creatures). Note that this embodiment can be freely combined with the above embodiment.

FIG. 6 illustrates a structure of a wireless chip of the present invention. FIG. 6 illustrates a structure of a wireless chip of the present invention. FIG. 6 illustrates a structure of a wireless chip of the present invention. FIG. 6 illustrates a structure of a wireless chip of the present invention. FIG. 6 illustrates a structure of a wireless chip of the present invention. FIG. 6 illustrates a structure of a wireless chip of the present invention. FIG. 6 illustrates a structure of a wireless chip of the present invention. The figure which shows the structure of the conventional radio | wireless chip. The figure which shows the structure of a capacitive element. FIG. 6 illustrates a structure of a wireless chip of the present invention. The figure which shows the articles | goods which mounted the wireless chip of this invention. The figure which shows the articles | goods which mounted the wireless chip of this invention. FIG. 6 illustrates a structure of a wireless chip of the present invention. FIG. 6 illustrates a structure of a wireless chip of the present invention. FIG. 6 illustrates a structure of a wireless chip of the present invention.

Claims (11)

An IC chip including an integrated circuit, a resonant capacitor, and a storage capacitor;
An antenna provided on the IC chip so as to at least partially overlap through an insulating film,
The integrated circuit includes a semiconductor film including at least an impurity region, a gate electrode provided on the semiconductor film via a gate insulating film, an interlayer insulating film provided to cover the gate electrode, and the interlayer insulating film A source or drain electrode provided thereon,
A capacitance of one or both of the resonance capacitor unit and the storage capacitor unit is formed by a laminated structure of the wiring provided on the interlayer insulating film, the insulating film provided to cover the wiring, and the antenna. A wireless chip characterized by being made. In claim 1,
The wireless chip, wherein the wiring is formed of the same material as the source or drain electrode. An IC chip including an integrated circuit, a resonant capacitor, and a storage capacitor;
An antenna provided on the IC chip so as to at least partially overlap through an insulating film,
The integrated circuit includes a semiconductor film including at least an impurity region, a gate electrode provided on the semiconductor film via a gate insulating film, an interlayer insulating film provided to cover the gate electrode, and the interlayer insulating film A source or drain electrode provided thereon,
A capacitance of one or both of the resonant capacitor portion and the storage capacitor portion is formed by a laminated structure of the wiring provided on the gate insulating film, the interlayer insulating film, the insulating film, and the antenna. A wireless chip characterized by that. In claim 3,
The wireless chip is characterized in that the wiring is formed of the same material as the gate electrode. An IC chip including an integrated circuit, a resonant capacitor, and a storage capacitor;
An antenna provided on the IC chip so as to at least partially overlap through an insulating film,
The integrated circuit includes a semiconductor film including at least an impurity region provided over an insulating surface, a gate electrode provided over the semiconductor film via a gate insulating film, and an interlayer insulation provided over the gate electrode And a source or drain electrode provided on the interlayer insulating film,
Depending on the laminated structure of the wiring provided on the insulating surface, the gate insulating film, the interlayer insulating film and the insulating film, and the antenna, the capacitance of one or both of the resonant capacitor unit and the storage capacitor unit is A wireless chip characterized by being formed. In claim 5,
The wireless chip is characterized in that the wiring is formed of the same material as the impurity region of the semiconductor film. An IC chip comprising a resonant capacitor and a holding capacitor;
An antenna provided on the IC chip so as to at least partially overlap through an insulating film,
The resonant capacitor part and the holding capacitor part are arranged to overlap,
Of the two electrodes of the capacitive element provided in the resonant capacitor portion, the antenna is provided as one electrode, and the other electrode is provided in the same manner as one electrode of the capacitive element provided in the storage capacitor portion. A featured wireless chip. An IC chip including an integrated circuit, a resonant capacitor, and a storage capacitor;
An antenna provided on the IC chip so as to at least partially overlap through an insulating film,
The integrated circuit includes a semiconductor film including at least an impurity region, a gate electrode provided on the semiconductor film via a gate insulating film, an interlayer insulating film provided to cover the gate electrode, and the interlayer insulating film A source or drain electrode provided thereon, and the insulating film provided to cover the source or drain electrode,
The resonance capacitor unit and the storage capacitor unit are arranged to overlap,
A capacitance of the storage capacitor portion is formed by a laminated structure of the first wiring provided on the gate insulating film, the interlayer insulating film, and the second wiring provided on the interlayer insulating film,
A wireless chip, wherein a capacitor of the resonance capacitor portion is formed by a laminated structure of the second wiring, the insulating film, and the antenna. In claim 8,
The first wiring is made of the same material as the gate electrode,
The wireless chip, wherein the second wiring is provided using the same material as the source or drain electrode. An IC chip including an integrated circuit, a resonant capacitor, and a storage capacitor;
An antenna provided on the IC chip so as to at least partially overlap through an insulating film,
The integrated circuit includes a semiconductor film including at least an impurity region provided over an insulating surface, a gate electrode provided over the semiconductor film via a gate insulating film, and an interlayer insulation provided over the gate electrode And a source or drain electrode provided on the first interlayer insulating film,
The resonance capacitor unit and the storage capacitor unit are arranged to overlap,
A capacitance of the storage capacitor portion is formed by a laminated structure of the first wiring provided on the insulating surface, the gate insulating film, the interlayer insulating film, and the second wiring provided on the interlayer insulating film. And
A wireless chip, wherein a capacitor of the resonance capacitor is formed by a laminated structure of the second wiring, the insulating film, and the antenna. In claim 10,
The first wiring is formed of the same material as the impurity region of the semiconductor film,
The wireless chip, wherein the second wiring is formed of the same material as the source or drain electrode.

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