JP2006058075A - Circuit board, measuring circuit of its electrical characteristic, and electronic device equipped therewith - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit board capable of easily detecting electrical connection failures between a mounting substrate and a semiconductor package, a measuring circuit of its electrical characteristic and an electronic device equipped therewith. <P>SOLUTION: An inspection circuit 2 has a resistance group 5 connected with bonding parts (a2, a4, a6, a8, b1, b3, b5, b7), between a test terminal and an adjacent terminal of an IC package on the circuit board 1, and a test electrode and an adjacent electrode on a printed wiring board. A connection failure or a short circuiting on the circuit board 1 is detected, based on the output values from the resistance group 5 detected by an A/D conversion part 8. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a circuit board that can easily determine an electrical connection failure between a semiconductor package and a mounting board, a measurement circuit for the electrical characteristics, and an electronic device including the circuit board.

  In order to increase the number of terminals of an integrated circuit component (hereinafter referred to as an IC chip) such as a semiconductor element, a BGA (Ball Grid Array) package in which protruding solder such as balls and bumps are provided on a substrate is widely used. In such a BGA package, the inspection of the electrical characteristics of the IC chip mounted on the BGA package and the inspection of the bonding state between the BGA package and the printed wiring board when the BGA package is mounted on a printed wiring board or the like are usually performed. Is called.

  For example, Patent Document 1 discloses a method for inspecting electrical characteristics of a semiconductor chip mounted on a BGA package. The BGA package semiconductor element described in Patent Document 1 has a test pad electrically connected to each solder ball of the semiconductor chip of the BGA package in a one-to-one relationship. Therefore, the inspection of the electrical characteristics of the semiconductor chip mounted on the BGA package is performed by bringing a probe pin into contact with the test pad.

Patent Document 2 describes that a solder ball of a BGA package is inspected before being mounted on the printed wiring board in order to improve the bonding between the BGA package and the printed wiring board. ing. Specifically, in the technique described in Patent Document 2, light is irradiated to a solder ball of a BGA package, and reflected light from the solder ball is detected. Then, based on the reflected light, the height of the solder ball is measured to detect a defective size solder ball.
JP 9-22929 A (published on January 21, 1997) JP 2000-161936 A (released on June 16, 2000)

  However, in the inspection method described in Patent Document 1, the probe pin must be brought into contact with each test pad connected to the solder ball of the BGA package on a one-to-one basis. Have. In addition, when the number of terminals of the IC chip is increased, there is a problem that the interval between the test pads becomes very small, and the inspection using the probe pins becomes difficult.

  On the other hand, in order to perform the appearance inspection described in Patent Document 2, there is a problem that a large apparatus for appearance inspection is required. Moreover, in the said patent document 2, it is not described about inspecting the electrical property of a BGA package.

  The present invention has been made to solve the above-described conventional problems, and an object of the present invention is to provide a circuit board capable of easily detecting an electrical connection failure between a mounting board and a semiconductor package, and the electric circuit for the circuit board. An object of the present invention is to provide a characteristic measurement circuit and an electronic apparatus including the circuit.

  In order to solve the above problems, a circuit board according to the present invention is a circuit board in which a connection terminal of a semiconductor package including a semiconductor chip is electrically connected to an electrode provided on a mounting board. Includes a plurality of test connection terminals electrically connected to the semiconductor chip to which a predetermined potential is applied, and the mounting board is electrically connected to each of the test connection terminals. The test electrode is designed to be used for determining the conduction state between the connection terminal and the electrode.

  According to the above configuration, the semiconductor package is provided with a plurality of test connection terminals electrically connected to a semiconductor chip to which a predetermined potential is applied. Therefore, the predetermined potential is applied to the plurality of test connection terminals. The mounting board is provided with test electrodes that are electrically connected to the test connection terminals on a one-to-one basis.

  Therefore, when the semiconductor chip functions normally and the test connection terminal and the test electrode are conductive, the test electrode detects a potential based on a predetermined potential applied to the semiconductor chip. be able to. On the other hand, even if the semiconductor chip is functioning normally, if the test connection terminal and the test electrode are in a non-conductive state, the test electrode is set to a predetermined potential applied to the semiconductor chip. The potential based is not detected.

  Therefore, the bonding state between the test connection terminal and the test electrode can be determined by detecting the potential of the test electrode using a detection device such as a tester. Thereby, it is possible to easily determine whether or not the bonding state between the connection terminal of the semiconductor package and the electrode of the mounting board is good on the circuit board.

  Also, when a disconnection or short circuit failure occurs in a semiconductor chip or wire bonding, the disconnection or short circuit failure can be easily determined by examining the potential of the test terminal in the same manner as a connection terminal failure. it can.

  In the circuit board according to the present invention, in the above circuit board, the semiconductor package may have a quadrilateral shape, and the test connection terminals may be arranged at four corners of the semiconductor package.

  In general, when a semiconductor package is mounted on a mounting substrate, a bonding failure tends to occur at the end of the mounting substrate or the semiconductor package due to warpage or inclination of the mounting substrate or the semiconductor package. That is, at the end of the circuit board, the connection terminal of the semiconductor package and the electrode of the mounting board are not electrically connected, and a bonding failure may occur.

  Therefore, as in the above configuration, the test connection terminals and the test electrodes are arranged at the four corners of the semiconductor package, that is, at the outermost corner of the semiconductor package. As a result, it is possible to determine the bonding state between the test connection terminal and the test electrode particularly at the end of the circuit board where bonding failure is likely to occur. Therefore, it is possible to improve the accuracy of detecting a bonding failure between the connection terminal and the electrode on the circuit board.

  Further, the circuit board according to the present invention has at least one conduction for determining a conduction state with the test connection terminal at a position adjacent to at least one of the test connection terminals in the circuit board. A determination connection terminal may be provided, and the mounting board may include a conduction determination electrode that is electrically connected to the connection determination connection terminal.

  According to the above configuration, when a short circuit occurs between the test connection terminal and the continuity determination connection terminal adjacent to the test connection terminal, the continuity determination electrode is applied to the semiconductor chip. A potential based on a predetermined potential is detected. Therefore, a short circuit (conduction) between adjacent connection terminals can be detected by the connection terminal for continuity determination and the electrode for continuity determination.

  In the circuit board according to the present invention, in the above circuit board, the connection terminal for continuity determination may be a connection terminal used as a functional terminal of a semiconductor package.

  According to said structure, the functional terminal of a semiconductor package is combined with the connection terminal for conduction | electrical_connection determination for detecting the short circuit between adjacent connection terminals. Therefore, the number of connection terminals and electrodes provided exclusively for inspecting the electrical characteristics of the circuit board can be reduced.

  In addition, a measurement circuit according to the present invention is a measurement circuit for measuring electrical characteristics of a circuit board in order to solve the above problems, and is connected to the circuit board and a semiconductor chip of the circuit board, A power source for applying the predetermined potential; a circuit element group formed by connecting circuit elements connected to the test electrodes in parallel; and a detection unit for detecting an output value from the circuit element group; It is characterized by having.

  According to the above configuration, the plurality of test electrodes are respectively connected to the circuit elements. Therefore, when the test connection terminal and the test electrode are not joined, power is not supplied to the circuit element connected to the test electrode. That is, the combined characteristic value of the circuit element group, which is a combination of the circuit characteristic values of the respective circuit elements, changes according to the bonding state between each test connection terminal and the test electrode.

  Therefore, the output value detected by the detection unit also changes according to the bonding state between each test connection terminal and the test electrode. Therefore, it is possible to determine the bonding state between each test connection terminal and the test electrode based on the output value detected by the detection unit without individually detecting the potential of the test electrode.

  In addition, a measurement circuit according to the present invention is a measurement circuit for measuring electrical characteristics of a circuit board in order to solve the above problems, and is connected to the circuit board and a semiconductor chip of the circuit board, A power supply for applying the predetermined potential, a circuit element group formed by connecting circuit elements connected to the test electrode and the continuity determination electrode in parallel, and an output value from the circuit element group are detected. And a detection unit.

  According to said structure, as mentioned above, based on the output value detected by the said detection part, the joining state of each connection terminal for a test and a test electrode can be determined, Furthermore, adjacent connection The conduction state between the terminals can also be determined. That is, according to the above configuration, the continuity determining electrode is connected to the circuit element together with the test electrode. Therefore, when a short circuit occurs between the test connection terminal and the continuity determination connection terminal, power is supplied to the circuit element connected to the continuity determination electrode. Therefore, the composite characteristic value of the circuit element group varies depending on the bonding state between each test connection terminal and the test electrode, as well as the connection state between the test connection terminal and the continuity determination connection terminal. Will do.

  Therefore, the output value detected by the detection unit also depends on the connection state between each test connection terminal and the test electrode, and the connection state between each test connection terminal and the connection terminal for continuity determination. Will change. Therefore, without individually detecting the respective potentials of the test electrode and the continuity determination electrode, based on the output value detected by the detection unit, the connection state between each test connection terminal and the test electrode, Further, it is possible to determine the occurrence of a short circuit between the test connection terminal and the continuity determination connection terminal.

  In the measurement circuit according to the present invention, in the measurement circuit described above, the circuit elements forming the circuit element group preferably have different circuit characteristic values.

  According to the above configuration, the circuit element group is formed using circuit elements having different circuit characteristic values. Therefore, the composite characteristic value of the circuit element group changes according to the test connection terminal and test electrode in which the bonding failure has occurred, or the test connection terminal and continuity determination connection terminal in which the short circuit has occurred. Therefore, the test connection terminal and the test electrode in which a bonding failure has occurred due to the output value detected by the detection unit without detecting the respective potentials of the test electrode and the continuity determination electrode individually, and a short circuit It is possible to identify the test connection terminal and the continuity determination connection terminal in which the occurrence of the above occurs.

  In the measurement circuit, the power source may be a constant voltage source or a constant current source.

  In order to solve the above-described problem, an electronic device according to the present invention includes the above-described measurement circuit, and determines a conduction state of the circuit board based on an output value detected by a detection unit of the measurement circuit. It is characterized by having a control unit.

  According to said structure, the said measuring circuit is provided in the electronic device, and the control part which determines the conduction | electrical_connection state of a circuit board based on the output value detected by this measuring circuit is provided. As a result, an abnormality occurring in the circuit board mounted on the electronic device can be determined in a state where the circuit board is mounted on the electronic device. As a result, it is possible to detect a bonding failure or a short circuit caused by an impact such as transportation, dropping, or overturning, or corrosion, which occurs after the circuit board is shipped or mounted on the electronic device.

  In addition, the electronic device according to the present invention is executed by the circuit board when it is determined that the circuit board has an abnormality in the electronic apparatus according to the determination of the conduction state of the circuit board by the control unit. A notification unit for notifying that the function to be used cannot be used may be provided.

  According to the above configuration, the control unit has a test connection terminal and a test electrode in which bonding failure has occurred, and / or a test connection terminal and a continuity determination connection terminal in which a short circuit has occurred. A circuit board is identified. The notification unit notifies the user of a function that cannot be used due to an abnormality in the circuit board, based on the determination result of the control unit. Thus, the user can select an available function and operate the electronic device.

  In the electronic device according to the present invention, in the electronic device described above, when the use of the function executed by the circuit board determined to be abnormal is selected, the notification unit cannot be used. It may be a notification of that.

  According to the above configuration, when there is an abnormality in the circuit board related to the function required by the user, the user is notified that the function cannot be used. Therefore, the user needs to select a usable function. There is no.

  The circuit board inspection method according to the present invention includes a circuit board in which connection terminals of a semiconductor package including a semiconductor chip are electrically connected to electrodes provided on a mounting board in order to solve the above-described problems. The circuit board includes a plurality of test connection terminals electrically connected to each other on the semiconductor package, and is electrically connected to each of the test connection terminals on the mounting board. A test electrode designed to be connected to the semiconductor chip, and applying a predetermined potential to the semiconductor chip to determine a conduction state between the test connection terminal and the test electrode.

  According to the above configuration, by examining the potential of the test electrode using the circuit board, it is possible to easily detect a defect in the semiconductor chip itself or a connection state between the semiconductor package and the mounting board. .

  The circuit board inspection method according to the present invention includes a circuit board in which connection terminals of a semiconductor package including a semiconductor chip are electrically connected to electrodes provided on a mounting board in order to solve the above-described problems. The circuit board has a plurality of test connection terminals electrically connected to the semiconductor package, and a position adjacent to at least one of the test connection terminals. At least one continuity determination connection terminal for determining a continuity state with the test connection terminal, and is designed to be electrically connected to each of the test connection terminals on the mounting board. A test electrode and a continuity determination electrode electrically connected to the continuity determination connection terminal, and applying the predetermined potential to the semiconductor chip, Conduction state between the connection terminal and the test electrode, and is characterized by determining the conduction state of the conduction determination connection terminal and the test connection terminal.

  According to the above configuration, by examining the potential of the test electrode using the circuit board, it is possible to determine whether the semiconductor chip itself is defective, the connection state between the semiconductor package and the mounting substrate is poor, or the test connection terminal is electrically connected. It is possible to easily detect a short circuit with the connection terminal.

  As described above, the circuit board according to the present invention includes a plurality of test connection terminals that are electrically connected to a semiconductor chip to which a predetermined potential is applied. The test electrode is designed to be electrically connected to each of the test connection terminals, and includes a test electrode used for determining a conduction state between the connection terminal and the electrode of the semiconductor package.

  Therefore, the bonding state between the test connection terminal and the test electrode can be determined by detecting the potential of the test electrode using a detection device such as a tester. In addition, it is possible to easily determine whether a defect exists in the semiconductor chip itself, or whether a defect exists in the connection state between the semiconductor package and the mounting substrate.

  Further, as described above, the measurement circuit according to the present invention is connected to each of the circuit board, a power source for applying the predetermined potential connected to the semiconductor chip of the circuit board, and the test electrode. A circuit element group in which the circuit elements are connected in parallel, and a detection unit that detects an output value from the circuit element group.

  Therefore, it is possible to determine the bonding state between each test connection terminal and the test electrode without individually detecting the potential of the test electrode based on the output value detected by the detection unit. Play.

  One embodiment of the present invention will be described with reference to FIGS. 1 to 7 as follows.

  FIG. 2A shows a cross-sectional view of the circuit board 1 of the present embodiment, and FIG. 2B shows a cross-sectional view of a semiconductor package (hereinafter referred to as an IC package) 10 used for the circuit board 1. The circuit board 1 shown in FIG. 2A is provided in an electronic component such as an image forming apparatus or an image processing apparatus, which will be described later, and the operation of each part of the electronic apparatus is performed according to the request of the control unit of the electronic apparatus. Used as a control board for controlling execution of functions.

  As shown in FIG. 2A, the circuit board 1 has the connection terminals 11 (11a, 11b) of the IC package 10 and the electrodes 21 (21a, 21b) of the printed wiring board (mounting board) 20 facing each other. The two are joined together.

  As shown in FIG. 2B, the IC package 10 is a so-called BGA package, and has a semiconductor chip (hereinafter referred to as an IC chip) 13 on one surface on a quadrilateral substrate 12, and the IC chip. The connection terminal 11 is provided on the surface opposite to the side on which 13 is provided. The IC chip is provided on one surface of the substrate 12 via an epoxy resin 14 for die bonding.

  A conductor pattern 15 is provided on the substrate 12. A bonding wire 17 connected to the IC chip 13 is electrically connected to the conductor pattern 15. Further, the conductor pattern 15 is filled in a through hole 16 provided in the substrate 12, and therefore, the connection pattern 11 is provided on the other surface of the substrate 12 through the through hole 16. Electrically connected. Thereby, the IC chip 13 and the connection terminal 11 are in an electrically connected state via the bonding wire 17 and the conductor pattern 15.

  The connection terminals 11 are formed on a four-sided substrate 12 so as to be arranged in a two-dimensional array, and have a protruding shape such as a solder ball or a solder bump. A solder resist 18 is provided between the connection terminals 11 adjacent to each other, and the connection terminals 11 are insulated from the other connection terminals 11. Although details will be described later, in the circuit board 1 of the present embodiment, the electrical characteristics of the IC package 10 itself and the connection terminals 11 and the electrodes are obtained with the IC package 10 and the printed wiring board 20 joined. 21 is inspected regarding the electrical connection state with the terminal 21. For this reason, the IC package 10 is provided with a test terminal (test connection terminal) 11a which is a connection terminal for testing electrical characteristics. The test terminals 11a correspond to the terminals located at the four corners of the outermost periphery of the quadrilateral IC package 10 among the connection terminals 11 provided on the substrate 12 (FIG. 1). The four test terminals 11 a are electrically connected to each other via the IC chip 13.

  On the other hand, the printed wiring board 20 has a test electrode (test electrode) 21 a connected to the test terminal 11 a of the IC package 10. The printed wiring board 20 and the IC package 10 are connected so that the electrodes 21 and the connection terminals 11 face each other. Therefore, on the printed wiring board 20, electrodes 21 are provided in an array so as to correspond to the connection terminals 11 provided in an array on the substrate 12 of the IC package 10. Further, as shown in FIG. 2A, test electrodes 21 a for inspecting the electrical characteristics of the circuit board 1 corresponding to the test terminals 11 a provided on the IC package 10 are provided on the outermost periphery of the printed wiring board 20. There are four in the corner.

  In order to obtain the circuit board 1 of the present embodiment, the connection terminal 11 of the IC package 10 and the electrode 21 of the printed wiring board 20 may be bonded to face each other. At the time of joining, reflow heating is performed with the connection terminal 11 and the electrode 21 facing each other. Thereby, the solder of the connection terminal 11 is melted and spreads on the electrode 21, and the connection terminal 11 and the electrode 21 are joined to obtain the circuit board 1 shown in FIG. In the reflow heating, the test terminal 11a and the test electrode 21a are joined in the same manner as described above.

  Since the circuit board 1 having the above configuration includes the test terminals 11a and the test electrodes 21a as described above, the electrical characteristics can be easily inspected by using a tester or the like. Next, an inspection circuit (measuring circuit) for inspecting the electrical characteristics will be described. FIG. 1 shows a circuit diagram of the inspection circuit. 3 (a) and 3 (b) are cross-sectional views when a bonding failure occurs in the circuit board 1. FIG.

  Specifically, the inspection of the electrical characteristics of the circuit board 1 is performed by examining the conduction state of the connection terminal 11 provided in the IC package 10. Note that the inspection of the electrical characteristics may be performed on all the connection terminals 11 provided in the IC package 10. However, a particular problem in bonding the IC package 10 and the printed wiring board 20 is the bonding between the connection terminal 11 and the electrode 21 at the end of the circuit board 1. That is, when the IC package 10 or the printed wiring board 20 is warped or tilted, as shown in FIG. 3A, the connection terminal 11 and the electrode 21 provided at the end of the circuit board 1 are joined. In some cases, they may be separated and become non-conductive.

  Therefore, in the present embodiment, test terminals 11a and test electrodes 21a (corresponding to a2, a4, a6, and a8 in FIG. 1) are provided at the positions of the four corners of the outermost periphery of the circuit board 1 where bonding defects are likely to occur. The electrical characteristics of the circuit board 1 are inspected using the test terminals 11a and the test electrodes 21a.

  Further, as described above, when the IC package 10 and the printed wiring board 20 are joined, the solder of the connection terminal 11 is melted by reflow heating or the like. Therefore, as shown in FIG. 3B, at the time of joining, the connection terminals 11 adjacent to each other may be electrically connected to each other, resulting in a solder bridge. Therefore, in the present embodiment, when the electrical characteristics are inspected, in order to detect a short circuit between the adjacent connection terminals 11 as well as a connection failure between the connection terminal 11 and the electrode 21, connection other than the four test terminals 11a is performed. An inspection is also performed on the conduction state of the terminal 11.

  Specifically, the connection terminal 11 is detected by detecting the conduction state between the four test terminals 11a and the four connection terminals 11b (hereinafter, adjacent terminals 11b) arranged adjacent to the test terminals 11a. Inspect for shorts between. Hereinafter, an electrode bonded to the adjacent terminal 11b on the circuit board 1 is referred to as an adjacent electrode 21b.

  The adjacent terminal 11b and the adjacent electrode 21b may be provided as terminals or electrodes dedicated for inspection for inspecting electrical characteristics, but as one of functional terminals such as a ground terminal and an output terminal of the IC package 10. A provided connection terminal may be used.

  The inspection circuit for inspecting the electrical characteristics of the circuit board 1 including the test terminal 11a, the adjacent terminal 11b, the test electrode 21a, and the adjacent electrode 21b includes the inspection circuit (measurement circuit) 2 shown in FIG. The inspection circuit 2 includes a resistor group (circuit element group) 5 including resistors (circuit elements) R1 to R8, a first amplifier 6, a second amplifier 7, and an A / D conversion unit (connected to the circuit board 1). Detection section) 8 is provided.

  As described above, in the circuit board 1, the four test terminals 11 a of the IC package 10 are electrically connected to each other via the IC chip 13. As shown in FIG. 1, the semiconductor chip 13 is connected to a constant voltage source (power source) 25 so that a reference voltage Vr is applied. Accordingly, the reference voltage Vr is applied to the four test terminals 11a.

  Therefore, when the IC package 10 and the printed wiring board 20 are joined, the four test terminals 11a and the four test electrodes 11a are electrically connected to each other. In FIG. 1, the test terminal 11a and the test electrode 21a that are connected to each other are represented as joints a2, a4, a6, and a8, and the adjacent terminal 11b and the adjacent electrode 21b that are connected to each other are connected to the joint. It is expressed as b1, b3, b5, b7.

  The resistor group 5 includes resistors R1 to R8. The resistors R1 to R8 are connected to the test electrode 21a and the adjacent electrode 21b of the circuit board 1, respectively, and have different resistance values (circuit characteristic values). More specifically, the test electrode 21a is connected to the resistors R2, R4, R6, and R8, respectively, and the adjacent terminal 21b is connected to the resistors R1, R3, R5, and R7, respectively. Therefore, when the test terminal 11a and the test electrode 21a are electrically connected well, the joints a2, a4, a6, and a8 are connected to the resistors R2, R4, R6, and R8, respectively. Become. In addition, when the adjacent terminal 11a and the adjacent electrode 21a are electrically connected well, the junctions b1, b3, b5, and b7 are connected to the resistors R1, R3, R5, and R7, respectively. Become.

  The resistors R1 to R8 are connected in parallel to each other, and are connected via a contact T to the input of the first amplifier 6 that is a negative feedback amplifier circuit. The output of the first amplifier 6 is connected to the input of the first amplifier 6 through a negative feedback resistor Rf1, and is connected to the second amplifier 7 through a resistor Ra2.

  The second amplifier 7 is a negative feedback amplifier circuit. The input of the second amplifier 7 is connected to the resistor Ra2. The output of the second amplifier 7 is connected to the input of the second amplifier 7 via the negative feedback resistor Rf2 and is also connected to the A / D conversion unit 8.

  The A / D converter 8 is connected to the output of the second amplifier 7 and converts the output voltage Vo output from the second amplifier 7 into a digital signal.

  When the reference voltage Vr is applied from the constant voltage source 25 to the IC chip 13 in the inspection circuit 2 having the above configuration, the state of the IC chip 13, the bonding state between the test terminal 11a and the test electrode 21a, and adjacent to the test terminal 11a. The detection value of the A / D conversion unit 8 changes according to the bonding state with the terminal 11b.

That is, in the inspection circuit including the above-described inspection circuit 2, the IC chip 13 functions normally, and the electrical characteristics of the junctions a2, a4, a6, a8, b1, b3, b5, and b7 of the circuit board 1 are normal. The output voltage Vo is equal to the following (Equation 1).
Vo = (Rf1 / Ra1) · (Rf2 / Ra2) · Vr (Formula 1)
The value represented by

Here, the resistor Ra1 is a combined resistance value (synthetic characteristic value) of the resistors R2, R4, R6, and R8 in the resistor group 5, and the following (Formula 2)
Ra1 = {(1 / R2) + (1 / R4) + (1 / R6) + (1 / R8)} ⁻¹ (Formula 2)
It is represented by

  Note that the electrical characteristics of the junctions a2, a4, a6, a8, b1, b3, b5, and b7 of the circuit board 1 are normal when the test terminal 11a, the adjacent terminal 11b, the test electrode 21a, the adjacent electrode 21b, Is a state of being electrically connected well.

For example, when the connection at the junction a2 is poor, the combined resistance value Ra1 ′ detected by the resistance group 5 is expressed by the following formula: Ra1 ′ = {(1 / R4) + (1 / R6) + (1 / R8)} ^-1
It becomes. That is, the resistance connected to the test electrode 21a that is poorly connected to the test terminal 11a is not reflected in the combined resistance value because it is removed from the test circuit 2. Therefore, when the connection between the test terminal 11a and the electrode 21a is poor, the connection is made to the joint part (any one of the joint parts a2, a4, a6, a8) in the above (Equation 2). The combined resistance value excluding the resistance (any one of the resistors R2, R4, R6, and R8) is obtained.

On the other hand, for example, when a solder bridge is generated between the test terminal 11a and the adjacent terminal 11b adjacent to the test terminal 11a, the combined resistance value Ra1 '' detected by the resistor group 5 is Formula Ra1 ″ = {(1 / R1) + (1 / R2) + (1 / R4) + (1 / R6) + (1 / R8)} ⁻¹
It becomes. That is, when a solder bridge is generated between the test terminal 11a and the adjacent terminal 11b, the resistance R1 of the junction b1 of the adjacent terminal 11b where the solder bridge is generated is expressed by the above (formula 2). Is added to the combined resistance value Ra1.

  Therefore, when a solder bridge is generated between the test terminal 11a and the adjacent terminal 11b, any one of the joints (joined parts b1, b3, b5, and b7) in which the solder bridge is generated is expressed in the above (Formula 2). A combined resistance value obtained by adding a resistance (any one of the resistances R1, R3, R5, and R7) connected to (5) is obtained.

  As described above, the resistors R1 to R8 of the resistor group 5 have different resistance values. Therefore, if one of the resistors R2, R4, R6, and R8 is removed from the test circuit 2 due to a connection failure of the test terminal 11a, the value of the combined resistance value Ra1 detected by the resistor group 5 changes. Become. Further, when a short circuit occurs between the test terminal 11a and the adjacent terminal 11b due to the solder bridge, the combined resistance value Ra1 detected by the resistor group 5 is the resistance R1, R3, R5, R7. One of them will be added.

For example, the resistance values (kΩ) of the resistors R1 to R8 are ^{assumed to be} powers of 10, and in order 10 ^6/6 , 10 ^7/6 , 10 ^8/6 , 10 ^9/6 , 10 ^10/6 , 10 ^11/6 , 10 ^12/6 , 10 ^18/6 , and the output voltage obtained when there is a connection failure in the test terminal 11a or when a short circuit occurs between the test terminal 11a and the adjacent terminal 11b. The output of the Vo, A / D converter 8 is shown in Table 1. FIG. 4 is a graph showing the relationship between the output voltage Vo and the junctions a2, a4, a6, a8, b1, b3, b5, and b7 where the connection failure and solder bridge shown in Table 1 occur.

  In Table 1 and FIG. 4, the defective junction numbers a2, a4, a6, and a8 indicate cases where there is a connection failure between the test terminal 11a and the test electrode 21a. b5 and b7 show a case where a solder bridge is generated between the adjacent terminal 11b having the corresponding number and the test terminal 11a adjacent to the adjacent terminal 11b. The output voltage Vo shown in Table 1 and FIG. 4 is a value when Vr is 5 V, Rf1 is 4.3 kΩ, Ra2 is 10 kΩ, and Rf2 is 10 kΩ in the test circuit 1. Furthermore, the A / D value is set to 127 when the electrical characteristics of all the joints of the circuit board 1 are normal.

  As shown in Table 1 and FIG. 4, the combined resistance value Ra1 varies depending on the junction where the connection failure or the solder bridge occurs, and therefore the output voltage Vo and A / D value detected by the inspection circuit 2 are different. . Therefore, by detecting the output voltage Vo and the A / D value, it is possible to determine whether or not a connection failure or a short-circuit has occurred, and the test terminal 11a in which a connection failure has occurred or a test terminal in which a short-circuit has occurred. 11a and the adjacent terminal 11b can be specified.

  As described above, when the inspection circuit 2 shown in FIG. 1 is used, by detecting one value output from the resistance group 5, among the plurality of junctions, the junction where the connection failure or the solder bridge occurs. Can be specified. That is, if the inspection circuit 2 is used, a connection in which a connection failure or a solder bridge occurs is generated by determining the conduction state of a plurality of junctions at a time without detecting the conduction state for each junction. The part can be specified. Thereby, the inspection of the electrical characteristics of the circuit board 1 can be easily performed.

  On the other hand, as described above, the electrical characteristics of the circuit board 1 may be inspected by the inspection circuit 2 (FIG. 1) using the constant voltage source 25, but as shown in FIG. The inspection circuit (measurement circuit) 3 using the power source 26 may be used. In the inspection circuit 3 shown in FIG. 5, members having the same functions as those of the members shown in the inspection circuit 2 of FIG.

  In the inspection circuit 3 shown in FIG. 5, the constant current source 26 is connected to the inverting terminal of the first amplifier 9 and the constant current Io is applied. The output of the first amplifier 9 is connected to the inverting input terminal of the first amplifier 9 and to the semiconductor chip 13 so that a potential is applied to the four test terminals 11a.

  When the constant current Io is applied from the constant current source 26 in the inspection circuit 3 having the above configuration, the state of the IC chip 13, the bonding state between the test terminal 11a and the test electrode 21a, and the test terminal 11a and the adjacent terminal 11b The A / D value detected by the A / D converter 8 changes according to the joining state.

That is, in the inspection circuit including the above-described inspection circuit 3, the IC chip 13 functions normally, and the electrical characteristics of the junctions a2, a4, a6, a8, b1, b3, b5, and b7 of the circuit board 1 are normal. In this case, the output voltage Vo is as follows (Equation 3)
Vo = −Ra1 · (Rf2 / Ra2) · Ic (Formula 3)
The value represented by The combined resistance value Ra1 is the combined resistance value of the resistance group 5 as described above.

  Even when this inspection circuit 3 is used, if there is a connection failure between the test terminal 11a and the electrode 21a of the printed wiring board 20, or if a solder bridge occurs between the test terminal 11a and the adjacent terminal 11b, The value of the combined resistance value Ra1 changes. That is, the output voltage Vo and the A / D value detected by the inspection circuit 3 differ depending on the joint where the connection failure or the solder bridge occurs. This makes it possible to determine whether or not a connection failure or a short circuit has occurred, and to identify the test terminal 11a in which a connection failure has occurred, the test terminal 11a in which a short circuit has occurred, or the adjacent terminal 11b.

  For example, as shown in Table 2, when resistance values (kΩ) of the resistors R1 to R8 are set and there is a connection failure in the test terminal 11a, a short circuit occurs between the test terminal 11a and the adjacent terminal 11b. Table 2 shows the output voltage Vo and the output of the A / D converter 8 obtained in this case. FIG. 6 is a graph showing the relationship between the junctions a2, a4, a6, a8, b1, b3, b5, and b7 shown in Table 2 and the output voltage Vo.

  In Table 2 and FIG. 6, defective terminal numbers 2, 4, 6, and 8 indicate cases where there is a connection failure between the test terminal 11a and the test electrode 21a. 7 shows a case where a solder bridge is generated between the adjacent terminal 11b having the corresponding number and the test terminal 11a adjacent to the adjacent terminal 11b. Further, the output voltage Vo shown in Table 2 and FIG. 6 is a value when Ic is 8 mA, Rf1 is 4.3 kΩ, Ra2 is 10 kΩ, and Rf2 is 10 kΩ in the inspection circuit 3. Further, the output of the A / D converter 8 is set to be 129 when the electrical characteristics of all the joints of the circuit board 1 are normal.

  As shown in Table 2 and FIG. 6, the combined resistance value Ra1 varies depending on the connection portion where the connection failure or the solder bridge occurs, and therefore the output voltage Vo and the A / D value detected by the inspection circuit 3 are different. . Therefore, by detecting the output voltage Vo and the A / D value, it is possible to determine whether or not a connection failure or a short-circuit has occurred, and the test terminal 11a in which a connection failure has occurred or a test terminal in which a short-circuit has occurred. 11a and the adjacent terminal 11b can be specified.

  As described above, even when the inspection circuit 3 is used, as in the case of using the inspection circuit 2 shown in FIG. Among them, it is possible to identify a joint where a connection failure or a solder bridge occurs. Accordingly, even when the conduction state of a plurality of joints is detected at the same time without detecting the conduction state for each joint of the circuit board 1, it is possible to easily connect the joint where a connection failure or a solder bridge occurs. Can be determined.

  The inspection of the electrical characteristics of the circuit board 1 performed by the inspection circuit having the above-described configuration may be performed by connecting the circuit board to the inspection circuit in, for example, a circuit board manufacturing process.

  Alternatively, the circuit board may be mounted on the electronic apparatus as a control board of an electronic apparatus such as an image forming apparatus or an image processing apparatus described later. Here, the control board is for controlling the operation of members constituting each part of the electronic device based on the request of the control part of the electronic device such as a CPU, or for executing the function of each part of the electronic device. The circuit board 1 of FIG. Hereinafter, functions and operations of each part of the electronic device related to the circuit board 1 are referred to as functions related to the circuit board 1.

  As described above, the electrical characteristics are inspected with the circuit board 1 attached to the electronic device, so that after the circuit board 1 or the electronic device is shipped, it is caused by an impact such as a drop or a fall during transportation, corrosion, or the like. In addition, a connection failure of the connection pads on the circuit board 1 can be detected.

  When the electrical characteristics are inspected in a state where the circuit board 1 is attached as a control board to the electronic device, the electronic device may be provided with the inspection circuit. The electrical characteristics of the circuit board 1 may be inspected by transmitting and receiving information and power to and from the control unit of the electronic device via the connection terminals 11 and the electrodes 21 of the circuit board 1.

  Specifically, first, the control unit of the electronic device acquires the output of the A / D conversion unit 8. When the A / D value is different from a value (hereinafter referred to as a normal value) when all the joints (a2, a4, a6, a8, b1, b3, b5, b7) are not defective. Then, it is determined which connection pad has a connection failure. Based on the determination result, the control unit identifies the circuit board 1 in which the connection is defective, and the joint in the circuit board 1. Thereafter, the user is notified that the function related to the circuit board 1 having the identified joint is not usable. The notification to the user may be performed by displaying an error message on a display unit (notification unit) or the like provided in the electronic device, or generating a warning sound.

  In addition, when it is selected in the electronic device that the function related to the circuit board 1 provided with the defective joint portion is used in the electronic device, the control unit indicates that the function related to the circuit board 1 cannot be used. May be notified.

  For example, when an image processing apparatus or an image forming apparatus described later is used as an electronic apparatus and the circuit board 1 is mounted on these electronic apparatuses, not all functions of the electronic apparatus are always used. . That is, in the image processing apparatus and the image forming apparatus, there are a case where color image processing and printing are performed and a case where monochrome image processing and printing are performed. When performing monochrome image processing or printing, functions related to color image processing and printing (hereinafter, functions related to color images) are not used. Therefore, even if there is a defect in the circuit board 1 for realizing the function relating to the color image, the image processing and printing of the monochrome image can be executed.

  As described above, even when there is a connection failure in the circuit board 1 provided in the electronic device, not all functions of the electronic device are disabled, but the function related to the circuit board 1 in which the defective junction exists. Only unusable. Accordingly, when an unusable function is unnecessary, the electronic device can be operated with a desired function.

  In the present embodiment, among the connection terminals 11 and the electrodes 21 arranged on the circuit board 1, the test terminals 2 and 3 use the connection terminals 11 and the electrodes 21 arranged at the four outermost corners as test terminals. 11a and test electrode 21a are used, but the present invention is not limited to this. That is, if two or more of the connection terminals 11 provided on the IC package 10 of the circuit board 1 are used as test terminals and these test terminals are electrically connected to each other, which connection on the IC package 10 is selected. The terminal 11 may be a test terminal. Therefore, the test electrode of the printed wiring board 20 of the circuit board 1 may be an electrode at a position facing the test terminal provided in the IC package 10.

  Furthermore, the number of each of the test terminals and the adjacent terminals used for the inspection of the electrical characteristics of the circuit board 1 is not limited to the above four, and may be plural. In the above description, one adjacent terminal adjacent to the test terminal is used. However, the circuit board 1 may be inspected using two or more adjacent terminals. Or you may provide an adjacent terminal only with respect to a specific test terminal. In such a case, the number of resistors forming the resistance group provided in the inspection circuits 2 and 3 may be set as appropriate according to the number of test terminals and adjacent terminals.

  In the inspection circuits 2 and 3, the resistor group 5 including the resistors R1 to R8 connected in parallel to the circuit board 1 is connected. However, the present invention is not limited to this. That is, instead of the resistors R1 to R8, circuit elements capable of different impedances such as capacitors having different capacities and inductances may be used.

  Furthermore, although the BGA package has been described as an example of the IC package 10 of the circuit board 1, the present invention is not limited to this, and may be a mini flat package, for example.

  In the above description, the printed wiring board 20 is taken as an example of the board on which the IC package 10 is mounted. However, the present invention is not limited to this, and various mounting boards may be used.

  Next, an image forming apparatus which is an example of the electronic apparatus will be described. In the following, an image forming apparatus is taken as an example of the electronic apparatus, but the present invention is not limited to this. That is, the electronic device includes various devices that use the circuit board 1 to directly or indirectly control the operation and function of each unit.

  FIG. 7 is a front sectional view showing a schematic configuration of a digital color copying machine (hereinafter referred to as a copying machine) 100 which is an image forming apparatus according to the present embodiment. An operation panel including a document table 111 and a display unit (notification unit) (not shown) is provided on the upper surface of the copying machine main body 100, and an image reading unit 110 and an image forming unit 210 are provided inside the copying machine main body 100. Yes.

  The upper surface of the document table 111 is supported so as to be openable and closable with respect to the document table 111, and has a predetermined positional relationship with respect to the surface of the document table 111. A double-sided automatic document feeder (RADF) 112 is provided. Is installed.

  Further, the double-sided automatic document feeder 112 first transports the document so that one side of the document faces the image reading unit 110 at a predetermined position on the document table 111, and performs image reading on this one side. Subsequently, after this image reading is completed, the document is reversed so that the other side of the document faces the image reading unit 110 at a predetermined position on the document table 111, and the reversed document is directed toward the document table 111. Transport. Thereafter, after the double-sided image reading for one original is completed, the double-sided automatic document feeder 112 discharges the original and performs a double-sided conveyance operation for the next original. The above-described document conveyance and front / back reversing operations are controlled in relation to the entire operation of the copying machine 100.

  The image reading unit 110 is arranged below the document table 111 in order to read an image of the document conveyed on the document table 111 by the double-sided automatic document feeder 112. The image reading unit 110 includes a document scanning body that reciprocates in parallel along the lower surface of the document table 111, an optical lens 115, and a CCD line sensor 116 that is a photoelectric conversion element.

  This document scanning body has a first scanning unit 113 and a second scanning unit 114. The first scanning unit 113 has an exposure lamp that exposes the surface of the document image and a first mirror that deflects the reflected light image from the document in a predetermined direction, and is constant with respect to the lower surface of the document table 111. While reciprocally moving in parallel at a predetermined scanning speed. On the other hand, the second scanning unit 114 has second and third mirrors for deflecting the reflected light image from the original deflected by the first mirror of the first scanning unit 113 in a predetermined direction. The first scanning unit 113 reciprocates in parallel while maintaining a constant speed relationship.

  The optical lens 115 reduces the reflected light image from the original deflected by the third mirror of the second scanning unit 114, and forms the reduced light image at a predetermined position on the CCD line sensor 116.

  The CCD line sensor 116 sequentially photoelectrically converts the formed light image and outputs it as an electrical signal. The CCD line sensor 116 is a three-line color CCD that reads a black-and-white image or a color image and outputs line data that is color-separated into R (red), G (green), and B (blue) color components. The image information of the document converted into an electric signal by the CCD line sensor 116 is further transferred to an image processing device (not shown) and subjected to predetermined image data processing.

  Specifically, in the image processing apparatus, first, image information of a document converted into an electric signal is converted into an RGB digital signal, and further, a CMY (C: cyan, M; magenta, Y: yellow) signal is converted. Is generated. Thereafter, the image region in the image information is subjected to region separation processing for separating the character region, halftone dot region, or photographic region, black generation processing for generating a black (K) signal, etc. A color correction process is performed to faithfully reproduce the color of the input data. Then, in LSU_ASIC MC, the laser scanning of the laser scanner unit is synchronized with the driving of the laser diode, the PWM processing according to the gradation data is performed, and the laser diode of the laser scanner unit is driven.

  Below the image forming unit 210 provided inside the copying machine main body 100, the sheets (recording media) P stacked in the paper tray are separated one by one and supplied toward the image forming unit 210. A sheet feeding mechanism 211 is provided. The sheets P separated and supplied one by one from the sheet tray are transported to the image forming section 210 with the timing controlled by a pair of registration rollers 212 arranged in front of the image forming section 210. Further, the paper P on which an image is formed on one side is re-supplied and conveyed to the image forming unit 210 in synchronization with the image formation of the image forming unit 210.

  A transfer conveyance belt mechanism 213 is disposed below the image forming unit 210. The transfer / conveying belt mechanism 213 is configured to convey the sheet P by electrostatically adsorbing it onto the transfer / conveying belt 216 stretched between the driving roller 214 and the driven roller 215 so as to extend substantially in parallel. A pattern image detection unit 232 is provided in the vicinity of the lower side of the transfer conveyance belt 216.

  Further, a fixing device 217 for fixing the toner image transferred and formed on the paper P on the paper P is disposed on the downstream side of the transfer and transport belt mechanism 213 in the paper transport path. The paper P that has passed through the nip between the pair of fixing rollers of the fixing device 217 is discharged onto a paper discharge tray 220 attached to the outer wall of the copier body 1 by a discharge roller 219 through a conveyance direction switching gate 218. The

  The switching gate 218 selectively switches the conveyance path of the fixed sheet P between a path for discharging the sheet P to the copying machine main body 100 and a path for resupplying the sheet P toward the image forming unit 210. . The paper P whose transport direction has been switched again toward the image forming unit 210 by the switching gate 218 is turned over through the switchback transport path 221 and then supplied to the image forming unit 210 again.

  Further, above the transfer conveyance belt 216 in the image forming unit 210, in the vicinity of the transfer conveyance belt 216, the first image formation station Pa, the second image formation station Pb, the third image formation station Pc, and The fourth image forming stations Pd are arranged in order from the upstream side of the sheet conveyance path.

  The transfer conveyance belt 216 is frictionally driven by the driving roller 214 in the direction indicated by the arrow Z in FIG. 7 and carries the paper P fed through the paper feed mechanism 211 as described above. It conveys sequentially to Pa-Pd.

  Each of the image stations Pa to Pd has substantially the same configuration. Each of the image stations Pa, Pb, Pc, and Pd includes photosensitive drums 222a, 222b, 222c, and 222d that are driven to rotate in the direction of arrow F shown in FIG.

  Around each of the photosensitive drums 222a to 222d, there are chargers 223a, 223b, 223c and 223d for uniformly charging the photosensitive drums 222a to 222d, and electrostatic latent images formed on the photosensitive drums 222a to 222d. Developing devices 224a, 224b, 224c, and 224d for developing the images, transfer dischargers 225a, 225b, 225c, and 225d for transferring the toner images developed on the photosensitive drums 222a to 222d to the paper P, Cleaning devices 226a, 226b, 226c, and 226d for removing toner remaining on the photosensitive drums 222a to 222d are sequentially arranged along the rotation direction of the photosensitive drums 222a to 222d.

  Laser beam scanner units 227a, 227b, 227c, and 227d are provided above the respective photosensitive drums 222a to 222d. The laser beam scanner units 227a to 227d are a semiconductor laser element (not shown) that emits dot light modulated according to image data, and a polygon mirror (deflection) for deflecting the laser beam from the semiconductor laser element in the main scanning direction. Apparatus) 240a to 240d, and fθ lenses 241a to 241d and mirrors 242a to 242d and 243a to 243d for imaging the laser beams deflected by the polygon mirrors 240a to 240d on the surfaces of the photosensitive drums 222a to 222d. Yes.

  The laser beam scanner 227a has a pixel signal corresponding to the black component image of the color original image, the laser beam scanner 227b has a pixel signal corresponding to the cyan component image of the color original image, and the laser beam scanner 227c has a color original image. The pixel signal corresponding to the magenta color component image is input to the laser beam scanner 227d, and the pixel signal corresponding to the yellow color component image of the color original image is input to the laser beam scanner 227d.

  As a result, electrostatic latent images corresponding to the color-converted document image information are formed on the respective photosensitive drums 222a to 222d. The developing device 227a contains black toner, the developing device 227b contains cyan toner, the developing device 227c contains magenta toner, and the developing device 227d contains yellow toner. The electrostatic latent images on the photosensitive drums 222a to 222d are developed with the toners of these colors. As a result, the document image information color-converted by the image forming unit 210 is reproduced as a toner image of each color.

  Further, a sheet suction charger 228 is provided between the first image forming station Pa and the sheet feeding mechanism 211. The adsorption charger 228 charges the surface of the transfer conveyance belt 216 and securely adsorbs the paper P supplied from the paper feed mechanism 211 onto the transfer conveyance belt 216 in the first image forming station. The paper P is transported between Pa and the fourth image forming station Pd without causing a positional shift.

  On the other hand, between the fourth image station Pd and the fixing device 217, a static eliminator 229 is provided almost directly above the drive roller 214. An AC current for separating the sheet P electrostatically attracted to the conveyance belt 216 from the transfer conveyance belt 216 is applied to the static eliminator 229.

  In the copying machine 100 configured as described above, cut sheet-like paper is used as the paper P. When the paper P is fed out from the paper feed cassette and supplied into the guide of the paper feed conveyance path of the paper feed mechanism 211, the leading end of the paper P is detected by a sensor (not shown). Then, based on the detection signal output from the sensor, the pair of registration rollers 212 are temporarily stopped.

  Then, the sheet P is sent onto the transfer conveyance belt 216 rotating in the direction of arrow Z in FIG. 7 at the timing of each of the image stations Pa to Pd. At this time, since the predetermined charge is applied to the transfer conveyance belt 216 by the adsorption charger 228 as described above, the sheet P is stably conveyed and supplied while passing through the image stations Pa to Pd. Is done.

  In each of the image stations Pa to Pd, a toner image of each color is formed and superimposed on the support surface of the paper P that is electrostatically attracted and transported by the transfer transport belt 216. When the transfer of the image by the fourth image station Pd is completed, the paper P is sequentially peeled from the transfer conveyance belt 216 from the leading end portion thereof by the discharger for discharging, and is guided to the fixing device 217. Finally, the paper P on which the toner image is fixed is discharged from a paper discharge port (not shown) onto the paper discharge tray 220.

  In the above description, optical writing is performed on the photosensitive member by exposing the laser beam by scanning with the laser beam scanner units 227a to 227d. However, a writing optical system (LED head) composed of a light emitting diode array and an imaging lens array may be used instead of the laser beam scanner unit. The LED head is smaller in size than the laser beam scanner unit and has no moving parts and is silent. Therefore, it can be suitably used in an image forming apparatus such as a tandem digital color copying machine that requires a plurality of optical writing units.

  The present invention is not limited to the above-described embodiments, and various modifications can be made within the scope shown in the claims. That is, embodiments obtained by combining technical means appropriately changed within the scope of the claims are also included in the technical scope of the present invention.

  Since the present invention can easily detect an abnormality such as a connection failure or a short circuit of each terminal on a circuit board, it can be suitably used in various electronic apparatuses such as an image forming apparatus and an image processing apparatus.

It is a circuit diagram of an inspection circuit for inspecting electrical characteristics of a circuit board in the present invention. (A) is sectional drawing which shows embodiment of the said circuit board, (b) is sectional drawing which shows IC package 10 used for the circuit board shown to (a). (A) is sectional drawing which shows the state in which a connection terminal and an electrode are not connected in the said circuit board, (b) is the solder bridge | bridging with which the adjacent connection terminals were joined in the said circuit board. It is sectional drawing which shows a state. It is a graph which shows the relationship between the junction part which the connection failure shown in Table 1 generate | occur | produced, and the output voltage Vo. It is a circuit diagram of the other test | inspection circuit for test | inspecting the electrical property of the said circuit board. It is a graph which shows the relationship between the junction part which the connection failure shown in Table 1 generate | occur | produced, and the output voltage Vo. 1 is a front sectional view showing an embodiment of an image forming apparatus to which a circuit board according to the present invention is attached.

Explanation of symbols

1 Circuit board 2 Inspection circuit (measurement circuit)
3 Inspection circuit (measurement circuit)
5 Resistance group (circuit element group)
6 1st amplifier 7 2nd amplifier 8 A / D conversion part (detection part)
9 First amplifier 10 IC package (semiconductor package)
11 connection terminal 11a test terminal (connection terminal for test)
11b Adjacent terminal (connection terminal for continuity determination)
12 Substrate 13 Semiconductor chip (IC chip)
20 Printed wiring board (mounting board)
21 electrode 21a test electrode (test electrode)
21b Adjacent electrode (conductivity determination electrode)
25 Constant voltage source (power supply)
26 Constant current source (power supply)
R1 to R8 resistors (circuit elements)

Claims (13)

In the circuit board in which the connection terminal of the semiconductor package including the semiconductor chip is electrically connected to the electrode provided on the mounting board,
The semiconductor package includes a plurality of test connection terminals electrically connected to the semiconductor chip to which a predetermined potential is applied,
The mounting board is designed to be electrically connected to each of the test connection terminals, and includes a test electrode used to determine a conduction state between the connection terminal and the electrode. A circuit board. The semiconductor package has a quadrilateral shape,
2. The circuit board according to claim 1, wherein the test connection terminals are respectively arranged at four corners of the semiconductor package. At least one conduction determining connection terminal for determining a conduction state with the test connection terminal at a position adjacent to at least one of the test connection terminals,
The circuit board according to claim 1, wherein the mounting board includes a continuity determination electrode electrically connected to the continuity determination connection terminal.   4. The circuit board according to claim 3, wherein the connection terminal for continuity determination is a connection terminal used as a function terminal of a semiconductor package. A measurement circuit for measuring electrical characteristics of a circuit board,
The circuit board according to claim 1 or 2,
A power source connected to the semiconductor chip of the circuit board and applying the predetermined potential;
A circuit element group formed by connecting circuit elements connected to each of the test electrodes in parallel;
And a detector for detecting an output value from the circuit element group. A measurement circuit for measuring electrical characteristics of a circuit board,
The circuit board according to claim 3 or 4,
A power source connected to the semiconductor chip of the circuit board and applying the predetermined potential;
A circuit element group formed by connecting circuit elements connected to the test electrode and the continuity determination electrode in parallel;
And a detector for detecting an output value from the circuit element group.   The measurement circuit according to claim 5 or 6, wherein the circuit elements forming the circuit element group have different circuit characteristic values.   8. The measuring circuit according to claim 5, wherein the power source is a constant voltage source or a constant current source. A measurement circuit according to any one of claims 5 to 8, comprising:
An electronic apparatus comprising: a control unit that determines a conduction state of the circuit board based on an output value detected by a detection unit of the measurement circuit.   A notification unit for notifying that the function executed by the circuit board is unusable when it is determined by the control unit that the circuit board is in a conductive state; The electronic device according to claim 9, further comprising:   The notification unit is configured to notify that the function cannot be used when the use of the function executed by the circuit board determined to be abnormal is selected. 10. The electronic device according to 10. A circuit board inspection method in which a connection terminal of a semiconductor package including a semiconductor chip is electrically connected to an electrode provided on a mounting substrate,
The circuit board includes a plurality of test connection terminals electrically connected to the semiconductor package, and is designed to be electrically connected to each of the test connection terminals on the mounting board. Provided with a test electrode,
A circuit board inspection method comprising: determining a conduction state between the test connection terminal and the test electrode by applying a predetermined potential to the semiconductor chip. A circuit board inspection method in which a connection terminal of a semiconductor package including a semiconductor chip is electrically connected to an electrode provided on a mounting substrate,
The circuit board is
In order to determine a conductive state between a plurality of test connection terminals electrically connected to the semiconductor package and at least one of the test connection terminals at a position adjacent to the test connection terminal. And at least one continuity determination connection terminal.
The mounting board includes: a test electrode designed to be electrically connected to each of the test connection terminals; and a continuity determination electrode electrically connected to the continuity determination connection terminal. ,
By applying a predetermined potential to the semiconductor chip, the conduction state between the test connection terminal and the test electrode and the conduction state between the test connection terminal and the conduction determination connection terminal are determined. Circuit board inspection method.

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