JP2006032505A - Method of manufacturing semiconductor device and coater - Google Patents
Method of manufacturing semiconductor device and coater Download PDFInfo
- Publication number
- JP2006032505A JP2006032505A JP2004206634A JP2004206634A JP2006032505A JP 2006032505 A JP2006032505 A JP 2006032505A JP 2004206634 A JP2004206634 A JP 2004206634A JP 2004206634 A JP2004206634 A JP 2004206634A JP 2006032505 A JP2006032505 A JP 2006032505A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- resin
- circuit board
- liquid resin
- resin material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 74
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 14
- 229920005989 resin Polymers 0.000 claims abstract description 96
- 239000011347 resin Substances 0.000 claims abstract description 96
- 239000000463 material Substances 0.000 claims abstract description 37
- 239000011248 coating agent Substances 0.000 claims description 29
- 238000000576 coating method Methods 0.000 claims description 29
- 238000000034 method Methods 0.000 claims description 16
- 239000007788 liquid Substances 0.000 abstract description 42
- 229910000679 solder Inorganic materials 0.000 description 15
- 230000035515 penetration Effects 0.000 description 9
- 238000010586 diagram Methods 0.000 description 5
- 238000010438 heat treatment Methods 0.000 description 5
- 239000004927 clay Substances 0.000 description 3
- 239000011800 void material Substances 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 230000006355 external stress Effects 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 230000008595 infiltration Effects 0.000 description 2
- 238000001764 infiltration Methods 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
- H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
Landscapes
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
Description
本発明は半導体装置の製造方法及び塗布装置に関する。詳しくは、半導体チップと回路基板との間隙に充填する樹脂材料に振動を与えることによって、ボイドの発生や樹脂材料の未充填現象を抑制しようとした半導体装置の製造方法及び塗布装置に係るものである。 The present invention relates to a semiconductor device manufacturing method and a coating apparatus. More specifically, the present invention relates to a method of manufacturing a semiconductor device and a coating apparatus that attempt to suppress the generation of voids and the unfilling phenomenon of the resin material by applying vibration to the resin material that fills the gap between the semiconductor chip and the circuit board. is there.
電子機器の小型化、薄型化及び高機能化の動向に伴って、半導体チップの高速化、高集積化及び多ピン化と同時に半導体チップを高密度に回路基板に実装するための高密度実装技術が益々進歩しており、半導体チップのパッケージにも様々な形状や構造が要求され、提案されている。フリップチップによる実装方法もそのうちの１つである（例えば、特許文献１参照。）。 High-density mounting technology for mounting semiconductor chips on circuit boards at the same time as semiconductor chips are becoming faster, more integrated, and more pins with the trend toward smaller, thinner, and more advanced electronic devices. As semiconductor chip packages require various shapes and structures, they have been proposed. A flip chip mounting method is one of them (see, for example, Patent Document 1).
また、近年はウェーハプロセスの微細配線化に伴い、信号遅延の問題から一般に低誘電率材（Ｌｏｗ−ｋ材）が層間絶縁層として用いられはじめているが、Ｌｏｗ−ｋ材は衝撃等により容易に破壊されてしまうという大きな課題を持っているために、フリップチップ実装には低荷重、低ダメージで実装可能な、はんだを用いた実装が主流になりつつある。 In recent years, low dielectric constant materials (low-k materials) have begun to be used as interlayer insulating layers due to the problem of signal delay with the miniaturization of wafer processes, but low-k materials are easily affected by impact or the like. Due to the big problem of being destroyed, mounting using solder, which can be mounted with low load and low damage, is becoming mainstream for flip chip mounting.
以下、従来のフリップチップ実装方式について図面を用いて説明する。
従来のフリップチップ実装方式では、先ず、図４（ａ）で示す様に、半導体チップ１０１の電極１０２に、ＡｕやＣｕ等を主成分とし、一般的にバンプと称される突起状電極１０３（以下、バンプと称する。）を形成する。
また、バンプの形成とは別に、図４（ｂ）で示す様に、半導体チップを実装する回路基板１０４の端子１０５に接合材料であるはんだ１０６を搭載する。
Hereinafter, a conventional flip chip mounting method will be described with reference to the drawings.
In the conventional flip chip mounting method, first, as shown in FIG. 4A, the
In addition to the formation of the bumps, as shown in FIG. 4B,
次に、図４（ｃ）で示す様に、バンプが形成された半導体チップを反転して実装ノズル１０７で吸着固定を行い、半導体チップに形成されたバンプと回路基板の端子とを高精度に位置あわせし、バンプと端子に搭載されたはんだとを接触させる。
この時、実装ノズルからは、はんだの溶融温度以上の熱が半導体チップに供給され、回路基板に搭載されたはんだが溶融し、半導体チップの電極に形成されたバンプの表面をはんだが這い上がり、はんだがバンプを包み込む現象が生じる。また、はんだとバンプの間で相互拡散が起こり、回路基板の端子と半導体チップの電極の間の金属結合により電気的に接続される。
Next, as shown in FIG. 4C, the semiconductor chip on which the bumps are formed is inverted and suction-fixed by the
At this time, heat above the melting temperature of the solder is supplied from the mounting nozzle to the semiconductor chip, the solder mounted on the circuit board is melted, and the solder crawls up the surface of the bump formed on the electrode of the semiconductor chip, A phenomenon occurs in which the solder wraps the bump. In addition, mutual diffusion occurs between the solder and the bump, and electrical connection is established by a metal bond between the terminal of the circuit board and the electrode of the semiconductor chip.
次いで、図５で示す様な液状樹脂の塗布装置の樹脂塗布ノズル１０８をＺ軸方向に移動させて液状樹脂の吐出高さまで下降させ、図４（ｄ）で示す様に、回路基板と半導体チップの隙間に、樹脂塗布ノズルより供給される熱硬化性の液状樹脂１０９を注入する。この時、一般的には液状樹脂の浸入性を向上させるために回路基板は加熱ステージ１１０（図４には図示せず）により加熱され、液状樹脂の粘土が低下する状態となっている。また、半導体チップのサイズにもよるが、図６（ａ）で示す様に、樹脂塗布ノズルをモータ（図示せず）等により、Ｘ軸方向若しくはＹ軸方向へ移動させることにより、描画塗布するのが一般的であり、塗布された液状樹脂は、毛細管現象により図６（ｂ）で示す様に、半導体チップと回路基板の隙間に浸入していく。
Next, the
その後、図４（ｅ）で示す様に、オーブン（図示せず）で加熱して液状樹脂を硬化させて、回路基板の端子と半導体チップの電極の間の接合部及び半導体チップを衝撃等の外的ストレスから保護する。 Thereafter, as shown in FIG. 4E, the liquid resin is cured by heating in an oven (not shown), and the joint between the terminal of the circuit board and the electrode of the semiconductor chip and the semiconductor chip are subjected to impact or the like. Protect from external stress.
ところで、近年の半導体チップの高集積化に伴い、半導体チップの電極ピッチは狭ピッチ化が加速しており、それに伴って半導体チップの電極に形成されるバンプも小型化が進み、半導体チップと回路基板の隙間も狭くなる傾向にあり、この狭い隙間に対して安定した充填を可能とする技術が求められている。 By the way, with the recent high integration of semiconductor chips, the electrode pitch of the semiconductor chip is accelerating and the bumps formed on the electrodes of the semiconductor chip are miniaturized. The gap between the substrates also tends to be narrowed, and a technique that enables stable filling of the narrow gap is required.
ここで、上記した従来のフリップチップ実装方式では、樹脂塗布ノズルをモータ等によりＸ軸方向若しくはＹ軸方向へ移動させることによって液状樹脂を描画塗布すると共に、回路基板を加熱して液状樹脂の粘土を低下させてはいるものの、半導体チップと回路基板との間隙への液状樹脂の充填は毛細管現象のみを利用する方法であるため、液状樹脂の特性や半導体チップの電極の配置若しくは回路基板表面の凹凸により、液状樹脂の浸入性が阻害され、図７（ａ）で示す様にボイド１１１や、図７（ｂ）で示す様に液状樹脂の未充填が生じることがある。
なお、一般的に液状樹脂はエポキシ系を主成分とし、吸湿し易い性質を持っているために、ボイドや液状樹脂の未充填が半導体チップと回路基板の間に存在した場合には、例えばマザーボードへの実装の際のリフロー時の熱により膨張し、半導体装置内に亀裂が生じ、その亀裂が起点となり拡大成長することによって故障に至るという信頼性上大きな問題となる恐れがある。
Here, in the conventional flip-chip mounting method described above, the liquid resin is drawn and applied by moving the resin application nozzle in the X-axis direction or the Y-axis direction by a motor or the like, and the circuit board is heated to make the liquid resin clay. However, since the filling of the liquid resin into the gap between the semiconductor chip and the circuit board is a method using only the capillary phenomenon, the characteristics of the liquid resin, the arrangement of the electrodes of the semiconductor chip or the circuit board surface The intrusion property of the liquid resin is hindered by the unevenness, and the
In general, liquid resin is mainly composed of epoxy resin and has a property of easily absorbing moisture. Therefore, when there is no void or liquid resin filling between the semiconductor chip and the circuit board, for example, a motherboard. There is a possibility that the semiconductor device expands due to heat during reflow during mounting, and a crack is generated in the semiconductor device, and that the crack starts as a starting point and expands and grows, leading to a serious problem in terms of reliability.
更に、近年では、バンプを半導体チップの周囲のみに形成するのでは無く、半導体チップの内側部にもバンプを形成する高密度バンプ化を行うケースが増えてきているが、こうした高密度バンプ化を行った場合には、バンプを半導体チップの周囲のみに形成する場合よりも一層液状樹脂の浸入性が阻害され、ボイドや液状樹脂の未充填が生じ易くなる。 Furthermore, in recent years, there is an increasing number of cases where bumps are formed not only on the periphery of the semiconductor chip, but also on the inner side of the semiconductor chip. When performed, the liquid resin penetration is further inhibited than when the bumps are formed only around the semiconductor chip, and voids and liquid resin are not easily filled.
本発明は以上の点に鑑みて創案されたものであって、樹脂材料の浸入性を向上させ、ボイドの発生や樹脂材料の未充填現象を抑制することができる半導体装置の製造方法及び塗布装置を提供することを目的とするものである。 The present invention was devised in view of the above points, and is a method for manufacturing a semiconductor device and a coating apparatus capable of improving the penetration of a resin material and suppressing the generation of voids and the unfilling phenomenon of the resin material. Is intended to provide.
上記の目的を達成するために、本発明に係る半導体装置の製造方法は、突起状電極が設けられた半導体チップを、前記突起状電極を介して回路基板に接合する工程と、塗布装置により樹脂材料を供給し、前記半導体チップと前記回路基板との間隙に樹脂材料を充填する工程を備える半導体装置の製造方法において、前記塗布装置を振動させながら前記樹脂材料を供給している。 In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention includes a step of bonding a semiconductor chip provided with a protruding electrode to a circuit board through the protruding electrode, and a resin by a coating device. In a method for manufacturing a semiconductor device, comprising supplying a material and filling a resin material into a gap between the semiconductor chip and the circuit board, the resin material is supplied while vibrating the coating device.
ここで、塗布装置を振動させながら樹脂材料を供給することによって、塗布装置の振動が樹脂材料に伝わり、樹脂材料自体に振動を与えることができるために、樹脂材料の浸入性の向上を図ることができる。 Here, by supplying the resin material while vibrating the coating device, the vibration of the coating device is transmitted to the resin material, and the resin material itself can be vibrated, so that the penetration of the resin material is improved. Can do.
また、上記の目的を達成するために、本発明に係る塗布装置は、突起状電極が設けられた半導体チップを、前記突起状電極を介して回路基板に接合した後に、前記半導体チップと前記回路基板との間隙に樹脂材料を充填すべく樹脂材料を供給する塗布装置において、前記樹脂材料の供給時に振動する振動素子を備えている。 In order to achieve the above object, the coating apparatus according to the present invention includes a step of bonding a semiconductor chip provided with a protruding electrode to a circuit board via the protruding electrode, and then connecting the semiconductor chip and the circuit. An applicator for supplying a resin material so as to fill a resin material into a gap with a substrate includes a vibration element that vibrates when the resin material is supplied.
ここで、樹脂材料の供給時に振動する振動素子によって、樹脂材料自体に振動を与えることができるために、樹脂材料の浸入性の向上を図ることができる。 Here, since the vibration element that vibrates when the resin material is supplied can vibrate the resin material itself, the penetration of the resin material can be improved.
なお、振動によって樹脂材料の浸入性の向上を図るという点を考えると、塗布装置を振動させること無く、半導体チップが接合された回路基板に振動を与えても良いと考えられるが、半導体チップと回路基板との間隙に樹脂を充填する前の段階において回路基板に振動を与えた場合には、半導体チップと回路基板との接合部が振動によって破壊される恐れがある。従って、半導体チップと回路基板との接合部を破壊することなく、振動によって樹脂材料浸入性の向上を図るために、回路基板を振動させるのではなく、塗布装置を振動させている。 Considering that the penetration of the resin material is improved by vibration, it is considered that the circuit board to which the semiconductor chip is bonded may be vibrated without vibrating the coating apparatus. If vibration is applied to the circuit board in the stage before filling the gap with the circuit board with resin, the joint between the semiconductor chip and the circuit board may be broken by vibration. Therefore, in order to improve the resin material penetration by vibration without breaking the joint between the semiconductor chip and the circuit board, the coating apparatus is vibrated instead of vibrating the circuit board.
上記した本発明の半導体装置の製造方法及び塗布装置では、半導体チップと回路基板との隙間が狭くなってきている動向の中で、半導体チップと回路基板との間隙への樹脂材料の浸入性を向上できると共に、半導体チップと回路基板との間隙への樹脂材料の充填に関して半導体チップの電極配置や回路基板表面の凹凸に影響を受けにくく、半導体チップと回路基板の間に発生しやすいボイドや未充填を可及的に減少させることが可能となり、良好な信頼性を備えた半導体装置を製造することができる。 In the manufacturing method and the coating apparatus of the semiconductor device of the present invention described above, in the trend that the gap between the semiconductor chip and the circuit board is narrowing, the resin material can be penetrated into the gap between the semiconductor chip and the circuit board. In addition to the improvement of the resin material in the gap between the semiconductor chip and the circuit board, it is less affected by the electrode arrangement of the semiconductor chip and the unevenness of the surface of the circuit board. Filling can be reduced as much as possible, and a semiconductor device with good reliability can be manufactured.
以下、本発明の実施の形態について図面を参照しながら説明し、本発明の理解に供する。
図１は本発明を適用した半導体装置の製造方法の一例を説明するための模式図であり、本発明を適用した半導体装置の製造方法であるフリップチップ実装方式では、上記した従来のフリップチップ実装方式と同様に、半導体チップ１の電極２に、ＡｕやＣｕ等を主成分とするバンプ３を形成すると共に、バンプの形成とは別に、半導体チップを実装する回路基板４の端子５に接合材料であるはんだ６を搭載する（図１（ａ）、図１（ｂ）参照。）。なお、本実施例では、バンプを半導体チップの周囲のみならず半導体チップの内側部にも形成している。
次に、図１（ｃ）で示す様に、バンプが形成された半導体チップを反転して実装ノズル７で吸着固定を行い、半導体チップに形成されたバンプと回路基板の端子とを高精度に位置あわせし、バンプと端子に搭載されたはんだとを接触させる。なお、この時に実装ノズルからはんだの溶融温度以上の熱を半導体チップに供給し、回路基板に搭載されたはんだを溶融して、半導体チップの電極に形成されたバンプの表面をはんだに這い上がらせ、はんだにバンプを包み込ませることによって回路基板の端子と半導体チップの電極の間の金属結合により回路基板の端子と半導体チップとを電気的に接続する点は従来と同様である。
Hereinafter, embodiments of the present invention will be described with reference to the drawings to facilitate understanding of the present invention.
FIG. 1 is a schematic diagram for explaining an example of a method for manufacturing a semiconductor device to which the present invention is applied. In the flip chip mounting method as a method for manufacturing a semiconductor device to which the present invention is applied, the conventional flip chip mounting described above is used. Similarly to the method,
Next, as shown in FIG. 1C, the semiconductor chip on which the bumps are formed is inverted and suction-fixed by the mounting nozzle 7 so that the bumps formed on the semiconductor chip and the terminals of the circuit board can be accurately aligned. Align and bring the bumps into contact with the solder on the terminals. At this time, heat higher than the melting temperature of the solder is supplied from the mounting nozzle to the semiconductor chip, the solder mounted on the circuit board is melted, and the surface of the bump formed on the electrode of the semiconductor chip is crawled up to the solder. As in the prior art, the bumps are encapsulated in the solder to electrically connect the terminals of the circuit board and the semiconductor chip by metal bonding between the terminals of the circuit board and the electrodes of the semiconductor chip.
続いて、図２に示す従来と同様の液状樹脂の塗布装置の樹脂塗布ノズル８をＺ軸方向に移動させて液状樹脂の吐出高さまで下降させた後、図１（ｄ）で示す様に、例えばモータ（図示せず）により樹脂塗布ノズルを左右（Ｘ軸方向）若しくは前後（Ｙ軸方向）に振動させながら、樹脂塗布ノズルをＸ軸方向若しくはＹ軸方向へ移動させて描画塗布を行い、回路基板と半導体チップの隙間に、樹脂塗布ノズルより供給される熱硬化性の液状樹脂９を注入する。なお、液状樹脂の浸入性を向上させるために回路基板は加熱ステージ１０（図１には図示せず）により加熱され、液状樹脂の粘土を低下させている。
Subsequently, after the
ここで、本実施例では、モータにより樹脂塗布ノズルをＸ軸方向若しくはＹ軸方向に振動させる場合を例に挙げて説明を行ったが、樹脂ノズルの振動を液状樹脂に伝えて液状樹脂自体が振動することによって液状樹脂の浸入性の向上を図ることができれば充分であり、モータにより樹脂塗布ノズルをＺ軸方向に振動させても良い。 Here, in this embodiment, the case where the resin application nozzle is vibrated in the X-axis direction or the Y-axis direction by a motor has been described as an example, but the vibration of the resin nozzle is transmitted to the liquid resin so that the liquid resin itself is It is sufficient if the penetration of the liquid resin can be improved by vibration, and the resin coating nozzle may be vibrated in the Z-axis direction by a motor.
また、本実施例では、従来と同様の塗布装置を用いて、樹脂塗布ノズルをＸ軸方向やＹ軸方向に振動させることによって樹脂材料を振動させる場合を例に挙げて説明を行ったが、図３で示す様に、液状樹脂の塗布装置の樹脂塗布ノズルの周囲に振動素子１１（例えば、ソレノイド、ボイスコイル、圧電素子、またはモータ等）を配して、振動素子によって振動を起こして樹脂材料を振動させても良い。 In the present embodiment, the case where the resin material is vibrated by vibrating the resin coating nozzle in the X-axis direction and the Y-axis direction using the same coating apparatus as in the past has been described as an example. As shown in FIG. 3, a vibration element 11 (for example, a solenoid, a voice coil, a piezoelectric element, or a motor) is arranged around a resin application nozzle of a liquid resin application device, and vibration is caused by the vibration element to cause resin. The material may be vibrated.
その後、図１（ｅ）で示す様に、オーブン（図示せず）で加熱して液状樹脂を硬化させて、回路基板の端子と半導体チップの電極の間の接合部及び半導体チップを衝撃等の外的ストレスから保護する。 Thereafter, as shown in FIG. 1E, the liquid resin is cured by heating in an oven (not shown), and the joint between the terminal of the circuit board and the electrode of the semiconductor chip and the semiconductor chip are subjected to impact or the like. Protect from external stress.
上記した本発明を適用したフリップチップ実装方式では、樹脂塗布ノズルの振動を液状樹脂に伝えることにより、半導体チップと回路基板の狭い隙間への液状樹脂の浸入効率が高まり、半導体チップと回路基板との間のボイドや液状樹脂の未充填の発生を可及的に少なくでき、良好な信頼性を得ることが可能となる。 In the flip-chip mounting method to which the present invention is applied, by transmitting the vibration of the resin application nozzle to the liquid resin, the infiltration efficiency of the liquid resin into a narrow gap between the semiconductor chip and the circuit board is increased, and the semiconductor chip and the circuit board It is possible to reduce the occurrence of voids and liquid resin unfilled as much as possible, and to obtain good reliability.
また、上記したフリップチップ実装方式では、樹脂材料自体を振動させるにあたって、従来と同様の液状樹脂の塗布装置で対応することができ、即ち、従来の液状樹脂の塗布装置においても樹脂塗布ノズルにＸ軸方向若しくはＹ軸方向に対して振動を与えることは可能であるために、既存の設備で対応することができ、追加の設備投資を行うことなくボイドや液状樹脂の未充填を抑制することができる。 Further, in the above-described flip chip mounting method, when the resin material itself is vibrated, it can be handled by a liquid resin coating device similar to the conventional one. That is, even in the conventional liquid resin coating device, X Since vibration can be applied to the axial direction or the Y-axis direction, it can be handled by existing equipment, and it is possible to suppress voids and liquid resin from being unfilled without additional capital investment. it can.
なお、樹脂塗布ノズルの周囲に振動素子を配した場合には、樹脂塗布ノズルに超音波信号を与えるといった様な、モータで与える振動と比べると高速の振動を与えることができ、より一層液状樹脂の浸入性の向上を図ることができ、より一層ボイドや液状樹脂の未充填を抑制することができる。 In addition, when the vibration element is arranged around the resin coating nozzle, it can give a high-speed vibration compared to the vibration applied by the motor, such as giving an ultrasonic signal to the resin coating nozzle, and it is much more liquid resin. It is possible to improve the penetration of the resin and to further suppress the unfilling of voids and liquid resin.
１ 半導体チップ
２ 電極
３ バンプ
４ 回路基板
５ 端子
６ はんだ
７ 実装ノズル
８ 樹脂塗布ノズル
９ 液状樹脂
１０ 加熱ステージ
１１ 振動素子
DESCRIPTION OF
Claims (2)
塗布装置により樹脂材料を供給し、前記半導体チップと前記回路基板との間隙に樹脂材料を充填する工程を備える半導体装置の製造方法において、
前記塗布装置を振動させながら前記樹脂材料を供給する
ことを特徴とする半導体装置の製造方法。 Bonding a semiconductor chip provided with a protruding electrode to a circuit board via the protruding electrode;
In a method for manufacturing a semiconductor device comprising a step of supplying a resin material by a coating device and filling a resin material into a gap between the semiconductor chip and the circuit board,
The method of manufacturing a semiconductor device, wherein the resin material is supplied while vibrating the coating apparatus.
前記樹脂材料の供給時に振動する振動素子を備える
ことを特徴とする塗布装置。 In a coating apparatus for supplying a resin material to fill a gap between the semiconductor chip and the circuit board after bonding the semiconductor chip provided with the protruding electrode to the circuit board through the protruding electrode. ,
A coating apparatus comprising: a vibrating element that vibrates when the resin material is supplied.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004206634A JP4501567B2 (en) | 2004-07-14 | 2004-07-14 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004206634A JP4501567B2 (en) | 2004-07-14 | 2004-07-14 | Manufacturing method of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2006032505A true JP2006032505A (en) | 2006-02-02 |
| JP4501567B2 JP4501567B2 (en) | 2010-07-14 |
Family
ID=35898512
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004206634A Expired - Fee Related JP4501567B2 (en) | 2004-07-14 | 2004-07-14 | Manufacturing method of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4501567B2 (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05152359A (en) * | 1991-11-26 | 1993-06-18 | Hitachi Ltd | Potting device |
| JPH1176897A (en) * | 1997-09-09 | 1999-03-23 | Fujitsu Ltd | Viscous fluid supply device |
| JP2000124242A (en) * | 1998-01-23 | 2000-04-28 | Apic Yamada Corp | Method and apparatus for sealing semiconductor device with resin and semiconductor device |
-
2004
- 2004-07-14 JP JP2004206634A patent/JP4501567B2/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05152359A (en) * | 1991-11-26 | 1993-06-18 | Hitachi Ltd | Potting device |
| JPH1176897A (en) * | 1997-09-09 | 1999-03-23 | Fujitsu Ltd | Viscous fluid supply device |
| JP2000124242A (en) * | 1998-01-23 | 2000-04-28 | Apic Yamada Corp | Method and apparatus for sealing semiconductor device with resin and semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JP4501567B2 (en) | 2010-07-14 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20150318228A1 (en) | Module and method for producing module | |
| JP2000036520A (en) | Method for mounting flip chip and device therefor | |
| JP2008288489A (en) | Process for producing built-in chip substrate | |
| CN101853835B (en) | Manufacturing method of flip chip package | |
| JP4569605B2 (en) | Filling method of underfill of semiconductor device | |
| KR20020044577A (en) | Advanced flip-chip join package | |
| JP2907188B2 (en) | Semiconductor device, method of mounting semiconductor device, and method of manufacturing semiconductor device | |
| JP3309832B2 (en) | Connection structure and connection method for electronic components | |
| KR20120062434A (en) | Semiconductor package and method for manufacturing the same | |
| JP4501567B2 (en) | Manufacturing method of semiconductor device | |
| JP2010212421A (en) | Semiconductor device | |
| JP5375563B2 (en) | Mounting structure and mounting method of semiconductor device | |
| JP3763962B2 (en) | Mounting method of chip parts on printed circuit board | |
| JP2002110715A (en) | Manufacturing method of semiconductor device | |
| JP2003324182A (en) | Flip chip bonding method and flip chip bonding structure | |
| JPH11111755A (en) | Manufacture of semiconductor device | |
| JP4561969B2 (en) | Semiconductor device | |
| KR100665288B1 (en) | Flip chip package manufacturing method | |
| JPH11274235A (en) | Semiconductor device and producing method therefor | |
| JP2003332381A (en) | Electronic component mounting method | |
| JP2008091650A (en) | Flip chip mounting method and semiconductor package | |
| JP4696712B2 (en) | Semiconductor device | |
| JP3721986B2 (en) | Semiconductor device and manufacturing method thereof | |
| JPH08274209A (en) | Chip carrier and manufacturing method thereof | |
| JPH08162497A (en) | Semiconductor device mounting method and mounting body thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20070329 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20070710 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20090908 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20091029 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20091202 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20100115 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20100330 |
|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20100412 |
|
| FPAY | Renewal fee payment (prs date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130430 Year of fee payment: 3 |
|
| LAPS | Cancellation because of no payment of annual fees |