JP2006020384A - Control device for power converter - Google Patents

Abstract

A control device for a power converter is provided that reduces output voltage errors to prevent output voltage distortion and adverse effects on a load.
A power converter control device comprising a PWM rectifier 1 and an inverter 2 includes two-phase modulation means 202 for two-phase modulation of the inverter 2 and compensation for compensating an output voltage error during two-phase modulation. Compensation amount calculation means 204 for calculating the quantity, inverter PWM pattern creation means 203, rectifier PWM pattern creation means 101, switching detection means 400 of PWM rectifier 1, and maximum phase, intermediate phase, minimum phase from each phase input voltage The voltage magnitude detecting means 500 for detecting the voltage of the load current and the load current polarity discriminating means 300 are provided. Compensation amount calculation means 204 calculates the compensation amount using each output of voltage magnitude detection means 500, polarity determination means 300, switching detection means 400, switching frequency of inverter 2, and dead time.
[Selection] Figure 1

Description

  The present invention relates to a control device for a power converter, and in particular, an output at the time of two-phase modulation in a power converter that includes a PWM rectifier and an inverter and does not include a filter in a DC link unit, or a matrix converter that performs AC-AC direct conversion. The present invention relates to a technique for compensating for a voltage error.

FIG. 6 is a related art showing an AC-AC power converter including a PWM rectifier 1 and an inverter 2 and its control device, and shows a general three-phase case as a multiphase AC.
In the main circuit of FIG. 6, the PWM rectifier 1 is configured by connecting a semiconductor switching element 11 to a three-phase bridge, and the inverter 2 connects semiconductor switching elements Sup and Sun such as IGBTs in series and returns them to each of them. The upper and lower arms for one phase are configured by connecting the diodes Dup and Dun in reverse parallel, and the upper and lower arms are connected in parallel for three phases.
Further, a filter 3 including a reactor 31 and a capacitor 32 is connected to a DC link portion between the PWM rectifier 1 and the inverter 2.
R, S, and T are AC input terminals, and U, V, and W are AC output terminals.

On the other hand, the control device of the main circuit includes a rectifier control means 100, an inverter control means 200, and a load current polarity determination means 300.
The rectifier control unit 100 includes a rectifier PWM pattern generation unit 101 that receives the input current command i ^* and generates a PWM pulse for each switching element of the PWM rectifier 1.

The inverter control unit 200 includes a dead time error compensation amount calculation unit 201, a two-phase modulation unit 202, and an inverter PWM pattern creation unit 203.
The dead time error compensation amount calculation means 201 uses the polarity of each phase load current determined by the load current polarity determination means 300, the DC link voltage e _dc , the dead time T _d, and the switching frequency f _s to determine the dead time T _d. The output voltage error compensation amount v _c ^{* due} to the above is calculated.
The two-phase modulation means 202 outputs the voltage command v ^** after error compensation using the output voltage command v ^* and the compensation amount v _c ^*, and the two-phase modulation of the inverter 2 improves the voltage utilization rate. It plays an effect.
The inverter PWM pattern creating means 203 creates a PWM pulse for each switching element of the inverter 2 based on the voltage command v ^** .

Hereinafter, the two-phase modulation of the inverter will be described.
When a three-phase inverter is sine-wave modulated, it is known that the amplitude V _fn of the output line voltage of the inverter is given by Equation 1 (published by the Institute of Electrical Engineers, Semiconductor Power Conversion Method Research Special Committee, “Semiconductor Power conversion circuit ", fifth edition, p.118 formula (see 6.3.21)). Here, the DC link voltage is e _dc , and the modulation degree of the inverter is λ.

From Equation 1, the amplitude V _fn of the output line voltage is limited to √3 / 2≈0.866 times the DC link voltage e _dc even if the modulation degree of the inverter is 1.
However, if two-phase modulation is used, the amplitude of the output line voltage can be increased to 1.0 times the DC link voltage. That is, in the two-phase modulation, the voltage utilization factor can be improved by adding the zero phase component (the output voltage when the upper arm or lower arm switching element is turned on for a predetermined period) to the phase voltage command. .
Assuming that the zero-phase voltage command is v ₀ ^* , the output voltage command before the two-phase modulation is v ^* , and the output voltage command after the two-phase modulation is v ₂ ^* , v ₂ ^* and v ₀ ^* are respectively expressed by Equation 2, Represented by 3.

  By the way, in general, in an inverter, it is necessary to provide the dead time in order to prevent a short circuit between the upper and lower arms, but an error occurs in the output voltage of the inverter due to the influence of the dead time. An output voltage error caused by dead time in a conventional inverter and a compensation method thereof will be described below.

FIG. 7 shows the command values TSup ^* and TSun ^* for the U-phase switching elements Sup and Sun of the inverter having the filter 3 in the DC link portion as shown in FIG. 6, the command values TSup and TSun with dead time, and the load current. The potential v _u of the U-phase output terminal when i _u is positive and negative is shown.
Note that the DC link voltage e _dc can be regarded as constant by the filter of the DC link unit.

As shown in FIG. 7, when the load current i _u is positive, the output voltage v _u changes with a delay by the dead time T _d when the output voltage rises. On the other hand, when the load current i _u is negative, the output voltage v _u changes with a delay of the dead time T _d when the output voltage falls.
Therefore, when the load current i _u is positive, the output voltage v _u decreases with respect to the output voltage command v _u ^* , and increases when the load current i _u is negative. It becomes.

On the other hand, during two-phase modulation, there are always on periods of all switching elements in the upper arm or all switching elements in the lower arm. In these always-on periods, the switching elements of the upper and lower arms are not switched, so that the voltage error described above does not occur.
Therefore, the output voltage error due to the dead time may be compensated for a period other than the always-on period during the two-phase modulation.

As described above, each phase output voltage command v _u ^** , v _v ^** , v _w ^** after output voltage error compensation due to dead time (output voltage command input to the inverter PWM pattern creation means 203 in FIG. 6). v corresponds to ^**), the inverter output voltage command value after the two-phase modulation generated in the interior of the two-phase modulation means 202 of FIG. ^{_{6 v 2u *, v 2v *}} , v 2w * (corresponding to formula 2) Using the compensation amounts v _cu ^* , v _cv ^* , and v _cw ^* calculated by the dead time error compensation amount calculation means 201, it can be expressed by Equation 4.

When the load current is i _load , the voltage error compensation amount ΔV _ic for each phase is expressed by Equation 5. Here, since the compensation amount ΔV _ic includes the polarity determination signal sign (i _load ) (that is, 1 or −1 or 0) of the load current, the compensation amounts v _cu ^* , v _cv ^* , and v _cw ^* are It takes the value of e _dc T _d f _s or _-e dc _T d _{f s} or 0.
The inverter output voltage command value _v ² * in equation ^{_{5 (v 2u *, v 2v}} *, v 2w *) shall varies between -1 and 1.

Next, FIG. 8 shows a circuit configuration of a conventional power converter that does not include a filter in the DC link portion for the purpose of reducing the size and extending the life of the apparatus. In FIG. 8, 210 is an inverter control means, and the other components are given the same numbers as in FIG. This type of power converter is described in Non-Patent Document 1 described later.
As shown in FIG. 8, in the power converter including only the PWM rectifier 1 and the inverter 2 without a filter in the DC link portion, any potential of the input voltages v _r , v _s , and v _t is generated at the output terminal. That is, the output terminals U, V, and W of the inverter 2 have a maximum phase voltage v _max , an intermediate phase voltage v _mid , and a minimum phase voltage v _min (hereinafter simply referred to as a maximum voltage, Any of intermediate voltage and minimum voltage) is output.

FIG. 9 shows the U-phase output voltage command v _u ^* and the U-phase load current i when the output voltage changes in the order of maximum → intermediate → minimum → intermediate → maximum in one carrier in the prior art of FIG. The U-phase output voltage v _u is shown when _u is positive and negative. However, in this figure, the output voltage command value of the inverter 2 is other than the always-on period of the upper arm or the lower arm.
As in the case where a filter is provided in the DC link section (FIG. 7), in FIG. 9, a voltage error occurs in the hatched portion due to the dead time of the inverter 2 and the switching of the PWM rectifier 1, and the load current _iu is positive. The output voltage v _u decreases when the output voltage v _u rises, and the output voltage v _u decreases. When the load current i _u is negative, the output voltage v _u increases when the output voltage v _u falls.

FIG. 10 is a waveform diagram showing a simulation result at the time of two-phase modulation of the inverter in the power converter that does not include a filter in the DC link portion as shown in FIG. The waveforms in FIG. 10 are the input voltages v _r , v _s , v _t , voltage command v _u ^* , two-phase modulated voltage command v _u2 ^* , and U-phase output voltage v _u from the top.
From FIG. 10, it can be seen that the output voltage v _u changes during the normally on periods T1 and T2 of the switching elements of the upper arm or the lower arm of the inverter. This is due to the fact that the PWM rectifier performs switching to change the output voltage in order to make the input current sinusoidal even though the switching element of the upper arm or lower arm of the inverter is always on. . That is, since a voltage error occurs in the output voltage even during the normally-on period of the switching element of the inverter, distortion of the output voltage cannot be reduced only by the output voltage error compensation by the conventional dead time.

Next, FIG. 11 shows a harmonic analysis result of the output line voltage v _uv in FIG.
FIG. 11 shows that the output line voltage v _uv includes about 2.8% of the fifth harmonic and about 1.5% of the seventh harmonic. When the output voltage includes many harmonics, for example, when an electric motor is connected to the load, rotation unevenness and torque ripple are caused by output voltage distortion.

  What has been described above also applies to a matrix converter having no DC link section. In the matrix converter, a commutation period is provided in order to prevent a short circuit at the input end and an opening at the output end, but an error occurs in the output voltage due to the influence of the commutation period. Also in the matrix converter, there is a switching period in order to make the input current sinusoidal in the sections T1 and T2 in FIG. 10 during two-phase modulation, which causes an error in the output voltage.

  Here, Patent Document 1 below discloses a method of correcting an output voltage error that occurs in a commutation period in a matrix converter. Claim 8 of Patent Document 1 describes a voltage error compensation amount equation, but this method cannot be applied during two-phase modulation.

Osamu Tarumi, Kenichi Iimori, Katsuji Shinohara, “Characteristics of voltage-type inverter without smoothing circuit during control”, 1996 IEEJ National Conference T-23 Japanese Patent Laying-Open No. 2003-309975 (claims 4, 5, 8, [0008] to [0010], FIG. 6, FIG. 7, etc.)

As described above, in a power converter that combines a PWM rectifier and an inverter and does not include a filter in the DC link unit, an error occurs in the output voltage due to the inverter dead time or the PWM rectifier switching, and also in the matrix converter. An error occurs in the output voltage due to the influence of the current period. As a result, the output voltage is distorted. For example, when an electric motor is connected as a load, it causes rotation unevenness and torque ripple of the electric motor.
SUMMARY OF THE INVENTION An object of the present invention is to provide a power converter control device that reduces output voltage errors in these power converters to prevent distortion of the output voltage and adverse effects on the load.

In order to solve the above problems, the invention described in claim 1 controls a power converter comprising a PWM rectifier that performs AC-DC conversion and an inverter that is connected to the PWM rectifier and performs DC-AC conversion. In the control device,
The controller is
Two-phase modulation means for generating an output voltage command for performing two-phase modulation of the inverter, and a first amount for calculating a compensation amount for correcting the output voltage command to compensate for an output voltage error that occurs during two-phase modulation of the inverter Compensation amount calculation means, inverter PWM pattern creation means for creating a PWM pulse for the semiconductor switching element of the inverter based on the corrected output voltage command, and PWM pulse creation for the semiconductor switching element of the PWM rectifier based on the input current command Rectifier PWM pattern creating means for performing switching detection means for detecting the presence or absence of switching of the PWM rectifier, and voltage magnitude detecting means for detecting the maximum phase voltage, the intermediate phase voltage, and the minimum phase voltage from the input voltage of each phase. And a load current polarity discriminating means,
The first compensation amount calculating means corrects the output voltage command using the output of the voltage magnitude detecting means, the output of the polarity determining means, the output of the switching detecting means, the switching frequency and dead time of the inverter. Is calculated.

The invention described in claim 2 is a control device for controlling a power converter comprising a PWM rectifier that performs AC-DC conversion, and an inverter that is connected to the PWM rectifier and performs DC-AC conversion.
The controller is
Two-phase modulation means for generating an output voltage command for two-phase modulation of the inverter, and correction of the output voltage command to compensate for an output voltage error caused by the inverter dead time during the two-phase modulation of the inverter Generated due to the first compensation amount computing means for computing the compensation amount, the inverter PWM pattern creating means for creating the PWM pulse for the semiconductor switching element of the inverter based on the corrected output voltage command, and the switching of the PWM rectifier A second compensation amount computing means for computing a compensation amount for correcting the input current command in order to compensate for an output voltage error, and a PWM pulse for the semiconductor switching element of the PWM rectifier based on the corrected input current command Rectifier PWM pattern creation means and input voltage of each phase to maximum phase voltage, intermediate phase voltage, minimum Comprising of a voltage magnitude detection means for detecting a voltage, a polarity discrimination means of the load current, and
The first compensation amount calculation means calculates a compensation amount for correcting the output voltage command using the output of the voltage magnitude detection means, the output of the polarity determination means, the switching frequency and dead time of the inverter,
The second compensation amount calculation means calculates a compensation amount for correcting the input current command using the output of the voltage magnitude detection means, the output of the polarity determination means, the switching frequency of the PWM rectifier, and the dead time. .

The invention described in claim 3 is a control device for controlling a power converter such as a matrix converter that obtains an AC voltage of an arbitrary magnitude and frequency by AC-AC direct conversion.
The controller is
Two-phase modulation means for generating an output voltage command for two-phase modulation of the power converter, and a compensation amount for correcting the output voltage command to compensate for an output voltage error generated during the two-phase modulation of the power converter A first compensation amount calculating means, a PWM pattern creating means for creating a PWM pulse for the semiconductor switching element of the power converter based on the corrected output voltage command, an input current command indicating whether or not the power converter is switched, etc. Switching detection means for detecting based on
A voltage magnitude detecting means for detecting a maximum phase voltage, an intermediate phase voltage, and a minimum phase voltage from an input voltage of each phase; and a load current polarity determination means,
The first compensation amount calculation means outputs using the output of the voltage magnitude detection means, the output of the polarity discrimination means, the output of the switching detection means (input current command), the switching frequency and the commutation period of the power converter. The compensation amount for correcting the voltage command is calculated.

  According to the present invention, in a power converter that includes a PWM rectifier and an inverter and does not include a filter in a DC link section, or a direct power converter such as a matrix converter, the dead time of the inverter or the PWM rectifier during two-phase modulation The output voltage command value and the output voltage can be matched by accurately compensating for the voltage error caused by the switching, commutation period, and the like. As a result, distortion of the output voltage can be reduced, and operation can be performed without causing uneven rotation and torque ripple even when an electric motor is connected to the load.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
First, FIG. 1 is a block diagram showing a first embodiment of the present invention corresponding to claim 1, and the configuration of the main circuit is the same as FIG. That is, the power converter according to this embodiment includes a PWM rectifier 1 in which a semiconductor switching element 11 is connected in a three-phase bridge to perform AC-DC conversion, and semiconductor switching elements Sup and Sun such as IGBTs connected in series. Each of the free-wheeling diodes Dup and Dun is connected in reverse parallel to form an upper and lower arm for one phase, and the upper and lower arms are connected in parallel for three phases, and is composed of an inverter 2 for DC-AC conversion. The DC link portion does not include the filter 3 as shown in FIG.

On the other hand, the control device for the main circuit includes rectifier control means 100, inverter control means 200A, load current polarity determination means 300, rectifier switching detection means 400, and voltage magnitude detection means 500.
Here, the operations of the rectifier control means 100 and the load current polarity determination means 300 are the same as those in FIG.

Further, the rectifier switching detection means 400 detects whether or not the PWM rectifier 1 is switching based on the rectifier PWM pattern, and outputs a switching detection signal _dpr .
The voltage magnitude detection unit 500 includes a maximum voltage detection unit 501, an intermediate voltage detection unit 502, and a minimum voltage detection unit 503, each of which includes a maximum voltage v _max , an intermediate voltage v _mid , and a minimum among the phase input voltages of the PWM rectifier 1. The voltage _vmin is detected and output.

The inverter control unit 200A includes a first compensation amount calculation unit 204, a two-phase modulation unit 202, and an inverter PWM pattern creation unit 203.
The compensation amount calculation means 204 includes the switching detection signal d _pr , the voltages v _max , v _mid , v _min , the load current polarity determination signal sign (i _load ) for each phase, the dead time T _d, The compensation amount v _c ^* of the output voltage error is calculated using the switching frequency f _s .
The two-phase modulation means 202 calculates the output voltage command v ₂ ^* after the two-phase modulation using the output voltage command v ^* and the zero-phase divided voltage command v ₀ ^{* according} to the equation 2, and outputs the output voltage command v _2. ^An output voltage command v ^** (v _u ^** , v _v ^** , v _w ^** ) is generated by the above equation 4 using ^* and the compensation amount v _c ^* from the compensation amount calculation means 204.
Inverter PWM pattern creating means 203 creates PWM pulses for each switching element of inverter 2 based on output voltage command v ^** , as in FIGS.

Next, a method of calculating the output voltage error compensation amount v _c ^* in this embodiment will be described.
When the output voltage command v _u ^* is not always in the on-period, the output voltage v _u changes as shown in FIG. Therefore, if the output voltage error is ΔV, the error ΔV is expressed by Equation 6.

On the other hand, when the output voltage command v _u ^{* of} the inverter 2 is always on, the voltage error is zero when the PWM rectifier 1 is not switched, but the PWM rectifier 1 is switched to make the input current sinusoidal. When performing, the output voltage error can be divided into the upper arm always-on period and the lower arm always-on period.
That is, when the upper arm is always on, the maximum voltage and the intermediate voltage of the input voltage are output to the output terminal, and when the lower arm is always on, the intermediate voltage and the minimum voltage of the input voltage are output to the output terminal. . Therefore, the voltage errors ΔV _p and ΔV _n during the period in which the upper arm and the lower arm are always on are expressed by Equations 7 and 8, respectively.

Any of the voltage errors described above occurs within one switching cycle. Therefore, the compensation amount is obtained by multiplying the voltage error by the switching frequency and further considering the load current polarity determination signal sign (i _load ). Further, when the switching detection signal d _pr of the PWM rectifier 1 is divided into cases where d _pr = 1 at the time of switching and d _pr = 0 at the time of not switching, the compensation amount ΔV _mc is expressed by Equation 9.
Since the compensation amount ΔV _mc includes the load current polarity determination signal sign (i _load ) (that is, 1 or −1 or 0) for each phase, the compensation amount v input to the two-phase modulation unit 202. _c ^* takes a value of ± (v _max −v _min ) f _s T _d , ± (v _max −v _mid ) f _s T _d , ± (v _mid −v _min ) f _s T _d, or 0.

Accordingly, the compensation amount calculation unit 204 of FIG. 1 calculates the compensation amount ΔV _mc in all cases (four types) by the calculation of Equation 9, and outputs these to the two-phase modulation unit 202 as the compensation amount v _c ^* .
In the two-phase modulation means 202, a predetermined compensation amount ΔV _mc among the four types of Equation 9 according to the output voltage command v ₂ ^* after two-phase modulation generated inside and the value of the switching detection signal d _pr. (V _c ^* ) is selected, and each phase output voltage command v ^** is generated by Equation 4 using this compensation amount and the output voltage command v ₂ ^* after two-phase modulation.

Here, FIG. 2 is a flowchart showing a compensation amount calculation process in the first embodiment.
First, it is determined whether or not the output voltage command is always on (S1). Except for the always-on period, the compensation amount is determined by Equation 6 and Equation 9 (S5). In the always-on period, it is determined whether the PWM rectifier 1 is performing a switching operation (S2). When the PWM rectifier 1 is not switching, the compensation amount is zero according to Equation 9 (S6). When the PWM rectifier 1 is switching, it is determined which of the upper arm and the lower arm of the inverter 2 is always on (S3), and the compensation amount is determined by Equation 7 and Equation 9 when the upper arm is on. (S4) When the lower arm is turned on, the compensation amount is determined by Equations 8 and 9 (S7).

Note that when the output voltage error compensation is performed during two-phase modulation, there are the following two orders.
(1) Perform two-phase modulation after performing output voltage error compensation (2) Perform output voltage error compensation after performing two-phase modulation (1) Whether or not the output voltage command is always on Can be determined by the angle of the output voltage command. In this case, for example, the U-phase compensation amount is added to the U-phase voltage command.
On the other hand, in the case of (2), it is possible to determine whether the upper arm or the lower arm of the inverter 2 is always in the ON period or not based on the amplitude of the output voltage command. In this case, when the U phase is always on, the compensation amount is subtracted from the V and W phase voltage commands.

FIG. 3 shows a harmonic analysis result of the output line voltage v _uv when the output voltage error compensation is performed according to this embodiment. According to FIG. 3, it can be seen that the lower harmonics included in the output line voltage v _uv are less than 1%. That is, the distortion of the output voltage is sufficiently reduced.

Next, FIG. 4 is a block diagram showing a second embodiment of the present invention corresponding to claim 2.
In this embodiment, the output voltage error caused by the dead time of the inverter 2 is compensated by the inverter control means 200A, and the output voltage error caused by the switching of the PWM rectifier 1 is compensated by the rectifier control means 100A.

That is, the second compensation amount calculation means 102 in the rectifier control means 100A includes the maximum voltage detection means 501, the intermediate voltage detection means 502, the output of the minimum voltage detection means 503, and the polarity determination signal from the load current polarity determination means 300. The compensation amount of the output voltage error is calculated using the dead time T _dr and the switching frequency f _{sr of the} PWM rectifier 1, and the input current command i ^* is corrected using the compensation amount. Then, the corrected input current command is given to the rectifier PWM pattern creating means 101 to create a PWM pulse for the PWM rectifier 1.

The compensation amount calculation of the output voltage error may be performed by the compensation amount computing means 102 on the PWM rectifier 1 side based on Equation 9, in which case T _d and f _s in Equation 9 are respectively changed to T _dr and f _sr . replace. Further, although not shown, the output voltage command v ₂ ^* after the two-phase modulation in the case classification of Expression 9 is obtained from the two-phase modulation means 202, and the switching detection signal d _pr is obtained from its own PWM pattern creation means 101. obtain.
On the other hand, on the inverter 2 side, the compensation amount computing means 204 computes the compensation amount using Equation 5, and the two-phase modulation means 202 computes each phase output voltage command of the inverter 1 using Equation 4.

FIG. 5 is a block diagram showing a third embodiment of the present invention corresponding to the third aspect.
This embodiment is intended for a matrix converter 4 that does not include a DC link unit as a power converter. The matrix converter 4 includes, for example, an antiparallel connection of semiconductor switching elements capable of controlling current in a single direction to form a bidirectional switch S. The bidirectional switch S is connected to the three-phase AC input terminals R and S. , T and the output terminals U, V, W are connected to each other, and an AC voltage having an arbitrary magnitude and frequency is obtained by AC-AC direct.

In FIG. 5, reference numeral 200B denotes a matrix converter control means, which is a maximum voltage v _max , an intermediate voltage v _mid , a minimum voltage v _min , an input current command i ^* , a load current polarity determination signal, a commutation period T _comm, and a switching frequency f. _s is inputted, the first compensation amount calculation means 204B for calculating the compensation amount v _c ^* of the output voltage error, and each phase output voltage command v ^** based on the compensation amount v _c ^* and the output voltage command v ^* Two-phase modulation means 202B to be generated and PWM pattern creation means 203B to create a PWM pulse for the bidirectional switch S of the matrix converter 4 are provided. Note that the PWM pattern creating unit 203B, for example, synthesizes and outputs each PWM pulse for the virtual PWM rectifier and virtual inverter assumed in the matrix converter 4.

Also in the two-phase modulation of the matrix converter 4, there is a period corresponding to the always-on period of the upper arm or lower arm of the inverter shown in FIG. 10, and an error occurs in the output voltage due to this period. There is a need to.
The output voltage error compensation at the time of the two-phase modulation may be performed in the same manner as in the first embodiment. However, in order to detect whether or not switching is performed in order to control the input current in a sine wave shape, the output voltage error compensation in the first embodiment is performed. The input current command i ^* is used instead of the switching detection signal _dpr . That is, in this embodiment, the input current command i ^* is a switching detection signal.
Further, the calculation of the output voltage error and the compensation amount may be performed using the commutation period T _comm instead of the dead time T _d in Expressions 6 to 9.

  According to each of the embodiments described above, in a power converter such as the power converter formed of the PWM rectifier 1 and the inverter 2 and the matrix converter 4, the dead time of the inverter 2 during two-phase modulation, the switching of the PWM rectifier 1, the matrix converter The output voltage error caused by the commutation period 4 can be compensated accurately.

It is a block diagram which shows 1st Embodiment of this invention. It is a flowchart which shows the calculation process of the compensation amount in 1st Embodiment. It is a figure which shows the harmonic analysis result of the output line voltage at the time of performing error compensation of the output voltage by 1st Embodiment. It is a block diagram which shows 2nd Embodiment of this invention. It is a block diagram which shows 3rd Embodiment of this invention. It is a block diagram of a prior art. It is a figure which shows the command value and output terminal electric potential with respect to the switching element of the power converter provided with the filter in the direct-current link part. It is a block diagram of another prior art. It is explanatory drawing of the output voltage error in FIG. It is a wave form diagram which shows the simulation result at the time of the two-phase modulation of the power converter which does not provide a filter in a direct-current link part. It is a figure which shows the harmonic analysis result of the output line voltage in FIG.

Explanation of symbols

1: PWM rectifier 2: Inverter 4: Matrix converter 11: Semiconductor switching element 100, 100A: Rectifier control means 101: Rectifier PWM pattern creation means 102: Second compensation amount calculation means 200A: Inverter control means 200B: Matrix converter control means 202, 202B: Two-phase modulation means 203: Inverter PWM pattern creation means 203B: PWM pattern creation means 204, 204B: First compensation amount calculation means 300: Load current polarity determination means 400: Rectifier switching detection means 500: Voltage magnitude detection Means 501: Maximum voltage detection means 502: Intermediate voltage detection means 503: Minimum voltage detection means Sup, Sun: Semiconductor switching element S: Bidirectional switch Dup, Dun: Free-wheeling diode

Claims (3)

In a control device for controlling a power converter comprising a PWM rectifier that performs AC-DC conversion and an inverter that is connected to the PWM rectifier and performs DC-AC conversion,
The controller is
Two-phase modulation means for generating an output voltage command for two-phase modulating the inverter;
First compensation amount computing means for computing a compensation amount for correcting the output voltage command in order to compensate for an output voltage error that occurs during two-phase modulation of the inverter;
Inverter PWM pattern creating means for creating a PWM pulse for the semiconductor switching element of the inverter based on the corrected output voltage command;
Rectifier PWM pattern creation means for creating a PWM pulse for the semiconductor switching element of the PWM rectifier based on the input current command;
Switching detection means for detecting the presence or absence of switching of the PWM rectifier;
Voltage magnitude detection means for detecting the maximum phase voltage, intermediate phase voltage, minimum phase voltage from the input voltage of each phase;
Load polarity determination means,
The first compensation amount calculating means corrects the output voltage command using the output of the voltage magnitude detecting means, the output of the polarity determining means, the output of the switching detecting means, the switching frequency and dead time of the inverter. A control device for a power converter, wherein In a control device for controlling a power converter comprising a PWM rectifier that performs AC-DC conversion and an inverter that is connected to the PWM rectifier and performs DC-AC conversion,
The controller is
Two-phase modulation means for generating an output voltage command for two-phase modulating the inverter;
First compensation amount computing means for computing a compensation amount for correcting the output voltage command in order to compensate for an output voltage error caused by inverter dead time during two-phase modulation of the inverter;
Inverter PWM pattern creating means for creating a PWM pulse for the semiconductor switching element of the inverter based on the corrected output voltage command;
Second compensation amount computing means for computing a compensation amount for correcting the input current command in order to compensate for an output voltage error caused by switching of the PWM rectifier;
Rectifier PWM pattern creating means for creating a PWM pulse for the semiconductor switching element of the PWM rectifier based on the corrected input current command;
Voltage magnitude detection means for detecting the maximum phase voltage, intermediate phase voltage, minimum phase voltage from the input voltage of each phase;
Load polarity determination means,
The first compensation amount calculation means calculates a compensation amount for correcting the output voltage command using the output of the voltage magnitude detection means, the output of the polarity determination means, the switching frequency and dead time of the inverter,
The second compensation amount calculation means calculates a compensation amount for correcting the input current command using the output of the voltage magnitude detection means, the output of the polarity determination means, the switching frequency of the PWM rectifier, and the dead time. A power converter control device. In a control device for controlling a power converter configured to obtain an AC voltage having an arbitrary magnitude and frequency by AC-AC direct conversion,
The controller is
Two-phase modulation means for generating an output voltage command for two-phase modulating the power converter;
First compensation amount computing means for computing a compensation amount for correcting the output voltage command in order to compensate for an output voltage error that occurs during two-phase modulation of the power converter;
PWM pattern creating means for creating a PWM pulse for the semiconductor switching element of the power converter based on the corrected output voltage command;
Switching detection means for detecting the presence or absence of switching of the power converter;
Voltage magnitude detection means for detecting the maximum phase voltage, intermediate phase voltage, minimum phase voltage from the input voltage of each phase;
Load polarity determination means,
The first compensation amount calculation means corrects the output voltage command using the output of the voltage magnitude detection means, the output of the polarity determination means, the output of the switching detection means, the switching frequency and the commutation period of the power converter. A control device for a power converter, wherein a compensation amount is calculated.

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