JP2006014506A - Power supply - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power supply supplying a voltage efficiently from heavy load to light load with no variation, and to provide a power supply controller. <P>SOLUTION: The power supply comprises: a first voltage converting means of pulse width modulation system (123, 125, 127, M1, M2, Rs1); a second voltage converting means of pulse width modulation system (124, 125, 127, M1, M2); a third voltage converting means (126, M3) consisting of a regulator; and a control means (Rs, 121, 122) performing operation switching control of the first voltage converting means (123, 125, 127, M1, M2, Rs1), the second voltage converting means (124, 125, 127, M1, M2), and the third voltage converting means (126, M3) such that the first voltage converting means (123, 125, 127, M1, M2, Rs1) operates at the time of heavy load, the second voltage converting means (124, 125, 127, M1, M2) operates at the time of intermediate load, and the third voltage converting means (126, M3) operates at the time of light load. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a power supply device, and more particularly to a power supply device that converts an input voltage into a predetermined voltage and supplies the voltage to a load.

  FIG. 5 is a block diagram showing a conventional example.

  The conventional power supply device 1 includes a power supply control device 11, a coil L, and a capacitor C. The input power supply Vin is converted into a predetermined voltage and applied to a load as an output voltage Vout.

  The power supply control device 11 is supplied with an input voltage Vin at a terminal Tin and an output voltage Vout applied to a load at a terminal Ts11.

  The power supply controller 11 includes an error amplifier 21, a PWM (pulse width modulation) control unit 22, a driver 23, transistors M1 and M2, and a load resistance detection resistor Rs1.

  The error amplifier 21 outputs an error signal corresponding to the difference between the voltage supplied to the terminal Ts11 and the reference voltage. The error signal output from the error amplifier 21 is supplied to the PWM control unit 22. The PWM control unit 22 generates a pulse having a pulse width corresponding to the error signal. The pulse generated by the PWM control unit 22 is supplied to the driver 23. The driver 23 switches the transistor M1 and the transistor M2 alternately according to the pulse generated by the PWM control unit 22. The transistor M1 and the transistor M2 are connected in series between the drain and the source, one end is connected to the terminal Tin via the load current detection resistor Rs1, and the other end is grounded.

  A connection point between the transistor M1 and the transistor M2 is connected to the terminal Tout. By alternately switching the transistor M1 and the transistor M2, a current is output or drawn from the terminal Tout in synchronization with the pulse generated by the PWM control unit 22. The output power of the terminal Tout is smoothed by the coil L and the capacitor C and supplied to the load. The connection point between the load current detection resistor Rs1 and the transistor M1 is connected to the PWM control unit 22. When the load current increases, the potential at the connection point between the load current detection resistor Rs1 and the transistor M1 becomes smaller than a predetermined potential. Thereby, the PWM control unit 22 determines that the current is in an overcurrent state, and controls the driver 23 so as to turn off the transistors M1 and M2.

  At this time, the power supply apparatus 1 constitutes a converter using a PWM control method. Converters based on the PWM control method generally have good conversion efficiency at heavy loads and tend to decrease at light loads.

  FIG. 6 is a diagram showing a characteristic of the efficiency η with respect to the load current Iout of the conventional power supply device.

  As shown in FIG. 6, the power supply device 1 that is a converter using the PWM control system has a characteristic that the conversion efficiency becomes maximum at a predetermined load current Iout0, and the load efficiency Iout is small, that is, the conversion efficiency η decreases when the load is light. Show.

  For this reason, as a power supply device, a power supply device has been proposed in which one voltage conversion circuit is selected from a plurality of voltage conversion circuits so as to improve the conversion efficiency (see, for example, Patent Document 1).

Japanese Patent Laid-Open No. 11-353040

  However, in the conventional power supply device, voltage conversion is performed by the converter even at a light load, and thus there is a problem that the conversion efficiency is lowered as shown in FIG. 6 at the light load.

  In addition, in the power supply apparatus in which one voltage conversion circuit is selected from a plurality of voltage conversion circuits so as to improve the conversion efficiency that has already been proposed, the configuration is such that the plurality of voltage conversion circuits are simply switched. There is a problem that the output voltage fluctuates depending on the switching timing.

  The present invention has been made in view of the above points, and an object of the present invention is to provide a power supply apparatus and a power supply control apparatus that can supply a voltage from a heavy load to a light load with high efficiency and without fluctuation.

  The present invention is a power supply device that converts an input voltage (Vin) into a predetermined output voltage (Vout) and applies it to a load, and is composed of a pulse width modulation type converter so as to have a predetermined output voltage (Vout). It comprises first voltage conversion means (123, 125, 127, M1, M2, Rs1) for converting the input voltage (Vin) and a pulse frequency modulation type converter so as to obtain a predetermined output voltage (Vout). The second voltage converting means (124, 125, 127, M1, M2) for converting the input voltage (Vin) into voltage and a regulator, the input voltage (Vin) so as to be a predetermined output voltage (Vout). The third voltage conversion means (126, M3) for voltage conversion and the first voltage conversion means (123, 125, 127, M1, M2, Rs1) operate at heavy load, and the second voltage at medium load Conversion hand (124, 125, 127, M1, M2) are operated, and the first voltage conversion means (123, 125, 127, M1, M2) is operated so that the third voltage conversion means (126, M3) is operated at a light load. , Rs1) and second voltage conversion means (124, 125, 127, M1, M2) and control means (Rs, 121, 122) for performing operation switching control of the third voltage conversion means (126, M3). It is characterized by having.

  In addition, the said reference code is a reference to the last, and a claim is not limited by this.

  According to the present invention, the power is supplied to the load by a pulse width modulation type converter at heavy load, the power is supplied to the load by a pulse frequency modulation type converter at medium load, and the power is supplied to the load by a regulator at light load. By doing so, it has the feature that power can be efficiently supplied to the load from heavy load to light load.

[Schematic configuration]
FIG. 1 shows a block diagram of an embodiment of the present invention.

  The power supply device 100 according to the present embodiment includes a power supply control device 111, a coil L, a capacitor C, and a load current detection resistor Rs, and converts the input voltage Vin into a predetermined voltage and applies it to the load as the output voltage Vout.

  The power supply control device 111 is composed of, for example, a one-chip IC (integrated circuit), and an input voltage Vin is applied to an input terminal Tin. The voltage generated by the power supply control device 111 is output from the output terminal Tout.

  One end of the coil L is connected to the output terminal Tout of the power supply control device 111, the other end is grounded via a capacitor C, and is connected to a load (not shown) via a load current detection resistor Rs.

  A connection point between the load current detection resistor Rs and the load is connected to a terminal Ts2 of the power supply control device 111. The connection point between the load current detection resistor Rs and the coil L is connected to the terminal Ts3 of the power supply control device 111.

  The power supply control device 111 controls the voltage control method according to the potential difference between the terminal Ts2 and the terminal Ts3, that is, the voltage generated in the load current detection resistor Rs.

[Power control device 111]
The power supply control device 111 includes a differential amplifier circuit 121, a controller 122, a PWM control unit 123, a PFM control unit 124, an error amplifier 125, a regulator control unit 126, a driver 127, and transistors M1 to M3. .

  The differential amplifier circuit 121 has a non-inverting terminal connected to the terminal Ts2 and an inverting terminal connected to the terminal Ts3. A connection point between the load current detection resistor Rs and the load is connected to the terminal Ts2, and a connection point between the coil L and the load current detection resistor Rs is connected to the terminal Ts3. A voltage corresponding to the load current Iout supplied to the load is generated at both ends of the load current detection resistor Rs.

  The differential amplifier circuit 121 outputs a signal corresponding to the voltage generated in the load current detection resistor Rs. The output signal of the differential amplifier circuit 121 is supplied to the terminal Tc1 of the controller 122.

  FIG. 2 shows a block configuration diagram of the controller 122.

  The controller 122 includes comparators 211 and 212, reference voltage sources 213 and 214, and a NOR gate 215.

  The output signal of the differential amplifier circuit 121 supplied to the terminal Tc1 is supplied to the non-inverting input terminal of the comparator 211 and the inverting input terminal of the comparator 212. A reference voltage V 1 is applied from the reference voltage source 213 to the inverting input terminal of the comparator 211. The comparator 211 sets the output to a high level if the output signal of the differential amplifier circuit 121 is greater than the reference voltage V1, and sets the output to a low level if the output signal of the differential amplifier circuit 121 is less than the reference voltage V1. The output of the comparator 211 is supplied to the terminal Tc2 and the NOR gate 215.

  A reference voltage V21 from the reference voltage source 214 is applied to the non-inverting input terminal of the comparator 212. The reference voltage V21 is set to a level smaller than the reference voltage V1. The comparator 212 has a hysteresis characteristic in its output. When the output signal of the differential amplifier circuit 121 becomes smaller than the reference voltage V21, the output is set to a high level, and the output signal of the differential amplifier circuit 121 becomes larger than the reference voltage V22. Then, the output is set to low level.

  The output of the comparator 212 is supplied to the terminal Tc4 and the NOR gate 215. The NOR gate 215 outputs a NOR logic between the output of the comparator 211 and the output of the comparator 212. The output of the NOR gate 215 is supplied to the terminal Tc3.

  A terminal Tc2 of the controller 122 is connected to a PWM (pulse width modulation) control unit 123. The terminal Tc3 of the controller 122 is connected to a PFM (pulse frequency modulation) control unit 124. The terminal Tc4 of the controller 122 is connected to the regulator control unit 126.

  The error amplifier 125 is applied with an output voltage Vout applied to the load via the terminal Ts1. The error amplifier 125 outputs an error signal corresponding to the error between the output voltage Vout and the reference voltage.

  The error signal output from the error amplifier 125 is supplied to the PWM control unit 123 and the PFM control unit 124.

  The PWM control unit 123 is in an operating state when the terminal Tc2 of the controller 122 is at a high level, is in an inoperative state when the terminal Tc2 is at a low level, and has a pulse width pulse corresponding to an error signal from the error amplifier 125 in the operating state. Is generated. The pulse generated by the PWM control unit 123 is supplied to the driver 127.

  The PFM control unit 124 is in an operating state when the terminal Tc3 of the controller 122 is at a high level, and is in an inactive state when the terminal Tc3 is at a low level. appear. The pulse generated by the PFM control unit 123 is supplied to the driver 127.

  The driver 127 alternately turns on / off the transistor M1 and the transistor M2 in response to a pulse from the PWM control unit 123 or the PFM control unit 124. The transistors M1 and M2 have a drain-source connected in series, one end connected to the terminal Tin of the power supply control device 111 via the current detection resistor Rs1, and the other end grounded. The connection point between the load current detection resistor Rs1 and the transistor M1 is connected to the PWM controller 123. When the load current increases and the potential at the connection point between the load current detection resistor Rs1 and the transistor M1 becomes smaller than a predetermined potential, it is determined that the current is in an overcurrent state, and the PWM controller 123 turns off the transistors M1 and M2. The driver 127 is controlled as follows. The connection point between the transistor M1 and the transistor M2 is connected to the terminal Tout of the power supply control device 111.

  The regulator control unit 126 constitutes a series regulator together with the transistor M3. The regulator control unit 126 is activated when the terminal Tc4 of the controller 122 is at a high level, and is deactivated when the terminal Tc4 is at a low level. The regulator control unit 126 controls the transistor M3 so that a constant voltage is output in the operating state. During operation, the voltage generated by the series regulator including the regulator controller 126 and the transistor M3 is supplied to the output terminal Tout.

[Operation]
FIG. 3 is an operation explanatory diagram of the power supply control device 111. 3A shows the output of the differential amplifier circuit 121, FIG. 3B shows the operating state of the PWM control unit 123, FIG. 3C shows the operating state of the PFM control unit 124, and FIG. 3D shows regulator control. The operating state of the unit 126 is shown.

  When the output of the differential amplifier circuit 121 is larger than the reference voltage V1, that is, in a heavy load where a large amount of current flows through the load current detection resistor Rs, the PWM controller 123 operates as shown in FIG. As shown in FIG. 3C, the PFM control unit 124 and the regulator control unit 126 shown in FIG. 3D are inactive.

  Further, when the output of the differential amplifier circuit 121 is lower than the reference voltage V1 and larger than the reference voltage V21, the PFM control unit 124 is in an operating state as shown in FIG. The PWM control unit 123 shown in FIG. 3B and the regulator control unit 126 shown in FIG.

  Further, at a light load where the output of the differential amplifier circuit 121 is smaller than the reference voltage V21, the regulator control unit 126 is in an operating state as shown in FIG. 3D, and the PWM control unit shown in FIG. 123 and the PFM control unit 124 shown in FIG.

  When returning from the light load state to the medium load state, when the output of the differential amplifier circuit 121 becomes a voltage V22 smaller than the reference voltage V1 and larger than the reference voltage V21, as shown in FIG. Becomes an operating state, and the regulator control unit 126 shown in FIG.

  As described above, the switching operation between the PFM control unit 124 and the regulator control unit 126 is provided with a hysteresis characteristic to suppress voltage fluctuation due to switching. Note that both the PWM control unit 123 and the PFM control unit 124 generate pulses according to the output voltage, and the transistors M1 and M2 are alternately switched via the common driver 127 by the generated pulses. Switching operation can be performed smoothly. Therefore, hysteresis is not given to the switching of operation between the PWM control unit 123 and the PFM control unit 124.

  During PWM operation by the PWM control unit 123, it operates efficiently at heavy loads, but the efficiency decreases at medium to light loads. Further, when the PFM operation is performed by the PFM control unit 124, the PFM controller 124 operates efficiently at a medium load, but the efficiency decreases at a heavy load and a light load. Furthermore, the series regulator composed of the transistor M3 and the regulator control unit 126 operates efficiently at light loads, but the efficiency decreases at medium loads and heavy loads.

  Therefore, as in this embodiment, the load current detects whether the load is heavy load, medium load, or light load, and supplies power to the load by the PWM method at heavy load, and supplies power to the load by the PFM method at medium load. When the load is light, the power can be supplied to the load by the series regulator to improve the efficiency in any of heavy load, medium load, and light load.

  FIG. 4 is a diagram showing a characteristic of the efficiency η with respect to the load current Iout.

  According to the present embodiment, as shown in FIG. 4, the efficiency η of the power supply apparatus 100 can be maintained in a high efficiency state in any state of the load current Iout. Therefore, according to the power supply device 100 of the present embodiment, it is possible to provide a device that can operate with high efficiency from a heavy load to a light load.

  In this embodiment, the transistors M1, M2, M3 and the load current detection resistor Rs1 are built in the power supply control device 111, but these may be externally attached.

  In this embodiment, the load state is detected by the voltage applied to both ends of the load current detection resistor Rs. However, the load state may be detected from the output of the error amplifier 125. In short, if the load state can be detected, It is not limited to these methods.

It is a block block diagram of one Example of this invention. 2 is a block configuration diagram of a controller 122. FIG. 6 is an operation explanatory diagram of the power supply control device 111. FIG. It is a figure which shows the characteristic of efficiency (eta) with respect to load current Iout. It is a block block diagram of an example of the past. It is a figure which shows the characteristic of efficiency (eta) with respect to load current Iout of the conventional power supply device.

Explanation of symbols

100 power supply device 111 power supply control device L coil C capacitor Rs load current detection resistor 121 differential amplifier circuit 122 controller 123 PWM control unit 124 PFM control unit 125 error amplifier 126 regulator control unit 127 drivers M1 to M3 transistors Tin, Tout, Ts1 ~ Ts3 terminal Vin input voltage Vout output voltage Iout load current

Claims (6)

In a power supply device that converts an input voltage into a predetermined output voltage and applies it to a load,
A first voltage conversion unit configured by a pulse width modulation type converter, which converts the input voltage so as to be the predetermined output voltage;
A second voltage converting means configured to convert the input voltage so as to be the predetermined output voltage, comprising a pulse frequency modulation type converter;
A third voltage converting unit configured by a regulator and converting the input voltage so as to be the predetermined output voltage;
The first voltage conversion means operates so that the first voltage conversion means operates during heavy load, the second voltage conversion means operates during medium load, and the third voltage conversion means operates during light load. And a control means for performing operation switching control of the second voltage conversion means and the third voltage conversion means.   The power supply apparatus according to claim 1, wherein the control unit detects the heavy load, the medium load, and the light load by detecting a load current supplied to the load.   The power supply apparatus according to claim 1 or 2, wherein the control means has a hysteresis in a switching operation between the second voltage conversion means and the third voltage conversion means. In the power supply control device that converts the input voltage so that the voltage supplied to the load becomes a predetermined voltage and outputs it,
A first voltage converting means configured to convert the input voltage so that an applied voltage to the load becomes a predetermined voltage, comprising a pulse width modulation type converter;
A second voltage converting means configured to convert the input voltage so that an applied voltage to the load becomes a predetermined voltage, comprising a pulse frequency modulation type converter;
A third voltage converting means configured to convert the input voltage so that an applied voltage to the load becomes a predetermined voltage,
The first voltage conversion means operates so that the first voltage conversion means operates during heavy load, the second voltage conversion means operates during medium load, and the third voltage conversion means operates during light load. And a control means for performing an operation switching control of the third voltage conversion means and the second voltage conversion means.   5. The power supply control device according to claim 4, wherein the control means detects the heavy load, medium load, and light load by detecting a load current supplied to the load.   6. The power supply control device according to claim 4 or 5, wherein the control means has hysteresis in a switching operation between the second voltage conversion means and the third voltage conversion means.

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