JP2005508092A - Integration of ALD tantalum nitride and alpha phase tantalum for copper electrode formation applications - Google Patents

Abstract

A method is provided for forming electrode wiring on a substrate. In one aspect, the method provides a crystal-like structure on at least a portion of the metal layer by alternately introducing one or more doses of the metal-containing compound and one or more doses of the nitrogen-containing compound. Depositing a refractory metal-containing barrier layer having a thickness that is sufficient to inhibit atomic migration, depositing a seed layer over at least a portion of the barrier layer, and at least a portion of the seed layer Depositing a second metal layer on the substrate.
[Selection] Figure 1

Description

BACKGROUND OF THE INVENTION
[0001]
Field of Invention
[0001] Embodiments of the present invention relate to a method for manufacturing an integrated circuit device. In particular, embodiments of the invention relate to forming an electrode wiring structure using one or more periodic deposition processes.
[0002]
Description of prior art
[0002] Since the structural size of integrated circuit (IC) devices has been miniaturized to less than a quarter micron, electrical resistance and current density are areas of concern and improvement. Multilayer interconnect technology provides conductive paths in IC elements formed in high aspect ratio features including contacts, plugs, vias, lines, wires, and other features (structural elements). A typical process for forming interconnects (wirings) on a substrate is to deposit one or more layers and etch at least one of these layers to form one or more features. And depositing a barrier layer on these features and depositing one or more layers to fill the features. Typically, the feature is formed in a dielectric material disposed between the lower conductive layer and the upper conductive layer. An interconnect is formed in this feature to connect the upper conductive layer and the lower conductive layer. Reliable formation of these interconnect features is important for circuit manufacturing and constant efforts to improve circuit density and quality on individual substrates and dies (chips).
[0003]
[0003] Today, copper has become the selected metal for filling submicron high aspect ratio interconnect features because copper and its alloys have a lower resistivity than aluminum. However, copper easily diffuses into the surrounding material and can change the electronic device characteristics of adjacent layers, for example, by forming conductive paths between layers, thereby reducing the reliability of the entire circuit and There is a risk of failure.
[0004]
[0004] Accordingly, a barrier layer is deposited prior to copper metallization to prevent or prevent the diffusion of copper atoms. The barrier layer typically includes refractory metals such as tungsten, titanium, tantalum and their nitrides, all of which have a higher resistivity than copper. In order to deposit a barrier layer in the feature, the barrier layer must also be deposited on the bottom surface of the feature and its sidewalls. Thus, the additional amount of barrier layer on the bottom of the feature not only increases the overall resistance of the feature, but also creates an obstacle between the upper and lower electrode wires of the multilayer wiring structure.
[0005]
[0005] Therefore, a need exists for an improved method for forming an electrode wiring structure that minimizes the electrical resistance of the interconnect.
SUMMARY OF THE INVENTION
[0006]
[0006] A method is provided for forming electrode wiring on a substrate. In one aspect, the method includes depositing a refractory metal-containing barrier layer on at least a portion of the metal layer having a thickness that is crystallizable and sufficient to inhibit atomic migration. This interconnection may involve alternately introducing one or more doses of a metal-containing compound and one or more doses of a nitrogen-containing compound and depositing a seed layer over at least a portion of the barrier layer. And depositing a second metal layer over at least a portion of the seed layer.
[0007]
[0007] In another aspect, the method includes depositing a first metal layer on a substrate surface, one or more doses of a titanium-containing compound, one or more doses of a silicon-containing compound, and a nitrogen-containing amount. Depositing a titanium silicon nitride layer having a thickness of less than about 20 angstroms on at least a portion of the first metal layer by alternately introducing one or more doses of the compound; Depositing a binary alloy seed layer and depositing a second metal layer over at least a portion of the binary alloy seed layer.
[0008]
[0008] In yet another aspect, the method includes depositing a bilayer barrier having a thickness of less than about 20 angstroms on at least a portion of the metal layer, and depositing a binary alloy seed layer. Depositing a second metal layer over at least a portion of the binary alloy seed layer. The bilayer barrier includes a first layer of tantalum nitride deposited by alternating introduction of one or more doses of a tantalum-containing compound and one or more doses of a nitrogen-containing compound, and alpha phase tantalum. And a second layer.
[0009]
[0009] In yet another aspect, the method includes depositing a first metal layer on a substrate surface, one or more dosages of a tantalum-containing compound, and one or more dosages of a nitrogen-containing compound. Alternately depositing a tantalum nitride barrier layer having a thickness of less than about 20 angstroms on at least a portion of the first metal layer, copper, aluminum, magnesium, titanium, zirconium, Depositing a binary alloy seed layer comprising tin and a metal selected from the group consisting of combinations thereof; depositing a second metal layer over at least a portion of the binary alloy seed layer; ,including.
[0010] In order that the manner in which the above-described features of the invention may be achieved will be understood in detail, a more particular description of the invention, briefly summarized above, refers to the embodiments of the invention illustrated in the accompanying drawings. This is done by reference. However, since the present invention is applicable to other equally effective embodiments, the accompanying drawings are merely illustrative of exemplary embodiments of the invention and, therefore, are within the scope of the invention. It should be noted that this should not be considered limiting.
Detailed Description of Preferred Embodiments
[0010]
[0017] A process sequence for forming one or more interconnect structures is provided. The interconnect structure formed by the embodiments described herein has a lower overall resistivity and better electrical properties than prior art interconnects, particularly with respect to use in the manufacture of integrated circuits. Useful for creating memory and logic structures. The formation of the interconnect structure consists of a thin barrier layer deposited at least partially on the underlying metal layer, a seed layer deposited at least partially on the barrier layer, and on the seed layer. Including formation with a bulk metal layer at least partially deposited. The term “interconnect” as used herein refers to any conductive path formed in an integrated circuit. As used herein, the term “bulk metal” refers to a metal that is deposited in greater amounts than other metals that are deposited to form an interconnect structure.
[0011]
[0018] FIG. 1 illustrates a process sequence according to an embodiment of the invention. Initially, a thin barrier layer is deposited at least partially on the underlying substrate surface, such as a lower level electrode interconnect or metal gate, as shown in step 480, for example. This barrier layer provides excellent barrier properties and allows the underlying metal layer to continue to grow in the upper level electrode interconnects across the barrier layer or in later deposited metal layers In order to achieve this, it is deposited according to the cyclic layer deposition technique described herein. In one aspect, the barrier layer is a refractory metal containing layer such as tantalum, titanium, tungsten, and may include a refractory metal nitride material such as tantalum nitride (TaN). In other embodiments, the barrier layer is a thin bilayer consisting of TaN and alpha phase tantalum. In yet another aspect, the barrier layer can be a ternary material formed from a refractory metal-containing compound, a silicon-containing compound, and a nitrogen-containing compound. The barrier layer can also function as a wetting layer, an adhesive layer, or an adhesive layer for subsequent metallization.
[0012]
[0019] As used herein, "thin layer" refers to a layer of material deposited on a substrate having a thickness of about 20 mm or less, such as about 10 angstroms (cm). The thickness of the barrier layer is so thin that electrons of the adjacent electrode wiring can pass through the barrier layer. Thus, the barrier layer significantly improves the electrical performance of the electrode wiring by lowering the overall electrical resistance and providing good device reliability.
[0013]
[0020] A thin barrier layer deposited by the cyclic deposition method described herein is indicative of an epitaxial growth phenomenon. In other words, the barrier layer has the same or substantially the same crystallographic characteristics as the underlying layer. As a result, a substantially single crystal grows with no void formation at the interface between the barrier layer and the base layer. Similarly, subsequent metal layers deposited on the barrier layer exhibit the same or substantially the same epitaxial growth characteristics that continue this single crystal growth. Therefore, void formation does not occur at this interface. The resulting single crystal-like structure eliminates void formation, thereby substantially improving device reliability. This single crystal structure still reduces the overall resistance of the interconnect feature while providing excellent barrier properties. In addition, single crystal growth reduces the susceptibility to electromigration and stress migration due to equiangular and uniform crystal orientation across the interconnect material interface.
[0014]
[0021] "Cyclic deposition" as used herein refers to the sequential introduction of two or more reactive compounds to deposit a single layer of material on a substrate. These two or more reactive compounds are alternately introduced into the reaction zone of the process chamber. Each reactive compound is separated by a delay time to allow each compound to adhere and / or react on the substrate surface. In one aspect, the first precursor or Compound A is placed in a reaction zone for a first lag time after being introduced into the reaction zone. The second precursor or compound B is then placed in the reaction zone for a second delay time after being introduced into the reaction zone. When a ternary material, such as titanium silicon nitride, is desired, the third compound (C) is placed in the reaction zone for a third lag time after being dosed / dose introduced. In order to purge the reaction zone during each delay time, an inert gas such as argon is introduced into the process chamber to remove all remaining reactive compounds from the reaction zone. Alternatively, the purge gas can continue to flow continuously during the deposition process so that only the purge gas flows during the delay time between pulses of the reactive compound. These reactive compounds are alternately introduced in application amounts until a desired film or film thickness is formed on the substrate surface.
[0015]
[0022] As used herein, "substrate surface" refers to any substrate surface on which film processing is performed. Depending on the application, the substrate surface may contain, for example, silicon (silicon), silicon oxide, doped silicon, germanium, gallium arsenide, glass, sapphire, and any other materials such as metals, metal nitrides, alloys, and other conductive materials. Can do. The substrate surface can also include dielectric materials such as silicon dioxide, carbon-doped silicon oxide.
[0016]
[0023] "Pulse" or "dose" as used herein refers to an amount of a particular compound that is introduced intermittently or discontinuously into the reaction zone of the process chamber. Is intended to be. The amount of a particular compound within each dose can vary over time depending on the duration of the dose. The duration of each dose can vary depending on many factors, such as the volume capacity of the process chamber used, the vacuum system connected to it, and the volatility / reactivity of the particular compound itself.
[0017]
[0024] The term "compound" is intended to include one or more precursors, oxidants, reductants, reactants, and catalysts, or combinations thereof. The term “compound” is also intended to include a group of compounds, such as when two or more compounds are introduced simultaneously into a processing system. For example, a group of compounds can include one or more catalysts and one or more precursors. The term “compound” further includes one or more precursors, oxidants, reductants, reactants, and catalysts in an activated, otherwise activated state, such as by dissociation or ionization, or combinations thereof. Is intended.
[0018]
[0025] The surface attractive force used to physisorb, adsorb, absorb or chemisorb a monolayer of reactants on a substrate surface is the finite number of sites that the substrate surface is available for these reactants. It is believed to be self-limiting in that only one monolayer can be deposited on the substrate surface during a given application time. Once these finite number of sites are occupied by reactants, further deposition of these reactants will be prevented. This cycle can be repeated until the layer is the desired thickness.
[0019]
[0026] Still referring to FIG. 1, a seed layer is deposited at least partially over the barrier layer as shown in step 485. This seed layer can be deposited using any conventional deposition technique such as chemical vapor deposition (CVD), physical vapor deposition (PVD), electroplating, or electroless plating. Preferably, the seed layer is deposited conformally on the underlying barrier layer to a thickness between about 100 and about 500 inches. In one aspect, the seed layer is a conventional copper seed layer. In another aspect, the seed layer is a binary alloy seed layer. An exemplary binary alloy seed layer utilizes 1) undoped copper deposited using a target comprising undoped copper and 2) a copper aluminum target comprising aluminum at a concentration of about 2.0 atomic percent. A copper alloy containing about 2.0 atomic percent concentration of aluminum and 3) a copper / tin target containing about 2.0 atomic percent concentration of tin. A copper alloy containing an atomic percent concentration of tin and 4) containing a concentration of about 2.0 atomic percent zirconium deposited using a copper zirconium target comprising about 2.0 atomic percent concentration of zirconium. And a copper alloy.
[0020]
[0027] A bulk metal layer is at least partially deposited over the seed layer as shown in step 487. This metal layer can also be deposited using any conventional deposition technique such as chemical vapor deposition (CVD), physical vapor deposition (PVD), electroplating, or electroless plating. Preferably, the metal layer comprises any conductive material such as, for example, aluminum, copper, tungsten, or combinations thereof.
[0021]
[0028] FIGS. 2A-2D are schematic representations of exemplary interconnect structures at different stages of manufacture. FIG. 2A shows a base metal layer 110 having a dielectric layer 112 formed thereon. FIG. 2B shows a barrier layer 130 at least partially deposited on the base metal layer 110. This base metal layer 110 can comprise any conductive metal, such as, for example, aluminum, copper, tungsten, or combinations thereof, and forms part of interconnect features such as plugs, vias, contacts, lines, wires. It can also be part of the metal gate electrode. FIG. 2C shows a seed layer 140 at least partially deposited on the barrier layer 130, and FIG. 2D shows a bulk metal layer 142 at least partially deposited on the seed layer 140.
[0022]
[0029] Referring to FIG. 2A, the dielectric layer 112 may be any dielectric multi-material including low k dielectrics (k ≦ 4.0) now known or discovered. For example, the dielectric layer 112 may be silicon oxide or carbon doped silicon oxide. Dielectric layer 112 has been etched to form features 114 therein using conventional well-known techniques. This feature 114 may be a plug, via, contact, line, wire, or any other interconnect component. Typically, feature 114 has vertical sidewalls 116 and floor 118 having an aspect ratio of about 4: 1 or greater, such as about 6: 1. The floor 118 exposes at least a portion of the lower level electrode wiring 110.
[0023]
Referring to FIG. 2B, the barrier layer 130 is deposited conformally on the floor 118 as well as the sidewalls 116 of the feature 114. Preferably, the barrier layer has one or more tantalum-containing compounds at a flow rate between about 100 sccm and about 1000 sccm during a period of about 1.0 second or less relative to the reaction zone having the substrate disposed therein. By supplying an application amount and one or more application amounts of the nitrogen-containing compound at a flow rate between about 100 sccm and about 1000 sccm during a period of about 1.0 second or less, about 20 liters or less, preferably about 10 liters Tantalum nitride deposited to a thickness of. Exemplary tantalum-containing compounds include t-butyliminotris (diethylamino) tantalum (TBTDET), pentakis (ethylmethylamino) tantalum (PEMAT), pentakis (dimethylamino) tantalum, (PDMAT), pentakis (dimethylamino) tantalum ( PDEAT), t-butyliminotris (diethylmethylamino) tantalum (TBTMET), t-butyliminotris (dimethylamino) tantalum (TBTDMT), bis (cyclopentadienyl) tantalum trihydride ((Cp))₂TaH₃), Bis (methylcyclopentadienyl) tantalum trihydride ((CpMe)₂TaH₃), Derivatives thereof, and combinations thereof. Exemplary nitrogen-containing compounds include ammonia, hydrazine, methyl hydrazine, dimethyl hydrazine, tbutyl hydrazine, phenyl hydrazine, azoisobutane, ethyl azide, derivatives thereof, and combinations thereof.
[0024]
[0031] It should be understood that these compounds, or any other compound not listed above, can be either solid, liquid, or gas at room temperature. For example, PDMET is solid at room temperature and TBTET is liquid at room temperature. Thus, the non-vapor phase precursors both undergo sublimation or vaporization steps well known in the art prior to introduction into the process chamber. A carrier gas such as argon, helium, nitrogen, hydrogen, or mixtures thereof can also be used to help pump the compound into the process chamber, as is generally known in the art.
[0025]
[0032] Each dose is performed in turn, followed by another flow of non-reactive gas at a flow rate between about 200 seem and about 1000 seem. This separate stream of non-reactive gas may be introduced in doses between each dose of reactive compound, or this separate stream of non-reactive gas may be introduced continuously during the deposition process. Is possible. This separate stream of non-reacting gas, whether applied dose or continuous, helps to remove any excess reactants from the reaction zone to prevent harmful gas phase reactions of the reactive compounds, It also serves to remove any reaction by-products from the process chamber as well as the purge gas. In addition to these functions, this separate continuous flow of non-reactive gas, like the carrier gas, helps to deliver a reactive compound dose to the substrate surface. As used herein, the term “non-reactive gas” refers to a single gas or mixed gas that does not participate in metal layer formation. Exemplary non-reacting gases include argon, helium, nitrogen, hydrogen, and combinations thereof.
[0026]
[0033] A "reaction zone" is intended to include any volume space that is in fluid communication with the substrate surface being processed. The reaction zone can include any volume in the process chamber that exists between the gas source and the substrate surface. For example, the reaction zone includes any volume downstream of the dose valve where the substrate is placed.
[0027]
[0034] The duration of each dose / dose is variable and can be adjusted to accommodate, for example, the volume capacity of the process chamber and the capacity of the vacuum system coupled thereto. Furthermore, the dose time of a compound varies according to the flow rate of the compound, the pressure of the compound, the temperature of the compound, the type of dose valve, the type of control system used, and the ability of the compound to adsorb to the substrate surface. obtain. The dose time can also vary based on the type of layer being formed and the shape of the element being formed.
[0028]
[0035] Typically, the duration or “dose time” of each dose is generally about 1.0 seconds or less. However, the dose time can vary from microseconds to milliseconds, seconds and minutes. In general, the dose time should be long enough to provide a sufficient volume of compound to adsorb / chemisorb across the surface of the substrate to form a layer of compound.
[0029]
[0036] FIG. 3 is a schematic of an exemplary process chamber 200 that can form barrier layers using cyclical layer deposition, atomic layer deposition, digital chemical vapor deposition, and rapid chemical vapor deposition techniques. A partial cross-section is shown. The terms “circular layer deposition”, “atomic layer deposition”, “digital chemical vapor deposition”, and “rapid chemical vapor deposition” are used interchangeably herein and refer to a vapor deposition technique. Two or more compounds are sequentially introduced into the reaction zone of the process chamber to thereby deposit a thin layer of material on the substrate surface. Such a process chamber 200 is available from Applied Materials, Inc., located in Santa Clara, California, and a brief description thereof is as follows. The detailed description is entitled “Gas Delivery Apparatus and Method For Atomic Layer Deposition” filed on Dec. 21, 2001, which is incorporated herein by reference. See commonly assigned US patent application Ser. No. 10 / 032,284.
[0030]
[0037] The process chamber 200 may be integrated into an integrated process platform such as the Endura ™ platform available from Applied Materials. Details of the Endura ™ platform are commonly assigned US patent application Ser. No. 09 / 451,628, entitled “Integrated Modular Processing Platform,” filed Nov. 30, 1999, first incorporated by reference. It is described in.
[0031]
Referring to FIG. 3, the chamber 200 includes a chamber body 202 having a slit valve 208 formed in the side wall 204 and a substrate support 212 disposed therein. The substrate support 212 is attached to an elevator motor 214 that raises and lowers the substrate support 212 and the substrate 210 disposed thereon. The substrate support 212 can also include a vacuum chuck, electrostatic chuck, or clamp ring to secure the substrate 212 to the substrate support 212 during processing. Further, the substrate support 212 can be overheated using an embedded heating element such as a resistance heater, or heated using radiant heat such as a heating lamp disposed above the substrate support 212. It is also possible. A purge ring 222 may be disposed on the substrate support 212 to define a purge channel 224 that supplies a purge gas to prevent deposition on the periphery of the substrate 210.
[0032]
[0039] The gas distribution device 230 is disposed in an upper portion of the chamber body 202 for supplying a gas, such as a process gas and / or a purge gas, to the chamber 200. The vacuum system 278 is in communication with a pumping channel 279 to exhaust gas from the chamber 200 and to help maintain a desired pressure or a desired pressure range within the pumping zone 266 of the chamber 200.
[0033]
[0040] The gas distribution device 230 includes a chamber lid 232 having an expansion channel 234 formed in a central portion thereof. The chamber lid 232 also includes a bottom surface 260 that extends from the expansion channel 234 to the periphery of the chamber lid 232. The bottom surface 260 is sized and shaped to substantially cover the substrate 210 disposed on the substrate support 212. The inflation channel 234 has an inner diameter that gradually increases from the upper portion 237 toward the lower portion 235 adjacent to the bottom surface 260 of the chamber lid 232. The velocity of the gas flowing there decreases as the gas flows through this expansion channel 234 due to gas expansion. The reduced gas velocity reduces the possibility of blowing off the reactant adsorbed on the surface of the substrate 210.
[0034]
[0041] The gas distribution device 230 also includes at least two fast start valves 242 having one or more ports. At least one valve 242 is dedicated to each reaction compound. For example, the first valve is dedicated to refractory metal-containing compounds such as tantalum and titanium, and the second valve is dedicated to nitrogen-containing compounds. A third valve is dedicated to additional compounds when a ternary material is desired. For example, when silicide is desired, the additional compound can be a silicon-containing compound.
[0035]
[0042] These valves 242 may be any valves that can accurately and repeatedly deliver short doses of compound into the chamber body 202. In some cases, the on / off cycle or dose of valve 242 can be as fast as about 100 milliseconds or less. Valve 242 can be controlled directly by a system computer, such as a mainframe, or a co-pending US entitled “Valve Control System For ALD Chamber,” filed March 7, 2001, incorporated herein by reference. It can be controlled by a chamber / application controller such as a programmable logic computer (PLC) described in detail in patent application 09 / 800,881. The valve 242 may be, for example, an electronically controlled (EC) valve commercially available from Fujikin, Japan as part number FR-21-6.35UGF-APD.
[0036]
[0043] To facilitate overall system control and automation, the integrated processing system may include a controller 140 comprised of a central processing unit (CPU) 142, memory 144, and support circuitry 146. The CPU 142 may be one of any type of computer processor used in industrial equipment to control various drives and pressures. Memory 144 is connected to CPU 142 and is readily available such as random access memory (RAM), read only memory (ROM), floppy disk, hard disk, or any other type of local or remote digital storage device. There may be one or more of the memories. Software instructions and data can be encoded and stored in the memory 144 for instructing the CPU 142. Support circuit 146 is also connected to CPU 142 to support processor 142 in the normal manner. The support circuit 146 can include a cache, a power supply, a clock circuit, an input / output circuit, a subsystem, and the like.
[0037]
[0044] In certain embodiments, the TaN barrier layer is formed by cyclically introducing PDMAT and ammonia to the substrate surface. To initiate cyclic deposition of the TaN layer, a carrier / inert gas such as argon is introduced into the chamber 200 to stabilize the pressure and temperature within the process chamber 200. This carrier gas can flow continuously during the deposition process so that only argon flows between the doses of each compound. The first amount of PDMAT applied is between about 100 sccm and about 400 sccm and a flow rate of about 0.1 after the chamber temperature and pressure are stabilized at about 200 ° C. to about 300 ° C., about 1 torr to about 5 torr. It is supplied from the gas supply source 238 with an application time of 6 seconds or less. Then, an application amount of ammonia is supplied from the gas supply source 239 at a flow rate between about 200 sccm and about 600 sccm and an application time of about 0.6 seconds or less. Then, an application amount of ammonia is supplied from the gas supply source 239 at a flow rate between about 200 sccm and about 600 sccm and an application time of about 0.6 seconds or less.
[0038]
[0045] The pause between the PDMAT dosage and the ammonia dosage is about 1.0 seconds or less, preferably about 0.5 seconds or less, more preferably about 0.1 seconds or less. In various aspects, the reduction in time between doses at least provides higher throughput. As a result, the pause after the application amount of ammonia is about 1.0 second or less, about 0.5 second or less, or about 0.1 second or less. Argon gas flowing between about 100 sccm and about 1000 sccm, such as about 100 sccm to about 400 sccm, is continuously supplied from the gas supply source 240 through each valve 242. In one aspect, the PDMAT dosage may still remain in the chamber when the ammonia dosage comes in. In general, the duration of the carrier gas and / or pump exhaust should be long enough to prevent the PDMAT dosage and the ammonia dosage from mixing in the reaction zone.
[0039]
[0046] The heater temperature is maintained between about 100 ° C. and about 300 ° C. with a chamber pressure of about 1.0 Torr to about 5.0 Torr. Preferably, the deposition temperature is between about 200 ° C and about 250 ° C. Each cycle of PDMAT dose and pause, ammonia dose and pause gives a tantalum nitride layer having a thickness between about 0.3 and about 1.0 mm per cycle. This alternating sequence can be repeated until a desired thickness is obtained that is less than about 20 mm, such as about 10 mm. This deposition method therefore requires between 10 and 70 cycles, more typically between 20 and 30 cycles.
[0040]
[0047] In other embodiments, a ternary barrier layer having a thickness of less than about 20 mm, such as 10 mm, includes one or more doses of a refractory metal-containing compound, one or more doses of a nitrogen-containing compound, and silicon content. It is deposited by supplying one or more doses of the compound. Each dose is adjusted to provide the desired composition, silicon incorporation level, thickness, density, and step coverage of the refractory metal silicon nitride layer. As used herein, “ternary barrier layer” refers to a material having a composition composed of three main elements such as titanium, nitrogen, and silicon. An exemplary “ternary barrier layer” can also include tantalum, nitrogen, and silicon.
[0041]
[0048] Each application is performed sequentially, followed by another flow of carrier / inert gas at the same process conditions as described above. This separate stream of carrier / inert gas can be introduced in doses between each dose of reactive compound, or this separate stream of carrier / inert gas can be introduced continuously during the deposition process. .
[0042]
[0049] Preferably, the ternary barrier layer comprises titanium silicon nitride. In this embodiment, each cycle consists of an application amount of titanium-containing compound, a pause, an application amount of silicon-containing compound, a pause, an application amount of nitrogen-containing compound, and a pause. Exemplary titanium-containing compounds include tetrakis (dimethylamino) titanium (TDMAT), tetrakis (ethylmethylamino) titanium (TEMAT), tetrakis (diethylamino) titanium (TDEAT), titanium tetrachloride (TiCl).₄), Titanium iodide (TiI₄), Titanium bromide (TiBr)₄), And other titanium and halides. Exemplary silicon-containing compounds include silane, disilane, methylsilane, dimethylsilane, chlorosilane (SiH₃Cl), dichlorosilane (SiH₂Cl₂) And trichlorosilane (SiHCl)₃)including. Exemplary nitrogen-containing compounds include ammonia, hydrazine, methyl hydrazine, dimethyl hydrazine, tbutyl hydrazine, phenyl hydrazine, azoisobutane, ethyl azide, derivatives thereof, and combinations thereof.
[0043]
[0050] Ti_xSi_yIn order to initiate the cyclic deposition of the N layer, argon is introduced into the chamber 200 to stabilize the pressure and temperature within the process chamber 200. This separate stream of argon flows continuously during the deposition process so that only argon flows between the doses of each compound. This other flow of argon flows between about 100 sccm and about 1000 sccm, such as between about 100 sccm and about 400 sccm. In one aspect, the dosage of TDMAT is between about 10 sccm to about 1000 sccm and a dosage time of about 0.6 seconds or less after the chamber temperature and pressure are stabilized at about 250 ° C. and 2 torr. Supplied in. A dosage of silane is then provided at a flow rate between about 5 seem and about 500 seem and a dosage time of 1 second or less. A dose of ammonia is then supplied at a flow rate between about 100 sccm and about 5,000 sccm and a dose time of about 0.6 seconds or less.
[0044]
[0051] The pause between the amount of TDMAT applied and the amount of silane applied is about 1.0 seconds or less, preferably about 0.5 seconds or less, more preferably about 0.1 seconds or less. The pause between the applied amount of silane and the applied amount of ammonia is about 1.0 seconds or less, about 0.5 seconds or less, or about 0.1 seconds or less. The pause after application of ammonia is also about 1.0 seconds or less, about 0.5 seconds or less, or about 0.1 seconds or less. In one aspect, the TDMAT dosage may still remain in the chamber when the silane dosage comes in, and the silane dosage is still in the chamber when the ammonia dosage comes in. It may remain in.
[0045]
[0052] The heater temperature is maintained between about 100 ° C. and about 300 ° C. with a chamber pressure between about 1.0 Torr and about 5.0 Torr. Each cycle consisting of TDMAT dosage, pause, silane dosage, pause, ammonia dosage, and pause has a thickness of between about 0.3 to about 1.0 mm of titanium silicon per cycle. A nitride layer is provided. This alternating sequence can be repeated until a desired thickness is obtained that is less than about 20 mm, such as about 10 mm. This deposition method therefore requires between 10 and 70 cycles.
[0046]
[0053] In yet another aspect, an alpha phase tantalum (α-) having a thickness of about 20 mm or less, such as about 10 mm, on at least a portion of a previously deposited binary (TaN) or ternary (TiSiN) layer. Ta) layer can be deposited. This α-Ta layer can be deposited using conventional techniques such as PVD and CVD to form a bilayer stack. For example, a bilayer stack may include a TaN portion deposited by cyclic layer deposition as described above and an α-Ta portion deposited by high density plasma physical vapor deposition (HDP-PVD). Alpha phase tantalum is preferred for lower resistance compared to beta phase tantalum.
[0047]
[0054] To further illustrate, the α-Ta portion of this stack can be deposited using an ionized metal plasma (IMP) chamber, such as the Vectra ™ chamber available from Applied Materials, Inc., Santa Clara, California. . The IMP chamber includes a target, a coil, and a substrate support member that can be biased, and can also be integrated into an Endura ™ platform available from Applied Materials. A power between about 0.5 kW and about 5 kW is applied to the target, and a power between about 0.5 kW and 3 kW is applied to the coil. To bias the substrate, a power of between about 200 W and about 500 W is applied to the substrate support member at a frequency of about 13.56 MHz. Argon flows into the chamber at a flow rate of about 35 seem to about 85 seem, and nitrogen is added into the chamber at a flow rate of about 5 seem to about 100 seem. The chamber pressure is typically between about 5 millitorr and about 100 millitorr, while the chamber temperature is between about 20 ° C and about 300 ° C.
[0048]
[0055] The barrier layer films described above can benefit from post-deposition processing processes such as plasma processing processes or chemical processing processes. The plasma treatment process reduces resistance and improves yield. Exemplary plasma treatments can include argon plasma, nitrogen plasma, or nitrogen hydrogen plasma. The plasma treatment can be performed in the same deposition chamber where the barrier layer deposition is performed, or in a different chamber. If the plasma treatment is performed in the same chamber, the plasma is sent from an in situ (in-place, real time) plasma or a remote plasma source such as an inductively coupled remote source or microwave source. It can be a plasma.
[0049]
[0056] While not wishing to be bound by theory, it is believed that plasma treatment of, for example, a tantalum nitride film reduces the nitrogen content of one or more sublayers and also reduces the resistivity by sputtering out nitrogen. . For example, plasma treatment is believed to make the tantalum nitride layer more tantalum rich compared to a tantalum nitride layer that is not plasma treated. In other words, a 1: 1 Ta: N film can be converted to a 2: 1 Ta: N film using plasma treatment. A tantalum nitride film having a sheet resistance of about 1200 micro ohm centimeters or less for a 0.004 micron (40 angstrom) film can be obtained.
[0050]
[0057] Further, in order to physically remove nitrogen from the barrier layer, for example, neon (Ne), xenon (Xe), helium (He), hydrogen (H₂Other chemically non-reactive gases such as) can be used. In general, to have N preferential sputtering, it is more desirable to have plasma gas atoms or molecules having an atomic mass closer to N than Ta. However, a chemical reaction process can be used when certain gases react selectively to remove N while leaving Ta.
[0051]
[0058] Chemical treatment processes can also reduce resistance and improve yield. Exemplary chemical treatments can include exposure to aluminum compounds or silicon compounds. These compounds can include, but are not limited to, DMAH, TMA, silane, dimethylsilane, trimethylsilane, and other organosilane compounds. Chemical treatment is typically performed at a pressure between about 1 Torr and about 10 Torr and a temperature between about 200 ° C and about 300 ° C. Following chemical treatment, it has been observed that tantalum nitride films deposited by the above-described method show improved dehumidification compared to no chemical treatment.
[0052]
[0059] After formation of the barrier layer, a post-deposition treatment process can be performed. Alternatively, these processes can be performed between depositions of each monolayer or between cycles of deposition. For example, the process can be performed about every 0.003 to 0.005 microns (30 to 50 Angstroms) of the layer, or approximately every 7 to 10 cycles.
[0053]
[0060] The further patterned or etched substrate dielectric layer 112 may be cleaned to remove native oxides and other contaminants from its surface before depositing the barrier layer 130. For example, the reactive gas is excited into a plasma in a remote plasma source chamber such as a Reactive Pre-clean Chamber available from Applied Materials, Inc., located in Santa Clara, California. Precleaning can also be performed in a metal CVD or PVD chamber by connecting to a remote plasma source. Alternatively, a metal deposition chamber with a gas supply system could be modified to send a preclean gas plasma through an existing gas intake such as a gas supply showerhead located above the substrate.
[0054]
[0061] In one aspect, the pre-reaction cleaning process forms radicals from a plasma of one or more reactive gases, such as argon, helium, hydrogen, nitrogen, fluorine-containing compounds, and combinations thereof. For example, the reaction gas is tetrafluorocarbon (CF₄) And oxygen (O₂), Or helium (He) and nitrogen trifluoride (NF)₃). More preferably, the reaction gas is a mixture of helium and nitrogen trifluoride.
[0055]
[0062] Following the argon plasma, the chamber pressure is increased to about 140 Torr and a processing gas consisting essentially of hydrogen and helium is introduced into the processing region. Preferably, the process gas consists of about 5% hydrogen and about 95% helium. The hydrogen plasma is generated by applying power between about 50 watts and about 500 watts. The hydrogen plasma is maintained for about 10 seconds to about 300 seconds.
[0056]
[0063] Referring again to FIG. 2C, the seed layer 140 can be deposited using high density plasma physical vapor deposition (HDP-PVD) to allow good conformal coverage. An example of an HDP-PVD chamber is a Self-Ionized Plasma SIP ™ chamber available from Applied Materials, Inc., Santa Clara, Calif., On the Endura ™ platform available from Applied Materials. Can be integrated. Of course, other techniques such as physical vapor deposition, chemical vapor deposition, electroless plating, and electroplating can also be used.
[0057]
[0064] A typical SIP ™ chamber includes a target, a coil, and a substrate support member that is biased. To form the copper seed layer, a power between about 0.5 kW and about 5 kW is applied to the target, and a power between about 0.5 kW and about 3 kW is applied to the coil. To bias the substrate, between about 200 W and about 500 W of power is applied at a frequency of about 13.56 MHz. Argon can be flowed into the chamber at a flow rate of about 35 seem to about 85 seem, and nitrogen can be added to the chamber at a flow rate of about 5 seem to about 100 seem. The chamber pressure is typically between about 5 millitorr and about 100 millitorr.
[0058]
[0065] Alternatively, the seed layer 140 comprising a copper alloy can be deposited by any suitable technique, such as physical vapor deposition, chemical vapor deposition, electroless deposition, or a combination technique. Preferably, the copper alloy seed layer 140 includes aluminum and is deposited using the PVD technique described above. During the deposition time, the process chamber is maintained at a pressure between about 0.1 millitorr and about 10 millitorr. The target includes between about 2 to about 10 atomic weight percent of copper and aluminum. The target can be DC biased with a power between about 5 kW and about 100 kW. The pedestal can be RF biased with a power between about 10 W and about 1000 W. The copper alloy seed layer 140 is deposited to a thickness of between about 5 and about 500 and at least about 5 inches.
[0059]
[0066] Referring to FIG. 2D, the metal layer 142 may be formed using chemical vapor deposition (CVD), physical vapor deposition (PVD), electroplating, or a combination thereof. For example, an aluminum (Al) layer is made of dimethyl aluminum hydride (DMAH) and hydrogen (H₂) Or a mixed gas containing argon (Ar), or other DMAH-containing mixtures, and the CVD copper layer is Cu⁺²(Hfac)₂(Copper hexafluoroacetylacetonate), Cu⁺²(Fod)₂(Copper heptafluorodimethyloctanediene), Cu⁺¹It can be deposited from a mixed gas comprising hfacTMVS (copper hexafluoroacetylacetonate trimethylvinylsilane), or a combination thereof, and the CVD tungsten layer is made of tungsten hexafluoride (WF₆) And a reducing gas. The PVD layer can be deposited from a copper target, an aluminum target or a tungsten target.
[0060]
[0067] In addition, the metal layer 142 includes, in particular, titanium (Ti), tungsten (W), tantalum (Ta), zirconium (Zr), hafnium (Hf), molybdenum (Mo), niobium (Nb), vanadium (V And refractory metal compounds including but not limited to chromium (Cr). Usually, the refractory metal combines with a reactive species such as chlorine (Cl) or fluorine (F) and is given another gas to form a refractory metal compound. For example, titanium tetrachloride (TiCl₄), Tungsten hexafluoride (WF)₆), Tantalum pentachloride (TaCl)₅), Zirconium tetrachloride (ZrCl)₄), Hafnium tetrachloride (HfCl)₄), Molybdenum pentachloride (MoCl)₅), Niobium pentachloride (NbCl)₅), Vanadium pentachloride (VCl₅) Or chromium tetrachloride (CrCl)₄) Can be used.
[0061]
[0068] Preferably, the metal layer 142 is copper and is formed in an electroplating bath such as an Electra ™ Cu ECP system available from Applied Materials, Inc. of Santa Clara, California. The Electra ™ Cu ECP system can also be integrated into the Endura ™ platform available from Applied Materials.
[0062]
[0069] A copper electrolyte / copper electroplating technique is described in commonly assigned US Pat. No. 6,113,771, entitled “Electro-deposition Chemistry”, which is incorporated herein by reference. Typically, the electroplating bath has a copper concentration greater than about 0.7M, a copper sulfate concentration of about 0.85, and a pH of about 1.75. The electroplating bath can also include various additives well known in the art. The temperature of the bath is between about 15 ° C and about 25 ° C. The bias is between about -15 volts and about 15 volts. In one aspect, the positive bias ranges from about 0.1 volts to about 10 volts, and the negative bias ranges from about -0.1 to about -10 volts.
[0063]
[0070] Optionally, the metal layer 142 deposition may be followed by a thermal annealing process, whereby the wafer is about 10 minutes to about 1 hour, preferably about 30 minutes, about 100 ° C. to about 400 Receive a temperature between ℃. A carrier / purge gas such as helium, hydrogen, nitrogen or mixtures thereof is introduced at a flow rate between about 100 sccm and about 10,000 sccm. The chamber pressure is maintained between about 2 Torr and about 10 Torr. The RF power is about 200 W to about 1,000 W at a frequency of about 13.56 MHz, and a preferred substrate spacing is about 300 mils to about 800 mils.
[0064]
[0071] Following deposition, the top of the resulting structure is planarized. For example, a chemical mechanical polishing (CMP) apparatus such as Mirra ™ System available from Applied Materials, Inc., Santa Clara, California, can be used. Optionally, the intermediate surface of the structure can be planarized during the deposition of subsequent layers described above.
[0065]
[0072] FIG. 4 is a schematic top view of an exemplary multi-chamber processing system 600 that can be adapted to perform the previously disclosed deposition sequence. Such a processing system 600 may be an Endura ™ system commercially available from Applied Materials, Inc., Santa Clara, California. A similar multi-chamber processing system is disclosed in US Pat. No. 5,186,718, entitled “Stage Vacuum Wafer Processing System and Method”, issued February 16, 1993, which is incorporated herein by reference. Yes.
[0066]
[0073] The system 600 generally includes load lock chambers 602, 604 for transferring substrates into and out of the system 600. Typically, since the system 600 is under vacuum, these load lock chambers 602, 604 can “pump down” substrates introduced into the system 600. The first robot 610 can transfer the substrate between the load lock chambers 602, 604 and one or more substrate processing chambers 612, 614, 616, 618 (four shown) in the first set. . Each processing chamber 612, 614, 616, 618 includes cyclic layer deposition, chemical vapor deposition (CVD), physical vapor deposition (PVD), etching, preclean, degassing, orientation, and other substrate processing. Many substrate processing operations can be provided to perform. The first robot also transfers substrates to and from one or more transfer chambers 622, 624.
[0067]
[0074] These transfer chambers 622, 624 are used to maintain an ultra high vacuum while allowing the substrate to be transferred within the system 600. The second robot 630 can transfer substrates between the transfer chambers 622, 624 and the second set of one or more processing chambers 632, 634, 636, 638. Similar to process chambers 612, 614, 616, 618, process chambers 632, 634, 636, 638 may be used, for example, for cyclic layer deposition, chemical vapor deposition (CVD), physical vapor deposition (PVD), etching, Various substrate processing operations such as cleaning, degassing, and orientation can be implemented. Any of these processing chambers 612, 614, 616, 618, 632, 634, 636, 638 can be removed from the system 600 if not necessary for a particular process performed by the system 600.
[0068]
[0075] In one configuration, each processing chamber 632, 638 is a physical vapor deposition chamber, a chemical vapor deposition chamber or a cyclic deposition chamber adapted for seed layer deposition, and each processing chamber 634, 636 is a barrier. A cyclic deposition chamber, chemical vapor deposition chamber, or physical vapor deposition chamber adapted for layer deposition, each processing chamber 612, 614 having a physical vapor deposition chamber, chemical adapted for dielectric layer deposition, Each process chamber 616, 618 may be an etching chamber adapted to etch openings for interconnect features. This particular configuration of system 600 is provided to illustrate the present invention and should not be used to limit the scope of the present invention.
[0069]
[0076] It is believed that a refractory metal nitride layer having a thickness greater than about 20 Angstroms will terminate the growth pattern of the lower level electrode wiring. A refractory metal nitride layer having a thickness of about 20 angstroms or more will have its upper level interconnect until it reaches a certain thickness to establish its own pattern, thereby forming a different crystal structure. It will establish its own unique growth pattern that would be initially adopted by higher level interconnections. This phenomenon occurs because the growth pattern of the subsequently deposited layer is generally similar to the growth pattern of the basal layer during the first stage of deposition, after which this subsequent layer is When a certain thickness is reached, it assumes its own unique pattern.
[0070]
[0077] For example, tantalum nitride has the natural property of forming an amorphous structure above about 20 angstroms. Below about 20 Å, TaN resembles the growth pattern of its basal layer. Thus, the subsequent copper interconnect layer grew surprisingly across the barrier layer deposited according to the method of the present invention and exhibited a similar growth pattern as the underlying copper interconnect. In other words, a TaN barrier layer of 20 angstroms or less has good grain growth of copper such that copper particles can grow across the TaN barrier layer, simply copper exhibits epitaxial growth on the tantalum nitride barrier layer. to enable.
[0071]
[0078] FIG. 5 is a transmission electron microscope (TEM) image of a feature 300 having a titanium nitride barrier layer 310 deposited according to the deposition technique described above. This feature 300 had an aspect ratio of 5: 1 and was formed on a 200 mm wafer. The barrier layer 310 was made of tantalum nitride and was deposited at 250 ° C. and 2 torr. Each cycle lasted about 2 seconds and 30 cycles were performed. The tantalum nitride barrier layer 310 had a thickness of about 15 angstroms. As shown, the barrier layer 310 is conformal and exhibits good step coverage across the feature 300.
[0072]
[0079] FIG. 6 is a TEM image showing a partial cross-sectional view of multi-level interconnect structure 400. FIG. The multilevel interconnect structure 400 included a lower level copper interconnect 405, a tantalum nitride barrier layer 410 and an upper level copper interconnect 420. The copper grain growth of the lower level copper interconnect 405 extended across the barrier layer 410 into the upper level copper interconnect 420, indicating epitaxial growth of the tantalum nitride barrier layer 410. The barrier layer 410 was made of tantalum nitride and was deposited at 250 ° C. and 2 torr. Each cycle lasted about 2 seconds and 30 cycles were performed. This barrier layer 410 had a thickness of about 10 angstroms, which was sufficient to suppress migration of copper into the dielectric material.
[0073]
[0080] The barrier layers 310, 410 illustrated and described with reference to FIGS. 3 and 4 were measured using a TEM apparatus. Like any other measurement technique for determining the thickness of the deposited layer, there is a margin of error in this type of measurement technique. Accordingly, the thicknesses given herein are approximate and are measured according to the best known techniques available and are not intended to limit the scope of the invention.
[0074]
[0081] The following example is intended to provide a non-limiting illustration of one embodiment of the present invention.
【Example】
[0075]
[0082] The TaN layer was deposited to a thickness of about 20 mm on the lower level copper layer using cyclic deposition. A copper alloy seed layer was deposited on this TaN layer to a thickness of about 100 mm by physical vapor deposition. The copper alloy seed layer contained aluminum at a concentration of about 2.0 atomic percent and was deposited by PVD using a copper aluminum target consisting of aluminum at a concentration of about 2.0 atomic percent. A bulk copper layer was then deposited using ECP to fill this feature. Then the substrate is nitrogen (N₂) ・ Hydrogen (H₂) Thermal annealing at a temperature of about 380 ° C. for about 15 minutes in the atmosphere.
[0076]
[0083] The overall feature resistance was significantly reduced and the upper level copper layer displayed a grain growth that was surprisingly similar to that of the lower level copper layer. The barrier performance of the TaN layer showed a longer failure arrival time (no failure time) (TTF) compared to 50 ＰＶ PVD Ta. Furthermore, the TaN layer showed a low contact resistance and a dense spread distribution. The TaN layer also showed excellent mechanical configuration, including a smooth morphology and a pinhole free surface.
[0077]
[0084] Furthermore, TaN films deposited according to the PDMAT ammonia process described herein showed very good film uniformity. The film thickness is linearly proportional to the number of deposition cycles, enabling precise film pressure control. The film thickness uniformity was found to be 1.8 percent for a 10 Å film and 2.1 percent for a 100 Å film on a 200 mm substrate. The deposited film showed very good conformal coverage, approaching 100 percent for at least some results.
[0078]
[0085] Finally, the copper alloy seed layer showed excellent adhesion / wetting to the TaN layer. The (PVD) copper seed layer exhibited a preferred {111} orientation on the deposited barrier layer. The {111} crystal orientation is preferred because this crystal orientation provides a large particle size and as a result of the large particle size exhibits good electromigration resistance.
[0079]
[0086] While the foregoing description is directed to embodiments of the invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope of the invention Is defined by the preceding claims.
[Brief description of the drawings]
[0080]
FIG. 1 illustrates a process sequence according to various embodiments of the invention described herein.
2A shows a schematic cross-sectional view of an exemplary wafer at different stages of an interconnect manufacturing sequence according to embodiments described herein. FIG.
FIG. 2B shows a schematic cross-sectional view of an exemplary wafer at different stages of an interconnect manufacturing sequence according to embodiments described herein.
FIG. 2C shows a schematic cross-sectional view of an exemplary wafer at different stages of an interconnect manufacturing sequence according to embodiments described herein.
2D shows a schematic cross-sectional view of an exemplary wafer at different stages of an interconnect manufacturing sequence according to embodiments described herein. FIG.
FIG. 3 shows a schematic partial cross-section of an exemplary process chamber 200 for forming a thin barrier layer by the cyclic deposition technique described herein.
FIG. 4 shows a schematic plan view of an exemplary integrated cluster tool that is adaptable to implement the interconnect manufacturing sequence described herein.
FIG. 5 is a transmission electron microscope (TEM) image of a feature having a titanium nitride barrier layer deposited by the deposition techniques described herein.
FIG. 6 is a TEM image showing a partial cross-sectional view of a multi-level interconnect structure.
[Explanation of symbols]
[0081]
DESCRIPTION OF SYMBOLS 110 ... Base layer, 112 ... Dielectric layer, 114 ... Feature, 116 ... Side wall, 118 ... Floor, 130 ... Barrier layer, 140 ... Seed layer, 142 ... Bulk metal layer, 200 ... Process chamber, 202 ... Chamber body , 204 ... side wall, 208 ... slit valve, 210 ... substrate, 212 ... substrate support, 214 ... elevator motor, 222 ... purge ring, 224 ... purge channel, 230 ... gas distributor, 232 ... chamber lid, 234 ... Expansion channel, 235 ... lower part, 237 ... upper part, 238 ... gas supply source, 239 ... gas supply source, 240 ... gas supply source, 242 ... activation valve, 260 ... bottom surface, 266 ... pumping zone, 278 ... vacuum System, 279 ... Pumping channel, 600 ... Multi-chamber processing system, 602, 604 ... Low Lock chamber, 612, 614, 616, 618, 632, 634, 636, 638 ... Process chamber, 622, 624 ... Transfer chamber, 610 ... First robot, 630 ... Second robot 650 ... Microprocessor Controller, 300 ... feature, 310 ... tantalum nitride barrier layer, 400 ... multilevel interconnect structure, 405 ... lower level copper interconnect, 410 ... tantalum nitride barrier layer, 420 ... upper level copper interconnect.

Claims (19)

In a method for forming electrode wiring (metal interconnect) on a substrate:
By alternately introducing one or more pulses of the metal-containing compound and one or more application amounts of the nitrogen-containing compound, a crystal-like structure is exhibited on at least a portion of the metal layer and atomic migration is performed. Depositing a refractory metal-containing barrier layer having a thickness that is sufficient to inhibit;
Depositing a seed layer over at least a portion of the barrier layer;
Depositing a second metal layer over at least a portion of the seed layer;
Said method. The method of claim 1, wherein the refractory metal-containing barrier comprises tantalum nitride. The method of claim 1, wherein particle growth of the metal layer persists across the barrier layer and into the second metal layer. The method of claim 1, wherein each dose is repeated until the refractory metal-containing barrier layer is less than about 20 angstroms thick. The method of claim 1, wherein the refractory metal-containing barrier layer has a thickness of about 10 Angstroms. The method of claim 1, wherein the alternating dose introduction is repeated between about 10 and about 70 times to form the refractory metal nitride layer. The method of claim 1, further comprising flowing a purge gas continuously during the time of introduction of each application amount of the metal-containing compound and introduction of each application amount of the nitrogen-containing compound. The method of claim 7, wherein the purge gas comprises argon, nitrogen, helium, or a combination thereof. The method of claim 1, wherein each application amount of the metal-containing compound and the nitrogen-containing compound is separated by a delay time. The method of claim 9, wherein each delay time is long enough for the volume of the metal-containing compound or the volume of the nitrogen-containing compound to adsorb to the substrate surface. The method of claim 10, wherein the delay time is long enough to remove unadsorbed molecules from the substrate surface. The nitrogen-containing compound is selected from the group consisting of ammonia, hydrazine, methyl hydrazine, dimethyl hydrazine, t-butyl hydrazine, phenyl hydrazine, azoisobutane, ethyl azide, derivatives thereof, and combinations thereof. Method. The metal-containing compound includes tetrakis (dimethylamino) titanium (TDMAT), tetrakis (ethylmethylamino) titanium (TEMAT), tetrakis (diethylamino) titanium (TDEAT), titanium tetrachloride (TiCl ₄ ), titanium iodide (TiI ₄ ). ), Titanium bromide (TiBr ₄ ), t-butyliminotris (diethylamino) tantalum (TBTDET), pentakis (ethylmethylamino) tantalum (PEMAT), pentakis (dimethylamino) tantalum, (PDMAT), pentakis (diethylamino) tantalum (PDEAT), t-butyliminotris (diethylmethylamino) tantalum (TBTMET), t-butyliminotris (dimethylamino) tantalum (TBTDMT), bis (cyclopentadienyl) trihydrogenated tantalum _((Cp) 2 _TaH 3), bis (methylcyclopentadienyl) trihydride tantalum _((CPME) 2 _TaH 3), these derivatives, and is selected from the group consisting of, in claim 1 The method described. The method of claim 1, wherein the first and second metal layers each comprise tungsten, copper, or a combination thereof. The method of claim 1, wherein the seed layer includes the first seed layer deposited on the barrier layer and a second seed layer deposited on the first seed layer. The first seed layer includes a copper alloy seed layer of copper and a metal selected from the group consisting of aluminum, magnesium, titanium, zirconium, tin, and combinations thereof, or the first seed layer The method of claim 15, wherein the seed layer comprises a metal selected from the group consisting of aluminum, magnesium, titanium, zirconium, tin, and combinations thereof. In a method for forming an electrode wiring on a substrate:
Depositing a first metal layer on a substrate surface;
At least a portion of the first metal layer by alternately introducing one or more application amounts of a titanium-containing compound, one or more application amounts of a silicon-containing compound, and one or more application amounts of a nitrogen-containing compound. Depositing a titanium-silicon nitride layer having a thickness of less than about 20 angstroms on the substrate;
Depositing a binary alloy seed layer;
Depositing a second metal layer over at least a portion of the binary alloy seed layer;
Said method. Depositing a bilayer barrier having a thickness of less than about 20 angstroms on at least a portion of the metal layer;
Depositing a binary alloy seed layer;
Depositing a second metal layer on at least a portion of the binary alloy seed layer, and forming a electrode wiring on a substrate, the bilayer barrier comprising:
A first layer of tantalum nitride deposited by alternately introducing one or more doses of a tantalum-containing compound and one or more doses of a nitrogen-containing compound;
A second layer of alpha phase tantalum. In a method for forming an electrode wiring on a substrate:
Depositing a first metal layer on a substrate surface;
By alternately introducing one or more doses of the tantalum-containing compound and one or more doses of the nitrogen-containing compound, a thickness of less than about 20 angstroms is provided on at least a portion of the first metal layer. Depositing a tantalum nitride barrier layer having;
Depositing a binary alloy seed layer comprising copper and a metal selected from the group consisting of aluminum, magnesium, titanium, zirconium, tin, and combinations thereof;
Depositing a second metal layer over at least a portion of the binary alloy seed layer.

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