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JP2005277436A - Method of producing thick-film multi-layer substrates - Google Patents

Method of producing thick-film multi-layer substrates Download PDF

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Publication number
JP2005277436A
JP2005277436A JP2005141650A JP2005141650A JP2005277436A JP 2005277436 A JP2005277436 A JP 2005277436A JP 2005141650 A JP2005141650 A JP 2005141650A JP 2005141650 A JP2005141650 A JP 2005141650A JP 2005277436 A JP2005277436 A JP 2005277436A
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thick film
film resistor
insulating layer
thick
firing
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Yuji Otani
祐司 大谷
Takashi Nagasaka
長坂  崇
Mitsuhiro Saito
斎藤  光弘
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Denso Corp
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Denso Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of producing a thick-film multi-layer substrate, which can easily make the resistance value of a thick-film resistor highly precise. <P>SOLUTION: In the method of producing the thick-film multi-layer substrates, a thick-film resistor 6 on a ceramic substrate 1 is fired at a temperature higher than the temperature of firing a glass insulating layer 2, which is formed thereon in contact therewith. According to the experiment of the inventors, it is found if the thick-film resistor 6 is fired at a temperature higher than the temperature of firing a glass insulating layer 2 which is formed thereon in contact therewith, this enables decrease of the change in the resistance in a subsequent high-temperature process of firing the glass insulating layers 2 to 4. Probably, it is inferred that by firing the thick-film resistor 6 at a high temperature, bonding force of ceramic particles or conductive particles which constitute the thick-film resistor 6 is reinforced and also is densified, this makes it difficult to generate solid phase diffusion between the thick-film resistor 6 and the glass insulating layer 2 which is in contact therewith. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は厚膜多層基板の製造方法に関する。   The present invention relates to a method for manufacturing a thick film multilayer substrate.

従来、セラミック基板上に絶縁層を印刷、焼成し、この絶縁層上に配線パタンを印刷、焼成することにより厚膜多層基板を製造する際には、複数の絶縁層及び配線パタンは、全て同じ温度で焼成している。したがって、上記技術を応用して、セラミック基板上に厚膜抵抗を印刷、焼成し、このセラミック基板上に複数の絶縁層を順次、印刷、焼成しようとすると、厚膜抵抗、複数の絶縁層及び配線パタンは、全て同じ温度で焼成することが考えられる。   Conventionally, when a thick film multilayer substrate is manufactured by printing and baking an insulating layer on a ceramic substrate and printing and baking a wiring pattern on the insulating layer, the plurality of insulating layers and the wiring pattern are all the same. Baking at temperature. Therefore, applying the above technique, printing and firing a thick film resistor on a ceramic substrate, and sequentially printing and firing a plurality of insulating layers on the ceramic substrate, the thick film resistor, the plurality of insulating layers and It is conceivable that all the wiring patterns are fired at the same temperature.

しかしながら、上記の製造方法では、厚膜抵抗の焼成温度と絶縁層、配線パタンなどの焼成温度が同じであるため、厚膜抵抗焼成後の焼成工程において、熱的影響により厚膜抵抗とそれに接する絶縁層との間に相互拡散や熱ストレスが発生し、厚膜抵抗の抵抗値が大きく変動してしまうという問題がある。そこで上記問題に対処する従来技術としては、下記の時点において、厚膜抵抗にレーザトリミングを実施し、抵抗値調整を行っている。   However, in the above manufacturing method, the firing temperature of the thick film resistor and the firing temperature of the insulating layer, the wiring pattern, etc. are the same. Therefore, in the firing process after the thick film resistance firing, the thick film resistor is in contact with the thick film resistor. There is a problem that mutual diffusion or thermal stress occurs between the insulating layer and the resistance value of the thick film resistor greatly fluctuates. Therefore, as a conventional technique for coping with the above problem, at the following time point, laser trimming is performed on the thick film resistor to adjust the resistance value.

第一の従来技術では全ガラス絶縁層の焼成前にレーザトリミングを実施する。第二の従来技術では全ガラス絶縁層の焼成後に全ガラス絶縁層を透過してレーザトリミングを実施する。第三の従来技術では全ガラス絶縁層を開口して設けた窓を通してレーザトリミングを実施する。第四の従来技術では上部のガラス絶縁層に設けた窓を通しかつ最下層のガラス絶縁層を透過してレーザトリミングを実施する。   In the first prior art, laser trimming is performed before firing the all-glass insulating layer. In the second prior art, laser trimming is carried out after passing through the entire glass insulating layer after firing of the entire glass insulating layer. In the third prior art, laser trimming is performed through a window provided with an all-glass insulating layer opened. In the fourth prior art, laser trimming is performed through a window provided in the upper glass insulating layer and through the lowermost glass insulating layer.

しかしながら、上記したレーザートリミング方法は、それぞれ下記の問題点を有している。まず上記第一の従来技術では、レーザートリミング後に全ガラス絶縁層及び配線の焼成を行うためにそれらの熱的影響により、厚膜抵抗の抵抗値が変動してしまう。図6に同一基板上に設けた3個の厚膜抵抗の各工程毎の抵抗値変動の一例を示す。図より明らかなように、抵抗体のシート抵抗値あるいは抵抗体の形状等によって抵抗値変動の絶対値が異なる。   However, each of the laser trimming methods described above has the following problems. First, in the first prior art, since the whole glass insulating layer and the wiring are fired after laser trimming, the resistance value of the thick film resistor fluctuates due to their thermal influence. FIG. 6 shows an example of resistance value fluctuations for each process of three thick film resistors provided on the same substrate. As is apparent from the figure, the absolute value of the resistance value variation varies depending on the sheet resistance value of the resistor, the shape of the resistor, or the like.

上記第二の従来技術では、厚い全ガラス絶縁層を透過してレーザートリミングを行うために、各ガラス絶縁層及びその界面における吸収、散乱、反射が生じ、厚膜抵抗トリミングのためにレーザー出力を増大させる必要がある。しかし、このレーザー出力の増大は周辺部への熱的影響の増大により周辺の配線や回路素子に熱ストレスなどの悪影響を与える可能性が危惧される。   In the second prior art, since laser trimming is performed through the thick all-glass insulating layer, absorption, scattering, and reflection occur at each glass insulating layer and its interface, and laser output is obtained for thick film resistance trimming. Need to increase. However, there is a concern that this increase in laser output may adversely affect peripheral wiring and circuit elements such as thermal stress due to an increase in thermal influence on the peripheral portion.

上記第三、第四の従来技術では、窓部に配線を布設できないので、多数のレーザートリミング厚膜抵抗を要する場合、配線パターンの設計が複雑となり、配線長が必要以上に長くなり、更に厚膜抵抗が露出するので耐外部環境性に不安が生じる。本発明は上記問題点に鑑みなされたものであり、簡単に厚膜抵抗の抵抗値を高精度化できる厚膜多層基板の製造方法を提供することを、その目的としている。   In the third and fourth conventional techniques, since wiring cannot be laid in the window portion, when a large number of laser trimming thick film resistors are required, the design of the wiring pattern becomes complicated, the wiring length becomes longer than necessary, and the thickness increases. Since the membrane resistance is exposed, anxiety about the external environmental resistance arises. The present invention has been made in view of the above problems, and an object of the present invention is to provide a method for manufacturing a thick film multilayer substrate that can easily increase the resistance value of the thick film resistor.

本発明の厚膜多層基板の製造方法は、セラミック基板上に厚膜抵抗を印刷して焼成する厚膜抵抗形成工程と、前記厚膜抵抗及び前記セラミック基板の表面に絶縁層を印刷して焼成する絶縁層形成工程とを備える厚膜多層基板の製造方法において、前記厚膜抵抗に含まれるガラスを前記厚膜抵抗の焼成により結晶化ガラスとすることを特徴としている。好適な態様において、前記厚膜抵抗に含まれるガラスにおける結晶化状態では、非晶質状態のときより融点が50℃以上上昇する組成である。   The method for manufacturing a thick film multilayer substrate according to the present invention includes a thick film resistance forming step of printing and firing a thick film resistor on a ceramic substrate, and printing and firing an insulating layer on the surface of the thick film resistor and the ceramic substrate. In the method of manufacturing a thick film multilayer substrate including the insulating layer forming step, the glass included in the thick film resistor is converted into crystallized glass by firing the thick film resistor. In a preferred embodiment, the glass contained in the thick film resistor has a composition in which the melting point increases by 50 ° C. or more in the crystallization state compared to the amorphous state.

それによれば、絶縁層形成工程において、絶縁層と厚膜抵抗との相互反応を抑止することができるようになり、厚膜抵抗の抵抗値変動を低減することができる。   According to this, in the insulating layer forming step, the interaction between the insulating layer and the thick film resistor can be suppressed, and the resistance value fluctuation of the thick film resistor can be reduced.

また、本発明の厚膜多層基板の製造方法は、セラミック基板上に厚膜抵抗を印刷して焼成する厚膜抵抗形成工程と、前記厚膜抵抗及び前記セラミック基板の表面に絶縁層を印刷して焼成する絶縁層形成工程とを備える厚膜多層基板の製造方法において、前記絶縁層に含まれるガラスを前記絶縁層の焼成により結晶化ガラスとすることを特徴としている。好適な態様において、前記絶縁層は前記厚膜抵抗に接する第1の絶縁層である。   The method for manufacturing a thick film multilayer substrate according to the present invention includes a thick film resistance forming step of printing and baking a thick film resistor on a ceramic substrate, and printing an insulating layer on the surface of the thick film resistor and the ceramic substrate. In the method for manufacturing a thick film multilayer substrate comprising an insulating layer forming step of baking, the glass contained in the insulating layer is converted into crystallized glass by baking the insulating layer. In a preferred aspect, the insulating layer is a first insulating layer in contact with the thick film resistor.

それによれば、絶縁層形成工程後において、絶縁層と厚膜抵抗との相互反応を抑止することができるようになり、厚膜抵抗の抵抗値変動を低減することができる。   According to this, it becomes possible to suppress the interaction between the insulating layer and the thick film resistor after the insulating layer forming step, and the resistance value fluctuation of the thick film resistor can be reduced.

〔第1実施例〕
本発明の厚膜多層基板の一実施例を図1を参照して説明する。図1は、アルミナ基板1上に3層のガラス絶縁層2〜4を有する厚膜多層基板を示す。
[First embodiment]
An embodiment of the thick film multilayer substrate of the present invention will be described with reference to FIG. FIG. 1 shows a thick film multilayer substrate having three glass insulating layers 2 to 4 on an alumina substrate 1.

基板1上には配線5、厚膜抵抗6が印刷、焼成されており、その上にガラス絶縁層2〜4が形成され、ガラス絶縁層4上には配線7、保護ガラス71が形成されている。また、ガラス絶縁層4上には回路部品8がはんだ付けされている。9はビアホールに充填された孔部充填導体である。以下、この厚膜多層基板の製造方法を説明する。   A wiring 5 and a thick film resistor 6 are printed and fired on the substrate 1, glass insulating layers 2 to 4 are formed thereon, and a wiring 7 and a protective glass 71 are formed on the glass insulating layer 4. Yes. A circuit component 8 is soldered on the glass insulating layer 4. Reference numeral 9 denotes a hole-filling conductor filled in the via hole. Hereinafter, a method for manufacturing this thick film multilayer substrate will be described.

(厚膜抵抗形成工程)まず、図2に示すように、Ag粉末にバインダとしてのエチルセルロースと溶剤としてのテルビネオールなどとを混練して導体ペーストを作成し、次に約1600℃で焼成されたアルミナ基板1上にこの導体ペーストを印刷し、空気中、800〜1050℃で10分間保持する焼成プロファイルにて焼成して配線5を形成する。   (Thick film resistance forming step) First, as shown in FIG. 2, an alumina powder was kneaded with ethyl cellulose as a binder and tervineol as a solvent to prepare a conductor paste, and then calcined at about 1600 ° C. The conductor paste is printed on the substrate 1 and fired in a firing profile that is held in air at 800 to 1050 ° C. for 10 minutes to form the wiring 5.

次に、1200〜1500℃で溶融後、水中急冷し、粉砕した所定の混合比率のPbO、Al2O3、SiO2、B2O3混合物などからなる平均粒径2〜5μmのガラス粉末50〜80vol%にRu02粉末を所定vol%混合した混合粉末を作成し、この混合粉末に溶剤(例えばテルビネオール)、バインダ(例えばエチルセルロース)を入れて混練して抵抗体ペーストを作成し、この抵抗体ペーストをアルミナ基板1の表面に焼成後の膜厚が7〜15μmの厚さになるように印刷し、空気中、820〜1050℃で10分間保持する焼成プロファイルにて焼成して厚膜抵抗6を形成する。   Next, after melting at 1200 to 1500 ° C., Ru02 powder is added to 50 to 80 vol% of glass powder having an average particle diameter of 2 to 5 μm composed of a mixture of PbO, Al 2 O 3, SiO 2, and B 2 O 3 in a predetermined mixing ratio after being quenched in water and pulverized. A mixed powder in which a predetermined vol% is mixed is prepared, a solvent (for example, terbinol) and a binder (for example, ethyl cellulose) are mixed into the mixed powder and kneaded to prepare a resistor paste, and this resistor paste is formed on the surface of the alumina substrate 1. The thick film resistor 6 is formed by printing so that the film thickness after firing is 7 to 15 μm and firing in a firing profile held in air at 820 to 1050 ° C. for 10 minutes.

(ガラス絶縁層の最下層を厚膜抵抗上に形成する工程)次に、図3に示すように、1200〜1500℃で溶融後、水中急冷し、粉砕した所定の混合比率のCaO、Al2O3、ZrO、PbOなどの混合物からなる平均粒径2〜5μmのガラス粉末に、溶剤(例えばテルビネオール)、バインダ(例えばエチルセルロース)を所定量加え、混練してガラスペーストを作成する。このガラスペーストをアルミナ基板1上に15〜25μmの厚さで印刷し、800〜950℃で10分間保持する焼成プロファイルにて焼成してガラス絶縁層2を形成する。   (Step of forming the lowermost layer of the glass insulating layer on the thick film resistor) Next, as shown in FIG. 3, after melting at 1200 to 1500 ° C., quenching in water and pulverizing CaO, Al 2 O 3 in a predetermined mixing ratio, A predetermined amount of a solvent (for example, tervineol) and a binder (for example, ethyl cellulose) is added to glass powder having an average particle diameter of 2 to 5 μm made of a mixture of ZrO, PbO, etc., and kneaded to prepare a glass paste. This glass paste is printed on the alumina substrate 1 with a thickness of 15 to 25 μm and fired with a firing profile held at 800 to 950 ° C. for 10 minutes to form the glass insulating layer 2.

(残部のガラス絶縁層及び内部配線形成工程)次に、図4に示すように、上記したガラス絶縁層2の製造工程と同じ工程でガラス絶縁層3を形成し、次に、上記導体ペーストをガラス絶縁層2、3の互いに連通するビアホールにスクリーン印刷して充填し、空気中、800〜950℃で10分間保持する焼成プロファイルにて焼成して孔部充填導体9の下部を形成する。   (Residual Glass Insulating Layer and Internal Wiring Forming Step) Next, as shown in FIG. 4, the glass insulating layer 3 is formed in the same process as the manufacturing process of the glass insulating layer 2 described above, and then the conductor paste is applied. The via holes communicating with each other in the glass insulating layers 2 and 3 are screen-printed and filled, and fired in a firing profile held in air at 800 to 950 ° C. for 10 minutes to form the lower portion of the hole-filling conductor 9.

次に、上記したガラス絶縁層2の製造工程と同じ工程でガラス絶縁層4を形成し、次に、上記ビアホールに連通するガラス絶縁層4のビアホールにAgペーストをスクリーン印刷して充填し、空気中、800〜950℃で10分間保持する焼成プロファイルにて焼成して孔部充填導体9の上部を形成する。   Next, the glass insulating layer 4 is formed in the same process as the manufacturing process of the glass insulating layer 2 described above, and then Ag paste is screen-printed and filled in the via hole of the glass insulating layer 4 communicating with the via hole, and the air The upper portion of the hole-filling conductor 9 is formed by firing with a firing profile held at 800 to 950 ° C. for 10 minutes.

(表層回路形成工程)次に、図4に示す様に導体ペーストをガラス絶縁層4表面に印刷し、800〜950℃で10分間保持する焼成プロファイルにて焼成して配線7を形成し、その上に保護ガラスペーストを印刷し、空気中、500〜650℃をピーク温度とする焼成プロファイルにて焼成して保護ガラス層71を形成した。   (Surface Layer Circuit Forming Step) Next, as shown in FIG. 4, a conductor paste is printed on the surface of the glass insulating layer 4 and fired with a firing profile held at 800 to 950 ° C. for 10 minutes to form the wiring 7. A protective glass paste was printed on top, and fired in air with a firing profile having a peak temperature of 500 to 650 ° C. to form a protective glass layer 71.

保護ガラスペーストは、1200〜1500℃で溶融後、水中急冷し、粉砕した所定の混合比率のPbO、SiO2、B2O3混合物からなる平均粒径2〜5μmのガラス粉末に、溶剤(例えばテルピネオール)、バインダ(例えばエチルセルロース)を所定量加え、混練して作成した。   The protective glass paste is melted at 1200 to 1500 ° C., quenched in water and pulverized into a glass powder having an average particle diameter of 2 to 5 μm composed of a mixture of PbO, SiO 2 and B 2 O 3 in a predetermined mixing ratio, a solvent (for example, terpineol), a binder A predetermined amount of (for example, ethyl cellulose) was added and kneaded.

(回路部品装着工程)次に、図1に示すように、ガラス絶縁層4の表面に焼成基板の表面に、回路部品8をはんだ付けして工程を完了した。   (Circuit Component Mounting Step) Next, as shown in FIG. 1, the circuit component 8 was soldered to the surface of the fired substrate on the surface of the glass insulating layer 4 to complete the step.

また、基板形成プロセスにて導体ペーストのAg粉末の代わりにAgとPdあるいはAgとPtとの混合粉を用いてもよい。またCuを用いることもできるがこの場合には酸化防止のため、焼成をN2雰囲気で行なう必要がある。さらに、表層回路形式工程において、導体ペーストを用いて配線形成後、この配線間に抵抗体を形成する事もできる。   Moreover, you may use the mixed powder of Ag and Pd or Ag and Pt instead of Ag powder of a conductor paste in a board | substrate formation process. Cu can also be used, but in this case, firing must be performed in an N2 atmosphere to prevent oxidation. Further, in the surface layer circuit format process, after the wiring is formed using the conductive paste, a resistor can be formed between the wirings.

次に、厚膜抵抗6の抵抗値変化を各製造工程終了毎にモニターした結果を図5に示す。また、厚膜抵抗6の焼成を850℃で10分間保持する焼成プロファイルにて焼成した他は実施例と同じ方法で作成した厚膜抵抗の抵抗値変化を示す。図6からわかるように、厚膜抵抗6の抵抗値は、高温焼成する本実施例品の抵抗値変化は比較例品に比べて格段に縮小されていることがわかる。   Next, FIG. 5 shows the result of monitoring the resistance value change of the thick film resistor 6 at the end of each manufacturing process. Moreover, the resistance value change of the thick film resistance produced by the same method as an Example is shown except baking of the thick film resistance 6 by the baking profile hold | maintained at 850 degreeC for 10 minutes. As can be seen from FIG. 6, the resistance value of the thick film resistor 6 is remarkably reduced compared to the comparative example product in the resistance value change of the present example product that is fired at a high temperature.

〔第2実施例〕
上記実施例では、レーザートリミングを行わなかったが、厚膜抵抗6の形成後にそのレーザートリミングを行って、厚膜抵抗6の値を精密に所定値に決め、その後、厚膜抵抗6を含む基板1上にガラス絶縁層2〜4を形成してもよい。厚膜抵抗6が高温焼成されているために、その上にガラス絶縁層2〜4を低温焼成しても、図5からわかるように殆ど変わらない。
[Second Embodiment]
In the above embodiment, laser trimming was not performed, but after the thick film resistor 6 was formed, the laser trimming was performed to precisely determine the value of the thick film resistor 6 to a predetermined value, and then the substrate including the thick film resistor 6 Glass insulating layers 2 to 4 may be formed on 1. Since the thick film resistor 6 is fired at a high temperature, even if the glass insulating layers 2 to 4 are fired at a low temperature on the thick film resistor 6, there is almost no change as can be seen from FIG.

〔第3実施例〕
上記実施例2では、ガラス絶縁層2〜4形成前にレーザートリミングを実施したが、ガラス絶縁層2の形成後にレーザートリミングを行い、その後でガラス絶縁層3、4を形成してもよい。このようにすれば更に抵抗値変動を低減し、更に厚膜抵抗6上をガラス絶縁層3そして4で被覆することができる。
[Third embodiment]
In Example 2, the laser trimming was performed before the glass insulating layers 2 to 4 were formed. However, the laser trimming may be performed after the glass insulating layer 2 is formed, and then the glass insulating layers 3 and 4 may be formed. In this way, the resistance value fluctuation can be further reduced, and the thick film resistor 6 can be further covered with the glass insulating layers 3 and 4.

〔第4実施例〕
他の実施例を説明する。
[Fourth embodiment]
Another embodiment will be described.

この実施例は、実施例1において、厚膜抵抗6のレーザートリミング後の抵抗値R3と、製造工程完了後の上記厚膜抵抗6の抵抗R4との変化率Rr=R4/R3について多数のサンプルの平均変化率Rrmを計算し、レーザートリミング時にこの平均変化率Rrmを利用してレーザートリミング時の抵抗値R3を決定する。   In this embodiment, a large number of samples are used for the rate of change Rr = R4 / R3 between the resistance value R3 of the thick film resistor 6 after laser trimming and the resistance R4 of the thick film resistor 6 after the manufacturing process is completed. An average change rate Rrm is calculated, and a resistance value R3 at the time of laser trimming is determined using the average change rate Rrm at the time of laser trimming.

例えば厚膜抵抗6の目標抵抗値をRxとする。そこでレーザートリミングにより厚膜抵抗6のレーザートリミング設定抵抗値R3をR3=Rx/Rrmとしてレーザートリミングを行う。このようにすれば、レーザートリミング後にガラス絶縁層焼成などを行い、厚膜抵抗6に熱履歴が加えられる場合でも、この熱履歴による厚膜抵抗6の抵抗値変動を最小限に抑制することが可能となる。   For example, the target resistance value of the thick film resistor 6 is Rx. Therefore, laser trimming is performed by setting the laser trimming setting resistance value R3 of the thick film resistor 6 to R3 = Rx / Rrm by laser trimming. In this way, even if a thermal history is applied to the thick film resistor 6 by performing a glass insulating layer firing after the laser trimming, the resistance value fluctuation of the thick film resistor 6 due to the thermal history can be minimized. It becomes possible.

これは、レーザートリミング後のガラス絶縁層や配線の焼成工程が一定であり、それによる抵抗値変動も本質的に一定範囲内に収まるためである。   This is because the firing process of the glass insulating layer and the wiring after the laser trimming is constant, and the resistance value fluctuation due to this is essentially within a certain range.

〔第5実施例〕
実施例4の変形態様を以下に説明する。この実施例では、レーザートリミングにおける抵抗値比較(モニタ抵抗と記憶する目標抵抗との比較)を行うコンピュータのメモリに、回路基板上の全部の厚膜抵抗6に対してそれぞれ、平均変化率Rrmを個別に記憶しておく。
[Fifth embodiment]
A modification of the fourth embodiment will be described below. In this embodiment, an average rate of change Rrm is obtained for each thick film resistor 6 on the circuit board in the memory of a computer that performs resistance value comparison (comparison between the monitor resistance and the stored target resistance) in laser trimming. Remember it separately.

これは、回路基板上の位置や、各厚膜抵抗6の抵抗値などにより微妙に平均変化率Rrmが異なるのを補償するためである。このようにすれば、回路基板上の位置や、各厚膜抵抗6の抵抗値などにより微妙に平均変化率Rrmが異なる場合でも、熱履歴による各厚膜抵抗6の抵抗値変動を最小化することができる。   This is to compensate for a slight difference in the average rate of change Rrm depending on the position on the circuit board, the resistance value of each thick film resistor 6, and the like. In this way, even if the average rate of change Rrm differs slightly depending on the position on the circuit board, the resistance value of each thick film resistor 6, etc., the resistance value variation of each thick film resistor 6 due to the thermal history is minimized. be able to.

〔第6実施例〕
実施例5の変形態様を以下に説明する。
[Sixth embodiment]
A modification of the fifth embodiment will be described below.

回路基板は複数枚(例えば4枚)を1ロットとして同じハンドリング用のボート(たとえばアルミナ製)に載置して、各工程を実施する。この実施例では、レーザートリミングにおける抵抗値比較(モニタ抵抗と記憶する目標抵抗との比較)を行うコンピュータのメモリに、上記ボート上の各回路基板上のレーザートリミングが必要な各厚膜抵抗6の全数に対して、それぞれ平均変化率Rrmを個別に記憶しておく。そしてレーザートリミングが必要な全厚膜抵抗6に対して各抵抗値R3を目標抵抗Rx/Rrmとして個別にレーザートリミングする。   A plurality of (for example, four) circuit boards are placed on the same handling boat (for example, made of alumina) as one lot, and each process is performed. In this embodiment, each thick film resistor 6 that requires laser trimming on each circuit board on the boat is added to the memory of a computer that performs resistance value comparison in laser trimming (comparison between monitor resistance and stored target resistance). The average rate of change Rrm is stored individually for all the numbers. Then, each of the resistance values R3 is individually laser trimmed as the target resistance Rx / Rrm with respect to the full thickness film resistor 6 that requires laser trimming.

これは、上記セラミックボート上の回路基板の載置位置により、回路基板毎に微妙に温度などが変化し、そのために回路基板上の同一位置に形成される厚膜抵抗6でも上記微妙な温度変化により抵抗値が変動するためである。この実施例によれば、更に一層の抵抗値変動抑制が可能となる。   This is because the temperature or the like slightly changes for each circuit board depending on the mounting position of the circuit board on the ceramic boat, and the above-mentioned slight temperature change is also caused by the thick film resistor 6 formed at the same position on the circuit board. This is because the resistance value fluctuates. According to this embodiment, the resistance value fluctuation can be further suppressed.

(変形態様)以下、他の変形態様を説明する。   (Modification) Other modifications will be described below.

変形態様1
実施例4において、厚膜抵抗6の膜厚と熱履歴後の平均変化率Rrmとは一定の関係をもつので、この関係を示すグラフを記憶しておけば、厚膜抵抗6の膜厚を変える度にこのグラフから平均変化率Rrmをサーチすることができ、厚膜抵抗6の膜厚を変える度に一々、平均変化率Rrmを実験的に導出しなくてもよい。
Modification 1
In Example 4, since the film thickness of the thick film resistor 6 and the average rate of change Rrm after the thermal history have a fixed relationship, if a graph showing this relationship is stored, the film thickness of the thick film resistor 6 is The average rate of change Rrm can be searched from this graph every time it is changed, and it is not necessary to experimentally derive the average rate of change Rrm each time the thickness of the thick film resistor 6 is changed.

変形態様2
この態様では、厚膜抵抗6形成後でかつガラス絶縁層2形成前に、厚膜抵抗6とガラス絶縁層2との間の固相拡散を防止又は低減するバリア層を少なくとも厚膜抵抗6上に形成する。このバリア層はレーザートリミング前に形成してもよく、その後に形成してもよい。このバリア層の条件としては、厚膜抵抗6との固相拡散が少なく、厚膜抵抗6とガラス絶縁層2との間の固相拡散を低減し、厚膜抵抗6形成後の熱履歴に対して相変化しない絶縁性材料であり、例えば、窒化シリコン膜やアルミナ膜などを採用することができ、製造プロセスとしてはCVD法やPVD法や印刷焼成法などを採用できる。なお、レーザートリミング前に形成する場合には、レーザートリミングにより溶断可能な厚さとする必要がある。
Modification 2
In this embodiment, a barrier layer that prevents or reduces solid phase diffusion between the thick film resistor 6 and the glass insulating layer 2 is formed on at least the thick film resistor 6 after the thick film resistor 6 is formed and before the glass insulating layer 2 is formed. To form. This barrier layer may be formed before laser trimming or after that. As conditions for this barrier layer, there is little solid phase diffusion with the thick film resistor 6, solid phase diffusion between the thick film resistor 6 and the glass insulating layer 2 is reduced, and the heat history after the thick film resistor 6 is formed On the other hand, it is an insulating material that does not change phase. For example, a silicon nitride film, an alumina film, or the like can be used. As a manufacturing process, a CVD method, a PVD method, a printing baking method, or the like can be used. In addition, when forming before laser trimming, it is necessary to make it the thickness which can be cut by laser trimming.

変形態様3
この態様では、厚膜抵抗6形成後でかつガラス絶縁層2形成前に又はガラス絶縁層2として、直上のガラス絶縁層よりも軟質又は高弾性の緩衝層を少なくとも厚膜抵抗6上に形成する。この緩衝層はレーザートリミング前に形成してもよく、その後に形成してもよい。この緩衝層の条件としては、厚膜抵抗6との固相拡散が少なく、厚膜抵抗6とガラス絶縁層4との間の固相拡散を低減し、厚膜抵抗6形成後の熱履歴に対して相変化しない絶縁性材料であり、製造プロセスとしてはCVD法やPVD法や印刷焼成法などを採用できる。なお、レーザートリミング前に形成する場合には、レーザートリミングにより溶断可能な厚さとする必要がある。
Modification 3
In this aspect, after the thick film resistor 6 is formed and before the glass insulating layer 2 is formed or as the glass insulating layer 2, a buffer layer that is softer or more elastic than the glass insulating layer immediately above is formed on at least the thick film resistor 6. . This buffer layer may be formed before laser trimming or after that. The buffer layer condition is that solid phase diffusion with the thick film resistor 6 is small, solid phase diffusion between the thick film resistor 6 and the glass insulating layer 4 is reduced, and the thermal history after the thick film resistor 6 is formed. On the other hand, it is an insulating material that does not change phase, and a CVD method, a PVD method, a printing baking method, or the like can be adopted as a manufacturing process. In addition, when forming before laser trimming, it is necessary to make it the thickness which can be cut by laser trimming.

このようにすれば、厚膜抵抗6とガラス絶縁層2又は3との熱膨張係数の差に起因する熱応力をこの緩衝層で緩和することができ、それにより上記熱応力による厚膜抵抗6の抵抗値の変動を低減することができる。   In this way, the thermal stress caused by the difference in thermal expansion coefficient between the thick film resistor 6 and the glass insulating layer 2 or 3 can be relaxed by this buffer layer, and thereby the thick film resistor 6 caused by the thermal stress. The variation in resistance value can be reduced.

変形態様4
この態様では、厚膜抵抗6形成後でかつガラス絶縁層2形成前に又はガラス絶縁層2として、直上のガラス絶縁層の熱膨張率と厚膜抵抗6の熱膨張率との中間の熱膨張率を有する緩衝層を設ける。この緩衝層はレーザートリミング前に形成してもよく、その後に形成してもよい。この緩衝層の条件としては、厚膜抵抗6との固相拡散が少なく、厚膜抵抗6とガラス絶縁層4との間の固相拡散を低減し、厚膜抵抗6形成後の熱履歴に対して相変化しない絶縁性材料であり、製造プロセスとしてはCVD法やPVD法や印刷焼成法などを採用できる。なお、レーザートリミング前に形成する場合には、レーザートリミングにより溶断可能な厚さとする必要がある。
Modification 4
In this embodiment, after the thick film resistor 6 is formed and before the glass insulating layer 2 is formed or as the glass insulating layer 2, the thermal expansion coefficient between the thermal expansion coefficient of the glass insulating layer immediately above and the thermal expansion coefficient of the thick film resistor 6 is intermediate. A buffer layer having a rate is provided. This buffer layer may be formed before laser trimming or after that. The buffer layer condition is that solid phase diffusion with the thick film resistor 6 is small, solid phase diffusion between the thick film resistor 6 and the glass insulating layer 4 is reduced, and the thermal history after the thick film resistor 6 is formed. On the other hand, it is an insulating material that does not change in phase, and a CVD method, a PVD method, a printing baking method, or the like can be adopted as a manufacturing process. In addition, when forming before laser trimming, it is necessary to make it the thickness which can be cut by laser trimming.

このようにすれば、厚膜抵抗6とガラス絶縁層2又は3との熱膨張係数の差に起因する熱応力をこの緩衝層で緩和することができ、それにより上記熱応力による厚膜抵抗6の抵抗値の変動を低減することができる。   In this way, the thermal stress caused by the difference in thermal expansion coefficient between the thick film resistor 6 and the glass insulating layer 2 or 3 can be relaxed by this buffer layer, and thereby the thick film resistor 6 caused by the thermal stress. The variation in resistance value can be reduced.

変形態様5
この態様では、厚膜抵抗6に含まれるガラスの主成分を結晶化ガラスとする。
Modification 5
In this embodiment, the main component of the glass contained in the thick film resistor 6 is crystallized glass.

このようにすれば、厚膜抵抗6の内部のガラスが厚膜抵抗6の焼成時に結晶化し、結晶化ガラスの融点が高くなる。好適には、結晶化状態で非晶質状態のときより融点が50℃以上上昇する組成が好ましい。したがって、その後の絶縁層の焼成工程における絶縁層と厚膜抵抗6との相互反応をより良好に抑止することができる。   In this way, the glass inside the thick film resistor 6 is crystallized when the thick film resistor 6 is fired, and the melting point of the crystallized glass is increased. Preferably, a composition in which the melting point increases by 50 ° C. or more is higher than that in the amorphous state in the crystallized state. Therefore, the interaction between the insulating layer and the thick film resistor 6 in the subsequent baking process of the insulating layer can be more effectively suppressed.

さらに厚膜抵抗6内部のガラスだけでなく、ガラス絶縁層2に含まれるガラスの主成分をも結晶化ガラスとしても同様の効果が生じる。すなわち、ガラス絶縁層2に含まれるガラスの主成分が結晶化ガラスとなることにより、焼成後のガラス絶縁層2とそれに隣接する厚膜抵抗6との相互反応が抑制される。これにより、厚膜抵抗6の抵抗値変動を低減することができる。   Further, not only the glass in the thick film resistor 6 but also the main component of the glass contained in the glass insulating layer 2 is also used as crystallized glass, thereby producing the same effect. That is, when the main component of the glass contained in the glass insulating layer 2 is crystallized glass, the interaction between the fired glass insulating layer 2 and the thick film resistor 6 adjacent thereto is suppressed. Thereby, the resistance value fluctuation | variation of the thick film resistance 6 can be reduced.

実施例1の厚膜多層基板を示す模式断面図である。1 is a schematic cross-sectional view showing a thick film multilayer substrate of Example 1. FIG. 実施例1の製造工程を示す模式断面図である。2 is a schematic cross-sectional view showing a manufacturing process of Example 1. FIG. 実施例1の製造工程を示す模式断面図である。2 is a schematic cross-sectional view showing a manufacturing process of Example 1. FIG. 実施例1の製造工程を示す模式断面図である。2 is a schematic cross-sectional view showing a manufacturing process of Example 1. FIG. 実施例1における各工程後の厚膜抵抗の抵抗値の変動を示す図である。It is a figure which shows the fluctuation | variation of the resistance value of the thick film resistance after each process in Example 1. FIG. 従来の厚膜多層基板の各部に形成された3個の抵抗の各工程後の抵抗値の変動を示す図である。It is a figure which shows the fluctuation | variation of the resistance value after each process of the three resistors formed in each part of the conventional thick film multilayer substrate.

符号の説明Explanation of symbols

1は基板、2〜4はガラス絶縁層、6は厚膜抵抗である。   1 is a substrate, 2 to 4 are glass insulating layers, and 6 is a thick film resistor.

Claims (4)

セラミック基板上に厚膜抵抗を印刷して焼成する厚膜抵抗形成工程と、前記厚膜抵抗及び前記セラミック基板の表面に絶縁層を印刷して焼成する絶縁層形成工程とを備える厚膜多層基板の製造方法において、
前記厚膜抵抗に含まれるガラスを前記厚膜抵抗の焼成により結晶化ガラスとすることを特徴とする厚膜多層基板の製造方法。
A thick film multilayer substrate comprising: a thick film resistor forming step of printing and firing a thick film resistor on a ceramic substrate; and an insulating layer forming step of printing and firing an insulating layer on the surface of the thick film resistor and the ceramic substrate. In the manufacturing method of
A method for producing a thick film multilayer substrate, characterized in that the glass contained in the thick film resistor is crystallized glass by firing the thick film resistor.
前記厚膜抵抗に含まれるガラスにおける結晶化状態では、非晶質状態のときより融点が50℃以上上昇する組成である請求項1に記載の厚膜多層基板の製造方法。 The method for producing a thick film multi-layer substrate according to claim 1, wherein a melting point of the glass in the crystallization state included in the thick film resistor is higher by 50 ° C or more than in the amorphous state. セラミック基板上に厚膜抵抗を印刷して焼成する厚膜抵抗形成工程と、前記厚膜抵抗及び前記セラミック基板の表面に絶縁層を印刷して焼成する絶縁層形成工程とを備える厚膜多層基板の製造方法において、
前記絶縁層に含まれるガラスを前記絶縁層の焼成により結晶化ガラスとすることを特徴とする厚膜多層基板の製造方法。
A thick film multilayer substrate comprising: a thick film resistor forming step of printing and firing a thick film resistor on a ceramic substrate; and an insulating layer forming step of printing and firing an insulating layer on the surface of the thick film resistor and the ceramic substrate. In the manufacturing method of
A method for producing a thick film multilayer substrate, wherein the glass contained in the insulating layer is converted into crystallized glass by firing the insulating layer.
前記絶縁層は前記厚膜抵抗に接する第1の絶縁層である請求項3に記載の厚膜多層基板の製造方法。
The method for manufacturing a thick film multilayer substrate according to claim 3, wherein the insulating layer is a first insulating layer in contact with the thick film resistor.
JP2005141650A 1992-12-22 2005-05-13 Method of producing thick-film multi-layer substrates Pending JP2005277436A (en)

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JP34280392 1992-12-22
JP2005141650A JP2005277436A (en) 1992-12-22 2005-05-13 Method of producing thick-film multi-layer substrates

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100771307B1 (en) * 2006-08-18 2007-10-29 삼성전기주식회사 Printed circuit board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100771307B1 (en) * 2006-08-18 2007-10-29 삼성전기주식회사 Printed circuit board

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