JP2005091819A - Liquid crystal display - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce a parasitic capacitance between a pixel electrode and a wiring and to reliably shield a region in the vicinity of an outer peripheral part of the pixel electrode from light. <P>SOLUTION: A light shielding layer 120 blocking light made incident from a lower part is provided on a substrate 10 in an electrically floating state so as to overlap a source wiring 103. The source wiring 103 is provided with a narrow width part 113 formed at at least a part of a part overlapping with the light shielding layer 120 or a gate wiring 101 and having a comparatively narrow width and a wide width part 111 formed at a part which does no overlap with at least the light shielding layer and the gate wiring and having a comparatively wide width. The wide width part 111 and the light shielding layer 120 overlap with an outer peripheral part of the pixel electrode 106. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a liquid crystal display device that performs transmissive display, and more particularly to a structure for shielding an alignment disorder region of liquid crystal molecules in the vicinity of the outer peripheral portion of a pixel electrode.

  Information infrastructure develops day by day, and devices such as mobile phones, PDAs, digital cameras, video cameras, and car navigation systems penetrate deeply into people's lives. Most of these devices employ liquid crystal display devices. With the increase in the amount of information handled by the main body, liquid crystal display devices are desired to display a large amount of information clearly on a limited display screen. High brightness, high contrast, multiple colors, and high Market demand for refinement is increasing day by day. In particular, the market demand for higher definition of display has become very high in recent years, and attention is focused on narrowing the pitch of each pixel.

  By the way, in the vicinity of the outer periphery of the pixel electrode provided in each pixel, alignment disorder of liquid crystal molecules occurs due to an oblique electric field. This disturbance in orientation causes a disturbance in display, resulting in a problem that image quality is deteriorated. On the other hand, it is generally known that a black matrix is provided on a counter substrate facing a wiring substrate on which pixel electrodes are provided, and the region where the alignment disorder is generated around the pixel electrodes is shielded by the black matrix. ing.

  However, since the bonding accuracy between the wiring substrate and the counter substrate is about 5 μm or more and relatively low, the black matrix itself is set widely in view of the bonding margin in order to reliably shield the region. There was a need. As a result, the aperture ratio is significantly reduced, and it is extremely difficult to reduce the pitch of each pixel while ensuring the aperture ratio.

  Therefore, conventionally, it is known that the outer peripheral portion of the pixel electrode is formed so as to overlap with a wiring such as a gate wiring or a source wiring (for example, see Patent Document 1). As a result, the disordered alignment region in the vicinity of the outer peripheral portion of the pixel electrode can be shielded by the wiring, and a black matrix is not required, so that the aperture ratio can be improved and the pitch can be reduced.

  Here, the light shielding structure by the wiring will be described with reference to the drawings.

  FIG. 10 is a schematic plan view showing an enlarged pixel of a conventional liquid crystal display device. As shown in FIG. 10, a plurality of gate lines 201 and source lines 203 are formed on the substrate in a lattice pattern so as to cross each other. Further, a Cs wiring 202 that is a capacitor wiring is formed along the gate wiring 201 so as to intersect the source wiring 203. A TFT 204 is provided in the vicinity of each intersection between the gate wiring 201 and the source wiring 203. The TFT 204 is connected to the pixel electrode 206 through the drain electrode 205. The pixel electrode 206 is provided in an upper layer of the substrate via an insulating layer (not shown), and is connected to the drain electrode 205 via a contact hole (not shown). The outer peripheral portion of the pixel electrode 206 is formed so as to overlap the gate wiring 201, the Cs wiring 202, or the source wiring 203 over the entire periphery.

  However, when the pixel electrode and the wiring overlap, the deterioration of the image quality due to the disorder of orientation can be suppressed, but the parasitic capacitance between the pixel electrode and the wiring increases, so that problems such as the occurrence of crosstalk are likely to occur. turn into.

In order to solve this problem, it is known to provide a light-shielding layer that shields a region in the vicinity of the outer periphery of the pixel electrode so as to overlap the wiring in an electrically floating state (see, for example, Patent Document 2). That is, a part of the light shielding layer overlaps with the outer periphery of the pixel electrode. As a result, it is possible to prevent deterioration in image quality due to orientation disturbance and reduce parasitic capacitance between the pixel electrode and the wiring to prevent crosstalk.
JP 9-152625 A JP-A-9-33951

  However, in the above conventional structure, in order to avoid electrical connection between the light shielding layer and the wiring, a predetermined gap is provided between the light shielding layer and the wiring as viewed from the normal direction of the wiring board. As a result, even if an attempt is made to shield the area near the outer periphery of the pixel electrode by the light shielding layer, light leaks from the gap, and thus the area near the outer periphery of the pixel electrode cannot be completely shielded. . In other words, the conventional configuration has a problem that the contrast and display quality are impaired.

  The present invention has been made in view of such various points, and an object of the present invention is to reduce the parasitic capacitance between the pixel electrode and the wiring and to reliably shield the area near the outer periphery of the pixel electrode. Thus, the pitch of each pixel is narrowed and the contrast and display quality are improved.

  In order to achieve the above object, in the present invention, the outer peripheral portion of the pixel electrode is overlapped with both the light shielding layer provided in an electrically floating state and the wide portion of the source wiring or the gate wiring. .

  Specifically, a liquid crystal display device according to the present invention includes a plurality of switching elements arranged in a matrix on a substrate, and a plurality of gate wirings connected to the switching elements and extending in parallel with each other on the substrate. A plurality of source wirings connected to the switching element and extending perpendicularly to the gate wiring on the substrate, and a transmissive region for transmissive display formed in a region surrounded by the gate wiring and the source wiring And a plurality of transparent pixel electrodes provided on the substrate in the transmissive region via an insulating layer and connected to the switching elements, respectively, wherein the transmissive region has at least one side Is partitioned by the source wiring, and a light shielding layer that shields light incident from below is electrically floated on the substrate in a state of being electrically floating. The source wiring is provided so as to overlap a line, and the source wiring includes a relatively narrow narrow portion formed in at least part of a portion overlapping the light shielding layer or the gate wiring, and at least the light shielding layer and the gate wiring. A wide portion having a relatively wide width formed in a non-overlapping portion, and the wide portion and the light shielding layer overlap an outer peripheral portion of the pixel electrode.

  The liquid crystal display device according to the present invention includes a plurality of switching elements arranged in a matrix on a substrate, a plurality of gate wirings connected to the switching elements and extending in parallel with each other on the substrate, A plurality of source lines connected to the switching element and extending perpendicularly to the gate lines on the substrate; and a transmissive region for performing transmissive display formed in a region surrounded by the gate lines and the source lines; A liquid crystal display device comprising a plurality of transparent pixel electrodes provided on a substrate in the transmissive region via an insulating layer and connected to each of the switching elements, wherein at least one side of the transmissive region is the side The gate wiring is partitioned by the gate wiring, and a light shielding layer that shields light incident from below is electrically floated on the substrate. The gate wiring is provided so as to overlap, and the relatively narrow narrow portion formed in at least a part of the portion overlapping with the light shielding layer or the source wiring, and at least does not overlap with the light shielding layer and the source wiring. A wide portion having a relatively wide width formed in the portion, and the wide portion and the light shielding layer overlap an outer peripheral portion of the pixel electrode.

  The light shielding layer may extend along the source wiring.

  The light shielding layer may extend along the gate wiring.

  It is preferable that the side edge of the light shielding layer protrudes with a length of 2 μm or more and 5 μm or less in the width direction with respect to the side edge of the narrow portion overlapping the light shielding layer.

  The side edge of the light shielding layer is preferably provided at a distance within ± 1 μm in the width direction with respect to the side edge of the wide portion overlapping the light shielding layer.

  A capacitor wiring extending along the gate wiring is provided on the substrate, and the source wiring is formed so that the width of at least a part of the portion overlapping the capacitor wiring is relatively narrow. Also good.

  A capacitor wiring extending along the source wiring is provided on the substrate, and the gate wiring is formed so that the width of at least a part of the portion overlapping the capacitor wiring is relatively narrow. Good.

  According to the present invention, the wiring is constituted by the narrow portion and the wide portion, and both the wide portion and the light shielding layer are overlapped on the outer peripheral portion of the pixel electrode, so that the gap between the end portion of the light shielding layer and the wiring is obtained. Even if there is a gap, the gap can be overlapped with the wide portion, so that the region where the orientation of the liquid crystal molecules is disturbed in the vicinity of the outer peripheral portion of the pixel electrode can be reliably shielded and hidden.

  In addition, since the light shielding layer is provided in an electrically floating state, generation of parasitic capacitance between the light shielding layer and the pixel electrode can be suppressed. Furthermore, since the area of the overlapping portion between the narrow portion of the wiring and the pixel electrode is reduced, the parasitic capacitance between the wiring and the pixel electrode can be suitably reduced. As a result, parasitic capacitance can be reduced to prevent crosstalk, and deterioration of image quality due to disorder of alignment of liquid crystal molecules can be prevented, so that contrast and display quality can be improved. In addition, since a black matrix is not required, the aperture ratio can be improved and the pitch between pixels can be narrowed, so that the display can be highly detailed.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following embodiment. Further, in FIG. 1, the front side of the paper surface is “upward”, and the back side of the paper surface is “downward”. Further, the vertical direction in FIGS. 2 and 3 is referred to as “vertical direction”.

Embodiment 1 of the Invention
1 to 4 show Embodiment 1 of a liquid crystal display device according to the present invention. The liquid crystal display device 1 is a transmissive liquid crystal display device that performs display by transmitting light from a backlight (not shown) that is a light source.

  FIG. 1 is an enlarged plan view showing the liquid crystal display device S of the present embodiment. 2 is a cross-sectional view taken along line II-II in FIG. 1, and FIG. 3 is a cross-sectional view taken along line III-III in FIG. The liquid crystal display device S includes a first substrate 1 including a TFT 104 serving as a switching element, a second substrate (not shown) provided opposite to the first substrate 1, and the first substrate 1 and the second substrate. It is comprised by the liquid crystal layer (illustration omitted) enclosed between.

  The liquid crystal layer is in an anti-parallel alignment ECB mode, and the rubbing direction is parallel to the source wiring 103 described later. In this case, the alignment state of the liquid crystal molecules is symmetrical, and the domains are also formed symmetrically. Therefore, the width of the area to be shielded is also symmetrical. The second substrate includes RGB color filters for color display (not shown), transparent electrodes (not shown) formed of ITO, and the like.

  The first substrate 1 includes a transparent insulating substrate 10 such as glass, a plurality of TFTs 104 arranged in a matrix on the substrate 10, and a gate wiring 101 and a source wiring 103 provided on the substrate 10. And a plurality of pixel electrodes 106 connected to the TFTs 104, respectively.

  As shown in FIG. 1, the TFT 104 includes a source electrode 107 to which a signal voltage is supplied, a drain electrode 105 for supplying a signal voltage to the pixel electrode 106, and an energization state from the source electrode 107 to the drain electrode 105. And a gate electrode 108 for switching between the two.

  A plurality of the gate wirings 101 are provided on the substrate 10 so as to extend in parallel with each other. Each gate wiring 101 is connected to the gate electrode 108 of the TFT 104. On the other hand, a plurality of the source lines 107 are provided on the substrate 10 and are formed so as to extend perpendicular to the gate lines 101. Each source wiring 103 is connected to the source electrode 107 of the TFT 104. That is, the gate wiring 101 and the source wiring 103 are formed in a lattice shape as a whole on the substrate 10. The gate wiring 101 and the source wiring 103 are made of, for example, titanium and aluminum. Further, a plurality of Cs wirings 102 that are capacitive wirings are provided on the substrate 10. Each Cs wiring 102 is formed to extend along the gate wiring 101.

  Pixels are formed in regions surrounded by the gate lines 101 and the source lines 103, respectively. That is, the pixels are provided in a matrix on the substrate 10. Each pixel is provided with a transmissive region T for transmissive display and a pixel electrode 106. The transmissive region T is partitioned by a gate wiring 101 and a source wiring 103 as shown in FIG.

  Note that the transmission region T is not necessarily defined by both the gate wiring 101 and the source wiring 103, and at least one side of the transmission region T only needs to be partitioned by the source wiring 103 in this embodiment.

  The pixel electrode 106 is made of a transparent electrode such as ITO, and is provided above the gate wiring 101, the source wiring 103, and the Cs wiring 102 via an insulating layer 110. The pixel electrode 106 constitutes an auxiliary capacity for assisting the pixel capacity by overlapping the Cs wiring 102 in the vertical direction. Further, as shown in FIG. 1, the outer peripheral portion of the pixel electrode 106 overlaps a part of the gate wiring 101 and the source wiring 103 in the vertical direction. The pixel electrode 106 is connected to the drain electrode 105 of the TFT 104 through a contact hole (not shown) formed in the insulating layer 110.

  A light shielding layer 120 that shields light incident from below is provided on the substrate 10 so as to overlap the source wiring 103 in an electrically floating state. That is, the light shielding layer 120 is provided on the substrate 10 in a state of being electrically insulated from other conductive members (for example, the gate wiring 101).

  The light shielding layer 120 is made of, for example, tungsten and tantalum nitride. As shown in FIG. 1, a pattern is formed on the substrate 10 so as to extend along the source wiring 103 between the Cs wiring 102 and the gate wiring 101. A predetermined gap is provided between the light shielding layer 120 and the gate wiring 101 when viewed from above. Similarly, a predetermined gap is provided between the light shielding layer 120 and the Cs wiring 102.

  Here, with reference to FIG.2 and FIG.3, the laminated structure of the 1st board | substrate 1 is demonstrated in detail.

  As shown in FIG. 2, a light shielding layer 120 is laminated on the substrate 10 to a thickness of 0.5 μm, for example. On the substrate 10 on which the light shielding layer 120 is laminated, an interlayer insulating film 109 made of silicon dioxide or the like is laminated with a thickness of 1 μm, for example.

  A source wiring 103 is formed on the interlayer insulating film 109 so as to overlap the light shielding layer 120. The source wiring 103 is disposed at the left and right center position in the light shielding layer 120. In other words, the axis line of the source wiring 103 and the axis line of the light shielding layer 120 are overlapped and coincide with each other. The source wiring 103 is formed with a thickness of 0.5 μm, for example.

  Further, an insulating film 110 made of a transparent resin material is stacked on the interlayer insulating film 109 on which the source wiring 103 is formed. The upper part of the insulating film 110 is formed in a plane. That is, the thickness of the insulating film 110 is, for example, 2.8 μm at a position where the light shielding layer 120 is not provided, and 2.3 μm at a position where the light shielding layer 120 is provided. It is 1.8 μm at the position where is provided.

  A pixel electrode 106 is formed on the insulating film 110. An interval between adjacent pixel electrodes 106 is defined to be 3 μm, for example.

  As a feature of the present invention, as shown in FIG. 1, the source wiring 103 includes narrow portions 113, 114, 115 having relatively narrow widths and wide portions 111, 112 having relatively wide widths. Yes. On the other hand, the conventional source wiring is composed only of the wide portion.

  The narrow portions 113, 114, 115 are formed in at least a part of a portion overlapping the light shielding layer 120, the gate wiring 101, or the Cs wiring 102. That is, the narrow portions 113, 114, and 115 are the first narrow portion 113 formed in the overlapping portion of the source wiring 103 and the light shielding layer 120 and the second narrow portion formed in the overlapping portion of the source wiring 103 and the gate wiring 101. A narrow portion 114 and a third narrow portion 115 formed in the overlapping portion of the source wiring 103 and the Cs wiring 102 are configured.

  On the other hand, the wide portions 111 and 112 are formed at least in portions that do not overlap the light shielding layer 120 and the gate wiring 101. That is, the wide portions 111 and 112 correspond to the first wide portion 111 formed corresponding to the gap between the light shielding film 120 and the gate wiring 101 or the Cs wiring 102, and the gap between the gate wiring 101 and the Cs wiring 102. The second wide portion 112 is formed.

  The wide portions 111 and 112 and the light shielding layer 120 are formed so as to overlap the outer peripheral portion of the pixel electrode 106. Further, part of each narrow portion 113, 114, 115 also overlaps the pixel electrode 106.

  Next, the relationship between the wide portions 111, 112 and the narrow portions 113, 114, 115 and the pixel electrode 106 will be described with reference to FIG. 4 which is a partially enlarged view of FIG.

  As shown in FIG. 4, two adjacent pixel electrodes 106 are provided above the source wiring 103 with a predetermined gap. The alignment disorder of the liquid crystal molecules due to the outer peripheral portions of these two pixel electrodes 106 occurs in a region A indicated by a broken line. That is, the alignment disorder occurs from the edge (end) of the pixel electrode 106 to a certain distance.

  Conventionally, in order to conceal this alignment disorder by shielding it, the source wiring is formed to have a width wider than that necessary to function as the wiring. On the other hand, according to the present invention, the width a of the narrow portions 113, 114, 115 can be reduced as long as the wiring resistance and the wiring capacitance are allowed.

  The wide portions 111 and 112 are formed so as to extend on both the left and right sides by a width d in order to shield the alignment disorder region from light with respect to the width a of the narrow portions 113, 114, and 115. The light shielding layer 120 is formed to extend by a width c on both the left and right sides. At this time, the width d and the width c are preferably 1 μm or more and 10 μm or less, respectively. The optimum hidden width is determined by the size of the alignment disorder region A, but this region A varies depending on the display mode, the cell thickness, the liquid crystal material, the material of the alignment film, etc., and is not determined uniformly. .

  If the width d and the width c are less than 1 μm, the alignment disorder cannot be reliably hidden. On the other hand, if the width d and the width c are larger than 10 μm, the aperture ratio is significantly reduced.

  In particular, in the present embodiment, the width c is specified to be 2 μm or more and 5 μm or less. In other words, the side edge of the light shielding layer 120 protrudes from the side edge of the narrow portion 113 overlapping the light shielding layer 120 with a length of 2 μm or more and 5 μm or less in the width direction.

  Further, as described above, the alignment disturbance occurs between the edge of the pixel electrode 106 and a certain distance, so that the light shielding layer 120 and the wide portions 111 and 112 for shielding and concealing this are the same as each other. That's fine. Therefore, it is desirable that the width e, which is the difference between the extended lengths of the two, be 0. Considering the process margin, the width e is preferably 1 μm or less. In other words, the side edge of the light shielding layer 120 is provided at a distance within ± 1 μm in the width direction with respect to the side edge of the wide portion 111 overlapping the light shielding layer 120.

  1 and 4, the width of the light shielding layer 120 is formed so as to be wider than the wide portions 111 and 112. Conversely, the width of the wide portions 111 and 112 is larger than that of the light shielding layer 120. You may form so that it may become large.

  Next, a simulation result of a change in transmittance when a predetermined voltage is applied to the liquid crystal layer will be described.

  The transmittance was simulated using LCDmaster, a liquid crystal simulator manufactured by Shintech. The result is shown in the graph of FIG. In FIG. 5, the horizontal axis indicates the distance with the origin as the center of symmetry, and the vertical axis indicates the transmittance including the polarizing plate.

  The liquid crystal used for the simulation is a nematic liquid crystal containing no chiral agent, and Δn = 0.065 and Δε = 7.9. The applied voltage was changed from 0 V to ± 3.7 V for the left pixel among the pixels adjacent to the left and right, and ± 3.7 V for the right pixel, thereby performing dot inversion driving.

  As a result, as shown in FIG. 5, light leakage having a peak in a range of ± 3.5 μm from the center occurred. Since this causes the afterimage of the domain, it is necessary to shield the light. When the liquid crystal layer and the driving method used in this simulation are applied to the liquid crystal display device of this embodiment, the domain can be shielded by shielding light by a width of 5 μm on the left and right sides from the center. Further, it has been found that in consideration of the process alignment margin, when the light is shielded by the source wiring 103 or the light shielding layer 120, the light may be shielded by 6.5 μm in the left-right direction. However, this value varies depending on the liquid crystal material, the cell gap, and the driving method.

  Next, the result of simulating the capacity per unit length of the portion where the light shielding layer 120 is provided with DIMOS, a liquid crystal simulator manufactured by autronic-melchers, will be described.

  As shown in FIG. 2, the width of the light shielding layer 120 used in the simulation is b, the width of the narrow portion 113 of the source wiring 103 is a, and the width of the wide portion 111 is 13 μm. The dielectric constants of the interlayer insulating film 109 and the insulating film 110 are both 3.5. The simulation results in this case are shown in Table 1.

(Table 1)
a (μm) 13 9 7 5 3 3
b (μm) − 13 13 13 13 15
Capacity (pF / m) 130.6 130.9 118.2 103.2 83.3 88.8
(ba) / 2-2 3 4 5 6

As shown in Table 1, when the width a is 9 μm and the width b is 13 μm, the capacity per unit length is equal to the case where the light shielding layer 120 is not provided. For this reason, when the width a is increased, the capacity is increased, so that an effective effect cannot be obtained. Therefore, it is ½ of the difference between the width b of the light shielding layer 120 and the width a of the narrow portion 113 (that is, the length (ba) / 2 of the light shielding layer 120 extending in the left-right direction). The one-side light-shielding width c) is 2 μm or more.

  In this case, the lower limit value of the width “a” of the source wiring 103 is 3 μm, and if it is smaller than this value, the wiring resistance increases, which adversely affects the display. When the width a is 3 μm, the one-side light-shielding width c is 5 μm. When this one-side light shielding width c is 6 μm or more, an effective effect cannot be obtained. Therefore, it was found that the one-side light-shielding width c, which is ½ of the difference between the light-shielding layer 120 and the narrow portion 111, is preferably 2 μm or more and 5 μm or less from the viewpoint of reducing the capacity.

  However, the above results are obtained when the width b of the light shielding layer is 13 μm. When the width b of the light shielding layer is wider, the effect can be obtained even if the one-side light shielding width c is 6 μm or more. .

  By the way, the pixel pitch of the liquid crystal display device S is 200 μm in the vertical direction (the vertical direction in FIG. 1 and the front and back direction in FIG. 2 and FIG. 3), and the interval between the pixel electrodes 106 in the vertical direction is 3 μm. is there. That is, the vertical length of the pixel electrode 106 is 197 μm. Among these, the length in which the light shielding layer 120 is provided is 160 μm. Further, the wide portion 111 of the source wiring 103 is provided on the both sides 20 μm in the vertical direction of the light shielding layer 120 because the light shielding layer 120 cannot be disposed. The remaining 17 μm length is a portion where the source wiring 103 and the gate wiring 101 or the Cs wiring 102 intersect.

Therefore, the capacitance per pixel (parasitic capacitance between the pixel electrode and the source wiring) is 130.6 pF / m × 20 μm + 83.3 pF / m × 167 μm = 16.52 fF. On the other hand, in the conventional one, 130.6 pF / m × 197 μm = 25.73
It can be seen that fF can reduce the parasitic capacitance to about 2/3 that of the prior art.

-Effect of Embodiment 1-
Therefore, according to the first embodiment, the source wiring 103 is configured by the narrow portions 113, 114, 115 and the wide portions 111, 112, and both the wide portions 111, 112 and the light shielding layer 120 are connected to the pixel electrode 106. Since it is overlapped with the outer peripheral portion, even if there is a gap between the light shielding layer 120 and the gate wiring 101 and the Cs wiring 102, the region A in which the alignment of liquid crystal molecules is disturbed in the vicinity of the outer peripheral portion of the pixel electrode 106 is formed. It can be reliably shielded from light.

  Furthermore, since the area of the overlapping portion between the wide portions 111 and 112 of the source wiring 103 and the pixel electrode 106 can be increased, the disordered alignment region A can be shielded suitably. In addition, since the light shielding layer 120 is provided in an electrically floating state, generation of parasitic capacitance between the light shielding layer 120 and the pixel electrode 106 can be suppressed. Furthermore, since the area of the overlapping portion between the narrow portions 113, 114, 115 of the source wiring 103 and the pixel electrode 106 is reduced, the parasitic capacitance between the source wiring 103 and the pixel electrode 106 can be suitably reduced. As a result, parasitic capacitance can be reduced to prevent crosstalk, and deterioration of image quality due to disorder of alignment of liquid crystal molecules can be prevented, so that contrast and display quality can be improved. In addition, since a black matrix is not required, the aperture ratio can be improved and the pitch between pixels can be narrowed, so that the display can be highly detailed.

<< Embodiment 2 of the Invention >>
FIG. 6 is a rear view of the liquid crystal display device S according to the second embodiment of the liquid crystal display device according to the present invention. In the following embodiments, the same portions as those in FIGS. 1 to 4 are denoted by the same reference numerals, and detailed description thereof is omitted.

  In the first embodiment, the light shielding layer 120 is provided so as to overlap the source wiring 103, whereas in the second embodiment, the light shielding layer 120 is provided so as to overlap the gate wiring 101.

  That is, as shown in FIG. 6, in each pixel, at least one side of the transmissive region T is partitioned by the gate wiring 101. On the substrate 10, a light shielding layer 120 is provided so as to overlap the gate wiring 101 and extend along the gate wiring 101 in an electrically floating state. A plurality of Cs wirings 102 that are capacitive wirings are provided on the substrate 10 so as to extend along the source wirings 103.

  The gate wiring 101 includes narrow portions 113, 114, 115 and wide portions 111, 112, similar to the source wiring 103 in the first embodiment. The narrow portions 113, 114, 115 are the first narrow portion 113 formed in the overlapping portion of the gate wiring 101 and the light shielding layer 120, and the second width formed in the overlapping portion of the source wiring 103 and the gate wiring 101. The narrow portion 114 and the third narrow portion 115 formed in the overlapping portion of the gate wiring 101 and the Cs wiring 102 are configured.

  On the other hand, the wide portions 111 and 112 correspond to the first wide portion 111 formed corresponding to the gap between the light shielding film 120 and the source wiring 103 or the Cs wiring 102, and the gap between the source wiring 103 and the Cs wiring 102. The second wide portion 112 formed in this manner.

  The wide portions 111 and 112 and the light shielding layer 120 are formed so as to overlap the outer peripheral portion of the pixel electrode 106. Further, part of each narrow portion 113, 114, 115 also overlaps the pixel electrode 106.

  Therefore, the same effects as those of the first embodiment can be obtained by the second embodiment. In each of the above embodiments, the transmissive region T is defined by both the gate wiring 101 and the source wiring 103, but it is sufficient that at least one side of the transmissive region T is defined by the gate wiring 101.

<< Embodiment 3 of the Invention >>
FIG. 7 shows Embodiment 3 of the liquid crystal display device according to the present invention. The first embodiment is a transmissive liquid crystal display device that performs transmissive display, while the third embodiment is an anti-transmissive (transmissive reflective type) liquid crystal display device.

  As shown in FIG. 7, the liquid crystal display device S includes a reflective region H in addition to the transmissive region T. The transmissive region is provided with the same pixel electrode 106 as in the first embodiment, while the reflective region H is provided with a reflective electrode 125 that reflects external light.

  In the transmissive region T, the outer peripheral portion of the pixel electrode 106 is provided so as to overlap the light shielding layer 120 and the wide portion 111 of the source wiring 103. Therefore, the same effects as those of the first embodiment can be obtained in the third embodiment.

<< Embodiment 4 of the Invention >>
In each of the above embodiments, the light shielding layer 120 is disposed below the source wiring 103 or the gate wiring 101, but as shown in FIG. 8 corresponding to FIG. 2 and FIG. 9 corresponding to FIG. The light shielding layer 120 may be disposed above the source wiring 103 or the gate wiring 101.

  That is, in the fourth embodiment, the light shielding layer 120 is formed above the source wiring 103 in the first embodiment.

  On the substrate 10, as shown in FIG. 8, the source wiring 103 is laminated with a thickness of 0.5 μm, for example. On the substrate 10 on which the source wiring 103 is laminated, an interlayer insulating film 109 made of silicon dioxide or the like is laminated with a thickness of 1 μm, for example. A light shielding layer 120 is formed on the interlayer insulating film 109 so as to overlap the source wiring 103. In FIG. 8, a light shielding layer 120 having a width a overlaps a narrow portion 113 having a width b in the source wiring 103 (a> b). In the region where the light shielding layer 120 is not provided, as shown in FIG. 9, the wide portion 111 of the source wiring 103 is formed with a width of 13 μm, for example.

  Further, an insulating film 110 made of a transparent resin material is laminated on the interlayer insulating film 109 on which the light shielding layer 120 is formed. The upper part of the insulating film 110 is formed in a plane, and the thickness of the insulating film 110 is, for example, 2.8 μm at a position where the light shielding layer 120 is not provided. A pixel electrode 106 is formed on the insulating film 110. An interval between adjacent pixel electrodes 106 is defined to be 3 μm, for example.

  Next, in the liquid crystal display device S of the present embodiment, the capacity per unit length of the portion where the light shielding layer 120 is provided is a liquid crystal simulator manufactured by autronic-melchers, similar to the first embodiment. The results of simulation with DIMOS are explained. Here, the results when the width of the light shielding layer 120 is a and the width of the narrow portion 113 of the gate wiring 101 is b are shown in Table 2.

(Table 2)
a (μm) − 13 13 13 13 15
b (μm) 13 9 7 5 3 3
Capacity (pF / m) 103.3 121.7 114.8 105.6 92.9 98.5
(ba) / 2-2 3 4 5 6

As shown in Table 2, ½ of the difference between the width b of the narrow portion 113 of the gate wiring 101 and the width a of the light shielding layer 120 (that is, one-side light shielding width c = (ba) / 2) is obtained. It was found that the effect of reducing parasitic capacitance can be obtained when the thickness is 4 μm or more and 5 μm or less. That is, when the one-side light-shielding width c is less than 4 μm, the capacity increases as compared with the case where the light-shielding layer 120 is not provided. On the other hand, when the one-side light-shielding width c exceeds 5 μm, the parasitic capacitance increases and the aperture ratio also decreases.

<< Other Embodiments >>
In the first embodiment, the wide portion 111, the narrow portion 113, and the light shielding portion 120 of the source wiring 103 are configured to overlap the outer peripheral portion of the pixel electrode 106. However, the present invention is not limited thereto, and the wide portion 111 is not limited thereto. In addition, the light shielding layer 120 may be configured to overlap the outer peripheral portion of the pixel electrode 106.

  As described above, the present invention is useful for a liquid crystal display device that performs transmissive display, and is particularly suitable for shielding the alignment disorder region of liquid crystal molecules in the vicinity of the outer periphery of the pixel electrode and improving the display quality. ing.

2 is an enlarged plan view showing the liquid crystal display device of Embodiment 1. FIG. It is the II-II sectional view taken on the line in FIG. It is the III-III sectional view taken on the line in FIG. It is the elements on larger scale of FIG. It is a graph which shows the change of the transmittance | permeability of a liquid crystal layer. It is a rear view which expands and shows the liquid crystal display device of Embodiment 2. It is a top view which expands and shows the liquid crystal display device of Embodiment 3. It is sectional drawing which expands and shows the cross section of the liquid crystal display device of Embodiment 4. It is sectional drawing which expands and shows the cross section of the liquid crystal display device of Embodiment 4. It is a top view which shows the conventional liquid crystal display device.

Explanation of symbols

S Liquid crystal display device T Transmission region 10 Substrate 101 Gate wiring 102 Cs wiring (capacitive wiring)
103 Source wiring 104 TFT (switching element)
106 Pixel electrode 110 Insulating film (insulating layer)
111 1st wide part 112 2nd wide part 113 1st narrow part 114 2nd narrow part 115 3rd narrow part 120 Light shielding layer

Claims (8)

A plurality of switching elements arranged in a matrix on the substrate;
A plurality of gate wirings connected to the switching element and extending parallel to each other on the substrate;
A plurality of source lines connected to the switching element and extending perpendicularly to the gate lines on the substrate;
A transmissive region for transmissive display formed in a region surrounded by the gate wiring and the source wiring;
A liquid crystal display device comprising a plurality of transparent pixel electrodes provided on an insulating layer on a substrate in the transmissive region and connected to each of the switching elements,
The transmission region is at least one side partitioned by the source wiring,
On the substrate, a light shielding layer that shields light incident from below is provided so as to overlap the source wiring in an electrically floating state.
The source wiring has a relatively narrow narrow portion formed in at least part of a portion overlapping with the light shielding layer or gate wiring, and a width formed in at least a portion not overlapping with the light shielding layer and gate wiring. With a relatively wide wide part,
The liquid crystal display device, wherein the wide portion and the light shielding layer overlap an outer peripheral portion of the pixel electrode. A plurality of switching elements arranged in a matrix on the substrate;
A plurality of gate wirings connected to the switching element and extending parallel to each other on the substrate;
A plurality of source lines connected to the switching element and extending perpendicularly to the gate lines on the substrate;
A transmissive region for transmissive display formed in a region surrounded by the gate wiring and the source wiring;
A liquid crystal display device comprising a plurality of transparent pixel electrodes provided on an insulating layer on a substrate in the transmissive region and connected to each of the switching elements,
The transmission region is at least one side partitioned by the gate wiring,
On the substrate, a light shielding layer that shields light incident from below is provided so as to overlap the gate wiring in an electrically floating state.
The gate wiring is formed in at least a part of a portion that overlaps the light shielding layer or the source wiring and has a relatively narrow width, and at least a width formed in a portion that does not overlap the light shielding layer and the source wiring. With a relatively wide wide part,
The liquid crystal display device, wherein the wide portion and the light shielding layer overlap an outer peripheral portion of the pixel electrode. In claim 1,
The liquid crystal display device, wherein the light shielding layer extends along a source wiring. In claim 2,
The liquid crystal display device, wherein the light shielding layer extends along a gate wiring. In claim 3 or 4,
The liquid crystal display device according to claim 1, wherein the side edge of the light shielding layer protrudes with a length of 2 μm or more and 5 μm or less in the width direction with respect to the side edge of the narrow portion overlapping the light shielding layer. In claim 3 or 4,
The liquid crystal display device, wherein the side edge of the light shielding layer is provided at a distance within ± 1 μm in the width direction with respect to the side edge of the wide portion overlapping the light shielding layer. In claim 1,
On the substrate, a capacitor wiring extending along the gate wiring is provided,
The liquid crystal display device, wherein the source wiring is formed so that a width of at least a part of a portion overlapping with the capacitor wiring is relatively narrow. In claim 2,
On the substrate, a capacitor wiring extending along the source wiring is provided,
The liquid crystal display device, wherein the gate wiring is formed so that a width of at least a part of a portion overlapping with the capacitor wiring is relatively narrow.

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