JP2005091406A - Liquid crystal display - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce variation in aperture ratio due to misalignment between an active substrate and a counter substrate in an active matrix type liquid crystal display device.
A leading end portion of a left extraction electrode portion 6a and a lower extraction electrode portion 6d of a storage capacitor electrode 6 are overlapped with a lower side portion of a pixel electrode 2 in a region other than a notch portion 7 therebetween. Further, the source electrode 17 is overlapped with almost the entire lower edge of the pixel electrode 2 in the notch 7 and the regions on both sides thereof. An upper edge of the source electrode 17 is disposed between the edge of the lower side of the pixel electrode 2 and the edge of the lower side of the opening portion 8 of the black mask, thereby causing misalignment between the active substrate 1 and the counter substrate. Variation of the aperture ratio due to the can be reduced.
[Selection] Figure 1

Description

  The present invention relates to a liquid crystal display device.

  In a conventional active matrix type liquid crystal display device, a thin film transistor having a plurality of pixel electrodes arranged in a matrix on the active substrate, a source electrode connected to each pixel electrode, and a gate electrode of each thin film transistor are scanned. A scanning line for supplying a signal, a data line for supplying a data signal to the drain electrode of each thin film transistor, and an auxiliary capacitance electrode for forming an auxiliary capacitance portion by overlapping each pixel electrode are provided ( For example, see Patent Document 1).

  In this Patent Document 1, the auxiliary capacitance electrode is formed by a horizontal portion parallel to the scanning line along the peripheral portion of the pixel electrode and a vertical portion perpendicular to the horizontal portion, and is cut out in the vicinity of the thin film transistor connected to the pixel electrode. It is formed in a substantially rectangular frame shape having a portion. In this case, the auxiliary capacitance electrode formed along the pixel electrode is overlapped with one side of the pixel electrode on each side, and the outer edge thereof is disposed outside the one side of the pixel electrode.

JP-A-8-220561

  By the way, in the liquid crystal display device, in order to prevent light leakage, a black mask is provided on the inner surface of the counter substrate disposed to face the active substrate. In this case, in a state where the active substrate and the counter substrate are bonded, in order to prevent light leakage, the edge of one side of the pixel electrode in the vicinity of the scanning line is at the same position as the edge of the opening of the corresponding black mask. Or it must be arranged outside (in the black mask). Accordingly, if the alignment accuracy when the active substrate and the counter substrate are bonded is 3 to 4 μm, for example, the edge of one side of the pixel electrode in the vicinity of the scanning line and the edge of the opening of the corresponding black mask It is necessary to set the interval at least as high as the alignment accuracy, that is, about 3 to 4 μm or more.

  In this case, although not shown in Patent Document 1, the opening of the black mask is positioned within the width of the auxiliary capacitance electrode on the scanning line side connected to the pixel electrode of the previous stage (or the subsequent stage). This is because the maximum misalignment between the active substrate and the counter substrate is 3 to 4 μm. If the black mask opening is positioned inside the auxiliary capacitance electrode by this misalignment, the aperture ratio is reduced. The capacitor electrode is formed of a light-shielding metal material, and the opening of the black mask is positioned within the width of the auxiliary capacitor electrode so that the end of the auxiliary capacitor electrode becomes the end of the light-shielding film. This is because the rate can be increased.

  Here, as described above, the opening of the black mask is not positioned within the width of the auxiliary capacitance electrode on the side of the auxiliary capacitance electrode facing the scanning line connected to the pixel electrode. When the scanning line approaches the parasitic capacitance Cgs between the gate and source of the thin film transistor, it is necessary to set the distance between the opposite side of the auxiliary capacitance electrode and the scanning line to about 3 μm. This is because when the opening of the black mask is positioned between the opposite side of the auxiliary capacitance electrode and the scanning line due to the shift, light leakage from both increases and the display quality deteriorates.

  Thus, on the scanning line side connected to the pixel electrode in the previous stage of the auxiliary capacitance electrode, the opposite side portion of the auxiliary capacitance electrode is the end of the light shielding film, and the scanning line side connected to the pixel electrode of the auxiliary capacitance electrode In this case, the opening portion of the black mask is used as the end portion of the light shielding film, thereby maintaining the balance between the increase in the aperture ratio and the reduction in the parasitic capacitance Cgs between the gate and the source.

  However, in such a structure in which the opposite side of the auxiliary capacitance electrode is the end of the light shielding film on the scanning line side connected to the pixel electrode in the previous stage of the auxiliary capacitance electrode, the end of the light shielding film on the scanning line side is aligned. The position is fixed without being affected by the shift, but on the scanning line side connected to the pixel electrode of the auxiliary capacitance electrode, the opening of the black mask is shifted by the misalignment amount with respect to the scanning line. The aperture ratio varies from panel to panel. That is, the conventional structure has a problem that the variation in aperture ratio due to misalignment between the active substrate and the counter substrate becomes relatively large.

  In view of the above, an object of the present invention is to provide a liquid crystal display device capable of reducing fluctuations in aperture ratio caused by misalignment between an active substrate and a counter substrate.

According to the first aspect of the present invention, a plurality of pixel electrodes arranged in a matrix, a thin film transistor having a source electrode connected to each pixel electrode, and a scanning line for supplying a scanning signal to the gate electrode of each thin film transistor In the liquid crystal display device, the auxiliary capacitance electrode includes a data line that supplies a data signal to the drain electrode of each thin film transistor, and an auxiliary capacitance electrode that forms an auxiliary capacitance portion by a portion overlapped with each pixel electrode. Is overlapped with a peripheral portion of the pixel electrode in a region other than the predetermined region near the gate electrode, and the source electrode is overlapped with at least one side of the pixel electrode in the predetermined region. Is.
According to a second aspect of the present invention, in the first aspect of the present invention, the source electrode is overlapped with substantially the entire length of one side of the pixel electrode.
According to a third aspect of the present invention, in the first or second aspect of the present invention, an edge of one side portion of the pixel electrode is disposed outside the corresponding auxiliary capacitance electrode. is there.
According to a fourth aspect of the present invention, in the third aspect of the present invention, an edge on the other side facing the one side of the pixel electrode of the source electrode is disposed inside the corresponding auxiliary capacitance electrode. It is characterized by that.

  According to the present invention, the storage capacitor electrode is overlaid on the periphery of the pixel electrode in a region other than the predetermined region near the gate electrode, and the source electrode is overlaid on at least one side of the pixel electrode in the predetermined region. Therefore, all of one side portion of the pixel electrode is overlapped with the storage capacitor electrode and the source electrode, and thereby variation in aperture ratio due to misalignment between the active substrate and the counter substrate can be reduced.

  FIG. 1 is a transparent plan view of a main part on the active substrate side of a liquid crystal display device as one embodiment of the present invention. On the active substrate 1, a plurality of pixel electrodes 2 arranged in a matrix, thin film transistors 3 connected to the respective pixel electrodes 2, and scanning lines 4 arranged in the row direction and supplying scanning signals to the respective thin film transistors 3. And a data line 5 that is arranged in the column direction and supplies a data signal to each thin film transistor 3, and an auxiliary capacitance electrode 6 that forms an auxiliary capacitance portion by a portion overlapped with each pixel electrode 2. Here, for the purpose of clarifying FIG. 1, diagonal short solid hatching is written at the edge of the pixel electrode 2.

  The auxiliary capacitance electrode 6 includes a common electrode portion 6a provided in parallel with the scanning line 4 at the preceding stage or the succeeding stage at a position corresponding to the upper side portion of the pixel electrode 2, and the left and right sides of the pixel electrode 2 from the common electrode portion 6a. The lead electrode portions 6b and 6c are led out along the portion, and the lead electrode portion 6d is led out along the lower side portion of the pixel electrode 2 from the tip portion of the right lead electrode portion 6c. The outer edges of the common electrode portion 6 a and the extraction electrode portions 6 b, 6 c, 6 d are arranged outside the pixel electrode 2, and the inner edges are arranged inside the pixel electrode 2. Further, a certain degree of notch 7 is provided between the tip of the left lead electrode 6b and the tip of the lower lead electrode 6d.

  Next, a specific structure on the active substrate 1 side will be described. FIG. 2 is a sectional view taken along line II-II in FIG. A scanning line 4 and a storage capacitor electrode 6 including a gate electrode 11 made of chromium, aluminum-based metal, or the like are provided at predetermined positions on the upper surface of the active substrate 1. A gate insulating film 12 made of silicon nitride is provided on the upper surface of the active substrate 1 including the gate electrode 11, the scanning line 4, and the auxiliary capacitance electrode 6. A semiconductor thin film 13 made of intrinsic amorphous silicon is provided at a predetermined position on the upper surface of the gate insulating film 12 on the gate electrode 11. A channel protective film 14 made of silicon nitride is provided at substantially the center of the upper surface of the semiconductor thin film 13.

  Ohmic contact layers 15 and 16 made of n-type amorphous silicon are provided on both sides of the upper surface of the channel protective film 14 and on the upper surface of the semiconductor thin film 13 on both sides thereof. A source electrode 17 made of a light-shielding metal material such as chromium or aluminum-based metal is provided at a predetermined location on the upper surface of one ohmic contact layer 15 and the upper surface of the gate insulating film 12. Details of the source electrode 17 will be described later. A data line 5 including a drain electrode 18 made of a light-shielding metal material such as chromium or aluminum-based metal is provided at predetermined positions on the upper surface of the other ohmic contact layer 16 and the upper surface of the gate insulating film 12. When the source electrode 17 and the drain electrode 18 are formed of the same material, productivity is improved.

  The thin film transistor 3 is constituted by the gate electrode 11, the gate insulating film 12, the semiconductor thin film 13, the channel protective film 14, the ohmic contact layers 15 and 16, the source electrode 17 and the drain electrode 18.

  An overcoat film 19 made of silicon nitride is provided on the upper surface of the gate insulating film 12 including the thin film transistor 3 and the like. A pixel electrode 2 made of ITO or the like is provided at a predetermined location on the upper surface of the overcoat film 19. The pixel electrode 2 is connected to the source electrode 17 through a contact hole 20 provided at a predetermined position of the overcoat film 19.

  Next, the source electrode 17 will be described. As shown in FIG. 1, one ohmic contact layer 15 under the source electrode 17 is provided from the upper surface of the channel protective film 14 to a position reaching the center of the notch 7. The source electrode 17 includes a main body portion 17a formed corresponding to the upper surface of one ohmic contact layer 15 and a light shielding portion 17b formed corresponding to the entire length of the lower side portion of the pixel electrode 2. Have.

  In this case, the light shielding portion 17 b of the source electrode 17 is overlapped with the left lead electrode portion 6 b inside the left side of the pixel electrode 2, and the right edge is overlapped with the right lead electrode portion 6 c inside the right side of the pixel electrode 2. The lower edge is arranged at substantially the same position as the lower edge of the pixel electrode 2, and the upper edge is located inside the inner edge of the lower extraction electrode portion 6d (in other words, the auxiliary capacitance electrode 6). (Between the extraction electrode portion 6d and an opening portion of a black mask described later).

  Here, in FIG. 1, a region surrounded by an alternate long and short dash line indicates an opening 8 of a black mask provided on the inner surface of a counter substrate (not shown) disposed to face the active substrate 1. When the active substrate 1 and the counter substrate are bonded together, the upper edge of the opening 8 is overlapped with the common electrode portion 6a inside the upper side of the pixel electrode 2 (positioned within the width of the common electrode portion 6a). ), The left edge is overlapped with the left lead electrode portion 6b inside the left side of the pixel electrode 2, and the right edge is overlapped with the right lead electrode portion 6c inside the right side of the pixel electrode 2. Is arranged above the upper edge of the source electrode 17.

  Since the lower edge of the extraction electrode portion 6d is arranged between the upper edge of the scanning line 4 and the lower edge of the pixel electrode 2, the electric lines of force between the scanning line 4 and the pixel electrode 2 Is weakened by the presence of the extraction electrode portion 6d, and therefore the gate-source parasitic capacitance Cgs of the thin film transistor caused by the parasitic capacitance between the scanning line 4 and the pixel electrode 2 can be reduced.

  Further, the lower end portion of the pixel electrode 2 in the region other than the notch portion 7 (a predetermined region in the vicinity of the gate electrode 11) of the leading electrode portion 6a on the left side of the auxiliary capacitance electrode 6 and the lower extraction electrode portion 6d. Since the source electrode 17 is overlapped with the cutout 7 and substantially the entire lower side of the pixel electrode 2 in the regions on both sides thereof, the auxiliary capacitor electrode 6 extends over the entire length of the lower side of the pixel electrode 2. Further, the fluctuation of the aperture ratio caused by the misalignment between the active substrate 1 and the counter substrate can be reduced.

  That is, even when the alignment accuracy when the active substrate 1 and the counter substrate are bonded is 3 to 4 μm, for example, between the edge of the lower side of the pixel electrode 2 and the edge of the lower side of the opening 8 of the black mask. Since the upper edge of the source electrode 17 is arranged, the interval S between the lower edge of the black mask opening 8 and the upper edge of the source electrode 17 is smaller than the above alignment accuracy of 3 to 4 μm.

  Here, if the amount of overlap L between the opening 8 of the black mask and the common electrode portion 6a of the auxiliary capacitance electrode 6 is L ≧ S, the opening area that fluctuates due to misalignment between the active substrate 1 and the counter substrate is black. The amount corresponds to the interval S between the lower edge of the mask opening 8 and the upper edge of the source electrode 17. Therefore, by reducing the distance S between the lower edge of the black mask opening 8 and the upper edge of the source electrode 17, fluctuations in the aperture ratio due to misalignment between the active substrate 1 and the counter substrate are reduced. can do. Note that the source electrode 17 may be overlapped with at least the lower side portion of the pixel electrode 2 in the notch portion 7.

  Here, the reason why the cutout portion 7 is provided between the distal end portion of the left extraction electrode portion 6b and the distal end portion of the lower extraction electrode portion 6d without forming the auxiliary capacitance electrode 6 in a ring shape will be described. When the auxiliary capacitance electrode 6 is formed in a ring shape without providing the notch portion 7, the source electrode 17 gets over the auxiliary capacitance electrode 6. In this case, if the width of the source electrode 17 in the crossover portion is relatively large, the parasitic capacitance between the source electrode 17 and the auxiliary capacitance electrode 6 in the crossover portion becomes large. On the other hand, when the width of the source electrode 17 in the overpass portion is made as small as possible, the parasitic capacitance between the source electrode 17 and the auxiliary capacitance electrode 6 in the overpass portion can be suppressed, but the source electrode 17 caused by the overstep difference is provided. It becomes easy to generate the cutting.

  Therefore, if the cutout portion 7 is provided between the distal end portion of the left extraction electrode portion 6b and the distal end portion of the lower extraction electrode portion 6d without forming the auxiliary capacitance electrode 6 in a ring shape, the cutout portion 7 is formed as a source electrode. 7, the parasitic capacitance between the source electrode 17 and the auxiliary capacitance electrode 6 in this portion can be prevented from increasing, and even if the source electrode 17 gets over the auxiliary capacitance electrode 6 in this portion. The source electrode 17 can be prevented from being cut.

1 is a transmission plan view of a main part on an active substrate side of a liquid crystal display device as one embodiment of the present invention. Sectional drawing in alignment with II-II of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Active substrate 2 Pixel electrode 3 Thin film transistor 4 Scan line 5 Data line 6 Auxiliary capacity electrode 7 Notch 8 Black mask opening 11 Gate electrode 12 Gate insulating film 13 Semiconductor thin film 14 Channel protective film 15, 16 Ohmic contact layer 17 Source electrode 18 Drain electrode 19 Overcoat film

Claims (4)

A plurality of pixel electrodes arranged in a matrix, a thin film transistor having a source electrode connected to each pixel electrode, a scan line for supplying a scan signal to the gate electrode of each thin film transistor, and a drain electrode of each thin film transistor In the liquid crystal display device including a data line for supplying a data signal and an auxiliary capacitance electrode forming an auxiliary capacitance portion by a portion overlapped with each of the pixel electrodes, the auxiliary capacitance electrode is a predetermined region near the gate electrode. A liquid crystal display device, wherein the liquid crystal display device is overlapped with a peripheral portion of the pixel electrode in a region other than the region, and the source electrode is overlapped with at least one side portion of the pixel electrode in the predetermined region. 2. The liquid crystal display device according to claim 1, wherein the source electrode is overlapped with substantially the entire length of one side of the pixel electrode. 3. The liquid crystal display device according to claim 1, wherein an edge of one side of the pixel electrode is disposed outside the corresponding auxiliary capacitance electrode. 4. The liquid crystal display according to claim 3, wherein an edge of the source electrode on the other side facing the one side of the pixel electrode is disposed inside the corresponding auxiliary capacitance electrode. apparatus.

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