JP2005080026A - Sampling clock generation circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a sampling clock generation circuit generating a sampling clock which is not affected by a phase inversion of a color burst signal based on the color burst signal. <P>SOLUTION: A color burst taking out portion 10 takes out a color burst signal 34 from a compound color video signal 30. A reference signal generator 12 synchronizes with rising and falling of a color subcarrier forming a color burst signal 34, and generates a reference signal 36 whose frequency becomes twice as high as the color subcarrier. A burst lock PLL circuit composed of a phase comparator 14, an LPF 16, a VCO 18 and a frequency divider 20 generates a sampling clock 44 synchronized with the reference signal 36 whose frequency is an integer times as high as the color burst signal 34. An A/D converter 2 samples the compound color video signal 30 based on the sampling clock 44 to be digitalized. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a sampling clock generation circuit that generates a sampling clock for sampling a composite color video signal such as an NTSC system or a PAL system.

  There are two methods for digitizing a composite color video signal of the NTSC system or PAL system from the viewpoint of sampling frequency. One is a method in which the sampling frequency is an integral multiple of the frequency of the color subcarrier (subcarrier) included in the composite color video signal. This method has been standardized by SMPTE (Society of Motion Picture and Television Engineers) 244M, etc., mainly for digital recording of composite color video signals in television (TV) broadcasting stations and composite color video signals in TV receivers. It is used when separating luminance signals and color signals (Y / C separation).

  The other is a method using 13.5 MHz as the sampling frequency. This method is standardized by ITU-R (International Telecommunication Union Radiocommunication Sector) Rec.BT.601, etc., 13.5 MHz, after separating the composite color video signal into luminance signal and color signal, sample the luminance signal It is used as a sampling frequency when converting. The sampling frequency of the color signal is 6.75 MHz. For example, in MPEG2, each of the luminance signal and the color signal is encoded. The sampling clock of 13.5 MHz is usually reproduced with reference to the horizontal synchronizing signal of the input video signal.

  In the above-described method of setting the sampling frequency to an integer multiple of the color subcarrier, a sampling clock is conventionally generated by a phase locked loop circuit (PLL circuit) of a burst lock type based on a color burst signal of a composite color video signal. It was. For example, when a composite color video signal is sampled at four times the frequency of the color subcarrier, the color burst signal multiplexed on each scanning line is extracted from the composite color video signal, and the color forming the extracted color burst signal A PLL circuit that oscillates at a frequency four times that of the color subcarrier is synchronized with the subcarrier, and a sampling clock that is synchronized with the phase of the color subcarrier forming the color burst signal and has a frequency four times that of the color subcarrier. It was generated. The sampling clock generation method using this burst lock PLL circuit has the advantage that it has higher stability and follows the phase change of the color burst signal at a higher speed than the method of generating 13.5 MHz based on the horizontal synchronization signal. Have.

JP 2000-287220 A JP 2001-94821 A

  However, when the color subcarrier forming the color burst signal loses phase continuity, the burst lock PLL circuit re-acquires the clock even when there is no phase shift in the horizontal synchronization signal.

  In the case of the NTSC system, the frequency of the color subcarrier is determined so that the phase of the color subcarrier is inverted every frame and makes a round in two frames. For example, in an apparatus that uses a frame synchronizer to synchronize the composite color video signal B with the composite color video signal A, and selects and uses either the composite color video signal A or the composite color video signal B by the video switcher, When the synchronizer performs only correction within one frame, when the video switcher switches the output from the video signal A to the video signal B, the horizontal sync signal and the vertical sync signal of the video signal B are switched. There are cases where the phase of the color subcarrier is inverted although it matches the previous video signal A.

  In the burst lock PLL circuit, when the phase of the color subcarrier forming the color burst signal is inverted, the clock is redrawn, so that the generated clock may be temporarily unstable. For this reason, for example, when A / D converting a color video signal using the sampling clock generated by this burst lock PLL circuit, when the phase of the color subcarrier is inverted, the video of the A / D converted video signal is displayed. There was a problem that disturbance occurred.

  The present invention eliminates the disadvantages of the prior art, and when generating a sampling clock based on a color burst signal, the sampling clock is not affected by the phase inversion even if the phase of the color burst signal is inverted. An object of the present invention is to provide a sampling clock generation circuit to be generated.

  In order to solve the above-mentioned problems, the present invention provides a color burst extraction means for extracting a color burst signal from a composite color video signal, and rising and falling edges of color subcarriers forming a color burst signal output from the color burst extraction means. And a phase locked loop circuit that generates a sampling clock that is synchronized with the reference signal generated by the reference signal generating means. It is characterized by that.

  In this case, the reference signal generation means includes a first pulse generation circuit that generates a first pulse synchronized with the rising edge of the color subcarrier forming the color burst signal, a phase inversion circuit that inverts the phase of the color burst signal, Combining a first pulse and a second pulse, a second pulse generating circuit for generating a second pulse synchronized with the rising edge of the color subcarrier forming the color burst signal output from the phase inversion circuit And a synthesis circuit for generating a reference signal.

  According to the present invention, a reference signal whose frequency is twice that of a color subcarrier is generated in synchronization with rising and falling of a color subcarrier forming a color burst signal included in a composite color video signal, and a phase locked loop Since the sampling clock that synchronizes with this reference signal is generated by the circuit, the continuity of the phase of the reference signal is maintained even when the phase of the color subcarrier forming the color burst signal is inverted. In the loop circuit, there is no need to perform re-drawing for clock recovery. Therefore, when the video signal is processed using this sampling clock, the processed video is not deteriorated due to the phase inversion of the color burst signal.

  Next, embodiments of a clock generation circuit according to the present invention will be described in detail with reference to the accompanying drawings. Referring to FIG. 1, the embodiment of the clock generation circuit according to the present invention generates a sampling clock 48 based on the color burst signal 34 of the composite color video signal 30 and supplies it to the A / D converter 2. A color burst sampling unit 10, a reference signal generation unit 12, a phase comparator 14, a low-pass filter (LPF) 16, a voltage controlled oscillator (VCO) 18 and a frequency divider 20 are provided.

  The color burst sampling unit 10 extracts a color burst signal 34 from an input composite color video signal 30 in accordance with a color burst sampling signal 32 supplied from the outside. The color burst sampling signal 32 is a burst flag generated based on the horizontal synchronization signal and the vertical synchronization signal synchronized with the composite color video signal 30, and is a pulse indicating a period in which the color burst signal 34 is superimposed. .

  Based on the color burst signal 34 output from the color burst sampling unit 10, the reference signal generation unit 12 connected to the color burst sampling unit 10 rises the color subcarrier (subcarrier) that forms the color burst signal 34 and In synchronization with the falling edge, a reference signal 36 having a frequency twice that of the color subcarrier is generated. FIG. 2 shows an embodiment of the reference signal generation unit 12, which includes a pulse generation circuit 100, a phase inversion circuit 102, a pulse generation circuit 104, and a synthesis circuit 106.

  In FIG. 2, the color burst signal 34 from the color burst sampling unit 10 is input to the pulse generation circuit 100 and the phase inversion circuit 102. As shown in FIGS. 3A and 3B, the pulse generation circuit 100 is a circuit that generates a pulse 108 synchronized with the rising edge of the color subcarrier forming the color burst signal 34. The pulse width of the pulse 108 is as follows. It is set to a value smaller than half of the color subcarrier period. As shown in FIG. 3C, the phase inversion circuit 102 inverts the phase of the color burst signal 34 and outputs it as the color burst signal 110.

  The pulse generation circuit 104 connected to the phase inversion circuit 102 is a circuit that generates a pulse 112 synchronized with the rising edge of the color subcarrier forming the color burst signal 110, as shown in FIGS. Yes, the pulse width of the pulse 112 is set to a value smaller than ½ of the period of the color subcarrier. Since the pulse 112 is synchronized with the fall of the color subcarrier forming the color burst signal 34, the fall of the color subcarrier forming the color burst signal 34 is substituted for the phase inversion circuit 102 and the pulse generation circuit 104. A pulse generation circuit that generates a pulse synchronized with the signal may be used.

  A combining circuit 106 connected to the pulse generating circuit 100 and the pulse generating circuit 104 combines the pulse 108 and the pulse 112 to generate the reference signal 36. Therefore, the reference signal 36 is synchronized with the rising and falling edges of the color subcarrier forming the color burst signal 34 and has a frequency twice that of the color subcarrier. Therefore, the phase of the reference signal 36 does not change even if the phase of the color subcarrier forming the color burst signal 34 is inverted.

  Returning to FIG. 1, the phase comparator 14, the low-pass filter (LPF) 16, the voltage controlled oscillator (VCO) 18, and the frequency divider 20 constitute a burst lock PLL circuit that generates a sampling clock 44 synchronized with the reference signal 36. To do. The phase comparator 14 compares the phase of the reference signal 36 supplied from the reference signal generator 12 and the comparison signal 46 supplied from the frequency divider 20 during the period when the color burst sampling signal 38 is supplied from the outside. A phase difference signal 40 whose amplitude changes according to the phase difference is output. However, the phase comparator 14 retains the phase difference signal 40 that was output immediately before the color burst sampling signal 38 is not supplied. The color burst sampling signal 38 is the same as the color burst sampling signal 32.

  The LPF 16 connected to the phase comparator 14 is a low-pass filter that integrates the phase difference signal 40 output from the phase comparator 14 and outputs this as a phase error voltage 42. The VCO 18 connected to the LPF 16 is a voltage controlled oscillator that generates a sampling clock 44 synchronized with the reference signal 36. Specifically, the comparison signal oscillates at a frequency that is an integral multiple of the color subcarrier, for example, eight times the color subcarrier, and is output from the frequency divider 20 based on the phase error voltage 42 provided from the LPF 16. The oscillation frequency is controlled so that 46 is phase-synchronized with the reference signal 36 output from the reference signal generator 12.

  The frequency divider 20 connected to the VCO 18 divides the frequency of the sampling clock 44 output from the VCO 18, generates a comparison signal 46 having the same frequency as the reference signal 36, and feeds back to the phase comparator 14. It is. For example, when the VCO 18 oscillates at a frequency eight times that of the color subcarrier, the frequency divider 20 divides the frequency of the sampling clock 44 by 1/4.

  As described above, the burst lock PLL circuit in this embodiment generates and outputs the sampling pulse 44 whose frequency is an integral multiple of the color burst signal 34 and whose phase is synchronized with the reference signal 36. The sampling pulse 44 is supplied to the A / D converter 2. The A / D converter 2 samples the input composite color video signal 30 based on the sampling pulse 44, and outputs a digitized composite color video signal 48.

  The operation of the embodiment shown in FIG. 1 will be described. The color burst sampling unit 10 extracts the color burst signal 34 from the input composite color video signal 30 and outputs it to the reference signal generation unit 12. The reference signal generator 12 generates a reference signal 36 whose frequency is twice that of the color subcarrier in synchronization with the rise and fall of the color subcarrier forming the color burst signal 34, and supplies this to the phase comparator 14. Output. The phase comparator 14 compares the phases of the reference signal 36 output from the reference signal generation unit 12 and the comparison signal 46 output from the frequency divider 20, and a phase difference signal 40 whose amplitude changes according to the phase difference. Is generated and output to LPF16.

  The LPF 16 integrates the phase difference signal 40 output from the phase comparator 14 and outputs the integrated signal to the VCO 18 as the phase error voltage 42. For example, the VCO 18 oscillates at a frequency eight times that of the color subcarrier forming the color burst signal 34 and outputs a sampling clock 44 whose frequency is eight times that of the color subcarrier. In this case, the VCO 18 oscillates so that the comparison signal 46 output from the frequency divider 20 is phase-synchronized with the reference signal 36 output from the reference signal generator 12 based on the phase error voltage 42 output from the LPF 16. Control the frequency. The sampling clock 44 output from the VCO 18 is input to the frequency divider 20 and the A / D converter 2.

  In this case, the frequency divider 20 divides the frequency of the sampling clock 44 by 1/4, generates a comparison signal 46 having the same frequency as the reference signal 36, and feeds it back to the phase comparator 14. As described above, the phase comparator 14 compares the phases of the reference signal 36 and the comparison signal 46 and generates the phase difference signal 40 whose amplitude changes according to the phase difference. In this way, the burst lock PLL circuit generates the sampling clock 44 having a frequency four times that of the reference signal 36 (eight times the color subcarrier) in synchronization with the reference signal 36. The A / D converter 2 samples and digitizes the composite color video signal 30 based on the sampling clock 44.

  Here, the reference signal 36 generated by the reference signal generation unit 12 is a signal whose frequency is twice that of the color subcarrier in synchronization with the rise and fall of the color subcarrier forming the color burst signal 34. The phase does not change even when the phase of the color burst signal 34 is inverted. Therefore, the sampling clock 44 generated by the burst lock PLL circuit with the reference signal 36 as a reference is not affected by the phase inversion of the color burst signal 34. Therefore, the video of the color video signal 48 sampled by the A / D converter 2 according to the sampling clock 44 is not disturbed even when the phase of the color burst signal 34 of the composite color video signal 30 is inverted.

  The sampling clock generation circuit according to the present invention can be applied to a video recording / reproducing device (D-2 VTR, D-3 VTR) conforming to SMPTE244M and an analog-digital conversion processing unit of a video transmission device.

It is a block diagram which shows the Example of the sampling clock generation circuit by this invention. FIG. 2 is a block diagram illustrating an example of a reference signal generation unit in the sampling clock generation circuit illustrated in FIG. 1. It is a figure which shows the output waveform of each circuit in the reference signal production | generation part shown in FIG.

Explanation of symbols

1 Sampling clock generator 2 A / D converter
10 Color burst sampling section
12 Reference signal generator
14 Phase comparator
16 LPF
18 VCO
20 divider

Claims (4)

Color burst sampling means for extracting a color burst signal from a composite color video signal;
Reference signal generation means for generating a reference signal whose frequency is twice that of the color subcarrier in synchronization with the rise and fall of the color subcarrier forming the color burst signal output from the color burst sampling means;
A sampling clock generation circuit comprising: a phase locked loop circuit that generates a sampling clock synchronized with the reference signal generated by the reference signal generation means. 2. The circuit according to claim 1, wherein the reference signal generation unit generates a first pulse synchronized with a rising edge of a color subcarrier forming a color burst signal;
A phase inversion circuit for inverting the phase of the color burst signal;
A second pulse generating circuit for generating a second pulse synchronized with a rising edge of a color subcarrier forming a color burst signal output from the phase inverting circuit;
A sampling clock generating circuit, comprising: a combining circuit that combines the first pulse and the second pulse to generate the reference signal.   2. The sampling clock generation circuit according to claim 1, wherein the phase-locked loop circuit generates a sampling clock whose frequency is an integer multiple of a color subcarrier forming the color burst signal.   2. The sampling clock generation circuit according to claim 1, wherein the phase-locked loop circuit generates a sampling clock for sampling the composite color video signal.

Images