JP2005072262A - CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF, ELECTRO-OPTICAL DEVICE, ELECTRONIC DEVICE - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a technique capable of ensuring a good connection state between a circuit chip and a wiring board.
A circuit board of the present invention includes a board (10) having wirings (20, 22), a circuit chip (16) including an electric circuit and disposed on the board, and a protrusion on one surface of the circuit chip. A plurality of first electrodes (18) that are in charge of electrical connection between the electric circuit and the wiring, and provided on one surface of the substrate so as to face each of the first electrodes. A plurality of second electrodes (24) responsible for electrical connection between the first electrode and the second electrode, and a conductivity that absorbs variations in the distance between the first electrode and the second electrode. And a relaxation layer (26).
[Selection] Figure 1

Description

  The present invention relates to an improvement in technology for mounting a circuit chip including an electric element such as a semiconductor element on a substrate.

  As a technique for mounting a circuit chip such as a semiconductor chip, a flip chip connection method is known. In the flip chip connection method, a protruding electrode (bump) is provided on the circuit chip side, the protruding electrode is aligned with a pad electrode on the wiring board, and face down bonding is performed, whereby the circuit chip is placed on the wiring board. Implement. According to the flip chip connection method, it is not necessary to route the wire as compared with the case of wire bonding, and compact mounting is possible. Such a technique is disclosed, for example, in documents such as JP-A-5-243330 (Patent Document 1) and JP-A-9-97816 (Patent Document 2).

  As a method for forming an electric element such as a semiconductor element, a technique using a transfer technique is known. For example, in Japanese Patent Laid-Open No. 10-125931 (Patent Document 3), a transfer body such as a circuit chip is previously formed on a transfer source substrate via a release layer, and then the circuit chip or the like is used as a transfer destination substrate. A technique is disclosed in which a transfer target such as a circuit chip is transferred to a transfer destination substrate by bonding and performing light irradiation or the like on the peeling layer to cause peeling. According to this method, a desired electronic device can be manufactured by forming a plurality of types of circuit chips having different manufacturing conditions on the transfer source substrate under optimum conditions and then moving the circuit chips to the transfer destination substrate. .

JP-A-5-243330 JP-A-9-97816 Japanese Patent Laid-Open No. 10-125931

  From the viewpoint of improving the yield of electronic products and ensuring reliability, it is an important issue how to ensure the connection between the circuit chip and the wiring board. However, it is not easy to uniformly form the thickness of the protruding electrode and the thickness (height) of the pad electrode. If the distance between the protruding electrode and the electrode pad becomes non-uniform due to such a variation in thickness of the protruding electrode or the like, it is difficult to reliably connect all of the connection portions. Such inconvenience is particularly noticeable when a thin film circuit chip is transferred onto a substrate by applying the transfer method described above. This is because when the transfer method is applied, it is difficult to apply the conventional mounting technique for a semiconductor chip or the like.

  Therefore, an object of the present invention is to provide a technique that makes it possible to ensure a good connection state between a circuit chip and a wiring board.

  The circuit board of the present invention includes a board having wiring, an electric circuit, a circuit chip disposed on the board, and a protrusion provided on one surface of the circuit chip, and an electric circuit between the electric circuit and the wiring. A plurality of first electrodes responsible for connection, a plurality of second electrodes provided on one surface of the substrate facing each of the first electrodes, and responsible for electrical connection between the wiring and the electrical circuit; A conductive relaxation layer is interposed between the electrode and the second electrode and has a function of absorbing variations in the distance between the first electrode and the second electrode.

  According to such a configuration, even when the distance between the first electrode (protruding electrode) and / or the second electrode (pad electrode) becomes uneven depending on each location due to variations in the thickness of the first electrode (projecting electrode) and / or the second electrode (pad electrode), Variations in distance are absorbed by the relaxation layer. As a result, it is possible to achieve reliable connection for all of the connection locations, and a good connection state between the circuit chip and the wiring board can be ensured. When the circuit chip is in the form of a thin film, it is difficult to perform the planarization process on the first electrode provided on one surface of the circuit chip, and the thickness of the first electrode is likely to be uneven. In such a case, the present invention is particularly effectively applied.

  The relaxation layer described above preferably has a different thickness depending on the distance between the first electrode and the second electrode. Thereby, the dispersion | variation in the mutual distance of a 1st electrode and a 2nd electrode is compensated more reliably.

In addition, the relaxation layer preferably has a lower hardness than the first electrode and the second electrode. More specifically, the hardness of the relaxation layer is preferably 50 or more and 200 or less when expressed as Vickers hardness Hv (kg / mm ² ). That is, a relatively soft layer is suitable as the relaxation layer. Thereby, during the manufacturing process, it becomes easy to change the thickness of the relaxation layer according to the distance between the first electrode and the second electrode to absorb the variation in the distance between them.

  The relaxation layer described above can be made of various materials as long as it has conductivity and satisfies the above-described hardness conditions. Such a relaxation layer may be made of, for example, one of gold, silver, lead, tin, cadmium, zinc, copper, iron, cobalt, palladium, nickel, rhodium, indium, antimony and platinum, or two or more thereof. It can be formed by an alloy containing. Examples of the alloy include various types such as nickel-gold, copper-tin, nickel-gold-copper-tin, and lead-tin. Such a relaxation layer can be easily formed by, for example, a plating method. A suitable relaxation layer can be obtained by adopting these materials.

  Moreover, it is preferable to further include an anisotropic conductive material that includes conductive particles and is interposed between the circuit chip and the substrate. In this case, it is more preferable that the conductive particles contained in the anisotropic conductive material are disposed between the first electrode and the second electrode while being partially buried in the relaxation layer. Thereby, it becomes possible to further improve the reliability of connection between the first electrode and the second electrode.

  It is more preferable that the anisotropic conductive material described above also has a function as a fixing material. As a result, the connection strength between the circuit chip and the substrate can be further increased.

  The present invention is also an electro-optical device including the circuit board described above. The term “electro-optical device” as used herein refers to a general display device that includes an electro-optical element that emits light by electrical action or changes the state of light from the outside. The device that emits light by itself and the passage of light from the outside Including those that control For example, as an electro-optical element, a liquid crystal element, an electrophoretic element having a dispersion medium in which electrophoretic particles are dispersed, an EL (electroluminescence) element, and an electron emitting element that emits light by applying electrons generated by applying an electric field to a light emitting plate An active matrix display device or the like.

  The present invention is also an electronic apparatus including the above-described circuit board or electro-optical device. Here, the “electronic device” refers to a general device having a circuit board and other elements and having a certain function, and the configuration thereof is not particularly limited. Examples of such electronic devices include an IC card, a mobile phone, a video camera, a personal computer, a head mounted display, a rear or front projector, a television (TV), a roll-up TV, and a fax machine with a display function. Examples include digital camera finders, portable TVs, DSP devices, PDAs, electronic notebooks, electronic bulletin boards, and advertising announcement displays.

  The method for manufacturing a circuit board according to the present invention includes a first step of forming a circuit chip having a plurality of protruding first electrodes, a second step of forming a substrate having wiring, and a plurality of first electrodes facing each other. A third step of forming a plurality of second electrodes to be disposed on the wiring; and a conductive relaxation layer to be interposed between the first electrode and the second electrode on the first electrode and / or the second electrode. The fourth step to be formed is aligned with the first electrode and the second electrode, and the relaxation layer is pushed so that the thickness of the relaxation layer changes according to the distance between the first electrode and the second electrode. And a fifth step of disposing the circuit chip on the substrate while applying pressure. The first step, the second step, and the third step can be performed in parallel or by changing the order.

  According to such a manufacturing method, even if the distance between the first electrode and / or the second electrode is not uniform depending on the location due to the variation in the thickness of the first electrode and / or the second electrode, the relaxation layer is formed according to the variation in the mutual distance. The circuit chip is mounted while the variation in the distance is absorbed by changing the thickness of the circuit chip. As a result, it is possible to achieve reliable connection for all of the connection locations, and a good connection state between the circuit chip and the wiring board can be ensured. The manufacturing method of the present invention is particularly effectively applied when the circuit chip is a thin film.

  In the manufacturing method of the present invention, it is more preferable to employ the transfer method described above for the formation of the circuit chip. In this case, in the first step described above, the circuit chip is formed on the transfer source substrate. In the fifth step, the circuit chip is mounted by peeling the circuit chip formed on the transfer source substrate from the transfer source substrate and transferring it to the upper surface of the insulating film. For this transfer process, for example, a transfer method described in Patent Document 3 described above can be adopted. When the circuit chip is mounted using such a transfer method, the manufacturing method of the present invention is particularly effective.

  In the fourth step described above, the relaxation layer may be formed so that the thickness of the relaxation layer becomes larger than the variation width of the distance between the first electrode and the second electrode. Thereby, the dispersion | variation in the mutual distance of a 1st electrode and a 2nd electrode is compensated more reliably. For the formation of the relaxation layer in the fourth step, for example, a plating method can be employed.

  Prior to the fifth step described above, a sixth step of forming on the circuit chip and / or the substrate an anisotropic conductive material containing conductive particles and to be interposed between the circuit chip and the substrate. It is preferable that it is further included. In this case, in the fifth step, when a pressing force is applied to the relaxation layer so that the conductive particles are partially buried in the relaxation layer and disposed between the first electrode and the second electrode. Good. Thereby, it becomes possible to further improve the reliability of connection between the first electrode and the second electrode.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a diagram (sectional view) illustrating the structure of a circuit board according to an embodiment. The circuit board shown in FIG. 1 is obtained by mounting a circuit chip including electronic elements such as semiconductor elements on a wiring board having multilayer wiring. 2 and 3 are diagrams for explaining in detail the connection location between the wiring board and the circuit chip.

  The substrate 10 is a base (base) for the circuit board. Various substrates such as a glass substrate and a plastic substrate can be used as the substrate 10. Further, as the substrate 10, a flexible substrate made of various resin materials such as polyimide can be used.

The insulating films 12 and 14 constitute a multilayer wiring together with the wirings 20 and 22. These insulating films 12 and 14 are films made of an insulator and are used to electrically insulate the wirings from each other. As the insulator, various materials such as silicon dioxide (SiO ₂ ), silicon nitride (Si ₃ N ₄ ), phosphorus silicate glass (PSG), boron phosphorus silicate glass (BPSG), or an organic polymer material may be used. it can.

  Note that although a circuit board including multilayer wiring is shown in this example, the embodiment is not limited to this, and it is sufficient that at least one wiring layer is provided.

  The circuit chip 16 includes an electric circuit configured using active elements such as transistors and diodes and passive elements such as resistors, capacitors, and inductors, and is disposed on the substrate 10 (on the insulating film 14 in this example). . The electric circuit included in the circuit chip 16 is electrically connected to the wiring 22 via the protruding electrode 18 and further via the pad electrode 24. In the present embodiment, a thin film circuit chip including a thin film circuit composed of a thin film element such as a thin film transistor is used as the circuit chip 16. Such a circuit chip 16 is mounted using a transfer technique, for example. Details of the manufacturing process using the transfer technique will be described later.

  The protruding electrode (first electrode) 18 is provided in a protruding shape on one surface of the circuit chip 16 and is responsible for electrical connection between the electric circuit in the circuit chip 16 and the wirings 20 and 22. The protruding electrode 18 is made of a conductor such as nickel (Ni), gold (Au), copper (Cu), or tin (Sn). The size of the protruding electrode 18 can be set as appropriate for design and other reasons, and is set to about 20 μm to 100 μm square, for example.

  The wirings 20 and 22 constitute a multilayer wiring together with the insulating film 12 and the like as described above. These wirings 20 and 22 are made of a conductor such as aluminum (Al) or copper (Cu). In addition, electrical connection is established between each wiring and between the wiring 22 and the pad electrode 24 via a plug (buried electrode) buried in the contact hole.

  The pad electrode (second electrode) 24 is provided on one side of the substrate 10 (on the insulating film 14 in this example) so as to be opposed to each of the protruding electrodes 18, and is connected to the wirings 20 and 22 and the circuit chip 16. Responsible for electrical connection with the included electrical circuits. The pad electrode 24 is made of a conductor such as nickel (Ni), gold (Au), copper (Cu), or tin (Sn).

  The relaxing layer 26 is electrically conductive and has a function of interposing between the bump electrode 18 and the pad electrode 24 to absorb variations in the distance between them. As shown in FIG. 2, in this example, the thickness of the plurality of protruding electrodes 18 is mainly non-uniform, and due to the non-uniform thickness, there is a gap between the protruding electrode 18 and the pad electrode 24. There is a variation ΔT in the distance. The relaxation layer 26 has a different thickness as shown in the drawing in order to absorb the variation in the distance between the protruding electrode 18 and the pad electrode 24.

The relaxing layer 26 is formed to have a lower hardness than the bump electrode 18 and the pad electrode 24. More specifically, the hardness of the relaxation layer 26 is preferably 50 or more and 200 or less when expressed by Vickers hardness Hv (kg / mm ² ). Thereby, during the manufacturing process described later, it becomes easy to change the thickness of the relaxing layer 26 in accordance with the distance between the bump electrode 18 and the pad electrode 24 to absorb the variation in the distance between them.

  Various materials can be used for the relaxing layer 26 as long as it has conductivity and satisfies the above-described hardness conditions. The relaxation layer 26 includes, for example, any one or more of gold, silver, lead, tin, cadmium, zinc, copper, iron, cobalt, palladium, nickel, rhodium, indium, antimony, and platinum. Formed by an alloy. Examples of the alloy include various types such as nickel-gold, copper-tin, nickel-gold-copper-tin, and lead-tin. Such a relaxation layer 26 can be easily formed by, for example, a plating method. By adopting these materials, a suitable relaxation layer 26 can be obtained.

  The anisotropic conductive material 28 includes conductive particles 30 and is interposed between the circuit chip 16 and the substrate 10 (insulating film 14 in this example). The anisotropic conductive material 28 of the present embodiment also functions as a fixing material that increases the connection strength between the circuit chip 16 and the substrate 10. The conductive particles 30 include a metal core itself (nickel alone, gold-plated nickel, etc.), a resin core (styrene, acrylic, etc.), or an insulating coating that breaks and melts by heat or pressure outside these cores. There are various types such as those applied, for example, a substantially spherical one having a particle diameter of about several μm to several tens μm is used. The conductive particles 30 are moderately dispersed in the anisotropic conductive material 28. As shown in FIG. 3, in this embodiment, the conductive particles 30 included in the anisotropic conductive material 28 are disposed between the protruding electrode 18 and the pad electrode 24 while being partially buried in the relaxation layer 26. . Thereby, it is possible to further improve the reliability of the electrical connection between the protruding electrode 18 and the pad electrode 24.

  The circuit board according to the present embodiment has such a configuration. Next, a method for manufacturing the circuit board will be described. In the present embodiment, the circuit chip 16 is mounted using a transfer method.

  4 and 5 are diagrams for explaining a method of manufacturing a circuit board according to the present embodiment. First, as shown in FIG. 4A, a circuit chip 16 is formed on a transfer source substrate 60 prepared separately from the above-described substrate 10 via a release layer 62. At this time, the protruding electrode 18 is also formed.

  Here, it is preferable to adopt a translucent substrate for the transfer source substrate 60 so that energy can be applied to the release layer 62 later by light irradiation. The transfer source substrate 60 is preferably made of a highly reliable material, and particularly preferably made of a material having excellent heat resistance. The reason is that, for example, when forming the circuit chip 16 as a transfer target, the process temperature may be high depending on the type and forming method, but even in that case, the transfer source substrate 60 is excellent in heat resistance. This is because, when the circuit chip 16 is formed on the transfer source substrate 60, the range of film formation conditions such as the temperature condition is widened. Thus, when a large number of circuit chips are manufactured on the transfer source substrate, a desired high-temperature treatment can be performed, and highly reliable elements and circuits can be manufactured with high reliability. Since the transfer source substrate 60 can be used repeatedly unlike the transfer destination substrate which is the final product, even if a relatively expensive material is used, an increase in manufacturing cost can be reduced by repeated use. is there.

  The peeling layer 62 has a property of causing a change in state by application of energy and causing peeling (hereinafter referred to as “in-layer peeling” or “interfacial peeling”) in the layer and / or the interface. More preferably, in the release layer 62, the bonding force between atoms or molecules of the substance constituting the release layer 62 disappears or decreases due to light irradiation, that is, ablation occurs to cause internal separation and / or interfacial separation. The one that leads to is good. Furthermore, the gas may be released from the release layer 62 by light irradiation, and a separation effect may be exhibited. That is, there are a case where the component contained in the release layer 62 is released as a gas, and a case where the release layer 62 absorbs light and becomes a gas for a moment, and its vapor is released, contributing to separation. . Examples of the composition of the peeling layer 62 include (A) amorphous silicon, (B) various oxide ceramics such as silicon oxide or silicate compound, titanium oxide or titanate compound, ferroelectric or semiconductor, (C ) Ceramics or dielectrics such as PZT, PLZT, PLLZT, PBZT, (D) Nitride ceramics such as silicon nitride, aluminum nitride, titanium nitride, (E) Organic polymer materials such as polyethylene, polyimide, polyamide, polyester, F) Metals including Al, Li, Ti and the like. In this embodiment, the peeling layer 62 is formed of amorphous silicon.

  One or more circuit chips 16 are formed on the transfer source substrate 60 with the release layer 62 interposed therebetween. When a circuit element such as a thin film transistor is manufactured, a certain high temperature process is required. Therefore, the transfer source substrate 60 needs to satisfy various conditions. In the manufacturing method using the transfer technique, it is possible to manufacture the circuit chip 16 using the transfer source substrate 60 that satisfies various manufacturing conditions and then transfer the circuit chip 26 to a final substrate that does not satisfy the manufacturing conditions. That is, in the present manufacturing method, a substrate made of a cheaper material can be used as the substrate 10 as the final substrate, and the manufacturing cost can be reduced. Further, since the substrate 10 does not need to withstand a high temperature process, a plastic substrate, a flexible substrate, or the like can be used, and the range of selection of the substrate 10 is widened.

  Further, as shown in FIG. 4B, a substrate 10 having a multilayer wiring composed of the insulating films 12 and 14 and the wirings 20 and 22 is formed. As a specific method of forming the multilayer wiring, various known methods can be employed. As described above, it is sufficient that the wiring has at least one layer. In that case, the wiring 22 is formed on the substrate 10, and then an insulating film that insulates the wirings 22 is formed as necessary.

  Next, as shown in FIG. 4C, a plurality of pad electrodes 24 to be arranged to face each of the plurality of protruding electrodes 18 are formed at predetermined positions on the wirings 20 and 22. These pad electrodes 24 can be formed by forming a conductor film on the insulating film 14 by sputtering, for example, and then patterning the conductor film into a desired shape.

  Next, as shown in FIG. 4D, a conductive relaxation layer 26 to be interposed between the bump electrode 18 and the pad electrode 24 is formed on at least one of them. In this embodiment, the relaxing layer 26 is formed only on the pad electrode 24, but it may be formed on the protruding electrode 18. These relaxing layers 26 are preferably formed by depositing a conductor such as gold, silver or tin on the surface of the bump electrode 18 by using, for example, a plating method. The relaxing layer 26 is formed so that the thickness thereof is larger than the variation width ΔT (see FIG. 3) of the distance between the protruding electrode 18 and the pad electrode 24. For example, when the variation width ΔT of the distance between the protruding electrode 18 and the pad electrode 24 is about 2 μm due to the manufacturing conditions and the like, the relaxing layer 26 has a thickness larger than this variation width (for example, about 3 μm). ).

  Next, as shown in FIG. 5A, an anisotropic conductive material 28 to be interposed between the circuit chip 16 and the substrate 10 is formed on the circuit chip 18 and / or the substrate 10. In this embodiment, the anisotropic conductive material 28 is formed on the substrate 10 (on the insulating film 14). As the anisotropic conductive material 28, a fluid anisotropic conductive paste is preferably used, but an anisotropic conductive film formed in a film shape may be used.

  Next, as shown in FIG. 5B, the protruding electrode 18 and the pad electrode 24 are aligned, and the circuit chip 16 is disposed on the substrate 10. At this time, a pressing force is applied to the relaxing layer 26 so that the thickness of the relaxing layer 26 changes according to the distance between the protruding electrode 18 and the pad electrode 24. In this embodiment, a pressing force is applied to the relaxation layer 26 by pressing the circuit chip 16 toward the substrate 10 via the transfer source substrate 60. As a result, the circuit chip 16 is mounted while absorbing the variation in the distance by changing the thickness of the relaxation layer 26 according to the variation in the distance between the bump electrode 18 and / or the pad electrode 24 due to the variation in the thickness. Can be performed. Furthermore, in the present embodiment, the relaxing layer 26 is such that the conductive particles 30 included in the anisotropic conductive material 28 are partially buried in the relaxing layer 26 and disposed between the protruding electrode 18 and the pad electrode 24. A pressing force is applied to.

  In parallel with the application of the pressing force to the relaxing layer 26, a process of transferring the circuit chip 16 from the transfer source substrate 60 onto the substrate 10 is performed. Specifically, by selectively irradiating the release layer 62 corresponding to the circuit chip 16 to be transferred from the transfer source substrate 60 side of the joined body of the transfer source substrate 60 and the transfer destination substrate 10, Peeling (in-layer peeling and / or interfacial peeling) is caused in the peeling layer 62 that supports the circuit chip 16 to be transferred. Thereafter, the transfer source substrate 60 is removed from the substrate 10 by applying a force to the transfer source substrate 60 and the transfer destination substrate 10 in a direction to separate them. As a result, the circuit chip 16 is transferred to a desired position on the substrate 10, and the circuit substrate of this embodiment is completed as shown in FIG. 5C.

  The principle that peeling in the release layer 62 and / or interfacial peeling occurs is that the constituent material of the release layer 62 is ablated, the gas contained in the release layer 62 is released, and further, the melting occurs immediately after irradiation. This is due to phase change such as transpiration. Here, the ablation means that the fixing material that absorbs the irradiation light (the constituent material of the peeling layer 62) is excited photochemically or thermally, and the surface or internal atom or molecule bond is cut and released. In general, all or part of the constituent material of the release layer 62 appears as a phenomenon that causes a phase change such as melting or transpiration (vaporization). In addition, the phase change may result in a fine foamed state, and the bonding force may be reduced. Whether the release layer 62 causes in-layer release, interfacial release, or both depends on the composition of the release layer 62 and various other factors. Conditions such as type, wavelength, intensity, and reaching depth are listed. Irradiation light may be anything as long as it causes in-layer peeling and / or interfacial peeling in the peeling layer 62, and examples thereof include X-rays, ultraviolet rays, visible light, infrared rays, and laser light. In particular, a laser beam is preferable in that peeling (ablation) of the peeling layer 62 is easily caused and local irradiation with high accuracy is possible.

  As described above, the circuit board according to the present embodiment has such a mutual distance even when the distance between the bump electrode 18 and / or the pad electrode 24 becomes uneven depending on each portion due to variations in the thickness of the bump electrode 18 and / or the pad electrode 24. The variation is absorbed by the relaxation layer 26. As a result, it is possible to achieve reliable connection for all of the connection portions, and a good connection state between the circuit chip 16 and the wirings 20 and 22 on the substrate 10 side can be ensured.

  The circuit board according to the present embodiment can be applied to various electro-optical devices (display devices) such as an organic EL display device, a liquid crystal display device, and an electrophoretic display device. A configuration example of an organic EL display device configured using the circuit board of the present embodiment will be described below.

  FIG. 6 is a diagram (sectional view) showing a configuration example of the organic EL display device using the circuit board according to the present embodiment. In the organic EL display device shown in FIG. 6, the circuit board 100 according to the present embodiment and the display element substrate 110 including the organic EL element 112 are arranged to face each other, and the two are electrically connected by the conductive member 114. It is configured. An inert gas or the like is appropriately filled between the circuit board 100 and the display element substrate 110. In this organic EL display device, the organic EL element 112 on the display element substrate 110 side is driven by the circuit chip 16 on the circuit board 100 side. For example, the illustrated organic EL element 112 is made up of a set of three to constitute one pixel, and a pixel drive circuit corresponding to one pixel is included in one circuit chip 16.

  FIG. 7 is a circuit diagram showing an example of an electric circuit (driving circuit for organic EL elements) included in the circuit chip 16. In FIG. 7, an example of a drive circuit corresponding to one organic EL element 112 is shown within a dotted line. Note that the scanning line 130, the signal line 132, the power supply line 134, and the capacitor line 136 correspond to any of the wirings 20 included in the circuit board described above.

  The driving circuit shown in FIG. 7 includes a switching thin film transistor 120, a driving thin film transistor 122, and a storage capacitor 124, and has a function of controlling a current flowing through the organic EL element 112. Specifically, a control voltage is supplied from the signal line 132 and the voltage is stored in the storage capacitor 124 via the switching thin film transistor 120. The driving thin film transistor 122 has a gate voltage controlled according to the voltage sampled by the switching thin film transistor 120, controls the amount of current supplied from the power supply line 134 and flows into the organic EL element 112, and changes the light emission state of the organic EL element 112. Control.

  In this example, the circuit chip 16 including the pixel driving circuit has been described. However, peripheral circuits such as a driver for controlling the operation of the pixel driving circuit may be configured by the circuit chip 16.

  8 and 9 are diagrams illustrating examples of electronic apparatuses to which the above-described electro-optical device can be applied. FIG. 8A shows an application example to a cellular phone. The cellular phone 230 includes an antenna portion 231, an audio output portion 232, an audio input portion 233, an operation portion 234, and the electro-optical device 200 of the present invention. . As described above, the electro-optical device according to the invention can be used as a display unit. FIG. 8B shows an application example to a video camera. The video camera 240 includes an image receiving unit 241, an operation unit 242, an audio input unit 243, and the electro-optical device 200 of the present invention.

  FIG. 8C shows an application example to a portable personal computer (so-called PDA). The computer 250 includes a camera unit 251, an operation unit 252, and the electro-optical device 200 according to the present invention. FIG. 8D shows an application example to a head mounted display. The head mounted display 260 includes a band 261, an optical system storage unit 262, and the electro-optical device 200 according to the present invention.

  FIG. 8E shows an application example to a rear projector. The projector 270 includes a housing 271, a light source 272, a composite optical system 273, mirrors 274 and 275, a screen 276, and the electro-optical device 200 according to the invention. It has. FIG. 8F shows an application example to a front type projector. The projector 280 is provided with an optical system 281 and the electro-optical device 200 according to the present invention in a housing 282 so that an image can be displayed on a screen 283. .

  FIG. 9A shows an application example to a television, and the television 300 includes the electro-optical device 200 according to the present invention. The electro-optical device according to the present invention can be similarly applied to a monitor device used for a personal computer or the like. FIG. 9B shows an application example to a roll-up television, and the roll-up television 310 includes the electro-optical device 200 according to the present invention.

  The electro-optical device according to the invention is not limited to the above-described example, and can be applied to any electronic apparatus to which a display device such as an organic EL display device or a liquid crystal display device can be applied. For example, in addition to these, it can also be used for a fax machine with a display function, a finder for a digital camera, a portable TV, an electronic notebook, an electric bulletin board, a display for advertisements, and the like.

  The present invention is not limited to the contents of the above-described embodiments, and various modifications can be made within the scope of the gist of the present invention. For example, in the above-described embodiment, the electro-optical device has been described as an application example of the circuit board according to the present invention. However, the present invention can be applied to various electronic devices (for example, IC cards). is there.

  In the above-described embodiment, the circuit chip 16 is mounted on the substrate 10 using the transfer method. However, the circuit chip 16 mounting method is not limited to this, and other methods are employed. May be.

It is a figure explaining the structure of the circuit board of one Embodiment. It is a figure explaining the connection location of a wiring board and a circuit chip in detail. It is a figure explaining the connection location of a wiring board and a circuit chip in detail. It is a figure explaining the manufacturing method of a circuit board. It is a figure explaining the manufacturing method of a circuit board. It is a figure which shows the structural example of the organic electroluminescent display apparatus using a circuit board. It is a circuit diagram which shows an example of the electric circuit contained in a circuit chip. It is a figure which shows the example of the electronic device which can apply an electro-optical apparatus. It is a figure which shows the example of the electronic device which can apply an electro-optical apparatus.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Board | substrate, 12, 14 ... Insulating film, 16 ... Circuit chip, 18 ... Projection electrode (1st electrode), 20, 22 ... Wiring, 24 ... Pad electrode (2nd electrode), 26 ... Relaxation layer, 28 ... Different Isotropic conductive material, 30 ... conductive particles

Claims (14)

A substrate having wiring;
A circuit chip comprising an electrical circuit and disposed on the substrate;
A plurality of first electrodes provided in a protruding shape on one surface of the circuit chip and responsible for electrical connection between the electrical circuit and the wiring;
A plurality of second electrodes provided on one surface of the substrate so as to face each of the first electrodes, and responsible for electrical connection between the wiring and the electric circuit;
A conductive relaxation layer interposed between the first electrode and the second electrode and absorbing variations in the distance between the first electrode and the second electrode;
A circuit board comprising the circuit board.   The circuit board according to claim 1, wherein the thickness of the relaxation layer varies depending on a distance between the first electrode and the second electrode.   The circuit board according to claim 1, wherein the relaxation layer has a hardness lower than that of the first electrode and the second electrode.   The circuit board according to claim 3, wherein the relaxation layer has a Vickers hardness of 50 or more and 200 or less.   The relaxation layer is made of gold, silver, lead, tin, cadmium, zinc, copper, iron, cobalt, palladium, nickel, rhodium, indium, antimony, platinum, or an alloy containing two or more thereof. The circuit board according to claim 3 or 4.   The circuit board according to claim 5, wherein the relaxation layer is formed by a plating method. Comprising an electrically conductive particle, further comprising an anisotropic conductive material interposed between the circuit chip and the substrate,
The circuit board according to claim 1, wherein the conductive particles are disposed between the first electrode and the second electrode while being partially buried in the relaxation layer.   An electro-optical device configured to include the circuit board according to claim 1.   An electronic device comprising the circuit board according to claim 1. A first step of forming a circuit chip having a plurality of protruding first electrodes;
A second step of forming a substrate having wiring;
A third step of forming, on the wiring, a plurality of second electrodes to be disposed opposite to each of the plurality of first electrodes;
Forming a conductive relaxation layer to be interposed between the first electrode and the second electrode on the first electrode and / or the second electrode;
The first electrode and the second electrode are aligned, and the pressing force is applied to the relaxing layer so that the thickness of the relaxing layer changes according to the distance between the first electrode and the second electrode. A fifth step of placing the circuit chip on the substrate while providing
A method for manufacturing a circuit board, comprising: In the first step, the circuit chip is formed on a transfer source substrate,
The method of manufacturing a circuit board according to claim 10, wherein the fifth step is performed by peeling the circuit chip formed on the transfer source substrate from the transfer source substrate and transferring the circuit chip onto the upper surface of the insulating film. .   11. The circuit according to claim 10, wherein in the fourth step, the relaxation layer is formed so that a thickness of the relaxation layer is larger than a variation width of a distance between the first electrode and the second electrode. A method for manufacturing a substrate.   The circuit board manufacturing method according to claim 10, wherein in the fourth step, the relaxation layer is formed by a plating method. Prior to the fifth step, a sixth anisotropic conductive material containing conductive particles and to be interposed between the circuit chip and the substrate is formed on the circuit chip and / or the substrate. Further comprising a step,
11. In the fifth step, the conductive particles are partially buried in the relaxation layer by applying a pressing force to the relaxation layer and disposed between the first electrode and the second electrode. A method for manufacturing a circuit board according to claim 1.