JP2005057136A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high performance (high reliability) semiconductor device in which unstable operation is suppressed and unnecessary radiation can be reduced.
A semiconductor chip provided with a semiconductor circuit pattern (formed in a semiconductor circuit pattern portion (102)) on a semiconductor substrate (101) and a cap (113) provided to cover at least the semiconductor circuit pattern. ), And an adhesive film (113c) is provided as a conductive portion including a conductive material on at least a part of the cap side wall portion (113b). Thus, by providing a conductive part in the cap (113), a sufficient electromagnetic shielding effect can be obtained and reliability can be improved.
[Selection] Figure 2

Description

  The present invention relates to a semiconductor device, and more particularly to a semiconductor device used in microwaves such as an X band region (8 GHz to 12 GHz) and a Ku band region (12 GHz to 18 GHz).

  In a semiconductor device used in a high frequency region such as an X band region or a Ku band region, miniaturization, cost reduction, and high performance are required. Along with this, miniaturization, cost reduction, and high performance are also required for packages in semiconductor devices.

  Conventionally, a ceramic substrate is used as a chip carrier in a package for mounting a semiconductor chip. Specifically, a configuration in which a semiconductor chip is electrically connected to an electrode formed on a ceramic substrate using a bonding wire and the semiconductor chip is sealed with a resin cap has been used.

  As another conventional example, a package not using a ceramic substrate has been proposed (see, for example, Patent Document 1). Such a conventional package will be specifically described with reference to FIGS. 15 and 16.

FIG. 15 is an exploded perspective view showing the entire conventional semiconductor device, and FIG. 16 is a cross-sectional view of the conventional semiconductor device. As shown in FIG. 15, in this conventional semiconductor device, an interdigital transducer electrode 1002 and an extraction electrode 1003 are provided on a piezoelectric substrate 1001. The insulating cap 1004 is provided with a concave portion 1005 having substantially the same area as the vibration functional surface including the interdigital transducer electrode 1002 and its peripheral portion at a position corresponding to the vibration functional surface. Further, the cap 1004 is provided with a notch 1006 at a position corresponding to the extraction electrode 1003. The cutout portion 1006 exposes the extraction electrode 1003 and allows a bonding wire to be attached. In FIG. 15, reference numeral 1007 denotes an adhesive (sealing agent) applied to the surface of the piezoelectric substrate 1001 and is used for hermetically sealing the vibration function surface. By aligning the cap 1004 on the piezoelectric substrate 1001 as shown by the arrow shown in FIG. 15 and sealing with the sealant 1007, the inside of the recess 1005 of the cap 1004 becomes an airtight hollow portion (see FIG. 16). As described above, the surface acoustic wave element is mounted by providing a hermetically sealed hollow portion on the vibration function surface without using a ceramic package.
JP-A-9-512247

  However, in the conventional package, since the semiconductor chip is sealed with an insulating material such as resin, the electromagnetic shielding function when the high-frequency semiconductor chip is mounted is insufficient. For this reason, the unstable operation of the semiconductor device due to the influence of high-frequency radio waves has been a problem. Also, unnecessary radiation from the semiconductor device has been a problem.

  A semiconductor device according to the present invention is a semiconductor device including a semiconductor chip provided with a semiconductor circuit pattern on a semiconductor substrate and a cap provided so as to cover at least the semiconductor circuit pattern. A conductive part including a conductive material is provided at least in part.

  According to the semiconductor device of the present invention, even when a high-frequency semiconductor circuit is provided, the occurrence of unstable operation can be suppressed, and further, unnecessary radiation can be suppressed, so that a high-performance (high reliability) semiconductor can be obtained. A device can be realized.

  In the semiconductor device of the present invention, a conductive portion is provided on at least a part of a side wall portion of a cap provided so as to cover at least the semiconductor circuit pattern. Thereby, since the electromagnetic shielding effect with respect to a high frequency electric wave is acquired, generation | occurrence | production of unstable operation can be suppressed and also unnecessary radiation can be suppressed.

  In the semiconductor device of the present invention, the cap may include an adhesive film for joining the cap to the semiconductor chip, and at least a part of the adhesive film may be the conductive portion. Thereby, a conductive part can be easily provided in a cap.

  In the semiconductor device of the present invention, the conductive portion may be formed of a mixture of an insulating material and the conductive material, or an insulating film made of an insulating material and a conductive film made of the conductive material. And may be formed of a multilayer film including

  In the semiconductor device of the present invention, in the semiconductor chip, it is preferable that a groove is formed in a region on the side where the semiconductor circuit pattern is provided with respect to a joint portion with the cap. According to this configuration, the alignment accuracy when the semiconductor chip and the cap are bonded is improved, and even when a voltage is applied when the cap is bonded, an unnecessary radio wave resonance phenomenon due to the voltage, etc. The influence of can be suppressed. Furthermore, the resistance to static electricity generated when the cap is bonded can be enhanced.

  In the semiconductor device of the present invention, a circuit element may be provided on the inner surface of the cap, and the circuit element may be electrically connected to the semiconductor circuit pattern. According to this configuration, for example, when the semiconductor chip is an element that constitutes the high-frequency front-end unit of the transmission unit or the reception unit, the filter and the antenna unit can be built in the semiconductor device, thereby realizing a reduction in size and cost. it can.

  In the semiconductor device of the present invention, it is preferable that a radio wave absorber is provided on at least a part of the inner surface of the cap. This is because the element operation can be prevented from becoming unstable due to the resonance phenomenon caused by the transmission radio wave in the space surrounded by the cap.

  In the semiconductor device of the present invention, it is preferable that a hygroscopic material is provided on at least a part of the inner surface of the cap. This is for improving moisture resistance.

  In the semiconductor device of the present invention, in the cap, a region other than the conductive portion may be formed of an insulating material, and in the cap, at least a portion other than the conductive portion is formed of glass. It is preferable that

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Embodiment 1)
One embodiment of a semiconductor device of the present invention will be described with reference to FIGS. 1 is a top view of the semiconductor device of the present embodiment, FIG. 2 is a cross-sectional view taken along the line II of FIG. 1, and FIG. 3 is a bottom view of the semiconductor device of the present embodiment. In the top view shown in FIG. 1, the cap upper portion 113a shown in FIG. 2 is not shown for easy understanding of the semiconductor device of the present embodiment. In this specification, the upper surface of the semiconductor device refers to a surface of the semiconductor device on which a semiconductor circuit pattern is provided, and the lower surface refers to a surface facing the upper surface.

  As shown in FIG. 1, the semiconductor device of the present embodiment includes a semiconductor chip in which a semiconductor circuit pattern portion 102 is provided on a semiconductor substrate 101 such as a GaAs substrate. As a semiconductor circuit pattern, for example, a two-stage amplifier circuit (not shown) using two high electron mobility transistors (hereinafter referred to as HEMT (High Electron Mobility Transistor)) is formed. On the semiconductor substrate 101, an input signal pad 103, an output signal pad 104, a first gate bias pad 105, a second gate bias pad 106, a first drain bias pad 107, and a second drain bias are further provided. A pad 108 and a grounding pad 110 are provided. Each of the terminal pads 103 to 108 and 110 is electrically connected to a HEMT provided in the semiconductor circuit pattern unit 102. Further, in the present embodiment, in order to realize a semiconductor device that performs electrical connection to a carrier without using a bonding wire, specifically, a semiconductor substrate is provided at a position corresponding to each of the terminal pads 103 to 108, 110. A signal terminal via hole 109 and a grounding via hole 111 penetrating through 101 are formed by dry etching or wet etching, and electrodes electrically connected to the via holes 109 and 111 are formed on the lower surface. As shown in FIG. 3, on the lower surface of the semiconductor device, a signal input back electrode 116, a signal output back electrode 117, a ground back electrode 118, a first drain bias back electrode 114, and a second drain bias back electrode. 115, a first gate bias back electrode 119 and a second gate bias back electrode 120 are provided. In this way, by using a via hole and a configuration in which a bonding wire is not used, the package can be made small, so that the semiconductor device can be miniaturized.

  As shown in FIG. 2, the semiconductor device of this embodiment is provided with a cap 113 so as to cover the semiconductor circuit pattern portion 102. The cap 113 includes a cap upper portion 113a, a cap side wall portion 113b, and an adhesive film 113c. The cap 113 is bonded to the semiconductor substrate 101 of the semiconductor chip by the adhesive film 113c. The adhesive film 113 c includes a conductive material and functions as a conductive portion of the cap 113. Thus, by providing the cap 113 with the conductive portion, an electromagnetic shielding effect against high-frequency radio waves can be obtained, so that unstable operation of the semiconductor device can be prevented even when a high-frequency semiconductor circuit is provided. . In addition, unnecessary radiation from the semiconductor device can be reduced.

  The cap 113 is preferably formed using an insulating material such as resin or glass from the viewpoint of productivity such as ease of molding and cost. As the resin, for example, an epoxy resin can be used. In addition, it is preferable to form the cap side wall portion 113b from glass, because the flatness of the surface of the cap side wall portion 113b in contact with the adhesive film 113c can be increased and good characteristics such as moisture resistance can be obtained. Moreover, the cap upper part 113a and the cap side wall part 113b may be integrally formed with the same material, and may be formed with a mutually different material. For example, when both the cap upper part 113a and the cap side wall part 113b are formed of glass, the cap upper part 113a and the cap side wall part 113b can be formed by processing glass using a method such as etching.

  The adhesive film 113c may be formed of a mixture of an insulating material and a conductive material, and is formed of a multilayer film in which an insulating film made of an insulating material and a conductive film made of a conductive material are stacked. It may be.

  When the adhesive film 113c is formed of a mixture of an insulating material and a conductive material, the insulating material includes an epoxy resin, a resin mixed with a filler such as aluminum nitride, a polymer, a glass frit (solidifying agent), and the like. Can be used. As the conductive material, a metal material such as Ag, Ti, Au, Pt, Ni, Al, Pd, W, Cu, AuSn, or a mixed material thereof can be used, and Ag particles are preferably used. Specifically, for example, particles made of a conductive material are dispersed in an insulating material to prepare a mixture, and the uncured mixture is bonded to the bonding surface of the cap sidewall 113b or the cap sidewall 113b of the semiconductor substrate 101. The cap side wall portion 113b is superposed on the semiconductor substrate 101, and then the mixture is cured to bond the cap side wall portion 113b and the semiconductor substrate 101 together. As a curing method of the mixture, for example, when a thermosetting type is used as the insulating material, it is cured by heating, and when a thermoplastic type is used as the insulating material, it is softened by heating. Reduce the temperature to cure. In this case, the thickness of the adhesive film 113c is preferably 0.1 μm to 10 μm.

  On the other hand, when the adhesive film 113c is formed of a multilayer film of an insulating film and a conductive film, the insulating film can be formed of SiN, SiO, benzocyclobutene (BCB), polyimide, or the like, and the conductive film is made of Au, Ti. , Pt, Ag, Ni, Al, Pd, W, Cu, AuSn, or the like. If the adhesive film 113c is produced in this way, the adhesive strength and moisture resistance can be improved. In this case, for example, a multilayer film of an insulating film and a conductive film is formed in advance in a region to which the cap side wall 113b is bonded in the semiconductor substrate 101, and then the cap side wall 113b is bonded together, thereby forming the cap side wall 113b. And the semiconductor substrate 101 are bonded together. In this case, as a method of joining the cap side wall 113b and the multilayer film on the semiconductor substrate 101, a method of heating using an adhesive (in some cases, applying pressure (thermocompression bonding)), a method of joining by anodic bonding, A method of bonding by eutectic bonding, a method of bonding by glass frit bonding, or the like can be used. The anodic bonding is a bonding used for bonding glass to a metal, a semiconductor, or the like, and can be formed by generating a large electrostatic attraction between the glass and the metal, a semiconductor, or the like by heating and applying a voltage. Therefore, it can be suitably used when the cap side wall 113b is made of glass. For example, when AuSn is used for the conductive film, the eutectic bonding can be formed by melting AuSn by heating. Glass frit bonding can be formed by mixing a metal powder as a conductive material into an organic binder such as glass frit (solidifying agent), metal oxide, or resin and heating. The thickness of the conductive film is preferably 0.1 μm to 10 μm.

  As described above, when the cap 113 is bonded to the semiconductor substrate 101, the cap 113 formed in advance is bonded to the semiconductor substrate 101, or the cap side wall 113b is bonded to the semiconductor substrate 101, and then the upper cap 113a is attached. For example, a method of integrating with the cap side wall 113b can be used. As for the assembly of the semiconductor device corresponding to the mass production process, a method of dicing by laser irradiation after bonding a wafer on which a semiconductor chip is formed and a wafer on which a cap is formed can be applied.

  4 to 6 are views showing a state in which the semiconductor device of the present embodiment is practically mounted on a substrate such as a ceramic substrate, FIG. 4 is a top view, and FIG. 5 is II-II in FIG. 6 is a top view of the ceramic substrate (plan view of the surface on which the semiconductor device is mounted). In the top view shown in FIG. 4, the cap upper portion 113a shown in FIG. 5 is not shown for easy understanding of the semiconductor device of the present embodiment.

  As shown in FIGS. 4 to 6, on a ceramic substrate 121, a signal input electrode 122, a signal output electrode 123, a first gate bias electrode 124, a second gate bias electrode 125, and a first drain bias electrode. 126, a second drain bias electrode 127, and a ground surface electrode 128 are formed. The semiconductor device shown in FIGS. 1 to 3 is mounted on the ceramic substrate 121 with the positions of the back electrodes 114 to 120 (see FIG. 3) and the electrodes 122 to 128 on the ceramic substrate 121 aligned. The grounding surface electrode 128 of the ceramic substrate 121 on which the semiconductor device of the present embodiment is mounted is electrically connected to the grounding back electrode 130 through the grounding through hole 129.

(Embodiment 2)
Another embodiment of the semiconductor device of the present invention will be described with reference to FIGS. FIG. 7 is a top view of the semiconductor device of the present embodiment, and FIG. 8 is a cross-sectional view taken along the line III-III in FIG. In the top view shown in FIG. 7, the cap upper portion 113a shown in FIG. 8 is not shown for easy understanding of the semiconductor device of the present embodiment.

  As shown in FIGS. 7 and 8, in the semiconductor device of the present embodiment, in the semiconductor substrate 101, a groove 131 is formed in a region on the semiconductor circuit pattern portion 102 side with respect to a bonding portion used for bonding to the cap 113. Is formed. That is, in the present embodiment, the groove 131 is formed in the semiconductor substrate 101 along the inner periphery of the cap side wall 113b. Note that the semiconductor device of this embodiment has the same configuration as that of the semiconductor device of Embodiment 1 except that the groove 131 is provided. For this reason, description other than the groove | channel 131 is abbreviate | omitted here.

  The groove 131 can be formed by etching the semiconductor substrate 101, for example. By providing such a groove 131, the alignment accuracy when the cap 113 is bonded to the semiconductor substrate 101 is improved. Further, even when a voltage is applied when the cap 113 is bonded, the groove 131 can suppress the influence of the voltage on the semiconductor circuit (such as an unnecessary radio wave resonance phenomenon). Further, by providing the groove 131, the breakdown resistance of the semiconductor device against static electricity generated when the cap 113 is bonded can be enhanced.

(Embodiment 3)
Another embodiment of the semiconductor device of the present invention will be described with reference to FIGS. FIG. 9 is a top view of the semiconductor device of the present embodiment, and FIG. 10 is a cross-sectional view taken along the line IV-IV in FIG. In the top view shown in FIG. 9, in order to clearly show the semiconductor device of this embodiment, the cap upper portion 113a and the passive circuit pattern (circuit element) provided on the cap upper portion 113a shown in FIG. 134 is not represented.

  In the semiconductor device of the present embodiment, bumps 132 are formed on at least one grounding pad 110 and bumps 133 are formed on the output signal pad 104. Furthermore, a passive circuit pattern 134 such as an antenna and a filter is formed on the inner surface (the surface facing the semiconductor chip) of the cap upper portion 113a. The passive circuit pattern 134 is electrically connected to the semiconductor circuit formed in the semiconductor circuit pattern portion 102 via the bump 133 when the cap 113 is bonded. The configuration other than the point that the bumps 132 and 133 and the passive circuit pattern 134 are provided, and the point that the signal terminal via hole and the signal output back electrode that are electrically connected to the output signal pad 104 are not provided. Is the same as the semiconductor device of the first embodiment.

  According to the configuration in which the passive circuit pattern 134 is provided on the inner surface of the cap 113 as described above, when the semiconductor chip to be mounted is an element constituting the high frequency front end portion of the transmission unit or the reception unit, the filter and the antenna unit are provided. It can be built in a semiconductor device and can be reduced in size and cost.

(Embodiment 4)
Another embodiment of the semiconductor device of the present invention will be described with reference to FIG. FIG. 11 is a cross-sectional view of the semiconductor device of this embodiment.

  As shown in FIG. 11, in the semiconductor device of the present embodiment, a radio wave absorber 135 is provided on the inner surface of a cap 113 (cap side wall portion 113b and cap upper portion 113a). Other configurations are the same as those of the semiconductor device of the first embodiment.

  In the case where the semiconductor chip is an element constituting the transmission unit, the internal space surrounded by the cap upper part 113a and the cap side wall part 113b may destabilize the element operation due to the resonance phenomenon caused by the transmission radio wave. By providing the radio wave absorber 135 on the inner surface of the cap 113 as in the form, this phenomenon can be prevented.

  As the radio wave absorber 135, for example, a material in which a filler or powder such as ferrite, carbon, copper, or the like, which is a magnetic material, is mixed with an epoxy resin or a polymer can be used, and these are applied to the inner surface of the cap 113. Can be formed.

As shown in FIG. 11, in this embodiment, the radio wave absorber 135 is applied to the entire inner surface of the cap 113, but it may be applied to at least a part of the inner surface of the cap 113. In addition, if a hygroscopic material is applied to the inner surface of the cap 113, the moisture resistance can be improved. As the hygroscopic material, for example, silica mainly composed of SiO ₂ (silica gel), a mixture containing silica, or the like can be used.

(Embodiment 5)
Still another embodiment of the semiconductor device of the present invention will be described with reference to FIGS. 12 is a top view of the semiconductor device of the present embodiment, FIG. 13 is a cross-sectional view taken along the line VV of FIG. 12, and FIG. 14 is a bottom view of the semiconductor device of the present embodiment.

  As shown in FIGS. 12 to 14, the semiconductor device according to the present embodiment uses a ceramic substrate 141 as a chip carrier. The semiconductor chip is mounted on the ceramic substrate 141 and covers the entire semiconductor chip. The cap 113 is provided. The configuration of the semiconductor chip in the present embodiment is the same as that of the semiconductor chip used in the semiconductor device of the first embodiment.

  On the ceramic substrate 141, the first gate bias back electrode 119, the second gate bias back electrode 120, the first drain bias back electrode 114, and the second drain bias back electrode 115 of the semiconductor chip (see FIG. 3). ), A first gate bias electrode (not shown), a second drain bias electrode (not shown), and a second drain bias at positions corresponding to An electrode (not shown) is provided. Further, as shown in FIG. 13, on the ceramic substrate 141, the signal input electrode 142, the signal input back electrode 116, the signal output back electrode 117, and the ground back electrode 118 on the semiconductor chip, A signal output electrode 143 and a ground surface electrode 144 are provided. As shown in FIGS. 13 and 14, these electrodes provided on the ceramic substrate 141 are connected to the back electrode of the ceramic substrate 141 (the back electrode for signal input 146, the back electrode for signal output 147, and the grounding electrode) as shown in FIGS. Back electrode 148, first gate bias back electrode 149, second gate bias back electrode 150, first drain bias back electrode 151 and second drain bias back electrode 152).

  Further, in the present embodiment, the cap 113 is provided so as to surround the entire semiconductor chip, and the cap side wall 113b is bonded to the ceramic substrate 141 to seal the semiconductor chip. The material used for the cap 113 and the specific configuration of the cap 113 are the same as those described in the first embodiment. As for the method of bonding the cap 113 to the ceramic substrate 141, the same method as that described in the case of bonding the cap 113 to the semiconductor substrate 101 in the first embodiment can be used.

  Further, even when the cap 113 is provided so as to cover the entire semiconductor chip as in the present embodiment, a configuration in which circuit elements are provided on the inner surface of the cap 113 as described in Embodiment 3, or A configuration in which a radio wave absorber and a hygroscopic material are provided on the inner surface of the cap 113 as described in Embodiment 4 can be applied as appropriate.

  In the semiconductor devices of Embodiments 1 to 5 described above, the conductive portion is provided in the cap 113 by forming the adhesive film 113c of the cap 113 with a conductive material; however, the present invention is not limited to this configuration. For example, it is possible to cause the cap side wall portion 113b to function as a conductive portion by forming the cap side wall portion 113b of a conductive material, and at least a part of the adhesive film 113c and the cap side wall portion 113b are not used. A conductive material may be used.

  Since the semiconductor device of the present invention can obtain a sufficient electromagnetic shielding function, high performance (reliability improvement) can be realized, and it can be applied to a high-frequency semiconductor device.

It is a top view which shows the semiconductor device of Embodiment 1 of this invention. It is II sectional drawing of FIG. It is a bottom view which shows the semiconductor device of Embodiment 1 of this invention. It is a top view which shows the state which mounted the semiconductor device of Embodiment 1 of this invention on the board | substrate. It is II-II sectional drawing of FIG. It is a top view of the board | substrate with which the semiconductor device of Embodiment 1 of this invention was mounted. It is a top view which shows the semiconductor device of Embodiment 2 of this invention. It is III-III sectional drawing of FIG. It is a top view which shows the semiconductor device of Embodiment 3 of this invention. It is IV-IV sectional drawing of FIG. It is sectional drawing which shows the semiconductor device of Embodiment 4 of this invention. It is a top view which shows the semiconductor device of Embodiment 5 of this invention. It is VV sectional drawing of FIG. It is a bottom view which shows the semiconductor device of Embodiment 5 of this invention. It is a disassembled perspective view which shows the conventional semiconductor device. It is sectional drawing of the conventional semiconductor device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 Semiconductor substrate 102 Semiconductor circuit pattern part 103 Signal input pad 104 Signal output pad 105 1st gate bias pad 106 2nd gate bias pad 107 1st drain bias pad 108 2nd drain bias pad 109 For signal terminals Via hole 110 Grounding pad 111 Grounding via hole 113 Cap 113a Cap upper part 113b Cap side wall 113c Adhesive film 114 First drain bias back electrode 115 Second drain bias back electrode 116 Signal input back electrode 117 Signal output back electrode 118 Ground back electrode 119 First gate bias back electrode 120 Second gate bias back electrode 121 Ceramic substrate 122 Signal input electrode 123 Signal output electrode 124 First Electrode for gate bias 125 Electrode for second gate bias 126 Electrode for first drain bias 127 Electrode for second drain bias 128 Surface electrode for ground 129 Grounding through hole 131 Groove 132, 133 Bump 134 Passive circuit pattern 135 Radio wave absorber 141 Ceramic Substrate 142 Signal input electrode 143 Signal output electrode 144 Ground surface electrode 145 Through hole 146 Signal input back electrode 147 Signal output back electrode 148 Ground back electrode 149 First gate bias back electrode 150 Second gate bias Back electrode 151 Back electrode for first drain bias 152 Back electrode for second drain bias

Claims (10)

A semiconductor device comprising: a semiconductor chip provided with a semiconductor circuit pattern on a semiconductor substrate; and a cap provided so as to cover at least the semiconductor circuit pattern,
A semiconductor device, wherein a conductive portion including a conductive material is provided on at least a part of a side wall portion of the cap. The cap includes an adhesive film for bonding the cap to the semiconductor chip;
The semiconductor device according to claim 1, wherein at least a part of the adhesive film is the conductive portion.   The semiconductor device according to claim 1, wherein the conductive portion is formed of a mixture of an insulating material and the conductive material.   The semiconductor device according to claim 1, wherein the conductive portion is formed of a multilayer film including an insulating film made of an insulating material and a conductive film made of the conductive material.   The semiconductor device according to claim 1, wherein in the semiconductor chip, a groove is formed in a region on a side where a semiconductor circuit pattern is provided with respect to a joint portion with the cap. A circuit element is provided on the inner surface of the cap;
The semiconductor device according to claim 1, wherein the circuit element is electrically connected to the semiconductor circuit pattern.   The semiconductor device according to claim 1, wherein a radio wave absorber is provided on at least a part of the inner surface of the cap.   The semiconductor device according to claim 1, wherein a hygroscopic material is provided on at least a part of the inner surface of the cap.   The semiconductor device according to claim 1, wherein a region other than the conductive portion is formed of an insulating material in the cap.   The semiconductor device according to claim 1, wherein at least a part of the cap other than the conductive portion is made of glass.

Images