JP2005038908A - Photoelectric transducer, its manufacturing method and solid state imaging element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To secure a wide area of a photoelectric conversion region in a photoelectric transducer like a solid state imaging element. <P>SOLUTION: The photoelectric transducer is provided with a photoelectric conversion region 3, a transparent semiconductor region 24 which is formed on the photoelectric conversion region 3 and optically transparent, and optically transparent treatment portions Tr1-Tr4 which are formed in the transparent semiconductor region 24 and process charge cumulated on the photoelectric conversion region 3. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a photoelectric conversion device that converts light into electric charge and processes the converted electric charge as a signal, and a manufacturing method thereof.
The present invention relates to a solid-state imaging device having a photoelectric conversion unit for each pixel.
[0002]
[Prior art]
Conventionally, as a solid-state image sensor, for example, a CCD solid-state image sensor or a CMOS solid-state image sensor is known. A CMOS solid-state imaging device having a charge-signal conversion unit for each pixel has many advantages such as easy XY address reading. Usually, a unit pixel in a CMOS type solid-state imaging device has a light-receiving sensor unit composed of a photodiode that photoelectrically converts and accumulates signal charges on a semiconductor substrate, and a plurality of drives that read out the charges from the light-receiving sensor unit and convert them into signals. And a MOS transistor. On the semiconductor substrate on which the pixels are formed, a plurality of opaque metal wiring layers such as an Al film are formed via an interlayer insulating film so that an opening is formed in a portion corresponding to the light receiving sensor portion. Furthermore, as a photodiode, in order to reduce noise (dark current) generated at the interface between the semiconductor region surface and the insulating film, a hole accumulation region is provided at the interface between the n-type region and the surface insulating film constituting the photodiode. Become p ⁺ A structure in which a semiconductor layer is formed is formed. This photodiode sensor is called a HAD (Hole Accumulation Diode) sensor.
[0003]
Patent Document 1 illustrates a CMOS solid-state imaging device.
[0004]
[Patent Document 1]
JP-A-11-122532
[0005]
[Problems to be solved by the invention]
By the way, the CMOS type solid-state imaging device has the following problems. (1) Since it is necessary to provide a plurality of driving MOS transistors including a charge-signal conversion MOS transistor or the like for each pixel, the area of the light receiving sensor portion, that is, a so-called photoelectric conversion region is narrowed. (2) In order to increase the photoelectric conversion area, if the number of driving MOS transistors is reduced, the charge of the light receiving sensor portion is not directly read out to the floating diffusion but directly connected to the amplifier. Can be considered. However, in this case, it becomes a solid-state imaging device in which noise (dark current) is likely to be generated, for example, it becomes difficult to make the photodiode constituting the light receiving sensor portion into HAD. (3) Since a plurality of opaque metal wiring layers are stretched over the light receiving sensor portion, the aperture ratio is lowered.
[0006]
The problem of the area of the light receiving sensor portion (photoelectric conversion region) in the pixel also exists in the CCD solid-state imaging device. Furthermore, it is desired to reduce smear components in CCD solid-state imaging devices.
[0007]
Improvement of the opening area of the photoelectric conversion region described above is desired in a photoelectric conversion device such as a solid-state imaging device that converts light into electric charge and processes the converted electric charge as a signal.
[0008]
In view of the above, the present invention provides a photoelectric conversion device capable of ensuring a large area of a photoelectric conversion region, a manufacturing method thereof, and a solid-state imaging device.
[0009]
[Means for Solving the Problems]
The photoelectric conversion device according to the present invention processes a photoelectric conversion region, an optically transparent transparent semiconductor region formed on the photoelectric conversion region, and charges accumulated in the photoelectric conversion region formed in the transparent semiconductor region. And an optically transparent processing section.
[0010]
The processing unit can be formed as a processing unit that converts charges into current or voltage. Further, the processing unit can be formed as a processing unit that transfers charges. Further, the processing portion can be formed by including a processing portion that converts charges into current or voltage and a processing portion that transfers charges.
[0011]
In the photoelectric conversion device of the present invention, the photoelectric conversion region has a transparent semiconductor region on the photoelectric conversion region, and the transparent semiconductor region has an optically transparent charge processing unit. Therefore, the photoelectric conversion region in which incident light is transmitted through the transparent semiconductor region. To reach. For this reason, the photoelectric conversion region can be expanded without being restricted by the charge processing unit.
[0012]
A method for manufacturing a photoelectric conversion device according to the present invention includes a step of forming an optically transparent transparent semiconductor region on a substrate on which a photoelectric conversion region is formed, and an optically transparent semiconductor element structure in the transparent semiconductor region. A step of forming a processing unit for processing charges accumulated in the photoelectric conversion region.
[0013]
In the method for manufacturing a photoelectric conversion device of the present invention, a process of forming a processing unit that processes an electric charge accumulated in an electric conversion region, which has an optically transparent semiconductor element structure, in a transparent semiconductor region formed on the photoelectric conversion region. Therefore, the photoelectric conversion region is enlarged and manufactured without being restricted by the processing unit.
[0014]
The solid-state imaging device according to the present invention has a plurality of pixels, and each pixel is formed in a photoelectric conversion region, an optically transparent transparent semiconductor region formed on the photoelectric conversion region, and a photoelectric formed on the transparent semiconductor region. And an optically transparent processing unit for processing the charge accumulated in the conversion region.
[0015]
This solid-state imaging device can have a configuration in which an inter-pixel element isolation region is formed on the entire circumference of the photoelectric conversion region corresponding to each pixel. Further, it can be configured such that incident light is totally reflected at the interface between the inter-pixel element isolation region and the photoelectric conversion region.
[0016]
The processing unit can be formed of a MOS transistor for charge-signal conversion. The processing unit can be formed as a charge transfer unit that transfers charges in the photoelectric conversion region.
[0017]
In the solid-state imaging device of the present invention, a transparent semiconductor region is provided on the photoelectric conversion region, and a processing unit for processing charges is formed in the transparent semiconductor region. Therefore, incident light passes through the transparent semiconductor region and is subjected to photoelectric conversion. Reach the area. Therefore, the photoelectric conversion region can be formed widely without being restricted by the charge processing portion.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
[0019]
1 to 3 show an embodiment in which a photoelectric conversion device according to the present invention is applied to a solid-state imaging device. This example is a case where the present invention is applied to an XY address readout type solid-state image sensor that performs the same operation as a CMOS solid-state image sensor. FIG. 4 shows an equivalent circuit of one pixel.
As shown in the equivalent circuit of FIG. 4, the solid-state imaging device 1 according to the embodiment of the present invention includes a light-receiving sensor unit 3 in which one pixel 2 is a photodiode, and a plurality of MOS transistors Tr1 that perform charge-signal conversion. It is comprised by Tr2, Tr3, Tr4. The MOS transistors Tr1 to Tr4 are composed of, for example, n-channel MOS transistors. That is, as the charge-signal conversion transistor, a read MOS transistor Tr1 for reading the signal charge of the light receiving sensor unit 3 selected by the XY address signal, an FD (floating diffusion) amplifier MOS transistor Tr2, and an FD It comprises a reset MOS transistor Tr3 that is read out to the gate and resets the charge, and a signal readout MOS transistor Tr4.
[0020]
The read MOS transistor Tr 1 has a first gate electrode connected to the X address line 4 and a second gate electrode connected to the Y address line 5. The read MOS transistor Tr1 has one main electrode connected to the light receiving sensor unit 3, the other main electrode connected to the gate electrode of the FD amplifier MOS transistor Tr2, and one main electrode of the reset MOS transistor Tr3. Connected to the electrode. The other main electrode of the reset MOS transistor Tr3 is connected to the power supply VDD. The FD amplifier MOS transistor Tr2 has one main electrode connected to the power supply VDD and the other main electrode connected to one main electrode of the signal reading MOS transistor Tr4. The other main electrode of the signal readout MOS transistor is connected to the signal output line 6.
[0021]
In the solid-state imaging device 1, charges corresponding to the amount of received light are accumulated in the light receiving sensor unit 3. When an X address signal and a Y address signal are supplied to the X address line 4 and the Y address line 5, respectively, the read MOS transistor Tr1 of the pixel 2 selected by the address signal is turned on, and the signal charge of the light receiving sensor section 3 is turned on. Is read out to the FD. The FD amplifier MOS transistor Tr2 is turned on by the signal charge read to the FD, and a signal current corresponding to the signal charge flows. At the same time, a signal readout pulse is supplied to the gate electrode of the signal readout MOS transistor Tr 4, the MOS transistor Tr 4 is turned on, and a signal current is read out to the signal output line 6. After the signal of the selected pixel 2 is read, a reset pulse is supplied to the gate electrode of the reset MOS transistor Tr3, and the potential of the FD is reset to the potential of the power supply VDD.
[0022]
Next, the configuration of the solid-state imaging device 1 of the present embodiment will be described. FIG. 1 schematically shows the overall configuration. In the solid-state imaging device 1 according to the present embodiment, an imaging region 12 in which a large number of pixels 2 are arranged in an XY matrix is arranged at the center, and a vertical scanner unit 13 that scans the imaging region 11 adjacent to the imaging region 12. The horizontal scanner unit 14 is disposed. Further, a processing circuit 15 for processing output signals such as a CDS circuit and an IV conversion system is disposed in the peripheral portion of the imaging region 12.
[0023]
2 is an enlarged plan view of one pixel in the imaging region 12, and FIG. 3 is a cross-sectional view taken along the line AA 'in FIG. 2 for explaining the pixel structure in detail. The solid-state imaging device 1 according to the present embodiment has a first conductivity type, for example, an n-type silicon semiconductor substrate 21, a second conductivity type, for example, a p-type semiconductor well region 22 that serves as an overflow barrier, and a charge storage region. A semiconductor region 23 of one conductivity type (for example, n-type) is formed, and the p-type semiconductor well region 22 and the n-type semiconductor region 23 constitute a photodiode 2 that constitutes a light receiving sensor portion, that is, a photoelectric conversion region. In this example, an impurity is introduced into the intermediate region of the n-type semiconductor substrate 22 by, for example, ion implantation to form the p-type well region 22, and the region on the surface side of the substrate 21 that is not ion-implanted serves as a charge storage region. The semiconductor region 23 is formed.
[0024]
An optically transparent p-type transparent semiconductor layer (hereinafter referred to as a transparent semiconductor region) 24 is formed on a silicon semiconductor substrate on which the photodiode 2 serving as the photoelectric conversion region is formed. Is done. Further, on the upper surface side of the p-type transparent semiconductor region, the source / drain of the MOS transistors Tr1, Tr2, Tr3, Tr4 shown in FIG. Certain n-type transparent semiconductor regions 26, 27, 28 and 29 are formed. The transparent semiconductor region 26 is a source / drain region common to the MOS transistors Tr1 and Tr3, that is, an FD (floating diffusion) region, and the transparent semiconductor region 27 is connected to a common region of Tr3 and Tr2, that is, connected to the power supply VDD. It is an area to be done. The transparent semiconductor region 28 is a common source / drain region of the MOS transistor Tr2 and the MOS transistor Tr4, and the transparent semiconductor region 29 is one source / drain region of the MOS transistor Tr4, that is, a region connected to the signal line. is there.
[0025]
On the p-type transparent semiconductor region 24 in which the n-type transparent semiconductor regions 26 to 29 are formed, gate electrode groups 32, 33, and 34 are formed via the gate insulating film 31. That is, the gate electrode 32 is formed on the p-type transparent semiconductor region 24 between the n-type transparent semiconductor regions 26 and 27 via the gate insulating film 31, and both the n-type transparent semiconductor regions 26 and 27 and the gate electrode 32 are formed there. Thus, a reset MOS transistor Tr3 is formed. An optically transparent transparent gate electrode 33 is formed on the p-type transparent semiconductor region 24 between the n-type transparent semiconductor regions 27 and 28 via the gate insulating film 31, and both the n-type transparent semiconductor regions 27 and 28 are formed here. The gate electrode 33 forms a MOS transistor Tr2. A transparent gate electrode 34 is formed on the p-type transparent semiconductor region 24 between the n-type transparent semiconductor regions 28 and 29 via the gate insulating film 31, and the n-type transparent semiconductor regions 28 and 29 and the gate electrode 34 form the transparent gate electrode 34. Then, a signal reading MOS transistor Tr4 is formed. Further, the FD region 26, which is an n-type transparent semiconductor region, and the transparent gate electrode 33 of the MOS transistor Tr2 are connected by the wiring 37 through the insulating film 36, thereby forming a floating gate. A transparent wiring 6 for taking out an electric signal to the output signal processing circuit 15 is connected to one source / drain region 29 of the signal reading MOS transistor Tr4. This wiring 6 becomes a signal output line. The wirings 37 and 6 are formed of an optically transparent transparent conductive film.
[0026]
The p-type transparent semiconductor region 24 can be formed of a transparent oxide semiconductor into which p-type impurities are introduced, for example. As a transparent oxide semiconductor, for example, CuInO ₂ Can be formed. The n-type transparent semiconductor regions 26 to 29 can be formed of, for example, a transparent oxide semiconductor into which an n-type impurity is introduced. In this case as well, for example, CuInO ₂ Can be formed. The gate insulating film 31 and the insulating film 36 are, for example, silicon oxide films (SiO ₂ Film). The transparent gate electrodes 32, 33, and 34 can be formed of, for example, a polycrystalline silicon film or a transparent electrode such as an ITO (indium tin oxide) film. The transparent wirings 36 and 6 are, for example, 12Ca-7Al which is a transparent oxide conductor. ₂ O ₃ It can be formed with a transparent conductor film.
[0027]
On the other hand, an insulating film such as a silicon oxide film (SiO ₂ An inter-pixel element isolation layer 38 is formed by a trench filled with a film, and the inter-pixel element isolation layer 38 is completely separated from the adjacent pixel 2. Further, a gate insulating film (for example, SiO 2) is formed on the side surface of the p-type transparent semiconductor region 24, that is, the side surface between the n-type semiconductor region 23 constituting the light-receiving sensor unit 3 and the FD region 26 of the n-type transparent semiconductor region. ₂ A first gate electrode 43 connected to the X address line 4 and a second gate electrode 44 connected to the Y address line 5 through the film 41 are formed. The n-type semiconductor region 23, the n-type FD region 26, and the first and second gate electrodes 43 and 44 form a read MOS transistor Tr1. The first gate electrode 43 is formed in common with the X address line 4, and the second gate electrode 4 is formed in common with the Y address line 5. The first and second gate electrodes 43 and 44 are formed so as to be embedded in the inter-pixel element isolation layer 38. Here, in order to form a channel region continuously between the n-type semiconductor region 23 and the FD region 26 by the first and second gate electrodes 43 and 44, the first and second gate electrodes 43 and 44 are mutually connected. It is formed as close as possible.
An optically transparent insulating protective film 42 is formed on the surface of the imaging region 12.
[0028]
The operation of the solid-state imaging device 1 according to the present embodiment is as follows. The light incident from the top of the insulating protective film surface 42A of the element surface of FIG. 3 is, for example, CuInO ₂ The transparent semiconductor regions 24 and 26 to 29 made of CuInO ₂ The layer has a light transmittance of about 60 to 80% with respect to visible light (about 400 nm to 750 nm). Therefore, the incident light of visible light is CuInO ₂ The layer penetrates while maintaining sufficient strength. There is also light that hits the wirings 36 and 6 in the middle, but 12CaO-7Al used as the wirings 36 and 6 ₂ O ₃ Since the light transmittance of the film is about 99%, the incident light is transmitted through the wirings 36 and 6. Therefore, most of the visible light reaches the photoelectric conversion region, that is, the silicon substrate having the light receiving sensor unit 3.
[0029]
Here, FIG. 5 shows a potential schematic diagram on the B′-B line of FIG. 3 in order to consider the behavior of the photoelectrically converted electric charge, ie, electrons. As can be seen from FIG. 5, electrons (charges) 60 photoelectrically converted in the interval from the n-type silicon surface immediately below the p-type transparent semiconductor region 24 to the depth of the p-type semiconductor well region 22 are converted into the p-type semiconductor well region. Accumulated in the n-type semiconductor region 23 between 22 and the p-type transparent semiconductor region 24.
6 shows that the X address line 4 and the Y address line 5 are applied to the first gate electrode 43 and the second gate electrode 44 of the MOS transistor Tr1 by the horizontal scanner unit 14 and the vertical scanner unit 13 shown in FIG. The potential diagrams on the A'-A line when an X address signal and a Y address signal, that is, a voltage are applied respectively are shown. As can be seen from FIG. 6, the accumulated charges (electrons) 60 are transferred to the FD region 26 by a potential change caused by voltage application, that is, a channel region is formed.
[0030]
By releasing the voltage application to the first and second gate electrodes 43 and 44, the potential shape returns to the state shown in FIG. 5, the channel region disappears, and the charge transfer to the FD region 26 is completed. The charge transferred to the FD region 26 generates a voltage having an intensity proportional to the amount of charge at the gate electrode 33 of the MOS transistor Tr2 connected to the FD region 26 by the wiring 36. With this voltage, the MOS transistor Tr2 is turned on, and a current obtained by amplifying the accumulated charge amount flows to the source / drain region 28. On the other hand, when a read pulse voltage φd is applied to the gate electrode 34 of the signal reading MOS transistor Tr4 and this MOS transistor Tr4 is turned on, the current flowing into the source / drain region 28 is supplied to the source / drain region 29. And output through the signal output line 6. The accumulated charge in the FD region 26 is reset by applying a reset pulse voltage φr to the gate electrode 32 of the reset MOS transistor Tr3 and setting the charge amount in the FD region 26 to the power supply voltage VDD.
[0031]
Next, an example of a method for manufacturing the solid-state imaging device 1 of the above-described embodiment will be described with reference to FIGS.
First, as shown in FIG. 7A, an n-type silicon semiconductor substrate 21 is prepared. Next, as shown in FIG. 7B, trenches (grooves) 51 for separating the respective pixels 2 are formed by, for example, the RIE (reactive ion etching) method. The trench 51 is formed in a lattice shape so as to surround each pixel 2. A region corresponding to the eye of each lattice is a formation region 50 of the pixel 2.
[0032]
Next, as shown in FIG. 7C, the trench 51 is filled with an insulating film 53 without a gap. In this example, a silicon oxide film (SiO 2) is formed by CVD (chemical vapor deposition) or the like. ₂ Etc.) are buried in the trench 51. Further, a p-type semiconductor layer 53 used for element isolation is formed on the inner wall of the trench 51 as necessary. Thereby, an inter-pixel element isolation layer 38 is formed.
[0033]
Next, as shown in FIG. 7D, a p-type semiconductor well region 22 is formed by introducing a p-type impurity into the n-type silicon substrate 21 by using, for example, an ion implantation method. The n-type substrate portion above the semiconductor well region 22 becomes an n-type semiconductor region 23 that becomes a charge storage region. The p-type semiconductor well region 22 and the n-type semiconductor region 23 form a photodiode having a junction J, that is, the light receiving sensor unit 3.
[0034]
Next, as shown in FIG. 8E, a p-type transparent semiconductor region 24 is deposited on the silicon substrate. In this example, p-type CuInO is used as the transparent semiconductor region 24. ₂ Deposit layers. Next, as shown in FIG. 8F, at least the first and second gate electrodes 43 and 44 are formed on the trench 51 formed in the base with respect to the p-type transparent semiconductor region 24. Form. The trenches 54 are preferably formed in a grid pattern at positions corresponding to the underlying trenches 51 around the entire pixel formation region.
[0035]
Next, as shown in FIG. 8G, an insulating film 55 is formed on the inner wall of the trench 54 of the p-type transparent semiconductor region 24. This insulating film 55 is set to the gate insulating film 41 at least on the inner wall forming the MOS transistor Tr1. In this example, the insulating film 55 is a silicon oxide film (SiO ₂ Film) and is also formed on the surface of the transparent semiconductor region 24 including the inner wall of the trench.
[0036]
Next, as shown in FIG. 9G, a conductive material such as polycrystalline silicon is deposited in the trench 54 by, for example, a CVD method, and necessary processing is performed to form the first gate electrode 43.
Next, as shown in FIG. 9I, on the first gate electrode 43 in the trench 54, an insulating film as thin as possible (however, it can be insulated and separated), for example, a silicon oxide film (SiO2) ₂ Film). Next, similarly to the above, a conductive material such as polycrystalline silicon is deposited in the trench 54 by, for example, a CVD method, and necessary processing is performed to form the first gate electrode 44. Further, the trench 54 on the second gate electrode 44 is filled with an insulating film such as a silicon oxide film. The inter-pixel element isolation region 38 is formed by the trenches 51 and 54 in which the insulating film is embedded.
[0037]
Next, as shown in FIG. 9J, n-type impurities are introduced into the surface side of the p-type transparent semiconductor region 24 to form n-type transparent semiconductor regions 26, 27, 28 and 29. The first and second gate electrodes 43 and 44 are located between the surface of the silicon n-type semiconductor region 23 and the bottom of the n-type transparent semiconductor region 26 corresponding to the side surface of the p-type transparent semiconductor region 24. Will do.
Next, a gate insulating film 31 is formed on the surface of the p-type transparent semiconductor region 24, and transparent gate electrodes 32, 33 and 34 are formed. The gate electrodes 32 to 34 are formed of, for example, a polycrystalline silicon film or a transparent conductive ITO film. Next, after forming the insulating film 36, a transparent wiring 37 connecting the n-type transparent semiconductor region 26 and the transparent gate electrode 33 and a transparent wiring connecting the n-type transparent semiconductor region 29, so-called signal output lines 6 are formed. Transparent wirings 37 and 6 are, for example, 12CaO-7Al ₂ O ₃ Form with a film.
[0038]
Next, although not shown, a flattened insulating protective film 42, a color filter thereon, and an on-chip lens corresponding to each pixel thereon are formed to obtain the target solid-state imaging device 1. In the manufacturing process, various processes such as ion implantation and electrode formation necessary for forming the horizontal scanner unit 14, the vertical scanner unit 13, and the output processing circuit 15 other than the imaging region 12 are performed.
[0039]
According to the solid-state imaging device 1 of the present embodiment described above, the photodiode 3 serving as the light receiving sensor portion constituting each pixel, that is, the region for performing photoelectric conversion is formed on the silicon substrate 21, and the transparent semiconductor region 24 is formed thereon. Are stacked to form charge-signal conversion MOS transistors Tr1 to Tr4 that are optically transparent in the transparent semiconductor region 24 in the unit cell of each pixel. A wide photoelectric conversion region can be secured without reducing the number of MOS transistors. As a result, high sensitivity can be achieved.
In addition, since the transparent wiring material is used as the wirings 37 and 6, it is possible to avoid a decrease in the aperture ratio in the light receiving sensor unit 3 without being restricted by the wiring. That is, by using the transparent wiring, the aperture ratio of the light receiving sensor unit 3 can be secured without being affected by the presence or layout of the wiring. Since the wiring is transparent, incident light is not blocked by the wiring, and the light utilization efficiency is improved.
Since the charge transfer unit is optically transparent, a high aperture ratio solid-state imaging device with a small smear characteristic and a small amount of photoelectric conversion in the transfer unit during charge transfer can be obtained.
Since the surface of the n-type semiconductor region 213 constituting the photodiode is in contact with the transparent semiconductor region 24, dark current (noise) generated at the interface between the conventional semiconductor and the insulating film can be suppressed.
Further, since each pixel 2 is surrounded by the inter-pixel element isolation layer 38 around the entire periphery, the charge does not leak to the adjacent pixels. In addition, since the photoelectric conversion region is formed of a silicon substrate and the inter-pixel element isolation layer 38 is formed of, for example, a silicon oxide film having a refractive index sufficiently smaller than that of silicon, incident light is generated at the interface between the silicon substrate 21 and the silicon oxide film 38. Can be totally reflected. Thereby, incident light is less likely to leak to adjacent pixels.
[0040]
In the above-described embodiment, the present invention is applied to a solid-state image sensor that performs the same operation as the CMOS solid-state image sensor. However, the present invention can also be applied to a solid-state image sensor similar to a CCD solid-state image sensor. In this case, a light receiving sensor portion corresponding to each pixel is formed on a silicon substrate, a transparent semiconductor region is stacked on the silicon substrate, and a charge transfer portion having a CCD structure is formed in the transparent semiconductor region. . Thereby, the light receiving sensor part of each pixel becomes wide, and the sensitivity of the image sensor can be increased.
[0041]
Furthermore, the present invention is not limited to a solid-state imaging device, and can be applied to a photoelectric conversion apparatus that converts light into electric charge and processes the converted electric charge as a signal. In this case, a photoelectric conversion region is formed on a semiconductor substrate such as silicon, a transparent semiconductor region is formed thereon, and an optically transparent processing unit that processes charges accumulated in the transparent semiconductor region is formed. . This makes it possible to widen the photoelectric conversion region.
This photoelectric conversion device manufacturing method includes a step of forming an optically transparent transparent semiconductor region on a substrate on which at least a photoelectric conversion region is formed, and a photoelectric conversion comprising an optically transparent semiconductor element structure in the transparent semiconductor region. Forming a processing portion for processing charges accumulated in the region.
[0042]
【The invention's effect】
According to the photoelectric conversion device of the present invention, the optically transparent transparent semiconductor region formed on the photoelectric conversion region is configured to be provided with a processing unit that processes charges accumulated in the photoelectric conversion region. The area of the photoelectric conversion region can be substantially enlarged without being restricted by the processing unit. As a result, the amount of charge photoelectrically converted per unit area can be increased.
[0043]
When the processing unit is formed as a processing unit that converts electric charge into current or voltage, it can be applied to an image sensor, and the sensitivity can be increased.
When the processing unit is formed as a processing unit that transfers charges, the processing unit can be applied to an imaging device, and the sensitivity can be increased.
[0044]
According to the method for manufacturing a photoelectric conversion device according to the present invention, it is possible to manufacture a photoelectric conversion device having a wide electric conversion region without being restricted by the charge processing unit.
[0045]
According to the solid-state imaging device according to the present invention, each pixel has an optically transparent transparent semiconductor region on the photoelectric conversion region, and an optically transparent processing unit that processes charges in the transparent semiconductor region. Therefore, the area of the photoelectric conversion region can be substantially enlarged without being restricted by the charge processing unit. As a result, the amount of charge that is photoelectrically converted per unit pixel can be increased, and higher sensitivity can be achieved.
[0046]
When the inter-pixel element isolation region is formed on the entire circumference of the photoelectric conversion region corresponding to each pixel, the pixel separation can be performed reliably, and the charge does not leak to the adjacent pixels, and the imaging characteristics (image quality) of the solid-state image sensor Can be improved.
When the incident light is totally reflected at the interface between the inter-pixel element isolation region and the photoelectric conversion region, the incident light is less likely to leak to adjacent pixels, and the imaging characteristics (image quality) of the solid-state image sensor are improved. Can do.
[0047]
When the processing unit is composed of MOS transistors for charge-signal conversion, the photoelectric conversion region can be expanded without reducing the number of MOS transistors, and high sensitivity can be achieved. By using the transparent wiring, the aperture ratio of the photoelectric conversion region can be ensured without being affected by the presence or layout of the wiring.
[0048]
When the processing unit is configured by a charge transfer unit that transfers charges in the photoelectric conversion region, the photoelectric conversion region of the unit pixel can be expanded, and high sensitivity can be achieved. Since the charge transfer unit is optically transparent, a high aperture ratio solid-state imaging device with a small smear characteristic and a small amount of photoelectric conversion in the transfer unit during charge transfer can be obtained.
[Brief description of the drawings]
FIG. 1 is a plan view showing an embodiment of a solid-state imaging device according to the present invention.
FIG. 2 is an enlarged view of one pixel of the solid-state imaging device according to the present invention.
3 is a cross-sectional view taken along line AA in FIG.
FIG. 4 is an equivalent circuit diagram of one pixel of the solid-state imaging device according to the present embodiment.
FIG. 5 is a potential schematic diagram on the B′-S line of FIG. 3;
6 is a potential schematic diagram on the B′-S line of FIG. 3 when a voltage is applied to the gate electrode of a read MOS transistor. FIG.
7A to 7D are manufacturing process diagrams (part 1) illustrating an embodiment of a method for manufacturing a solid-state imaging device according to the present invention.
FIGS. 8A to 8G are manufacturing process diagrams (part 2) illustrating an embodiment of a method for manufacturing a solid-state imaging device according to the present invention. FIGS.
FIGS. 9A to 9J are manufacturing process diagrams (part 3) illustrating an embodiment of a method for manufacturing a solid-state imaging device according to the present invention. FIGS.
[Explanation of symbols]
1 .... Solid-state imaging device 2 .... Pixel 3 .... Light receiving sensor (photodiode) 4 .... X address line 5 .... Y address line 6 .... Signal output line, Tr1 to Tr4 ... MOS Transistor, 21... Silicon substrate, 22... P-type semiconductor well region, 23... N-type semiconductor region (charge storage region), 24... P-type transparent semiconductor region, 26 to 29. Drain region), 32 to 34 ..transparent gate electrode, 37 ..wiring, 38 ..inter-pixel element isolation region, 42 ..insulating protective film 31, 41 ..gate insulating film, 43, 44. , 51, 54 .. Trench, 52 .. Insulating film

Claims (10)

A photoelectric conversion region;
An optically transparent transparent semiconductor region formed on the photoelectric conversion region;
A photoelectric conversion device comprising: an optically transparent processing unit that processes charges accumulated in the photoelectric conversion region and formed in the transparent semiconductor region. The photoelectric conversion device according to claim 1, wherein the processing unit is formed as a processing unit that converts the electric charge into a current or a voltage. The photoelectric conversion device according to claim 1, wherein the processing unit is formed as a processing unit that transfers the charge. The photoelectric conversion device according to claim 1, wherein the processing unit includes a processing unit that converts the charge into a current or a voltage, and a processing unit that transfers the charge. Forming an optically transparent transparent semiconductor region on the substrate on which the photoelectric conversion region is formed;
A method for manufacturing a photoelectric conversion device, comprising: forming a processing unit that has an optically transparent semiconductor element structure in the transparent semiconductor region and processes charges accumulated in the photoelectric conversion region. Having a plurality of pixels,
Each pixel has a photoelectric conversion region, an optically transparent transparent semiconductor region formed on the photoelectric conversion region, and an optical device that processes charges accumulated in the photoelectric conversion region formed in the transparent semiconductor region. A solid-state imaging device comprising a transparent processing unit. The solid-state imaging device according to claim 6, wherein an inter-pixel element isolation region is formed all around the photoelectric conversion region corresponding to each pixel. The solid-state imaging device according to claim 7, wherein incident light is totally reflected at an interface between the inter-pixel element isolation region and the photoelectric conversion region. 7. The solid-state imaging device according to claim 6, wherein the processing section is formed of a MOS transistor for charge-signal conversion. The solid-state imaging device according to claim 6, wherein the processing unit is formed as a charge transfer unit that transfers charges in the photoelectric conversion region.

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