JP2004304591A - Ofdm demodulator and method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To eliminate erroneous detection for a symbol boundary position in order to improve detection accuracy for the symbol boundary position. <P>SOLUTION: In an OFDM (Orthogonal Frequency Division Multiplexing) receiving device 1, a guard correlation / peak detecting circuit 12 computes the boundary position of an OFDM symbol based on autocorrelation of guard intervals of an OFDM signal. Based on the computed boundary position, OFDM symbol synchronous processing is performed. During calculation of the symbol boundary position, a detection range established at time interval periods of the OFDM symbol is set, and the maximum value of autocorrelation values of guard intervals is searched within the detection range. A sample position where the maximum value is detected is employed as the symbol boundary position. Moreover, the position of the detection range is controlled in a time direction so that it may become optimal suitably. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to an orthogonal frequency division multiplexing (OFDM) demodulation apparatus and method for demodulating an OFDM (Orthogonal Frequency Division Multiplexing) modulated signal.
[0002]
[Prior art]
As a method for transmitting digital signals, a modulation method called an orthogonal frequency division multiplexing (OFDM) is used. In the OFDM system, a number of orthogonal subcarriers (subcarriers) are provided in a transmission band, and data is allocated to the amplitude and phase of each subcarrier by PSK (Phase Shift Keying) or QAM (Quadrature Amplitude Modulation), and digital modulation is performed. It is a method to do.
[0003]
The OFDM system divides the transmission band by a number of subcarriers, so the band per subcarrier wave becomes narrower and the modulation speed becomes slower, but the total transmission speed is the same as that of the conventional modulation system. are doing. Further, in the OFDM system, since a number of subcarriers are transmitted in parallel, the symbol rate is reduced, the time length of the multipath relative to the time length of the symbol can be shortened, and multipath interference is reduced. It has the feature of.
[0004]
In the OFDM system, data is allocated to a plurality of subcarriers. Therefore, an IFFT (Inverse Fast Fourier Transform) arithmetic circuit that performs inverse Fourier transform during modulation, and an FFT (Fast Fourier Transform) that performs Fourier transform during demodulation. 3.) It has a feature that a transmission / reception circuit can be configured by using an arithmetic circuit.
[0005]
From the above characteristics, the OFDM system is often applied to terrestrial digital broadcasting that is strongly affected by multipath interference. As such terrestrial digital broadcasting employing the OFDM system, there are, for example, standards such as DVB-T (Digital Video Broadcasting-Terrestrial) and ISDB-T (Integrated Services Digital Broadcasting-Terrestrial).
[0006]
As shown in FIG. 11, a transmission symbol of the OFDM scheme (hereinafter, referred to as an OFDM symbol) is an effective symbol which is a signal period in which an IFFT is performed at the time of transmission, and a waveform of a part of the latter half of the effective symbol is copied as it is. And a guard interval. The guard interval is provided in the first half of the OFDM symbol. In the OFDM method, by providing such a guard interval, inter-symbol interference due to multipath is allowed, and multipath resistance is improved.
[0007]
For example, ISDB-T_SBIn mode 3 of the standard (broadcasting standard for terrestrial digital audio broadcasting adopted in Japan), 512 subcarriers are included in the effective symbol, and the subcarrier interval is 125/126 ≒ 0.992 kHz. It becomes. Also, this ISDB-T_SBIn mode 3 of the standard, transmission data is modulated on 433 subcarriers out of 512 subcarriers in an effective symbol. Also, ISDB-T_SBIn mode 3 of the standard, the time length of the guard interval is one of ４ ，, ８, 1/16, and 1/32 of the time length of the effective symbol.
[0008]
By the way, when demodulating an OFDM signal, it is necessary to correctly detect a boundary between OFDM symbols and perform an FFT operation in synchronization with the boundary position. Generating a synchronization signal by correctly detecting the boundary position of an OFDM symbol is called symbol synchronization processing. One method of performing symbol synchronization processing is to use a guard interval. The method of performing the symbol synchronization process using the guard interval utilizes the correlation between the signal sequence of the guard interval and its copy source, and determines that the portion having the highest autocorrelation value of the received OFDM signal is the symbol boundary position. It is a method of judging.
[0009]
Generally, in the OFDM demodulator, a symbol synchronization circuit is provided for performing symbol synchronization processing using guard intervals, calculating symbol boundary positions using guard interval correlation, and performing synchronization processing.
[0010]
Hereinafter, a circuit configuration example of the symbol synchronization circuit 100 will be described with reference to FIGS. 12, 13, and 14. FIG.
[0011]
12 and 13 show block diagrams of the symbol synchronization circuit 100. FIG. FIG. 14 shows a timing chart of each signal in the symbol synchronization circuit 100.
[0012]
As shown in FIG. 12, the symbol synchronization circuit 100 generates a guard interval correlation signal indicating the autocorrelation of the guard interval, and detects a peak position of the guard interval correlation signal and converts the peak position into a symbol. And a symbol boundary detection circuit 102 for outputting as a boundary position.
[0013]
The guard correlation detection circuit 101 has an effective symbol length delay circuit 111, a complex multiplication circuit 112, and a guard interval length integration circuit 113.
[0014]
As shown in FIG. 14A, a digital quadrature demodulation signal (r (t)) after digital quadrature demodulation is input to the guard correlation detection circuit 101. This digital quadrature demodulated signal (r (t)) is a complex signal composed of a real component signal (I (t)) and an imaginary component signal (Q (t)). Note that t is a variable indicating time.
[0015]
As shown in FIG. 14B, the effective symbol length delay circuit 111 delays the input digital quadrature demodulated signal by an effective symbol time (Tu). The digital quadrature demodulated signal (r (t-Tu)) delayed by the effective symbol time by the effective symbol length delay circuit 111 is input to the complex multiplication circuit 112.
[0016]
The complex multiplying circuit 112 performs a complex multiplication operation of the digital quadrature demodulated signal (r (t)) that has not been delayed and the digital quadrature demodulated signal (r (t−Tu)) delayed by the effective symbol period (Tu). , Multiply every sample. The multiplication result is input to guard interval length integration circuit 113.
[0017]
The guard interval length integration circuit 113 performs an integration operation in a range of the guard interval length by performing a moving sum operation on the input signal for the guard interval length. The signal output from the guard interval length integration circuit 113 is a guard interval correlation signal indicating the correlation between the digital quadrature demodulation signal and the digital quadrature demodulation signal delayed by the effective symbol (Nu samples).
[0018]
The guard interval correlation signal is a complex signal (CI (t) + jCQ (t)) whose real component is represented by CI (t) and whose imaginary component is represented by CQ (t). The guard interval correlation signal is a signal whose level becomes high in a portion where the correlation value is high and whose level becomes low in a portion where the correlation value is low. Therefore, the guard interval correlation signal is ideally a signal in which a mountain-shaped waveform having a peak at the boundary position of the OFDM symbol is repeated.
[0019]
The guard interval correlation signal is supplied from the guard interval length integration circuit 113 to the symbol boundary detection circuit 102.
[0020]
The symbol boundary detection circuit 102 is a circuit that detects a timing at which the guard interval correlation signal reaches a peak, and outputs the detected timing as a symbol boundary position.
[0021]
As shown in FIG. 13, the symbol boundary detection circuit 102 includes a squaring circuit 121, a symbol length cycle counter 122, and a maximum value detection circuit 123.
[0022]
The guard interval correlation signal output from guard correlation detection circuit 101 is supplied to squaring circuit 121.
[0023]
The squaring circuit 121 squares the real component (CI) and the imaginary component (CQ) of the guard interval correlation signal, and adds them. As a result of the addition, a square signal (ΔCI) indicating the amplitude component of the guard interval correlation signal as shown in FIG.²+ CQ²｝ (T)) is generated. The square signal of the guard interval correlation signal is supplied to the maximum value detection circuit 123.
[0024]
The symbol length period counter 122 is a counter that counts the operation clock up to the sampling number (Ns) of one OFDM symbol. The count value N of the symbol length period counter 122 is incremented by one from 0 to Ns−1, and goes back to 0 when it exceeds Ns−1. That is, as shown in FIG. 14D, the count value N of the symbol length cycle counter 122 has one cycle of the number of samples of the OFDM symbol (for example, 1088). The count value N of the symbol length period counter 122 is supplied to the maximum value detection circuit 123.
[0025]
The square signal output from the squaring circuit 121 is input to the maximum value detection circuit 123. In the maximum value detection circuit 123, a maximum value detection range for specifying a maximum value detection section is set. The maximum value detection range is a value that specifies a range for detecting the count value N, and here, 0 to Ns−1 (for example, 1087) is set.
[0026]
The maximum value detection circuit 123 finds a sample point having the highest level of the square signal within the maximum value detection range (that is, the count value N is between 0 and Ns-1). The maximum value detection circuit 123 detects the count value N of the symbol length period counter 122 at the found maximum value sample timing, as shown in FIG. The detected count value N becomes a symbol boundary position for specifying the boundary position of the OFDM symbol. This symbol boundary position is updated every cycle of the count value N.
[0027]
As described above, the symbol boundary detection circuit 102 searches the guard interval correlation signal for the maximum value, detects the occurrence timing of the maximum value, and outputs the timing as the symbol boundary position.
[0028]
[Non-patent document 1]
"Digital Terrestrial Audio Broadcasting Receiver Standard (ARIB STD-B30 Version 1.1)", Established on May 31, 2001, Revised on March 28, 2002, 1.1 , P. 10-14
[0029]
[Problems to be solved by the invention]
By the way, the level of the digital quadrature demodulation signal (r (t)) input to the symbol synchronization circuit 100 fluctuates greatly because it is affected by the state of the transmission path and noise.
[0030]
Therefore, for example, as shown in FIG. 14F, the timing at which the cycle of the symbol length cycle counter 122 is updated (that is, the timing at which the count value becomes 0) and the timing at which the square signal reaches the maximum value are temporally different. , A portion having a high correlation (that is, a mountain-shaped portion) originally generated by the guard interval of the immediately preceding OFDM symbol is included in the peak detection processing of the next OFDM symbol period and is determined. May be lost. In such a case, the count value N at the maximum value of the guard interval correlation signal does not always become a constant value for each OFDM symbol due to various noises and errors, and greatly fluctuates for each OFDM symbol. There is a possibility that a highly correlated portion generated by the symbol guard interval is determined to be the boundary position of the next OFDM symbol.
[0031]
Also, when there is a clock frequency error (error between the transmission clock of the received OFDM signal and the operation clock), the count value N gradually moves. There is a possibility that a portion having a high correlation caused by the guard interval is included in the peak detection processing in the next OFDM symbol period and is determined.
[0032]
The present invention has been proposed in view of such a conventional situation, and eliminates erroneous detection of a symbol boundary position when performing symbol synchronization processing using correlation of guard intervals, thereby improving detection accuracy. It is an object of the present invention to provide an OFDM demodulation apparatus and method.
[0033]
[Means for Solving the Problems]
An OFDM demodulator according to the present invention is generated by copying an effective symbol generated by time-divisionally modulating an information sequence into a plurality of subcarriers and copying a signal waveform of a part of the effective symbol. An OFDM demodulator for demodulating an orthogonal frequency division multiplexing (OFDM) signal in which a transmission symbol including a guard interval is used as a transmission unit, wherein the count value is incremented in synchronization with a reference clock and the transmission symbol Counting means for generating a count value that is cyclically repeated at a cycle corresponding to the time interval, and a detection cycle that is repeated at the same cycle as the cyclic cycle of the count value. Detection cycle control means for controlling the phase of the cycle, and the guard of the OFDM signal within the detection cycle. Symbol boundary detecting means for detecting a maximum value of the autocorrelation value in the interval portion and outputting a count value at which the maximum value is generated as a symbol boundary position for each of the detection cycles, wherein the detection cycle control means comprises: A phase of the detection cycle with respect to a cyclic cycle of the count value is controlled in accordance with a position where the maximum value occurs in a cycle.
[0034]
An OFDM demodulator according to the present invention is generated by copying an effective symbol generated by time-divisionally modulating an information sequence into a plurality of subcarriers and copying a signal waveform of a part of the effective symbol. An OFDM demodulator for demodulating an orthogonal frequency division multiplexing (OFDM) signal in which a transmission symbol including a guard interval is used as a transmission unit, wherein the count value is incremented in synchronization with a reference clock and the transmission symbol Counting means for generating a count value that is cyclically repeated at a cycle corresponding to the time interval, and a detection cycle that is repeated at the same cycle as the cyclic cycle of the count value. The maximum value of the autocorrelation value in the guard interval portion of the OFDM signal is detected, and the count value at which the maximum value is generated A plurality of symbol boundary detection means for outputting each of the detection cycles; and any one of the plurality of symbol boundary detection means is selected, and the count value output from the selected symbol boundary detection means is used as a symbol. Selection output means for outputting as a boundary position, wherein the plurality of symbol boundary detection means have detection periods set to different phases, and the selection output means is set to the selected symbol boundary detection means. Any one of the symbol boundary detecting means is selected according to the position where the maximum value occurs in the detected period.
[0035]
In the OFDM demodulation method according to the present invention, an effective symbol generated by time-divisionally modulating an information sequence into a plurality of subcarriers and a signal waveform of a part of the effective symbol are generated by copying. And an OFDM demodulation method for demodulating an orthogonal frequency division multiplexing (OFDM) signal in which a transmission symbol including a guard interval is used as a transmission unit, wherein the count value is incremented in synchronization with a reference clock. Generating a count value that is cyclically repeated at a cycle corresponding to the time interval of the above, sets a detection cycle that is repeated at the same cycle as the cyclic cycle of the count value, and sets the guard interval of the OFDM signal within the detection cycle. The maximum value of the autocorrelation value of the portion is detected, and the count value at which the maximum value is generated is systematically detected for each of the above detection cycles. Output as Bol boundary position, in response to the occurrence position of the maximum value within the detection period, and controls the phase of the detection period for the search period of the count value.
[0036]
In the OFDM demodulation method according to the present invention, an effective symbol generated by time-divisionally modulating an information sequence into a plurality of subcarriers and a signal waveform of a part of the effective symbol are generated by copying. And an OFDM demodulation method for demodulating an orthogonal frequency division multiplexing (OFDM) signal in which a transmission symbol including a guard interval is used as a transmission unit, wherein the count value is incremented in synchronization with a reference clock. Generating a count value that is cyclically repeated at a cycle corresponding to the time interval of the above, sets a detection cycle that is repeated at the same cycle as the cyclic cycle of the count value, and sets the guard interval of the OFDM signal within the detection cycle. The maximum value of the autocorrelation value of the portion is detected, and the count value at which the maximum value is generated is systematically detected for each of the above detection cycles. Output as Bol boundary position, in response to the occurrence position of the maximum value within the detection period, and controls the phase of the detection period for the search period of the count value.
[0037]
In the OFDM demodulation apparatus and method according to the present invention described above, the symbol boundary position is calculated based on the autocorrelation of the guard interval of the OFDM signal, and when calculating the symbol boundary position, the time interval period of the transmission symbol is set. A detection range is set, a sample timing of the maximum autocorrelation value within the detection range is detected, and the detected timing is output as a symbol boundary position. Further, in the present invention, phase control is performed so that the detection range is at an optimum position.
[0038]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, an OFDM receiving apparatus to which the present invention is applied will be described as an embodiment of the present invention.
[0039]
First embodiment
An OFDM receiver according to the first embodiment of the present invention will be described.
[0040]
Overall configuration of OFDM receiver
FIG. 1 shows a block diagram of an OFDM receiver according to the first embodiment of the present invention.
[0041]
As shown in FIG. 1, an OFDM receiver 1 according to a first embodiment of the present invention includes an antenna 2, a tuner 3, a band-pass filter (BPF) 4, an A / D converter 5, a clock generator, A circuit 6, a DC cancel circuit 7, a digital quadrature demodulation circuit 8, a carrier frequency error correction circuit 9, an FFT operation circuit 10, a phase correction circuit 11, a guard correlation / symbol boundary detection circuit 12, a timing synchronization circuit 13, a narrowband carrier error calculation circuit 14, a wideband carrier error calculation circuit 15, an addition circuit 16, a numerically controlled oscillator (NCO) 17, a frame synchronization circuit 18, an equalization circuit 19, and a demapping circuit 20, a transmission line decoding circuit 21, and a transmission control information decoding circuit 22.
[0042]
A broadcast wave of a digital broadcast broadcasted from a broadcast station is received by the antenna 2 of the OFDM receiver 1 and supplied to the tuner 3 as an RF signal.
[0043]
The RF signal received by the antenna 2 is frequency-converted into an IF signal by a tuner 3 including a multiplier 3a and a local oscillator 3b, and is supplied to a BPF 4. The IF signal output from the tuner 3 is filtered by the BPF 4 and supplied to the A / D conversion circuit 5.
[0044]
The A / D conversion circuit 5 samples the IF signal using the clock supplied from the clock generation circuit 6, and digitizes the IF signal. The IF signal digitized by the A / D conversion circuit 5 is supplied to a DC cancellation circuit 7, from which a DC component is removed, and then supplied to a digital quadrature demodulation circuit 8. The digital quadrature demodulation circuit 8 quadrature demodulates the digitized IF signal using a two-phase carrier signal having a predetermined carrier frequency, and outputs a baseband OFDM signal. The OFDM time domain signal output from the digital quadrature demodulation circuit 8 is supplied to a carrier frequency error correction circuit 9.
[0045]
Here, when digital quadrature demodulation is performed by the digital quadrature demodulation circuit 8, a two-phase signal of a -Sin component and a Cos component is required as a carrier signal. Therefore, in the present device 1, the frequency of the sampling clock given to the A / D conversion circuit 5 is set to the center frequency f of the IF signal._IF, And a two-phase carrier signal to be supplied to the digital quadrature demodulation circuit 8 can be generated.
[0046]
After digital quadrature demodulation, 4f_IFIs downsampled to 1/4, and the number of effective symbol sampling points after digital quadrature demodulation is the number of subcarriers (Nu). That is, the clock of the data sequence after digital quadrature demodulation is set to have a frequency equal to one sub-carrier interval. Alternatively, the ratio of the down-sample after digital quadrature demodulation may be set to １ ／, and the FFT operation may be performed with twice the normal number of sampling points, so that the down-sample may be further １ ／ after the FFT operation. By performing the FFT operation on twice the normal number of sampling points in this way, the frequency band of a signal that can be extracted by the FFT operation is doubled, and the circuit size of the low-pass filter circuit during digital quadrature demodulation can be reduced. it can. When the subsequent circuits perform data processing on the oversampled data sequence, the number of effective symbol sampling points (Nu) after digital orthogonal demodulation is set to 2 sub-carriers.ⁿDouble (where n is a natural number) may be used.
[0047]
The clock generation circuit 6 supplies a clock having the above frequency to the A / D conversion circuit 5 and operates an operation clock of the data series after digital quadrature demodulation (to the frequency of the clock supplied to the A / D conversion circuit 5). On the other hand, a clock whose frequency is divided by 1/4, for example, a clock having a frequency of 1 / subcarrier interval, is supplied to each circuit in the device 1.
[0048]
The operation clock generated by the clock generation circuit 6 is a free-running clock that is asynchronous with respect to the transmission clock of the received OFDM signal. That is, the operation clock generated by the clock generation circuit 6 is not synchronized in frequency and phase with the transmission clock by the PLL or the like, and operates in a free-running state. The reason why the operation clock can be set to the self-running state is that the timing synchronization circuit 13 detects a frequency error between the transmission clock of the OFDM signal and the operation clock, and performs a feedforward process based on the frequency error component at a subsequent stage. This is because the error has been removed. In the OFDM receiver 1, the clock generation circuit 6 is an asynchronous free-running clock as described above. However, the present invention can also be applied to a device that variably controls an operation clock frequency by feedback control.
[0049]
The baseband OFDM signal output from the digital quadrature demodulation circuit 8 is a so-called time domain signal before the FFT operation. For this reason, the baseband signal before the FFT operation is hereinafter referred to as an OFDM time domain signal. As a result of orthogonal demodulation, the OFDM time domain signal becomes a complex signal composed of a real axis component (I channel signal) and an imaginary axis component (Q channel signal).
[0050]
The carrier frequency error correction circuit 9 corrects the carrier frequency error of the OFDM time domain signal by performing complex multiplication of the carrier frequency error correction signal output from the NCO 17 and the OFDM time domain signal after digital orthogonal demodulation. The OFDM time domain signal whose carrier frequency error has been corrected by the carrier frequency error correction circuit 9 is supplied to the FFT operation circuit 10 and the guard correlation / symbol boundary detection circuit 12.
[0051]
The FFT operation circuit 10 extracts a signal of an effective symbol length from one OFDM symbol, that is, extracts a signal obtained by removing a sample of the number of guard interval samples (Ng) from all samples (Ns) of one OFDM symbol. , An FFT operation is performed on the data of the number of effective symbol samples (Nu). The FFT operation circuit 10 is provided with a start flag (operation start timing of the FFT operation) for specifying the extraction range from the timing synchronization circuit 13, and performs the FFT operation at the timing of the start flag. The FFT operation circuit 10 extracts a signal component modulated on each subcarrier in the OFDM symbol by extracting data of the number of samples for the effective symbol from one OFDM symbol and performing an FFT operation process. .
[0052]
The signal output from the FFT operation circuit 10 is a so-called frequency domain signal after the FFT. Therefore, the signal after the FFT operation is hereinafter referred to as an OFDM frequency domain signal. The OFDM frequency domain signal output from the FFT operation circuit 10 is a complex signal composed of a real axis component (I channel signal) and an imaginary axis component (Q channel signal), like the OFDM time domain signal. . The OFDM frequency domain signal is supplied to the phase correction circuit 11.
[0053]
The phase correction circuit 11 corrects a phase rotation component caused by a difference between an actual boundary position of the OFDM symbol and a start timing of the FFT operation on the OFDM frequency domain signal. The phase correction circuit 11 corrects the phase of a shift that occurs with an accuracy shorter than the sampling period. More specifically, the phase correction circuit 11 performs complex multiplication of the OFDM frequency domain signal output from the FFT operation circuit 10 with a phase correction signal (complex signal) supplied from the timing synchronization circuit 13 to perform phase rotation. Make corrections. The OFDM frequency domain signal after the phase rotation correction is supplied to the wideband carrier error calculation circuit 15, the frame synchronization circuit 18, the equalization circuit 19, and the transmission control information decoding circuit 22.
[0054]
An OFDM time domain signal is input to the guard correlation / symbol boundary detection circuit 12. The guard correlation / symbol boundary detection circuit 12 calculates a correlation value between the input OFDM time domain signal and an OFDM time domain signal delayed by an effective symbol. Here, the time length for obtaining the correlation is set to the time length of the guard interval. Therefore, a signal indicating the correlation value (hereinafter, referred to as a guard interval correlation signal) is a signal having a peak just at the boundary position of the OFDM symbol. The guard correlation / symbol boundary detection circuit 12 detects the peak position of the guard interval correlation signal, and outputs the timing of the peak position as a symbol boundary timing (Np).
[0055]
The symbol boundary timing Np output from the guard correlation / symbol boundary detection circuit 12 is supplied to the timing synchronization circuit 13, and the phase of the correlation value at the peak timing is supplied to the narrowband carrier frequency error calculation circuit 14.
[0056]
The timing synchronization circuit 13 performs, for example, a filtering process on the symbol boundary timing Np output from the guard correlation / symbol boundary detection circuit 12, and determines the operation start timing for performing the FFT operation based on the result. The operation start timing is supplied to the FFT operation circuit 10 as a start flag. The FFT operation circuit 10 extracts a signal in the FFT operation range from the input OFDM time domain signal based on the start flag and performs the FFT operation. Further, the timing synchronization circuit 13 calculates a phase rotation amount caused by a time lag between a boundary position of the filtered OFDM symbol and a calculation start timing for performing FFT calculation, and performs a phase correction based on the calculated phase rotation amount. A signal (complex signal) is generated and supplied to the phase correction circuit 11.
[0057]
The narrow-band carrier error calculating circuit 14 calculates a narrow-band carrier frequency error component indicating a narrow-band component of the shift amount of the center frequency at the time of digital orthogonal demodulation based on the phase of the correlation value at the boundary position of the OFDM symbol. I do. Specifically, the narrow-band carrier frequency error component is a deviation amount of the center frequency with an accuracy of ± 1/2 or less of the subcarrier frequency interval. The narrow-band carrier frequency error component obtained by the narrow-band carrier error calculation circuit 14 is supplied to the addition circuit 16.
[0058]
The wideband carrier error calculation circuit 15 calculates a wideband carrier frequency error component indicating a wideband component of the shift amount of the center frequency at the time of digital orthogonal demodulation based on the OFDM frequency domain signal output from the phase correction circuit 11. The wideband carrier frequency error component is a shift amount of the center frequency of the subcarrier frequency interval accuracy.
[0059]
The wideband carrier frequency error component obtained by the wideband carrier error calculation circuit 15 is supplied to the addition circuit 16.
[0060]
The adding circuit 16 adds the narrow band carrier error component calculated by the narrow band carrier error detecting circuit 14 and the wide band carrier error component calculated by the wide band carrier error calculating circuit 15, and outputs the result from the carrier correcting circuit 9. Then, the total deviation amount of the center frequency of the baseband OFDM signal is calculated. The adding circuit 16 outputs the calculated total deviation amount of the center frequency as a frequency error value. The frequency error value output from the adding circuit 16 is supplied to the NCO 17.
[0061]
The NCO 17 is a so-called numerically controlled oscillator, and generates a carrier frequency error correction signal that increases or decreases according to the frequency error value output from the addition circuit 16. For example, the NCO 17 reduces the oscillation frequency of the carrier frequency error correction signal if the supplied frequency error value is a positive value, and decreases the oscillation frequency of the error correction signal if the supplied carrier frequency error value is a negative value. Is controlled so as to increase. The NCO 17 performs such control to generate a carrier frequency error correction signal that stabilizes the oscillation frequency when the frequency error value becomes zero.
[0062]
The frame synchronization circuit 18 detects a synchronization word inserted at a predetermined position in the OFDM transmission frame, and detects a start timing of the OFDM transmission frame. The frame synchronization circuit 18 specifies the symbol number of each OFDM symbol based on the start timing of the OFDM transmission frame, and supplies it to the equalization circuit 19 and the like.
[0063]
The equalization circuit 19 performs a so-called equalization process on the OFDM frequency domain signal. The equalization circuit 19 detects a pilot signal called an SP (Scattered Pilots) signal inserted in the OFDM frequency domain signal based on the symbol number supplied from the frame synchronization circuit 18. The OFDM frequency domain signal that has been equalized by the equalization circuit 19 is supplied to a demapping circuit 20.
[0064]
The demapping circuit 20 performs a reallocation process (demapping process) of data corresponding to the modulation method (for example, QPSK, 16QAM or 64QAM) on the OFDM frequency domain signal (complex signal) on which the equalization process has been performed. And restore the transmitted data. The transmission data output from the demapping circuit 20 is supplied to a transmission path decoding circuit 21.
[0065]
The transmission line decoding circuit 21 performs a transmission line decoding process corresponding to the broadcast system on the input transmission data. For example, the transmission path decoding circuit 21 performs time deinterleaving corresponding to time-direction interleaving, frequency deinterleaving corresponding to frequency-direction interleaving, and deinterleaving corresponding to bit interleaving for error distribution of multi-level symbols. Processing, depuncturing processing corresponding to puncturing processing for reducing transmission bits, Viterbi decoding processing for decoding convolutionally coded bit strings, deinterleaving processing in byte units, energy corresponding to energy spreading processing An error correction process corresponding to the despreading process and the RS encoding process is performed.
[0066]
The transmission data decoded in the transmission path in this manner is output as, for example, a transport stream defined by MPEG-2 Systems.
[0067]
The transmission control information decoding circuit 22 decodes transmission control information such as TMCC and TPS modulated at a predetermined position of the OFDM transmission frame.
[0068]
Guard correlation / Symbol boundary detection circuit
Next, a detailed configuration of the guard correlation / symbol boundary detection circuit 12 will be described.
[0069]
FIG. 2 shows a block diagram of the guard correlation / symbol boundary detection circuit 12. As shown in FIG. FIG. 3 is a block diagram showing only the symbol boundary detection circuit in the guard correlation / symbol boundary detection circuit 12. FIG. 4 shows a timing chart of each signal in the guard correlation / symbol boundary detection circuit 12.
[0070]
As shown in FIG. 2, the guard correlation / symbol boundary detection circuit 12 generates a guard interval correlation signal indicating the autocorrelation of the guard interval, and detects a peak position of the guard interval correlation signal. A symbol boundary detection circuit 32 that outputs a peak position as a symbol boundary position.
[0071]
The guard correlation detection circuit 31 has an effective symbol length delay circuit 33, a complex multiplication circuit 34, and a guard interval length integration circuit 35.
[0072]
The guard correlation detection circuit 31 receives the OFDM time domain signal (r (t)) output from the carrier frequency error correction circuit 9 as shown in FIG. 4A, that is, the OFDM signal that has been subjected to digital quadrature demodulation. Is entered. The OFDM time domain signal (r (t)) is supplied to an effective symbol length delay circuit 33 and a complex multiplication circuit 34.
[0073]
The effective symbol length delay circuit 33 is a shift register composed of, for example, Nu register groups, and delays the input OFDM time domain signal by an effective symbol time (Tu), as shown in FIG. . The OFDM time domain signal (r (t-Tu)) delayed by the effective symbol time by the effective symbol length delay circuit 33 is input to the complex multiplication circuit 34.
[0074]
The complex multiplying circuit 34 calculates a complex conjugate of the OFDM time domain signal delayed by the effective symbol period, and calculates the undelayed OFDM time domain signal (r (t)) and the OFDM time domain signal delayed by the effective symbol period. The signal (r (t-Tu)) is multiplied by a complex conjugate signal for each sample. The multiplication result is input to the guard interval length integration circuit 35.
[0075]
The guard interval length integration circuit 35 includes, for example, a shift register composed of a register group of the number of samples (Ng) for the guard interval, and an adder for calculating the sum of the values stored in each register. A moving sum operation is performed for each of Ng samples on the multiplication results sequentially input for each sample. The value output from the guard interval length integration circuit 35 is the correlation between the OFDM time domain signal (r (t)) and the OFDM time domain signal (r (t-Tu)) in which samples of the effective symbol have been delayed. Is obtained as a guard interval correlation signal.
[0076]
The guard interval correlation signal is a signal having a high level in a portion having a high correlation value and a low level in a portion having a low correlation value. Therefore, the guard interval correlation signal is ideally a signal in which a mountain-shaped waveform having a peak at the boundary position of the OFDM symbol is repeated. The guard interval correlation signal is supplied from the guard interval length integration circuit 35 to the symbol boundary detection circuit 32.
[0077]
As shown in FIG. 3, the symbol boundary detection circuit 32 includes a squaring circuit 36, a symbol length cycle counter 37, a maximum value detection circuit 38, and a detection section control circuit 39.
[0078]
The guard interval correlation signal output from the guard interval length integration circuit 35 is supplied to a squaring circuit 36.
[0079]
The squaring circuit 36 squares the real component (CI) and the imaginary component (CQ) of the guard interval correlation signal and adds them. As a result of the addition, a square signal (ΔCI) indicating the amplitude component of the guard interval correlation signal as shown in FIG.²+ CQ²｝ (T)) is generated. The square signal of the guard interval correlation signal is supplied to the maximum value detection circuit 38. The squaring circuit 36 squares the real part and the imaginary part of the guard interval correlation signal, adds them, takes the square root of the addition result, and obtains the amplitude component of the guard interval correlation signal. Is also good.
[0080]
The symbol length period counter 37 is a counter that counts the operation clock generated from the clock generation circuit 6. As shown in FIG. 4 (D), the count value N of the symbol length period counter 37 is incremented by one from 0 to Ns-1 every clock of the operation clock, and returns to 0 when it exceeds Ns-1. That is, the symbol length cycle counter 37 is a cyclic counter having one cycle with the number of samples (Ns) of the OFDM symbol. For example, here, the number of samples (Ns) in one cycle of the symbol length cycle counter 37 is set to 1088, and the count value N of the symbol length cycle counter 37 is a value that cyclically repeats 0 to 1087. The count value N of the symbol length period counter 37 is supplied to a maximum value detection circuit 38.
[0081]
The maximum value detection circuit 38 detects the timing at which the square signal of the guard interval correlation signal reaches a peak, and detects the count value N at that timing, as shown in FIG. Specifically, the maximum value detection circuit 38 sets a detection period T that is repeated at regular intervals, searches for the maximum value of the squared signal for each detection period T, and detects the maximum value at the timing when the maximum value is obtained. The count value N is output.
[0082]
Here, the detection section T is a section set by the detection section control circuit 39, and has the same time width as the cyclic period (0 to Ns-1) of the count value N. As a specific setting method, the detection section T is specified using the count value N of the symbol length period counter 37. That is, the detection section T is set as “section where the count value N is 0 to 1087” or “section where the count value N is 544 to 543”.
[0083]
The maximum value detection circuit 38 outputs the count value N of the maximum value obtained for each detection section T to the outside as a symbol boundary timing Np. The symbol boundary timing Np calculated in this way indicates the boundary position of the OFDM symbol.
[0084]
That is, since the symbol length period counter 37 counts the operation clock, the count value N is synchronized with the sampling timing of the OFDM time domain signal. Further, the symbol length cycle counter 37 has one cycle of the number of samples (Ns) of the OFDM symbol. Therefore, if there is no noise or clock frequency error, the boundary position of the actual OFDM symbol is generated with the same count value N. Therefore, if the above-described detection interval T is set for the cyclic period of the symbol length period counter 37 and the maximum value of the guard interval correlation signal is detected within the set detection interval T, the timing becomes the OFDM symbol. Is the boundary position.
[0085]
By the way, when there is no noise, the symbol boundary timing Np can be output accurately no matter how the detection interval T is set with respect to the actual position of the OFDM symbol boundary position. In this case, it is desirable that the timing at which the guard interval correlation signal becomes a peak (the actual OFDM symbol boundary timing) and the detection interval T be adjusted so as to be shifted by about a half cycle. That is, it is desirable that the output symbol boundary timing Np be a value near the median of the detection interval T.
[0086]
The above reason will be described.
[0087]
The detection section T of the maximum value detection circuit 38 is the same as the period of one cycle of the symbol length cycle counter 37. The maximum value detection circuit 38 outputs the count value of the timing at which the square value of the guard interval correlation signal becomes maximum in the detection section T as the symbol boundary timing Np. Here, if the update timing of the detection section T (that is, the start position or the end position of the detection section T) and the timing at which the square value of the guard interval correlation signal becomes the maximum are temporally close, 1 A portion having a high correlation (that is, a mountain-shaped portion) generated by the guard interval of the immediately preceding OFDM symbol is included in the peak detection processing in the next OFDM symbol period and is determined. Since the peak value of the guard interval correlation signal does not always become a constant value due to various kinds of noises and errors and may fluctuate for each symbol, in such a case, the peak value is generated by the guard interval of the previous OFDM symbol. There is a possibility that a highly correlated part is determined to be the boundary position of the next OFDM symbol.
[0088]
Therefore, by adjusting the symbol boundary timing Np in advance so as to be a value at the center position of the detection section T, a portion having a high correlation caused by the guard interval of the immediately preceding OFDM symbol (a mountain-shaped portion). Portion) is not included in the determination for the next OFDM symbol, and stable peak position detection can be performed.
[0089]
The above is the reason why it is desirable that the symbol boundary timing Np is a value near the median of the detection section T.
[0090]
However, since the receiving apparatus is not a system in which the operation clock and the received signal are synchronized, there is a clock frequency error (error between the transmission clock of the received OFDM signal and the operation clock). Therefore, even if the symbol boundary timing Np is near the median of the detection section T, the symbol boundary timing Np moves gradually.
[0091]
Therefore, in the symbol boundary detection circuit 32, the detection section control circuit 39 is provided so that the detection section T can be appropriately adjusted even in such a case.
[0092]
Hereinafter, the detection section control circuit 39 will be described.
[0093]
The detection interval control circuit 39 determines the positional relationship between the output value of the symbol boundary timing Np and the currently set detection interval T, and based on the determination result, detects the detection interval T with respect to the cyclic period of the count value N. Change the setting of.
[0094]
Specifically, the detection section control circuit 39 determines how far the symbol boundary timing Np is from the median of the currently set detection section T.
[0095]
For example, if the currently set detection section T is “a section where the count value N is 0 to 1087”, the median value is “544”, and the currently set detection section T is “count If the value N is in the section "544 to 543", the median value is "0", and the difference between the median value and the symbol boundary timing Np is obtained.
[0096]
Subsequently, the detection section control circuit 39 determines whether or not the distance between the symbol boundary timing Np and the median is greater than or equal to a predetermined range. That is, it is determined whether or not the symbol boundary timing Np is located near the end of the detection section T.
[0097]
As a result of the determination, if the distance between the symbol boundary timing Np and the median is equal to or less than a predetermined range, the setting of the detection section T is left as it is.
[0098]
As a result of the determination, if the distance between the symbol boundary timing Np and the median is greater than or equal to a predetermined range (if the symbol boundary timing Np is located at the end of the detection interval T), the detection interval T is set. To change. Specifically, as shown in FIG. 4 (F), the setting of the detection section T is changed so that the symbol boundary timing Np becomes closer to the median value. That is, the setting of the detection section T is changed so that the symbol boundary timing Np is detected near the center of the detection section T.
[0099]
By performing control as described above, the detection section control circuit 39 can set the symbol boundary timing Np to a value near the median of the detection section T.
[0100]
As described above, the OFDM receiver 1 is provided with the symbol boundary detection circuit 32 that calculates the symbol boundary timing Np of the OFDM symbol based on the autocorrelation signal (guard interval correlation signal) of the guard interval of the OFDM signal. The symbol boundary detection circuit 32 sets a detection range T set to be equal to the number of samples of the OFDM symbol, detects the detection timing of the maximum value of the guard interval correlation signal within the detection range T, and determines the timing. Output as the symbol boundary position Np. Further, the symbol boundary detection circuit 32 appropriately controls the phase of the detection range T so that the symbol boundary timing Np is located near the center position of the detection range T.
[0101]
For this reason, the OFDM receiver 1 can perform, for example, the timing of extracting a symbol for performing the FFT operation with high accuracy without erroneous detection of the symbol boundary position, thereby improving the demodulation accuracy. it can.
[0102]
Note that the detection section control circuit 39 does not change the setting of the detection section T every time. For example, a case where the distance between the symbol boundary timing Np and the median is equal to or longer than a predetermined range occurs in a plurality of continuous detection sections. Or when the number of times the distance between the symbol boundary timing Np and the median is greater than or equal to a predetermined range is accumulated and the accumulated number becomes greater than or equal to a predetermined number. It may be performed. Even in such a case, when the reset operation of the receiving apparatus 1 is performed (at the start of demodulation), the detection range is set so that the symbol boundary timing Np is immediately located near the center of the detection range T. It is desirable to control the phase of T.
[0103]
Further, in this embodiment, the case where the operation clock is asynchronous with respect to the received signal has been described as an example. However, the present invention may be such that the operation clock and the received signal are synchronized by a PLL circuit or the like. . In such a case, when the reset operation of the receiving device 1 is performed (at the start of demodulation), the detection range T is detected only once so that the symbol boundary timing Np is located near the center position of the detection range T. What is necessary is just to control a phase.
[0104]
An output latch circuit 40 may be provided for the symbol boundary detection circuit 32 as shown in FIG. FIG. 6 shows a timing chart of each signal in the guard correlation / symbol boundary detection circuit 12 when the output latch circuit 40 is provided. 6A to 6F are the same as the timings when the output latch circuit 40 is not provided, and the description thereof is omitted.
[0105]
The output latch circuit 40 fetches the count value output from the maximum value detection circuit 38 and stores it in the internal register at the timing when the count value N of the symbol length period counter 37 becomes 0, as shown in FIG. Then, the count value is set to a state where it can be output to the outside. The count value stored in the register is output to the subsequent stage.
[0106]
By providing the output latch circuit 40 in this manner, even if the detection section T is changed, the symbol boundary timing Np can be generated at a constant interval outside. Therefore, timing control of the entire apparatus can be simplified.
[0107]
Second embodiment
Next, an OFDM receiver according to a second embodiment of the present invention will be described.
[0108]
The OFDM receiver according to the second embodiment of the present invention is a modification of the symbol boundary detection circuit 32 of the OFDM receiver 1 according to the first embodiment, and is otherwise the same as the first embodiment. It is. Therefore, in the OFDM receiver according to the second embodiment of the present invention, only the symbol boundary calculation circuit will be described, and the same components as those in the first embodiment will be denoted by the same reference numerals in the drawings. The detailed description is omitted.
[0109]
FIG. 7 shows a block diagram of a symbol boundary detection circuit 50 in the OFDM receiver according to the second embodiment. FIG. 8 shows a timing chart of each signal in the guard correlation / symbol boundary detection circuit 12 having the symbol boundary detection circuit 50. Note that FIGS. 8A to 8D have the same timings as those in the first embodiment, and a description thereof will be omitted.
[0110]
As shown in FIG. 7, the symbol boundary detection circuit 50 includes a squaring circuit 36, a symbol length period counter 37, first to n-th maximum value detection circuits 51-1 to 51-n, a selector 52, And a section selection circuit 53.
[0111]
The count value N of the symbol length period counter 37 is supplied to each of the first to n-th maximum value detection circuits 51-1 to 51-n.
[0112]
As shown in FIGS. 8D and 8E, the first to n-th maximum value detection circuits 51-1 to 51-n each determine the timing at which the square signal of the guard interval correlation signal reaches a peak. Then, the count value N at that timing is detected. Specifically, in the first to n-th maximum value detection circuits 51-1 to 51-n, a detection period T that is repeated at regular intervals is set, and the maximum value of the square signal is determined for each of the detection intervals T. The search is performed, and the count value N at the timing when the maximum value is obtained is output. FIG. 8 shows an example where n = 2.
[0113]
Here, the detection section T is a preset section, and has the same time width as the cyclic period (0 to Ns-1) of the count value N. As a specific setting method, the detection section T is specified using the count value N of the symbol length period counter 37. That is, the detection section T is set as “section where the count value N is 0 to 1087” or “section where the count value N is 544 to 543”.
[0114]
Further, the detection sections T set in the first to n-th maximum value detection circuits 51-1 to 51-n are shifted in phase from each other.
[0115]
For example, in the first maximum value detection circuit 51-1, the detection section T is set in a “section in which the count value N is 0 to Ns”, and in the second maximum value detection circuit 51-2, the “count value N is ｛Ns / (N−1) to [(Ns−1) + (Ns / (n−1)) mod Ns]}, the detection period T is set, and the n-th maximum value detection circuit 51-n sets “ Count value N is in the range of {((Ns−1) × Ns) / (n−1) to [(Ns−1) + ((n−2) × Ns) / (n−1)) mod Ns]. Is set to the detection period T.
[0116]
The first to n-th maximum value detection circuits 51-1 to 51-n output the count value N of the maximum value obtained for each detection section T to the selector 52 as the symbol boundary timing Np.
[0117]
The selector 52 selects one of the n symbol boundary timings Np output from the first to n-th maximum value detection circuits 51-1 to 51-n according to the setting of the detection section selection circuit 53. And output to the outside.
[0118]
The detection section selection circuit 53 supplies the selector 52 with a selection signal for selecting any one of the first to n-th maximum value detection circuits 51-1 to 51-n. .
[0119]
Further, the detection section selection circuit 53 determines the positional relationship between the value of the symbol boundary timing Np output from the selector 52 and the detection section T currently set by the maximum value detection circuit 51, and based on the determination result, On the basis of this, the setting of the detection section T for the cyclic period of the count value N is obtained, and
A corresponding new maximum value detection circuit 51 is selected.
[0120]
Specifically, the detection section selection circuit 53 determines how far the symbol boundary timing Np from the selector 52 is from the median of the currently set detection section T.
[0121]
For example, if the currently set detection section T is “a section where the count value N is 0 to 1087”, the median value is “544”, and the currently set detection section T is “count If the value N is in the section "544 to 543", the median value is "0", and the difference between the median value and the symbol boundary timing Np is obtained.
[0122]
Subsequently, the detection section selection circuit 53 determines whether or not the distance between the symbol boundary timing Np and the median is greater than or equal to a predetermined range. That is, it is determined whether or not the symbol boundary timing Np is located near the end of the detection section T.
[0123]
As a result of the determination, if the distance between the symbol boundary timing Np and the median is equal to or less than a predetermined range, the setting of the selected maximum value detection circuit 51 is left as it is.
[0124]
As a result of the determination, if the distance between the symbol boundary timing Np and the median is greater than or equal to a predetermined range (if the symbol boundary timing Np is located at the end of the detection interval T), the detection interval T is set. Is changed, and the maximum value detection circuit 51 is newly selected.
[0125]
Specifically, as shown in FIG. 8 (G), the maximum value detection circuit 51 having the detection section T whose symbol boundary timing Np is closer to the median value is selected. That is, the maximum value detection circuit 51 having the detection section T in which the symbol boundary timing Np is detected near the center is selected.
[0126]
By performing the selection as described above, the detection section selection circuit 53 can set the symbol boundary timing Np to a value near the median of the detection section T.
[0127]
As described above, in the OFDM receiver according to the second embodiment of the present invention, the symbol boundary detection circuit that calculates the symbol boundary timing Np of the OFDM symbol based on the autocorrelation signal (guard interval correlation signal) of the guard interval of the OFDM signal. 50 are provided. In the symbol boundary detection circuit 50, a plurality of detection ranges T which are set to be the same as the number of samples of the OFDM symbol and have different phases are set, and the detection timing of the maximum value of the guard interval correlation signal within each detection range T is detected. Then, it is output as the symbol boundary timing Np. Further, the symbol boundary detection circuit 50 selects one optimal detection range from a plurality of detection ranges T such that the symbol boundary timing Np is located near the center position.
[0128]
For this reason, the OFDM receiver according to the second embodiment of the present invention eliminates erroneous detection of a symbol boundary position, and can perform, for example, a symbol cutout timing for performing an FFT operation with high accuracy. Therefore, the demodulation accuracy can be improved.
[0129]
Note that the detection section selection circuit 53 does not change the setting of the detection section T every time. For example, a case where the distance between the symbol boundary timing Np and the median is longer than a predetermined range occurs in a plurality of continuous detection sections. When the number of times the distance between the symbol boundary timing Np and the median is greater than or equal to a predetermined range is accumulated, and the accumulated number becomes greater than or equal to a predetermined number, the detection section T is changed. It may be performed. Even in such a case, when the reset operation of the receiving device 1 is performed (at the start of demodulation), the detection range such that the symbol boundary timing Np is immediately located near the center position of the detection range T is used. It is desirable to select T.
[0130]
Also in the second embodiment, the operation clock is asynchronous with respect to the received signal as in the first embodiment. However, even if the operation clock and the received signal are synchronized by a PLL circuit or the like. good. In such a case, when the reset operation of the receiving apparatus 1 is performed (at the start of demodulation), the detection range T is selected only once so that the symbol boundary timing Np is located near the center position. good.
[0131]
Further, an output latch circuit 54 may be provided for the symbol boundary detection circuit 50 as shown in FIG. FIG. 10 shows a timing chart of each signal in the guard correlation / symbol boundary detection circuit 50 when the output latch circuit 54 is provided. 10 (A) to 10 (H) are the same as the timing when the output latch circuit 54 is not provided, and the description thereof is omitted.
[0132]
The output latch circuit 54 fetches the symbol boundary timing Np output from the selector 52 and stores it in an internal register at the timing when the count value N of the symbol length period counter 37 becomes 0, as shown in FIG. , The count value is set to a state where it can be output to the outside. The count value stored in the register is output to the subsequent stage.
[0133]
By providing the output latch circuit 54 in this manner, even if the detection period T is changed, the symbol boundary timing Np can be generated at a constant interval outside. Therefore, timing control of the entire apparatus can be simplified.
[0134]
【The invention's effect】
In the OFDM demodulation apparatus and method according to the present invention, a symbol boundary position is calculated based on the autocorrelation of a guard interval of an OFDM signal, and when calculating the symbol boundary position, a detection range set to a time interval period of a transmission symbol is calculated. Is set, the sample timing of the maximum autocorrelation value within the detection range is detected, and the detected timing is output as a symbol boundary position. Further, in the present invention, phase control is performed so that the detection range is at an optimum position.
[0135]
Therefore, in the OFDM demodulation apparatus and method according to the present invention, erroneous detection of the symbol boundary position can be eliminated, and the detection accuracy can be improved.
[Brief description of the drawings]
FIG. 1 is a block diagram of an OFDM receiver according to a first embodiment of the present invention.
FIG. 2 is a block diagram of a guard correlation / symbol boundary detection circuit of the OFDM receiver according to the first embodiment of the present invention.
FIG. 3 is a block diagram of a symbol boundary detection circuit in the guard correlation / symbol boundary detection circuit.
FIG. 4 is a timing chart of each signal in the guard correlation / symbol boundary detection circuit.
FIG. 5 is a block diagram showing a modification in which an output latch circuit is provided in the symbol boundary detection circuit shown in FIG. 3;
6 is a timing chart of each signal in the symbol boundary detection circuit shown in FIG.
FIG. 7 is a block diagram illustrating a symbol boundary detection circuit of an OFDM receiver according to a second embodiment of the present invention.
FIG. 8 is a timing chart of each signal in the guard correlation / symbol boundary detection circuit according to the second embodiment of the present invention.
FIG. 9 is a block diagram showing a modification in which an output latch circuit is provided in the symbol boundary detection circuit shown in FIG. 7;
FIG. 10 is a timing chart of each signal in the symbol boundary detection circuit shown in FIG.
FIG. 11 is a diagram illustrating a symbol configuration of an OFDM signal.
FIG. 12 is a block diagram of a symbol synchronization circuit of a conventional OFDM demodulator.
FIG. 13 is a block diagram of a symbol boundary detection circuit in a symbol synchronization circuit of a conventional OFDM demodulator.
FIG. 14 is a timing chart of each signal in a conventional symbol synchronization circuit.
[Explanation of symbols]
REFERENCE SIGNS LIST 1 OFDM receiver, 2 antenna, 3 tuner, 4 bandpass filter, 5 A / D conversion circuit, 6 clock generation circuit, 7 DC cancellation circuit, 8 digital quadrature demodulation circuit, 9 carrier frequency error correction circuit, 10 FFT operation circuit , 11 phase correction circuit, 12 guard correlation / symbol boundary detection circuit, 13 timing synchronization circuit, 14 narrow band carrier error calculation circuit, 15 wide band carrier error calculation circuit, 16 addition circuit, 17 numerical control oscillation circuit, 18 frame synchronization circuit, 19 equalization circuit, 20 demapping circuit, 21 transmission line decoding circuit, 22 transmission control information decoding circuit

Claims (20)

Transmission including an effective symbol generated by modulating an information sequence into a plurality of subcarriers by time division and a guard interval generated by copying a signal waveform of a part of the effective symbol. In an OFDM demodulator for demodulating an orthogonal frequency division multiplexing (OFDM) signal using a symbol as a transmission unit,
Counting means for generating a count value that is incremented in synchronization with a reference clock and that is cyclically repeated at a cycle corresponding to the time interval of the transmission symbol;
A detection cycle control unit that sets a detection cycle that is repeated at the same cycle as the cycle of the count value, and controls a phase of the detection cycle with respect to the cycle of the count value,
Symbol boundary detecting means for detecting a maximum value of the autocorrelation value of the guard interval portion of the OFDM signal in the detection period, and outputting a count value at which the maximum value is generated as a symbol boundary position for each detection period. Prepare,
An OFDM demodulator, wherein the detection cycle control means controls a phase of the detection cycle with respect to a cyclic cycle of the count value in accordance with a position where the maximum value occurs in the detection cycle. The detection cycle control means moves the generation position of the maximum value toward the center of the detection cycle when the generation position of the maximum value is not included in a predetermined range from the center position of the detection cycle. 2. The OFDM demodulator according to claim 1, wherein the phase of the detection cycle with respect to the cyclic cycle of the count value is controlled. The detection cycle control means, when a state in which the position where the maximum value occurs is not included within a predetermined range from the center position of the detection cycle occurs a plurality of times, sets the position where the maximum value occurs in the detection cycle. 3. The OFDM demodulator according to claim 2, wherein the phase of the detection cycle with respect to the cyclic cycle of the count value is controlled so as to move toward the center of the OFDM demodulator. The detection cycle control means, when a state in which the position where the maximum value occurs is not included within a predetermined range from the center position of the detection cycle occurs at the start of the demodulation operation, the position where the maximum value occurs. 4. The OFDM demodulator according to claim 3, wherein the phase of the detection cycle with respect to the cyclic cycle of the count value is immediately controlled so that the signal moves in the center direction of the detection cycle. Latching means for latching a symbol boundary position output from the symbol boundary detecting means,
2. The OFDM demodulator according to claim 1, wherein said latch means fetches said symbol boundary position based on a cyclic period of a count value of said count means. Transmission including an effective symbol generated by modulating an information sequence into a plurality of subcarriers by time division and a guard interval generated by copying a signal waveform of a part of the effective symbol. In an OFDM demodulator for demodulating an orthogonal frequency division multiplexing (OFDM) signal using a symbol as a transmission unit,
Counting means for generating a count value that is incremented in synchronization with a reference clock and that is cyclically repeated at a cycle corresponding to the time interval of the transmission symbol;
A detection cycle repeated at the same cycle as the cyclic cycle of the count value is set, and the maximum value of the autocorrelation value of the guard interval portion of the OFDM signal within the detection cycle is detected, and the maximum value is generated. A plurality of symbol boundary detection means for outputting the counted value for each detection cycle,
Selecting output means for selecting any one of the plurality of symbol boundary detection means, and outputting the count value output from the selected symbol boundary detection means as a symbol boundary position,
In the plurality of symbol boundary detection means, the detection cycle is set to a phase different from each other,
The selection output means selects any one of the symbol boundary detection means according to a position where the maximum value occurs within a detection cycle set by the selected symbol boundary detection means. OFDM demodulator. The detection cycle selection means, when the position where the maximum value occurs from the center position of the detection cycle set in the symbol boundary detection means is not included within a predetermined range, sets the generation position of the maximum value to 7. The OFDM demodulator according to claim 6, wherein a symbol boundary detecting means having a phase detection period that moves toward the center of the detection period is selected. The detection cycle selecting means, when a state in which the occurrence position of the maximum value is not included within a predetermined range from the center position of the detection cycle set in the symbol boundary detection means occurs a plurality of times, sets the maximum value. 8. The OFDM demodulator according to claim 7, wherein a symbol boundary detecting means having a phase detection period such that a position where a value is generated moves in the center direction of the detection period is selected. The detection cycle selection means, when a state where the occurrence position of the maximum value is not included within a predetermined range from the center position of the detection cycle set in the symbol boundary detection means occurs at the start of the demodulation operation, 9. The OFDM demodulator according to claim 8, wherein the symbol selecting means immediately selects a symbol boundary detecting means having a phase detection period such that the maximum value generation position moves toward the center of the detection period. Latch means for latching a symbol boundary position output from the selection output means,
7. The OFDM demodulator according to claim 6, wherein said latch means takes in said symbol boundary position based on a cyclic period of a count value of said count means. Transmission including an effective symbol generated by time-divisionally modulating an information sequence onto a plurality of subcarriers and a guard interval generated by copying a signal waveform of a part of the effective symbol In an OFDM demodulation method for demodulating an orthogonal frequency division multiplexing (OFDM) signal using a symbol as a transmission unit,
Generating a count value that is incremented in synchronization with the reference clock and that is cyclically repeated at a cycle corresponding to the time interval of the transmission symbol;
Set a detection cycle that is repeated at the same cycle as the cycle cycle of the count value,
Detecting the maximum value of the autocorrelation value of the guard interval portion of the OFDM signal within the detection period, outputting a count value at which the maximum value is generated as a symbol boundary position for each detection period,
An OFDM demodulation method, wherein a phase of the detection cycle with respect to a cyclic cycle of the count value is controlled in accordance with a position where the maximum value occurs in the detection cycle. When the position where the maximum value occurs is not included within a predetermined range from the center position of the detection cycle, the count value of the count value is moved so that the position where the maximum value occurs moves toward the center of the detection cycle. 12. The OFDM demodulation method according to claim 11, wherein a phase of the detection cycle with respect to a cyclic cycle is controlled. When a state in which the position where the maximum value occurs is not included within a predetermined range from the center position of the detection cycle occurs a plurality of times, the position where the maximum value occurs moves toward the center of the detection cycle. 13. The OFDM demodulation method according to claim 12, wherein a phase of the detection cycle with respect to a cyclic cycle of the count value is controlled. When the state where the position where the maximum value occurs is not included within a predetermined range from the center position of the detection cycle occurs at the start of the demodulation operation, the position where the maximum value occurs is shifted toward the center of the detection cycle. 14. The OFDM demodulation method according to claim 13, wherein the phase of the detection cycle with respect to the cyclic cycle of the count value is immediately controlled so as to move. 12. The OFDM demodulation method according to claim 11, wherein a symbol boundary position is latched based on a cyclic period of the count value, and the latched symbol boundary position is output to the outside. Transmission including an effective symbol generated by time-divisionally modulating an information sequence onto a plurality of subcarriers and a guard interval generated by copying a signal waveform of a part of the effective symbol In an OFDM demodulation method for demodulating an orthogonal frequency division multiplexing (OFDM) signal using a symbol as a transmission unit,
Detecting a count value that is incremented in synchronization with a reference clock and that is cyclically repeated at a cycle corresponding to the time interval of the transmission symbol, and is repeated at the same cycle as the cyclic cycle of the count value; The periods are set with mutually different phases, the maximum value of the autocorrelation value of the guard interval portion of the OFDM signal within the detection period is detected, and the count value at which the maximum value is generated is determined for each of the detection periods. Select one of the plurality of symbol boundary detectors to be output, and output the count value output from the selected symbol boundary detector as a symbol boundary position,
An OFDM demodulation method, wherein one of the symbol boundary detectors is selected according to a position where the maximum value occurs within a detection period set for the selected symbol boundary detector. If the position where the maximum value occurs is not included within a predetermined range from the center position of the detection period set in the symbol boundary detector, the position where the maximum value occurs moves toward the center of the detection period. 17. The OFDM demodulation method according to claim 16, wherein a symbol boundary detector having a phase detection period is selected. If a state in which the position where the maximum value occurs is not included in a predetermined range from the center position of the detection cycle set in the symbol boundary detector occurs a plurality of times, the position where the maximum value occurs is detected by the detection. 18. The OFDM demodulation method according to claim 17, wherein a symbol boundary detector having a phase detection period that moves toward the center of the period is selected. If a state in which the position where the maximum value is generated is not included in a predetermined range from the center position of the detection cycle set in the symbol boundary detector occurs at the start of the demodulation operation, the generation of the maximum value is performed. 19. The OFDM demodulation method according to claim 18, wherein a symbol boundary detector having a phase detection period whose position moves toward the center of the detection period is immediately selected. 17. The OFDM demodulation method according to claim 16, wherein a symbol boundary position is latched based on a cyclic period of the count value, and the latched symbol boundary position is output to the outside.

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