JP2004304178A - Laminated electronic component and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a laminated electronic component that is constituted as a laminated chip component or laminated substrate, can be manufactured through a small number of manufacturing processes, and can be reduced in stray inductance, stray capacitance, and size; and to provide a method of manufacturing the component. <P>SOLUTION: The laminated electronic component has core substrate layers 1H-1L obtained by forming a composite material prepared by mixing the powder of a functional material in a resin into thin plate-like shapes and curing the resin. The core substrate layers 1H-1L have at least one core substrate layer in which counter electrodes forming a capacitor and their wiring are formed. The laminated structure of this laminated electronic component is realized by sticking the core substrate layers 1H-1L to each other through resin-made adhesive layers 2H-2K having via hole conductors 7 formed by using conductive paste. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a multilayer electronic component configured as a multilayer chip component or a multilayer substrate using a composite material obtained by mixing a functional material powder with a resin.

  When manufacturing a laminated substrate or the like using a resin substrate, a build-up method is generally used. In this method, a hole is made by a laser or the like on a patterned core substrate provided with metal foil on both sides, and electroless plating and electrolytic plating of copper are performed thereon, and the upper and lower conductor patterns are connected, and at least one of the upper and lower sides is connected. This is a method in which a prepreg and a metal foil are overlapped on one side, patterning is performed, and a step of connecting upper and lower conductor patterns by processing a via hole and plating is repeated.

  As another conventional method of manufacturing a laminated substrate or the like using a resin material, a prepreg including a glass cloth is formed, and the prepreg and a core substrate are alternately stacked, heated, cured, and integrated. After that, in order to connect the conductor patterns of the respective layers, a through-hole penetrating the whole is provided, and the through-holes are connected by electroless plating or electrolytic plating.

  Also, in Patent Document 1, a double-sided wiring board having conductor patterns on both sides of a resin substrate, and the conductor patterns on both sides are connected by via holes, and a through hole for a via hole is formed at a predetermined position on an adhesive sheet. There is disclosed a method in which an interlayer adhesive sheet filled with a conductive paste is alternately aligned and stacked, and heated and pressed for stacking.

JP-A-9-298361.

  In the build-up method, it is necessary to perform hot pressing for each layer, and there is a problem that the number of steps is increased. In addition, the method in which the core substrate and the prepreg are overlapped and integrated at a time involves connecting the internal conductor pattern with the through-hole, thereby increasing the stray inductance and the stray capacitance due to the conductor in the through-hole. In addition, a space for providing a through-hole is required, which makes it difficult to reduce the size of the laminated substrate or the like.

  Also, the one described in Patent Document 1 is used as a multilayer wiring board, and does not constitute a capacitor inside, but has a dielectric constant of 5 or less to avoid capacitive coupling between conductor patterns of each layer. Things are used. For this reason, in order to apply this structure to a laminated electronic component, it is necessary to devise a size aspect, that is, a miniaturization aspect.

  The present invention has been made in view of the above-described problems, and when a laminated electronic component with a built-in capacitor is formed using a resin substrate, the number of manufacturing steps is small, and a stray capacitance and a stray inductance can be reduced. And a method for manufacturing the same. Another object of the present invention is to provide a laminated electronic component whose internal circuit can be densely formed and a method of manufacturing the same.

(1) The multilayer electronic component of the present invention is a multilayer electronic component configured as a multilayer chip component or a multilayer substrate,
A substrate formed by mixing a composite material obtained by mixing a functional material powder with a resin into a thin plate shape, has at least one core substrate layer formed by curing a counter electrode forming a capacitor and its wiring,
A laminated structure is realized by attaching the core substrate layer with a resin adhesive layer having via holes filled with a conductive paste.

  (2) The multilayer electronic component of the present invention is characterized by including at least one core substrate layer having a dielectric constant of 10 or more.

  (3) The multilayer electronic component of the present invention includes a capacitor having a capacitance of 30 pF or more, and the dielectric constant of a layer constituting the capacitor is 10 or more and 50 or less. .

  (4) Further, the laminated electronic component of the present invention is characterized in that the adhesive layer contains a functional material powder, and a capacitor is formed using electrodes on both sides of the adhesive layer as counter electrodes.

(5) The method for manufacturing a multilayer electronic component of the present invention is a method for manufacturing a multilayer electronic component configured as a multilayer chip component or a multilayer substrate,
A plurality of core substrates including a composite material obtained by mixing a functional material powder with a resin into a thin plate shape, and including at least one core substrate formed on both sides and having a counter electrode forming a capacitor and its wiring and cured. And one or more adhesive sheets made of resin or a composite material obtained by mixing functional material powder with resin,
An adhesive sheet is interposed between the core substrates, and they are integrated by pressing and overlapping,
The capacitor is characterized in that the layer made of the adhesive sheet is a dielectric layer.

  According to the present invention, the conductive pattern between the core substrates is connected by sandwiching the adhesive sheet in which the conductive paste for connection is embedded between the core substrates, and a capacitor obtained by mixing a functional material powder with the core substrate is used to form a capacitor. Since a dielectric powder is mixed into the core substrate layer to increase the dielectric constant, the number of manufacturing steps is reduced when a laminated electronic component with a built-in capacitor is formed using a resin substrate.

  In addition, it is possible to provide a multilayer electronic component that has a small amount of stray capacitance and stray inductance due to a through-hole, improves characteristics, and can be configured in a small size.

  Further, according to the present invention, since the capacitor is formed by using the adhesive layer as the dielectric layer, the internal circuit can be formed densely, and the size of the multilayer electronic component can be further reduced.

  In addition, by forming a capacitor on the core substrate, a high-precision capacitor can be formed inside the substrate.Therefore, particularly in high frequency applications, required characteristics are required when configuring a resonance type device or configuring a matching device. Capacitors with sufficient precision to meet can be constructed in a substrate in a thin, small area and at low cost.

  In the case of forming a capacitor according to the present invention, since a core substrate and an adhesive layer can be laminated at a time, a multilayer capacitor having a large number of layers can be manufactured in a short time and at low cost. As a result, a large-capacity capacitor can be formed as a thin, small-area, and low-cost capacitor in the multilayer electronic component or as a capacitor alone.

  Furthermore, by using the same material for the adhesive layer and using the adhesive layer as a dielectric layer for forming the capacitor, the accuracy of the interlayer thickness is slightly reduced. Since it can be configured, it is possible to manufacture a multilayer electronic component with higher multilayer, thinner, smaller, and lower cost.

  Further, when a filter is formed by the conventional technology, a through-hole must be used, so that the wiring becomes long, resulting in a floating inductance component, and as a result, high-frequency attenuation characteristics deteriorate. However, according to the configuration of the present invention, the capacitor can be directly connected to the ground terminal electrode via the via-hole conductor, so that the stray inductance component can be reduced to a minimum. Can be prevented from deteriorating.

  Further, when a capacitor having a general capacitance value of 30 pF or more and a dielectric constant ε of 10 or more and 50 or less is used, a high-frequency capacitor can be formed by forming a narrow electrode area. Yes, it satisfies both general and high frequency requirements. On the other hand, if the dielectric constant ε is less than 10, a sufficient effect for miniaturization cannot be obtained in a general-purpose application, and the size becomes large. In this case, a signal passing through a signal line provided in this layer is affected, but by setting the dielectric constant in the above range, miniaturization can be achieved and deterioration of a high-frequency signal can be avoided.

  FIG. 1 is a process chart showing one embodiment of a method for manufacturing a laminated electronic component of the present invention. In FIG. 1A, 1 is a core substrate, and 2 is an adhesive sheet. The core substrate 1 is prepared by impregnating a composite material obtained by mixing a functional material powder (dielectric powder or magnetic powder) with a thermosetting resin in a paste form with a solvent into a glass cloth, and drying by heating at, for example, about 100 ° C. Is semi-cured to form a prepreg, and a copper foil is adhered to both surfaces of the prepreg, and is heated and pressed at, for example, 200 ° C., so that the copper foil is fixed to the core substrate 1 and the resin is fully cured. It is something.

  As another manufacturing method of the core substrate 1, the composite material is applied to a copper foil and dried to be in a semi-cured state, a copper foil is stuck on the opposite side of the copper foil, or the opposite sides of the copper foil are joined together. There is also a method of hot-pressing while facing each other, and any other manufacturing method may be adopted as long as copper foil is attached to both surfaces and a hole can be formed.

  A hole 3 is drilled in the core substrate 1 thus manufactured by a drill, a laser, or the like, and the hole 3 is formed by electroless plating and electrolytic plating or filling with a conductive paste. Is formed, and then, a copper foil is formed in a predetermined pattern 5 to produce the same. The formation order of the via-hole conductor 4 and the conductor pattern 5 may be reversed. The core substrate 1 has a predetermined rectangular area, and the conductor pattern 5 is formed by arranging a plurality of laminated electronic components vertically and horizontally.

  The adhesive sheet 2 is made of resin, and may be any material that can be bonded to the core substrate 1 at room temperature or can be heated and bonded, and may be a mixture of functional material powders or not. Moreover, what has a glass cloth like a prepreg may be used. Also in this adhesive sheet 2, holes 6 are formed in the upper and lower core substrates 1 at locations where the conductor patterns 5 are to be connected, and the holes 6 are filled with a conductive paste to form via-hole conductors 7.

  As shown in FIG. 1B, the laminated electronic component of the present invention is formed by alternately stacking core substrates 1 and adhesive sheets 2 and pressing them at room temperature or by heating and pressing. Thereafter, if necessary, a through-hole (not shown) is opened, and the through-hole is subjected to electroless plating and electroplating. Further, in order to form an external electrode, a through-hole is provided in a portion to be cut, and a conductor is formed in the through-hole by plating, and a terminal electrode on the side is formed by cutting. Is provided as a terminal electrode for external connection. In the case where electronic components are mounted on the core substrate 1 of the uppermost layer, a component on which a conductive pattern for mounting is formed is used.

  In the present invention, such a connection structure between layers is basically employed to constitute a laminated substrate or a laminated chip component. A counter electrode is formed on at least the core substrate 1 by the conductor patterns 5 provided on both surfaces of the core substrate 1 to form a capacitor as described later.

  By adopting such a manufacturing procedure, it is not necessary to perform hot pressing for each layer as in the case of the build-up method, and the number of steps can be reduced. Further, since the through-hole can be reduced to a minimum or eliminated, the occurrence of stray inductance and stray capacitance due to the conductor in the through-hole can be suppressed, and the characteristics are improved. Further, the space for the through-hole is reduced or unnecessary, so that the size can be easily reduced. Further, by mixing a powder having a high dielectric constant into the core substrate 1, the area of the counter electrode of the capacitor can be reduced, and the size can be reduced.

  FIG. 2 is a cross-sectional view showing a bandpass filter (BPF) configured by employing the interlayer connection structure according to the present invention, wherein 1A to 1F are provided on a core substrate layer, 2A to 2E are provided on an adhesive layer, and 4 is provided on a core substrate. Via-hole conductors, 5A to 5D are conductor patterns provided on both surfaces of the core substrate layer, 7 is a via-hole conductor formed of a conductive paste, and 8 is a terminal electrode. In this BPF, a capacitor is constituted by the core substrate layers 1B and 1E and the conductor patterns 5A and 5B provided on both sides thereof as counter electrodes.

  In this case, in order to reduce the area of the opposing electrodes 5A and 5B, it is preferable to include at least one layer having a dielectric constant of 10 or more as the core substrate layers 1B and 1E. More preferably, it is 10 or more. In many cases, the dielectric constant of the resin serving as the base material of the core substrate 1 is 5 or less. For example, by mixing ceramic powder having a dielectric constant of about 100 into the resin, for example, about 40 to 50% by volume. And a core substrate having a dielectric constant of 10 or more can be obtained.

  In FIG. 2, a resonator is constituted by core substrate layers 1C and 1D, an adhesive layer 2C, a conductor pattern 5C serving as a strip line, and a conductor pattern 5D serving as a ground electrode.

  Also in the BPF of this embodiment, the number of steps can be reduced by performing molding in a single press in the above steps. In addition, through through holes can be reduced or eliminated, so that stray inductance and stray capacitance can be reduced, so that characteristics can be improved and miniaturization can be achieved by improving the dielectric constant by mixing dielectric powder. .

  Further, by forming a capacitor on the core substrates 1B and 1E, a high-precision capacitor can be formed inside a chip component or a laminated electronic component constituting a laminated substrate as in the present embodiment. In the case of forming a resonance-type element as in the embodiment or forming a matching element, a capacitor having sufficient accuracy to satisfy required characteristics is provided in a multilayer electronic component in a thin, small It can be configured with a small area and at low cost.

  Further, when the capacitor is configured inside or as a single unit of the multilayer electronic component according to the present invention, the core substrate and the adhesive layer can be collectively laminated, so that a multilayer capacitor having a large number of layers can be manufactured in a short time and at low cost. Can be. As a result, a large-capacity capacitor can be formed in the multilayer electronic component in a thin, small area and at low cost.

  FIG. 3A is a sectional view showing another embodiment of the multilayer electronic component according to the present invention, and FIG. 3B is an equivalent circuit diagram thereof. In this embodiment, a low-pass filter (LPF) is constituted by capacitors Ca to Ce and inductors La and Lb. In FIG. 3A, the same reference numerals as those in FIGS. 1 and 2 denote parts having equivalent functions. Reference numeral 10 denotes a through-hole provided at the final stage of the laminating process. One electrode of each of the capacitors Cc and Ce is connected to the input terminal electrode IN and the output terminal electrode OUT via the through-hole 10, and the other electrode is connected to the above-mentioned electrode. It is connected to the ground terminal electrode GND by the conductor formed by the conductive paste 7 and the via-hole conductor 4. Further, one end of the capacitor Cd is connected to the connection conductor 5 of the inductors La and Lb by the via-hole conductors 4 and 7, and the other electrode is also connected to the ground terminal electrode GND by the via-hole conductors 4 and 7.

  FIG. 4A is a cross-sectional view showing an LPF formed by a conventional build-up method, and FIG. 4B is an equivalent circuit diagram thereof. In the case of the conventional build-up method, one of the electrodes of the capacitors Cc, Cd, and Ce must be connected to the ground terminal electrode GND via the through-hole 10.

  As described above, in the case of the present invention in FIG. 3A, the capacitors Cc to Ce can be connected to the ground terminal electrode GND via the via-hole conductors 4 and 7, so that the stray inductance can be minimized. it can. On the other hand, in the case of the conventional method as shown in FIG. 4A, since the capacitors Cc to Ce have to be connected to the ground terminal electrode GND through the through-holes 10, the lead conductor pattern becomes longer. As shown in FIG. 4B, a stray inductance Lf component is generated.

  As a result, as shown in FIG. 5, in the LPF according to the conventional method, the amount of attenuation in the high frequency region is reduced due to the presence of the stray inductance Lf. On the other hand, in the case of the present invention, the stray inductance component is minimized. As a result, the deterioration of the attenuation characteristic in such a high frequency region can be prevented.

  FIG. 6 is a cross-sectional view showing another embodiment of the laminated electronic component according to the present invention, which constitutes a voltage controlled oscillator (VCO). 1H to 1L are core substrate layers, 2H to 2K are adhesive layers, 4 is via hole conductors provided on the core substrate layer, 5E to 5I, 5K, 5M are conductor patterns provided on both sides of the core substrate layer, 7 is conductive paste The via hole conductor 9 is a mounted electronic component.

  FIG. 7 is an equivalent circuit diagram of the VCO. 7, C1 to C9 are capacitors, L1 and L2 are inductors, LR is a resonator, Q1 and Q2 are transistors, R1 to R4 are resistors, and VD is a varicap diode. 11 is a power supply terminal, 12 is a control voltage terminal, and 13 is an output terminal. The mounted electronic components 9 are the transistors Q1 and Q2 and the resistors R1 to R4.

  In this VCO, the core substrate layers 1I and 1J are made of a composite material obtained by mixing a dielectric powder and have a dielectric constant of 10 or more, and a capacitor is formed by opposing electrodes on both sides thereof. The resonator LR is constituted by the conductor patterns 5E and 5F as strip lines provided on the core substrates 1K and 1L and the conductor pattern 5G as a ground electrode. 5M is a conductor pattern forming the inductor.

  In the present embodiment, a capacitor is formed not only between the core substrate but also between the electrodes 5G and 5H, 5I, 5K facing each other with the adhesive layer 2J interposed therebetween. Here, it is preferable that the capacitors formed between these electrodes 5G and 5H, 5H, 5I, and 5K have relatively high capacitance and capacitors C2, C7, and C9 that do not require a strict value as the capacitance value. The reason why the capacitance value of the capacitor formed by the electrodes opposed to each other with the adhesive layer interposed therebetween varies when the core substrate layers 1H to 1L and the adhesive layers 2H to 2K are integrated by pressing. This is because the thickness of the film varies.

  In addition, by mixing a powder having a high dielectric constant into the adhesive layer 2J to realize a layer having a high dielectric constant, a high capacitance value can be obtained. By using a thin film having a thickness of about 50 μm, a capacitance value of about 40 pF to 100 pF required for the capacitors C2, C7, C9 and the like in FIG. 7 can be obtained. The adhesive layer constituting such a capacitor is not limited to the 2J1 layer, but may be a capacitor using two or more adhesive layers such as the adhesive layers 2H and 2I as dielectric layers.

  By using the adhesive layer as a capacitor constituent layer as in this embodiment, the accuracy of interlayer thickness is reduced, but the number of mounted electronic components 9 is reduced for general and large capacity applications as shown in Table 1 below. As a result, the mounting space can be reduced and the density of the elements in the laminate can be improved, so that a multilayer electronic component with a built-in capacitor can be obtained with higher multilayer, thinner, smaller, and lower cost.

  In the present invention, as the resin used for the core substrate 1, the core substrate layers 1A to 1L, the adhesive sheet 2, or the adhesive layers 2A to 2K, a generally used thermosetting resin or thermoplastic resin can be used. Among them, epoxy resin, polyimide resin, vinylbenzyl resin, bismaleimide triazine resin, polyphenylene ether resin, aramid epoxy resin, liquid crystal polymer, fluorine resin, polyolefin resin, polyester resin, polyphenylene oxide resin, polyphenylene sulfide resin, phenol resin Etc. can be used.

  Among the functional material powders to be mixed with the resin, dielectric powders include barium titanate-barium zirconate, barium oxide-titanium oxide-niobium oxide, barium oxide-titanium oxide, titanium dioxide, and titanic acid. Ceramics such as barium-based, lead titanate-based, strontium titanate-based, calcium titanate-based, bismuth titanate-based, magnesium titanate-based, and lead zirconate-based ceramics or other ceramics can be used.

  Among these ceramics, ceramic dielectric particles having a dielectric constant ε of 100 or more in a high frequency band such as 2 GHz and a Q value of 20 to 100,000 are more preferable.

That is, when the dielectric constant ε and the Q value at 2 GHz are expressed together, TiO ₂ [ε = 104, Q = 15000], CaTiO ₃ [ε = 170, Q = 1800], SrTiO ₃ [ε = 255, Q = 700] ], (Bi ₂ O ₃ , PbO) —BaO—Nd ₂ O ₃ —TiO ₂ [ε = 105, Q = 2500] and the like are the ceramic dielectric particles.

Furthermore, in order to obtain a relatively high dielectric constant, BaTiO ₃ [ε = 1500], (Ba, Pb) TiO ₃ system [ε = 6000], Ba (Ti, Zr) O ₃ system [ε = 9000] ], (Ba, Sr) TiO ₃ -based particles having a high dielectric constant with a composition of [ε = 7000] as a main component, more preferably BaTiO ₃ -based, Ba (Ti, Zr) O ₃ -based particles Used.

  The content of the ceramic dielectric particles in the resin layer is preferably 10 to 65% by volume, and more preferably 20 to 60% by volume, where the total volume of the resin and the ceramic dielectric particles is 100% by volume. Is preferred. When the content of the ceramic dielectric particles is less than 10% by volume, the effect of adding the ceramic dielectric particles tends to be insufficient. On the other hand, if the content of the ceramic dielectric particles exceeds 65% by volume, the tendency that a dense particle-containing resin layer cannot be obtained increases.

  The average particle diameter of the ceramic dielectric particles is preferably from 0.01 to 100 μm, more preferably from 0.2 to 50 μm, from the viewpoint of kneading properties when mixed with the particle-containing resin. If the average particle size of the ceramic dielectric particles exceeds 100 μm, the ceramic dielectric particles settle when mixed with the particle-containing resin, and the tendency to not be sufficiently dispersed in the particle-containing resin increases. On the other hand, when the average particle diameter of the ceramic dielectric particles is less than 0.01 μm, the viscosity of the resin paste increases, and there is a possibility that a problem may occur in kneading properties.

  When an inductor is formed in an electronic component, the magnetic particles mixed with the resin may be ceramic magnetic particles made of a ceramic magnetic material, or may be magnetic metal particles made of a metal magnetic material. . Further, the magnetic particles may be insulator-coated magnetic metal particles composed of particles made of magnetic metal particles and a coating made of an insulating material covering the surface of the particles.

  As the ceramic magnetic particles, for example, ferrite includes Mn-Mg-Zn-based, Ni-Zn-based, Mn-Zn-based, and Ni-Cu-Zn-based particles. Further, particles such as a planar material may be used. Further, these single crystal particles may be used.

  Examples of the magnetic metal particles include ferromagnetic metals such as carbonyl iron, iron-silicone alloys, iron-aluminum-silicon alloys, iron-nickel alloys, and amorphous (iron-based, cobalt-based) particles. preferable.

As the insulator-coated magnetic metal particles, for example, the above-mentioned magnetic metal particles may be added to E glass (SiO ₂ : 52 to 54%, CaO: 16 to 25%, Al ₂ O ₃ : 12 to 16%, B ₂ O). _{3: 5~10%),} D glass _{(SiO 2: 72~76%, Al} 2 O 3: 5% or _{less, B 2 O 3: 20~25%} , Na 2 O · K 2 O: 3~5% ), NE glass _{(SiO 2: 52~56%, CaO} : 10% or _{less, Al 2 O 3: 10~15%} , B 2 O 3: 15~20%, MgO: 5% or less), Q glass (SiO _2:> 99.97%), T glass _{(SiO 2: 62~65%, Al} 2 O 3: 20~25%, MgO: 10~15%), R glass _{(SiO 2: 60%, CaO} : 8 _{.4%, Al 2 O 3:} 24%, MgO: 6.2%, Na 2 O · K 2 O: 0.5%, Fe 2 O 3: 1%) , such as Coated particles, and the like of the edge member.

  The particle size (range of particle size distribution) of these magnetic particles is preferably from 0.01 to 100 μm, and more preferably from 0.01 to 50 μm. The average particle size of these magnetic particles is preferably from 0.2 to 50 μm. If the average particle size of the magnetic particles exceeds 100 μm, the tendency of the magnetic particles to settle when mixed with the resin and not to be sufficiently dispersed in the resin increases. On the other hand, when the average particle diameter of the magnetic particles is less than 0.01 μm, the viscosity of the resin paste increases, and there is a possibility that a problem may occur in kneading. Means for making these magnetic particles into a powdery state can be performed by a known technique such as pulverization and granulation.

  Further, the magnetic permeability of these magnetic particles is preferably 5 to 1,000,000. Here, it is preferable that the bulk insulating properties of the magnetic particles be high because the insulating properties of the electronic component are improved. Further, the shape of these magnetic particles may be any one of a spherical shape, a flat shape, and an elliptical shape, and may be properly used depending on the application.

  Further, the content of the magnetic particles in the resin layer may be such that the magnetic permeability of the resin layer is 3 to 20. More specifically, the content of the magnetic particles in the resin layer is preferably 10 to 65% by volume, and preferably 20 to 60% by volume, when the total volume of the resin and the magnetic particles is 100% by volume. It is preferable that If the content of the magnetic particles is less than 10% by volume, the effect of adding the magnetic particles, that is, the tendency that sufficient magnetic permeability cannot be obtained, increases. On the other hand, when the content of the magnetic particles exceeds 65% by volume, it becomes more difficult to apply a slurry by kneading the kneaded product with the resin.

  Note that copper, silver, nickel, tin, zinc, aluminum, or the like can be used as a conductor forming the conductor patterns 5, 5A to 5I, 5K, and 5M.

  When capacitors for high frequency, low frequency, and power supply noise countermeasures are configured in the multilayer electronic component or as a component alone according to the present invention, the individuality of each application is a capacitor having a capacitance value and a use frequency as shown in Table 1. Therefore, those having the Q characteristics, dielectric constant, interlayer thickness, and number of layers as shown in Table 1 are preferably used.

表１から分かるように、３０ｐＦ以上の一般用の容量値を有するコンデンサを備える場合、そのコンデンサを設けた層のすべてあるいはその一部である少なくとも1層以上の層の誘電率εを１０以上で５０以下とすることが好ましい。このような誘電率に設定すれば、電極面積を狭く形成して高周波用コンデンサを構成することも可能であり、一般用のものと高周波用の両方の要求を満たす。また、誘電率εが１０未満だと一般用の用途で小型化のための十分な効果が得られず、サイズが大きくなってしまい、一方、誘電率εが５０を超えると、高周波の用途の場合、この層に設けられる信号ラインを通過する信号に影響がでてしまうが、誘電率εを前記範囲に設定することにより、小型化が図れると共に、高周波信号の劣化を回避できる。

As can be seen from Table 1, when a capacitor having a general capacitance of 30 pF or more is provided, the dielectric constant ε of at least one or more of all or a part of the layers provided with the capacitor is 10 or more. It is preferably set to 50 or less. By setting such a dielectric constant, a high-frequency capacitor can be formed by forming the electrode area to be small, which satisfies the requirements for both a general-purpose capacitor and a high-frequency capacitor. On the other hand, if the dielectric constant ε is less than 10, a sufficient effect for miniaturization cannot be obtained in a general-purpose application, and the size becomes large. In this case, the signal passing through the signal line provided in this layer is affected, but by setting the dielectric constant ε within the above range, the size can be reduced and the deterioration of the high-frequency signal can be avoided.

  In the case of forming a capacitor, as a resin forming the core substrate 1 and the adhesive sheet (adhesive layer) 2, high-frequency capacitors include polyimide resin, vinylbenzyl resin, bismaleimide triazine resin, polyphenylene ether resin, liquid crystal polymer, and fluorine. Resins, polyolefin resins, polyester resins, polyphenylene oxide resins, polyphenylene sulfide resins, and the like can be used.

  On the other hand, epoxy resin, aramid epoxy resin, phenol resin and the like can be used for low frequency. However, the high-frequency resin described above can also be used.

  Further, as described above, as the filler composed of particles mixed with the resin, as described above, ceramic dielectric particles having a dielectric constant ε of 100 or more in a high frequency band such as 2 GHz and a Q value of 20 to 100000 are used. Is more preferred.

That is, when the dielectric constant ε and the Q value at 2 GHz are expressed together, TiO ₂ [ε = 104, Q = 15000], CaTiO ₃ [ε = 170, Q = 1800], SrTiO ₃ [ε = 255, Q = 700] ], (Bi ₂ O ₃ , PbO) —BaO—Nd ₂ O ₃ —TiO ₂ [ε = 105, Q = 2500] and the like are the ceramic dielectric particles.

Furthermore, in order to obtain a relatively high dielectric constant, BaTiO ₃ [ε = 1500], (Ba, Pb) TiO ₃ system [ε = 6000], Ba (Ti, Zr) O ₃ system [ε = 9000] ], (Ba, Sr) TiO ₃ -based particles having a high dielectric constant with a composition of [ε = 7000] as a main component are preferred, and BaTiO ₃ -based and Ba (Ti, Zr) O ₃ -based are more preferred. Is preferred.

  Further, as described above, the particle size of the filler is preferably 0.01 to 100 μm, more preferably 0.2 to 50 μm, for the same reason as described above.

  The present invention provides an antenna, a diplexer, a duplexer, a balun, a coupler, a power amplifier, an RF module, a PLL module, a front end module, a TCXO, an antenna switch module, a DC-DC converter, a delay line, and a composite in addition to the BPF and the VCO. The present invention can be applied to multilayer electronic components such as capacitors, isolators, and circulators. Further, by integrating them, higher integration and miniaturization can be achieved. For example, by applying the present invention to an antenna front-end module, an isolator / power amplifier module, and the like, high integration and miniaturization are possible.

It is a flowchart showing an example of a manufacturing process of a multilayer electronic component of the present invention. FIG. 1 is a sectional view of a BPF showing an embodiment of the present invention. 1 is a cross-sectional view of an LPF showing an embodiment of the present invention, and FIG. FIG. 3B is a cross-sectional view of a conventional LPF, and FIG. FIG. 5 is a characteristic comparison diagram of the LPFs of FIGS. 3 and 4. FIG. 1 is a cross-sectional view of a VCO showing an embodiment of the present invention. FIG. 7 is an equivalent circuit diagram of the VCO of FIG. 6.

Explanation of reference numerals

1: core substrate, 1A to 1L: core substrate layer, 2: adhesive sheet, 2A to 2M: adhesive layer, 3: hole, 4: via hole conductor, 5, 5A to 5I, 5H, 5M: conductor pattern, 6: hole , 7: via-hole conductor, 8: terminal electrode, 9; mounted electronic component, 10: through-hole, 11: power supply terminal, 12: control voltage terminal, 13: output terminal

Claims (5)

A multilayer electronic component configured as a multilayer chip component or a multilayer substrate,
A substrate formed by mixing a composite material obtained by mixing a functional material powder with a resin into a thin plate shape, has at least one core substrate layer formed by curing a counter electrode forming a capacitor and its wiring,
A laminated electronic component, wherein a laminated structure is realized by attaching the core substrate layer with a resin adhesive layer having via holes filled with a conductive paste. The multilayer electronic component according to claim 1,
A laminated electronic component comprising at least one core substrate layer having a dielectric constant of 10 or more. The multilayer electronic component according to claim 2,
A multilayer electronic component comprising a capacitor having a capacitance of 30 pF or more, and a dielectric constant of a layer constituting the capacitor is 10 or more and 50 or less. The multilayer electronic component according to any one of claims 1 to 3,
A multilayer electronic component, wherein the adhesive layer contains a functional material powder, and a capacitor is formed using electrodes on both sides of the adhesive layer as counter electrodes. A method for manufacturing a multilayer electronic component configured as a multilayer chip component or a multilayer substrate,
A plurality of core substrates including a composite material obtained by mixing a functional material powder with a resin into a thin plate shape, and including at least one core substrate formed on both sides and having a counter electrode forming a capacitor and its wiring and cured. And one or more adhesive sheets made of resin or a composite material obtained by mixing functional material powder with resin,
An adhesive sheet is interposed between the core substrates, and they are integrated by pressing and overlapping,
A method for manufacturing a laminated electronic component, comprising forming a capacitor in which a layer made of the adhesive sheet is a dielectric layer.

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