JP2004289882A - Inverter failure detection method - Google Patents

Abstract

An object of the present invention is to make it possible to determine a failure at a fixed determination level even if a DC voltage applied to an inverter circuit fluctuates.
A DC voltage applied to an inverter circuit is detected, and the output duty value of the inverter circuit is corrected accordingly. At this time, a value inversely proportional to the DC voltage Vdc is integrated with a duty value excluding a duty value corresponding to a dead time at the time of on / off transition of each of the switching elements 31, 41, 51, 61, 71, 81, and this integration result is obtained. To the duty value for the dead time. Based on the output duty value thus obtained, the inverter circuit 2 is operated, and the current output from the inverter circuit 2 is detected and compared with a certain determination level.
[Selection diagram] Fig. 1

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a technique for determining the presence or absence of a failure in an inverter circuit that supplies a current to a polyphase load.
[0002]
[Prior art]
In a configuration in which a polyphase motor is driven by a polyphase inverter circuit, a technique for detecting a failure of the inverter circuit is disclosed in, for example, Patent Document 1. In Patent Document 1, a current supplied to the inverter circuit (hereinafter referred to as a “supply current”) while changing the combination of the ON state and the OFF state of each of the high-arm switching element and the low-arm switching element of each phase of the inverter circuit. ) Is measured.
[0003]
[Patent Document 1]
Japanese Patent Application Laid-Open No. 2000-325529
[Problems to be solved by the invention]
However, the supply current usually depends on the DC voltage Vdc supplied to the inverter circuit. FIGS. 6, 7, and 8 are diagrams showing the results of measuring the phase current while changing the DC voltage Vdc supplied to the inverter circuit, and show the case where the DC voltage Vdc is 230 V, 280 V, and 358 V, respectively. ing. Graphs 13 to 15 in FIGS. 6 to 8 show the supply current and graph 15 shows the phase current, respectively.
[0005]
As can be seen from FIGS. 6 to 8, by changing the DC voltage Vdc, the amplitude of the phase current changes. Specifically, when the DC voltage Vdc is 230 V, the phase current amplitude is about 2 A (FIG. 6), when the DC voltage Vdc is 280 V, the phase current amplitude is about 3 A (FIG. 7), and when the DC voltage Vdc is 358 V, the phase current amplitude is about 3 A. The amplitude appears at about 4A (FIG. 8). As described above, when the DC voltage Vdc fluctuates, the supply current also fluctuates, so that the value of the phase current used as the basis for the failure detection determination also changes.
[0006]
The determination level of the presence or absence of a fault needs to be set with a margin for the protection value of the inverter circuit 2 in terms of timing, and also needs to be set with a margin for the minimum detection level in consideration of the detection error. Therefore, if the phase current changes in accordance with the change in the DC voltage Vdc, it becomes difficult to set a determination level for failure determination, and the failure may not be detected correctly.
[0007]
Therefore, an object of the present invention is to provide a technique for determining a failure based on a fixed determination level even if the DC voltage applied to the inverter circuit fluctuates.
[0008]
[Means for Solving the Problems]
In order to solve the above-mentioned problem, an invention according to claim 1 is a high-arm switching element connected to a polyphase load (1) and connected to a DC power supply side of each phase of the polyphase (U, V, W). (31, 41, 51) and an inverter circuit including low-arm switching elements (61, 71, 81) connected to the high-arm switching elements, respectively, in each phase. In an aspect of a combination of ON and OFF of a switching element and the low-arm side switching element, a failure detection method for an inverter that determines whether there is a failure by comparing a phase current output from the inverter circuit to a predetermined determination level, A first step of detecting a DC voltage (Vdc) applied to the inverter circuit, and the inverter circuit according to the DC voltage. A second step of obtaining an output duty value (Dx); and a third step of detecting the phase current while performing on / off operation of each switching element in the inverter circuit based on the output duty value, and comparing the phase current with the determination level. And the step of
[0009]
The invention according to claim 2 is the inverter failure detection method according to claim 1, wherein the second step corresponds to a dead time (25a to 25f) at the time of on / off transition of each switching element. A duty value (De−2 × Dd) excluding the duty value (2 × Dd) is integrated with a value (Ve / Vdc) that is inversely proportional to the DC voltage, and a duty value corresponding to the dead time is added to the integration result. To calculate the output duty value.
[0010]
The invention according to claim 3 is the inverter failure detection method according to claim 2, wherein the DC voltage detected in the first step is Vdc, and the reference output is set as a given value. In the second step, the output duty value Dx is calculated by the following equation, where the duty value is De, the duty value for the dead time is Dd, and the reference voltage set as a given value is Ve. .
[0011]
Dx = (De−2 × Dd) × Ve / Vdc + 2 × Dd
[0012]
BEST MODE FOR CARRYING OUT THE INVENTION
FIG. 1 is a block diagram showing an inverter according to one embodiment of the present invention and a method for detecting a failure thereof. The inverter circuit 2 that drives the three-phase motor (M) 1 has, for example, transistors 31, 41, and 51 as high-arm switching elements in the U, V, and W phases. Further, for example, transistors 61, 71, and 81 are provided as low-arm switching elements in each of the U, V, and W phases. A freewheel diode 32, 42, 52, 62, 72, 82 for flowing a current in a direction opposite to the direction in which the current flows is connected in parallel to the transistors 31, 41, 51, 61, 71, 81. I have.
[0013]
Inverter circuit 2 receives DC voltage Vdc from DC power supply 10. The DC power supply 10 includes, for example, a diode bridge 12 that rectifies the output of the AC power supply 11 and a capacitor 13 that smoothes the output. In this case, the DC voltage Vdc is provided as a voltage across the capacitor 13.
[0014]
The DC voltage Vdc is detected by the voltage detector 21. The inverter circuit 2 performs the switching operation using the transistors 31, 41, 51, 61, 71, and 81 while the DC voltage Vdc is being input, so that the supply current idc flows. The supply current idc is the sum of the phase currents flowing through the respective phases, and is detected by the current detection unit 22. Specifically, the current detection unit 22 is interposed between the connection point P1 of the high-arm transistors 31, 41, and 51 of the inverter circuit 2 and the high-potential end of the capacitor 13. The low-potential end of the capacitor 13 is connected to a connection point P2 of the low-arm transistors 61, 71, 81 of the inverter circuit 2.
[0015]
The PWM control unit 23 performs a PWM control by changing a duty value when the transistors 31, 41, 51, 61, 71, 81 are turned on and off according to the DC voltage Vdc detected by the voltage detector 21. . At this time, the output duty value is corrected in consideration of the dead time appearing in the PWM waveform.
[0016]
Specifically, in the PWM control unit 23, the DC voltage Vdc detected by the voltage detector 21 as described above, the reference output duty value De set as a given value, and the duty Using the value Dd and the reference voltage Ve set as a given value, the output duty value Dx at the time of failure detection is calculated as in the following equation (1).
[0017]
Dx = (De−2 × Dd) × Ve / Vdc + 2 × Dd (1)
Here, the dead time is a period during which the on-period of the high-arm switching element is eroded, for example, in order to avoid a short circuit due to the high-arm switching element and the low-arm switching element in the inverter circuit 2 being simultaneously turned on.
[0018]
The phase current detector 24 detects a phase current. FIG. 1 illustrates a case where the W-phase current is measured.
[0019]
FIG. 2 shows ON / OFF timings of the transistors 31, 41, 51, 61, 71, 81 of each phase and a supply current idc. FIG. 3A shows a switching mode, and shows an ON / OFF mode of each switching element when the dead time is not considered. Basically, since the high-arm switching element and the low-arm switching element are exclusively turned on in the same phase, the switching mode of the inverter circuit 2 can be indicated by discriminating ON / OFF of the high-arm switching element of each phase. it can.
[0020]
Specifically, variables u, v, and w are assigned to the U-phase, V-phase, and W-phase high-arm switching elements, and the values 1/0 are taken for on / off. The switching mode S _{4u + 2v + w} indicates the switching of the inverter circuit. For example, up to time t1 has been adopted switching mode S _0, which is U-phase, V-phase, all high-arm side switching elements of the W-phase (the transistor 31, 41, 51) is turned off, all the low-arm side switching elements (Transistors 61, 71, 81) are in an on state.
[0021]
Also been switching mode S ₁ at time t1~t2 is employed, which is U-phase, V-phase, high-arm side switching elements each off W-phase, off, turned on, thus the U-phase, V-phase, W-phase In which the low-arm side switching elements are on, on, and off, respectively. Time and switching mode S ₇ is employed in t2 to t3, which shows an embodiment where U-phase, V-phase, all high-arm side switching elements of the W-phase is turned on, all the low-arm side switching element is turned off . Switching mode S ₀ again if the time t3 is adopted.
[0022]
FIGS. 2B, 2C, and 2D show ON and OFF of the U-phase, V-phase, and W-phase switching transistors, respectively. However, since the dead time is provided as described above, the switching is specifically performed as described below. The period during which the transistor 31 is turned on is later than the time t2 by the dead time 25a, and earlier than the time t3 by the dead time 25b. The period during which the transistor 41 is turned on is later than the time t2 by the dead time 25c, and earlier than the time t3 by the dead time 25d. The period during which the transistor 51 is turned on is later than the time t1 by the dead time 25e, and earlier than the time t3 by the dead time 25f. For simplicity of control, these dead times 25a to 25f are generally set equal. Hereinafter, the length of the dead time is referred to as a dead time period Td.
[0023]
FIG. 2E shows the supply current idc, and the direction in which the current flows into the inverter circuit 2 is shown on the upper side of the graph. Due to the existence of the dead time 25e, the supply current idc starts flowing after a lapse of the dead time period Td from the time t1. Since the supply current idc does not flow or without dead time in switching mode _{S 7,} the dead time 25a, 25c is not necessary to consider. On the other hand, due to the presence of the dead times 25b, 25d, and 25f, the motor 1 returns to the DC power supply 10 through the freewheel diodes 32, 42, and 52, so that the supply current idc flows in the opposite direction. As described above, it is necessary to reflect the fact that the supply current idc does not flow during the dead time and the flow of the reflux current in the measurement of the phase current.
[0024]
In even reflux in switching mode S _1, since the peak value of the supply current idc are equal, than if the supply current idc flows and the ideal in all periods of switching mode S _1, the effective value of the supply current idc Is smaller by the dead time period Td. Further than when the supply current idc does not flow and the ideal in all periods of switching mode S _7, the effective value of the supply current idc in minutes refluxing, i.e. smaller by the amount of dead time period Td.
[0025]
Therefore, as shown in the above equation (1), after the duty value Dd corresponding to the dead time period Td is excluded from the ideal duty De, correction is performed with the ratio of the actual DC voltage Vdc to the reference voltage Ve. However, the duty value Dd is added to the corrected value in order to provide a dead time period Td again to avoid a short circuit of each phase.
[0026]
Thus, when the DC voltage Vdc fluctuates, the supply current idc can be corrected by adjusting the duty value Dx so as to be in inverse proportion to the fluctuation. Therefore, as shown in FIGS. 3 to 5, the amplitude of the phase current output from the inverter circuit 2 can be equalized.
[0027]
Here, FIGS. 3, 4 and 5 are diagrams showing the results of measuring the phase current by changing the DC voltage Vdc applied to the inverter circuit 2, and changing the DC voltage Vdc to 230V, 280V, 358V, respectively. FIG. The graph 27 shows the phase current, and the graph 29 shows the supply current idc.
[0028]
As can be seen from FIGS. 3 to 5, even if the DC voltage Vdc fluctuates, the amplitude of the phase current 27 hardly changes, and specifically, in any of the cases of FIGS. (Vdc = 230V, 280V, 358V), the amplitude of the phase current 27 appears at about 3A.
[0029]
Accordingly, when the phase current is detected while each switching element is turned on and off in the inverter circuit 2 based on the duty value Dx, and the phase current is compared with the determination level to determine whether the inverter circuit 2 has a failure, FIGS. Compared to the case where the amplitude of the phase current fluctuates with the fluctuation of the DC voltage Vdc as shown in FIG. 9, the judgment can be performed with the judgment level kept constant.
[0030]
In the above embodiment, the inverter circuit 2 for driving the three-phase motor (M) 1 has been described as an example. However, the present invention may be applied to an inverter for driving another multi-phase load such as a two-phase motor. Absent.
[0031]
【The invention's effect】
According to the first aspect of the present invention, even if the DC voltage applied to the inverter circuit fluctuates, it is possible to adjust the output current to a predetermined range by correcting the output current in consideration of the fluctuation. It is possible to determine whether a failure has occurred at the determination level.
[0032]
According to the second and third aspects of the present invention, the duty value of the dead time in which no change is observed due to the fluctuation of the DC voltage is excluded, and the other duty values are corrected according to the DC voltage. It is possible to correct the duty value with high accuracy.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a method for detecting a failure of an inverter according to an embodiment of the present invention.
FIG. 2 is a diagram illustrating a state in which a dead time appears in the on / off operation of each switching element of the inverter circuit.
FIG. 3 is a diagram showing a current output from a DC power supply and a phase current output from an inverter circuit in one embodiment of the present invention.
FIG. 4 is a diagram showing a current output from a DC power supply and a phase current output from an inverter circuit in one embodiment of the present invention.
FIG. 5 is a diagram showing a current output from a DC power supply and a phase current output from an inverter circuit in one embodiment of the present invention.
FIG. 6 is a diagram showing a current output from a DC power supply and a phase current output from an inverter circuit in the related art.
FIG. 7 is a diagram showing a current output from a DC power supply and a phase current output from an inverter circuit in the related art.
FIG. 8 is a diagram showing a current output from a DC power supply and a phase current output from an inverter circuit in the related art.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Three-phase motor 2 Inverter circuits 31, 41, 51 High arm side switching element 61, 71, 81 Low arm side switching element 11 DC power supply 21 Voltage detection part 22 Current detection part 23 PWM control part 25a-25f Dead time

Claims (3)

A high-arm switching element (31, 41, 51) connected to the multi-phase load (1) and connected to the DC power supply of each phase of the multi-phase (U, V, W); In contrast to the inverter circuit including the corresponding low-arm switching elements (61, 71, 81) connected to each other, each of the phases is in an on-off combination of the high-arm switching element and the low-arm switching element in each phase. A failure detection method for an inverter which determines whether or not there is a failure by comparing a phase current output from the inverter circuit with a predetermined determination level,
A first step of detecting a DC voltage (Vdc) applied to the inverter circuit;
A second step of obtaining an output duty value (Dx) of the inverter circuit according to the DC voltage;
A third step of detecting the phase current while performing on / off operations of each switching element in the inverter circuit based on the output duty value, and comparing the phase current with the determination level. The inverter failure detection method according to claim 1,
In the second step, the DC value is reduced with respect to a duty value (De−2 × Dd) excluding a duty value (2 × Dd) corresponding to a dead time (25a to 25f) at the time of on / off transition of each switching element. A method of detecting a fault in an inverter, comprising: integrating a value (Ve / Vdc) inversely proportional to a voltage; and adding the duty value corresponding to the dead time to the integration result to calculate the output duty value. A method for detecting a failure of an inverter according to claim 2, wherein
The DC voltage detected in the first step is Vdc, the reference output duty value set as a given value is De, the duty value for the dead time is Dd, and the given value is set as a given value. A method for detecting a fault in an inverter, wherein the output duty value Dx is calculated by the following equation in the second step, with the reference voltage being Ve.
Dx = (De−2 × Dd) × Ve / Vdc + 2 × Dd

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