JP2004221606A - Method of manufacturing semiconductor integrated circuit device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor integrated circuit device, which forms high quality and very thin oxide film which has homogeneous film thickness and proper reproducibility. <P>SOLUTION: The method has a process of introducing a semiconductor wafer 1A to a heat treatment chamber 120 of an oxidation furnace 107; a process of replacing gas atmosphere with nitrogen in the heat treatment chamber 120; a process of synthesizing moisture from oxygen and hydrogen using catalyst at first temperature; a process of introducing the resultant moisture to the heat treatment chamber 120 of the oxidation furnace 107, and forming oxidizing atmosphere containing moisture on a first main surface of the semiconductor wafer 1A in the chamber 120, while maintaining vaporization condition; a process of performing thermal oxidation treatment of a silicon surface on the first main surface of the semiconductor wafer 1A to form an insulating film, by ramp heating the first main surface of the semiconductor wafer 1A up to second temperature higher than the first temperature in the oxidizing atmosphere containing the moisture in the heat treatment chamber 120; and a process of replacing the oxidizing atmosphere containing the moisture with nitrogen in the heat treatment chamber 120, after the completion of the previous process. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor integrated circuit device (semiconductor device and the like), and more particularly to a technique that is effective when applied to formation of a gate oxide film (insulating film) such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).

  In the early semiconductor industry, bubbling for passing a carrier gas such as oxygen through water in a bubbler was widely applied. Although this method has the advantage of covering a wide water range, it cannot avoid the problem of contamination, and has recently been hardly used. Therefore, the oxyhydrogen combustion method, that is, the pyro method (Pyrogenic system) has been widely used to avoid the disadvantages of the bubbler.

(Disclosure of prior art documents, etc.)
The following prior arts are known for the improvement of thermal oxidation and the method of producing moisture therefor which are the subject of the present application.
(1) Omi, JP-A-6-163517 (Patent Document 1) discloses a low-temperature oxidation technique for lowering the temperature of a semiconductor process. In Example 1, hydrogen was added from 100 ppm to 1% to a gas atmosphere comprising about 99% of argon and about 1% of oxygen, and the combustion temperature of hydrogen was 700 ° C. or less, that is, 450 ° C. or less. A method for obtaining steam is shown. Further, Example 2 shows the thermal oxidation of silicon at an oxidation temperature of 600 degrees Celsius under normal pressure or high pressure in an atmosphere consisting of 99% oxygen and 1% steam generated by a catalyst.
(2) Japanese Patent Application Laid-Open No. 7-321102 (Yoshikoshi) (Patent Document 2) discloses an extremely low moisture concentration in order to avoid various problems caused by moisture, that is, an extremely low moisture region of about 0.5 ppm or a dry moisture concentration. High temperature thermal oxidation of the silicon surface at an oxidation temperature of 850 degrees Celsius in the region is shown.
(3) Japanese Patent Application Laid-Open No. 60-107840 by Honma et al. (Patent Literature 3) discloses that a small amount of tens of ppm generated by a conventional method is used to reduce variation in the amount of moisture due to environmental moisture in dry oxidation. A method for thermal oxidation of intentionally added silicon is shown.
(4) Japanese Patent Application Laid-Open No. 5-152282 (Omi I) (Patent Document 4) discloses that the inner surface of a hydrogen gas introduction pipe is made of Ni (nickel) or There is disclosed a thermal oxidation device which is made of a Ni-containing material and has means for heating a hydrogen gas introduction tube. In this thermal oxidation apparatus, hydrogen is brought into contact with Ni (or a Ni-containing material) in a hydrogen gas introduction pipe heated to 300 ° C. or more to generate hydrogen active species, and the hydrogen active species and oxygen (gas containing oxygen) are generated. To produce water. That is, since water is produced by the catalytic method without combustion, the tip of the hydrogen-introduced quartz tube is not melted to generate particles.
(5) JP-A-6-115903 (Omi II) (Patent Document 5) discloses a mixed gas producing step of producing a first mixed gas by mixing oxygen, hydrogen and an inert gas, By introducing the first mixed gas into a reaction furnace tube made of a material having a catalytic action capable of radicalizing and heating the inside of the reaction furnace tube, hydrogen and oxygen contained in the first mixed gas react with each other. A catalyst-type water generation method comprising a water generation step of generating water is disclosed.

  According to this method, since a catalyst material for lowering the reaction is used in a reaction tube for reacting hydrogen and oxygen, the reaction temperature is lowered, and as a result, water can be generated at a low temperature. Therefore, when a mixed gas of hydrogen, oxygen, and an inert gas is supplied to a heated reaction tube, hydrogen and oxygen completely react at a temperature of 500 ° C. or less in the reaction tube, and contain water at a lower temperature than the combustion method. Gas is obtained.

Also, at this time, if all the plastic material is excluded from the gas contact part and only the metal material is used, and the metal surface is subjected to a passivation treatment, the gas released from the surface (moisture, hydrocarbon, etc.) ), It is possible to generate moisture with higher cleanliness with higher accuracy and in a wide range (from ppb to%). The passivation treatment is performed by subjecting stainless steel subjected to electrolytic polishing or electrolytic composite polishing to a heat treatment in an oxidizing or weakly oxidizing atmosphere having an impurity concentration of several ppb or less.
(6) Japanese Patent Application Laid-Open No. 5-118771 (Omi III) (Patent Document 6) discloses an openable / closable opening for carrying in / out an object to be processed and a gas inlet for introducing gas into the inside. A furnace tube having a core tube heating means for heating the inside of the furnace tube, a gas introduction tube connected to and connected to a gas introduction port, and a heating means for heating the gas introduction tube. Discloses a heat treatment apparatus in which at least the inner surface of a gas introduction pipe is made of Ni (or a Ni-containing material).

This thermal oxidation device generates hydrogen activated species for generating hydrogen activated species from a hydrogen gas or a gas containing hydrogen without a plasma, upstream of a position of an object to be treated disposed inside a furnace tube. Means are provided, and hydrogen gas or a gas containing hydrogen is introduced into the hydrogen active species generating means to generate hydrogen active species. Therefore, if, for example, a silicon substrate on which an oxide film is formed is placed as an object to be processed in the furnace tube, hydrogen active species diffuse in the oxide film, and dangling bonds in the oxide film and at the oxide film / silicon interface are formed. Since the termination is performed, a highly reliable gate oxide film can be expected to be obtained.
(7) Omi, JP-A-5-144804 (Patent Document 7) discloses a heat treatment technique for a silicon oxide film using hydrogen active species generated by a nickel catalyst.
(8) Nakamura et al., Pp. 128-133, Non-Patent Document 1, Proceedings of the 45th Symposium on Semiconductor Integrated Circuit Technology hosted by the Electrochemical Society of Japan, Electronic Materials Committee, December 1-2, 1993. 3 shows a silicon oxidation process in a strongly reducing atmosphere mainly composed of hydrogen by hydrogen radicals and moisture generated by a catalyst for application to a tunnel oxide film of a flash memory.
(9) Omi, JP-A-6-120206 (Patent Document 8) discloses a sintering technique using a hydrogen active species generated by a nickel catalyst in an insulating film for insulating and separating a selective epitaxial growth region.
(10) Kobayashi et al., JP-A-59-132136 (Patent Document 9) discloses a redox process of silicon and refractory metal in a redox mixed atmosphere of water and hydrogen produced by a usual method. Have been.
JP-A-6-163517 JP-A-7-321102 JP-A-60-107840 JP-A-5-152282 JP-A-6-115903 JP-A-5-141871 JP-A-5-144804 JP-A-6-120206 JP-A-59-132136 Proceedings of the 45th Symposium on Semiconductor Integrated Circuit Technology sponsored by the Electrochemical Materials Committee of the Electrochemical Society (pages 128 to 133)

(Considerations related to the prior art and the present invention)
State-of-the-art MOS devices manufactured according to deep submicron design rules require that the gate oxide film be formed to an extremely thin film thickness of 10 nm or less in order to maintain the electrical characteristics of miniaturized elements. . For example, when the gate length is 0.35 μm, the required gate oxide film thickness is about 9 nm. However, when the gate length is 0.25 μm, it is expected that the thickness will be reduced to about 4 nm.

  Generally, a thermal oxide film is formed in a dry oxygen atmosphere.However, when a gate oxide film is formed, a wet oxidation method (generally, a water partial pressure ratio) is conventionally used because a defect density in the film can be reduced. 10% or more). In this wet oxidation method, water is generated by burning hydrogen in an oxygen atmosphere, and this water is supplied together with oxygen to the surface of a semiconductor wafer (a wafer for integrated circuit manufacturing or simply an integrated circuit wafer) to form an oxide film. However, since hydrogen is burned, sufficient oxygen is supplied beforehand to avoid the danger of explosion, and then the hydrogen is ignited. Further, the water concentration of the mixed gas of water and oxygen, which is an oxidizing species, is increased to about 40% (the partial pressure of water in the total atmospheric pressure).

  However, since the combustion method described above ignites hydrogen ejected from a nozzle attached to the tip of a hydrogen gas introduction pipe made of quartz and performs combustion, if the amount of hydrogen is reduced too much, the flame approaches the nozzle too much. However, it has been pointed out that the heat melts the nozzles to generate particles, which can become a source of contamination for semiconductor wafers. (Conversely, if the amount of hydrogen is increased too much, the flame reaches the end of the combustion tube, There is a problem in terms of safety, such as melting the quartz wall and causing particles, and the flame being cooled by the wall and extinguishing.) Further, in the above-described combustion method, since the water concentration of the water + oxygen mixed gas, which is an oxidizing species, is high, hydrogen and OH groups are taken into the gate oxide film and Si-H Structural defects such as bonding and Si-OH bonding are likely to occur. These bonds are broken by application of voltage stress such as hot carrier injection to form a charge trap, which causes a decrease in electrical characteristics of the film such as a change in threshold voltage.

  The details of this situation and the details of the improvement of the water synthesizing apparatus using the novel catalyst are described in Japanese Patent Application Laid-Open No. 9-172011 by the inventor himself and the international application published by the inventor and Omi et al. It is described in detail in PCT / JP97 / 00188 (International filing date 1997.1.27).

  According to the study of the present inventor, the conventional oxide film forming method can uniformly form an ultra-thin gate oxide film having a high quality and a film thickness of 5 nm or less (the same effect can be expected even with a film thickness of 5 nm or more). It is difficult to form a thin film with good reproducibility. Needless to say, even when the film thickness is larger than that, there are various insufficient points.

  In order to form an ultra-thin oxide film with a uniform thickness and good reproducibility, it is necessary to lower the oxide film growth rate and form the film under more stable oxidation conditions compared to forming a relatively thick oxide film. However, for example, the method of forming an oxide film using the combustion method described above can only control the water concentration of the water + oxygen mixed gas as the oxidizing species within a high concentration range of about 18% to 40%. Therefore, the growth rate of the oxide film is high, and a thin oxide film is formed in an extremely short time. On the other hand, if oxidation is performed by lowering the wafer temperature to 800 ° C. or less in order to reduce the oxide film growth rate, the quality of the film deteriorates (even if the other parameters are appropriately adjusted even in a temperature range of 800 ° C. or less, the present invention will be described). Needless to say, it can be applied).

  Further, in order to form a clean oxide film, it is necessary to remove a low-quality oxide film formed on the surface of the semiconductor wafer by wet cleaning in advance. As a result, a thin natural oxide film is inevitably formed on the surface of the wafer. Further, in the oxidation step, an undesired initial oxide film is formed on the wafer surface by contact with oxygen in the oxidizing species before the actual oxidation is performed. In particular, in the case of an oxide film formation method using a combustion method, sufficient oxygen is flowed in advance to avoid the risk of explosion of hydrogen, and then hydrogen is burned. A thick initial oxide film is formed (explosive combustion of hydrogen, that is, "explosion" occurs when there is sufficient oxygen at 560 ° C. or more under normal pressure and 4% or more of hydrogen).

  As described above, the actual oxide film has a configuration including the natural oxide film and the initial oxide film in addition to the oxide film formed by the original oxidation. It is of lower quality than the intended original oxide film. Therefore, in order to obtain a high-quality oxide film, the ratio of these low-quality films in the oxide film must be as low as possible. Then, the ratio of these low-quality films is rather increased.

  For example, when an oxide film having a thickness of 9 nm is formed by using a conventional oxide film forming method, it is assumed that the native oxide film and the initial oxide film in the oxide film have a thickness of 0.7 nm and 0.8 nm, respectively. Then, the original thickness of the oxide film is 9- (0.7 + 0.8) = 7.5 nm, and the ratio of the original oxide film in the oxide film is about 83.3%. However, when an oxide film having a thickness of 4 nm is formed using this conventional method, the thicknesses of the native oxide film and the initial oxide film remain unchanged at 0.7 nm and 0.8 nm, respectively. Is 4- (0.7 + 0.8) = 2.5 nm, and the ratio is reduced to 62.5%. That is, if an attempt is made to form an extremely thin oxide film by the conventional oxide film forming method, not only cannot uniformity and reproducibility of the film thickness be ensured, but also the quality of the film deteriorates.

  In order to solve these problems, the present inventor paid attention to a method of generating water using a catalyst of Omi. According to the study of the present inventors, these studies focus on the strong reduction action of hydrogen radicals on the premise that "the lifetime of hydrogen radicals is long," It became clear that it was not applicable to the process. In other words, to apply to the semiconductor process, the necessary configuration is examined on the premise that "the lifetime of radicals such as hydrogen is extremely short and is generated on the catalyst, and returns to a compound or a ground state almost on or in the vicinity thereof". The need has been clarified by the present inventors.

  Further, according to the present inventor, 0 to 10 ppm in terms of the partial pressure ratio of water belongs to a dry region and exhibits a so-called dry oxidation property, and it is necessary to obtain a required film quality such as a gate oxide film in a future fine process. It has been found that it does not reach the so-called wet oxidation.

Similarly, it is clear from the present inventors that the ultra-low moisture region having a water partial pressure ratio of 10 ppm or more and 1.0 × 10 ³ ppm or less (0.1% or less) basically shows almost the same properties as dry oxidation. Was.

  Similarly, thermal oxidation in a low moisture region having a moisture partial pressure ratio of 0.1% to 10% (particularly, a low moisture region having a moisture partial pressure ratio of 0.5% to 5%) is performed in another region (dry region). The present inventor has shown that relatively good properties are shown to be relatively good as compared with a general-purpose combustion mode of 10% or more and a high moisture area with a water concentration of several tens% or more by a bubbler or the like. Revealed.

(Object of the present invention, etc.)
An object of the present invention is to provide a technique capable of forming a high-quality ultrathin oxide film with a uniform film thickness with good reproducibility.

  The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

  The following is a brief description of an outline of typical inventions disclosed in the present application.

The method for manufacturing a semiconductor integrated circuit device according to the present invention includes the following steps.
(A) introducing a semiconductor wafer into a heat treatment chamber of an oxidation furnace;
(B) replacing the gas atmosphere in the heat treatment chamber with nitrogen;
(C) synthesizing water from oxygen and hydrogen using a catalyst at a first temperature;
(D) introducing the synthesized water into a heat treatment chamber of the oxidation furnace to form an oxidizing atmosphere containing water on the first main surface of the semiconductor wafer in the chamber while maintaining a vaporized state; ,
(E) heating the main surface of the semiconductor wafer by a ramp to a second temperature higher than the first temperature in the oxidizing atmosphere containing the moisture in the heat treatment chamber, thereby forming a first main surface of the semiconductor wafer; A step of forming an insulating film by thermally oxidizing the upper silicon surface,
(F) after the step (e), replacing the oxidizing atmosphere containing water in the heat treatment chamber with nitrogen.

The method for manufacturing a semiconductor integrated circuit device according to the present invention includes the following steps (a) and (b).
(A) a step of generating water by catalytic action from hydrogen and oxygen,
(B) The oxygen containing a low concentration of water is supplied to or near the main surface of the semiconductor wafer heated to a predetermined temperature, so that at least reproducibility of oxide film formation and uniformity of oxide film thickness can be ensured. A step of forming an oxide film having a thickness of 5 nm or less at an oxide film growth rate of about

  In the method for manufacturing a semiconductor integrated circuit device according to the present invention, the oxide film is a gate oxide film of a MOSFET.

  In the method for manufacturing a semiconductor integrated circuit device according to the present invention, the thickness of the oxide film is 3 nm or less.

  In the method for manufacturing a semiconductor integrated circuit device according to the present invention, the heating temperature of the semiconductor wafer is 800 to 900 ° C.

  In the method for manufacturing a semiconductor integrated circuit device according to the present invention, after the step (b), nitrogen is segregated at the interface between the oxide film and the substrate by performing an oxynitridation process on the main surface of the semiconductor wafer.

  In the method of manufacturing a semiconductor integrated circuit device according to the present invention, the formation of the oxide film is performed by single-wafer processing.

  In the method for manufacturing a semiconductor integrated circuit device according to the present invention, the formation of the oxide film is performed by a batch process.

The method for manufacturing a semiconductor integrated circuit device according to the present invention includes the following steps (a) and (b).
(A) a step of generating water by catalytic action from hydrogen and oxygen,
(B) a main surface of a semiconductor wafer or a semiconductor wafer obtained by heating oxygen containing water at a concentration that can provide an initial withstand voltage better than an oxide film formed in a dry oxygen atmosphere containing no water at a predetermined temperature, or A step of forming an oxide film having a thickness of 5 nm or less by supplying to the vicinity.

  In the method for manufacturing a semiconductor integrated circuit device according to the present invention, the concentration of the water is 40% or less.

  In the method for manufacturing a semiconductor integrated circuit device according to the present invention, the concentration of the water is 0.5 to 5%.

The method of manufacturing a semiconductor integrated circuit device according to the present invention includes the following steps (a) to (c).
(A) transferring a semiconductor wafer having a first oxide film formed on a main surface thereof to a cleaning unit, and removing the first oxide film by wet cleaning;
(B) transporting the semiconductor wafer from the cleaning unit to an oxidation processing unit in an inert gas atmosphere without bringing the semiconductor wafer into contact with the atmosphere;
(C) supplying oxygen containing a low concentration of water generated from hydrogen and oxygen by a catalytic action to the main surface of the semiconductor wafer heated to a predetermined temperature or in the vicinity thereof, at least reproducibility of oxide film formation and oxide film A step of forming a second oxide film having a thickness of 5 nm or less at an oxide film growth rate sufficient to ensure uniformity of the thickness.

  In the method for manufacturing a semiconductor integrated circuit device according to the present invention, the second oxide film may be formed on the surface of the semiconductor wafer during a period from the removal of the first oxide film to the formation of the second oxide film. An undesired natural oxide film and an initial oxide film undesirably formed on the surface of the semiconductor wafer by contact with the oxygen are partially included, and the natural oxide film and the initial oxide film The total thickness is equal to or less than half of the thickness of the entire second oxide film.

  In the method for manufacturing a semiconductor integrated circuit device according to the present invention, the total thickness of the natural oxide film and the initial oxide film is one third or less of the entire thickness of the second oxide film.

  According to the method of manufacturing a semiconductor integrated circuit device of the present invention, after forming a first oxide film in a first region and a second region of a semiconductor wafer, the first oxide film formed in the first region of the semiconductor wafer And forming a second oxide film on the first insulating film remaining in a first region and a second region of the semiconductor wafer, wherein the first and second oxide films are formed. Is formed by the above method.

Further, the main outline of the present invention is divided into sections as follows.
1. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of synthesizing water from oxygen and hydrogen using a catalyst at 500 degrees Celsius or less,
(B) The ratio of the partial pressure of the synthesized water to the atmospheric pressure of the entire atmosphere is in the range of 0.5% to 5%, in an oxidizing atmosphere in which hydrogen is not dominant, and in a silicon surface on a wafer. Forming a silicon oxide film to be a gate insulating film of a field-effect transistor on the silicon surface by thermal oxidation under a condition where is heated to 800 degrees Celsius or more. (It is generally well known that “dominant” means that, when referring to gas, the component is the most present in the atmosphere.)
2. 2. The method for manufacturing a semiconductor integrated circuit device according to claim 1, wherein the oxidizing atmosphere contains oxygen gas as a main component.
3. 3. The method for manufacturing a semiconductor integrated circuit device according to the above item 1 or 2, wherein the synthesis of the moisture is performed by causing the catalyst to act on a mixed gas of oxygen and hydrogen.
4. 4. A method of manufacturing a semiconductor integrated circuit device according to any one of the above items 1 to 3, wherein the thermal oxidation is performed while supplying the oxidizing atmosphere around the wafer.
5. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of synthesizing water from oxygen and hydrogen using a catalyst at 500 degrees Celsius or less,
(B) the ratio of the partial pressure of the synthesized water to the total pressure of the atmosphere is in the range of 0.5% to 5%, and the silicon surface on the wafer is in an oxidizing atmosphere containing oxygen gas; Forming a silicon oxide film to be a gate insulating film of a field-effect transistor on the silicon surface by thermal oxidation under the condition heated to 800 degrees Celsius or more.
6. 6. The method of manufacturing a semiconductor integrated circuit device according to claim 5, wherein the thermal oxidation is performed using a hot wall furnace.
7. 6. The method for manufacturing a semiconductor integrated circuit device according to claim 5, wherein the thermal oxidation is performed using a lamp heating furnace.
8. 8. The method for manufacturing a semiconductor integrated circuit device according to any one of the above items 5 to 7, wherein the synthesized gas containing water is supplied as the oxidizing atmosphere after being diluted with a gas other than water.
9. In any one of the above items 5 to 8, the method for manufacturing a semiconductor integrated circuit device further includes the following steps:
(C) performing a surface treatment in an atmosphere containing nitrogen oxides without exposing the wafer on which the oxide film is formed to the outside air or another oxidizing atmosphere.
10. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) producing water using a catalyst at a temperature of 500 degrees Celsius or less,
(B) the partial pressure ratio of the synthesized water to the atmospheric pressure of the whole atmosphere is in the range of 0.5% to 5%, and the silicon surface on the wafer is 800 degrees Celsius in an oxidizing atmosphere containing oxygen gas. Forming a silicon oxide film to be a gate insulating film of a field effect transistor on the silicon surface by thermal oxidation under a condition of being heated to a high degree.
11. 11. The method for manufacturing a semiconductor integrated circuit device according to item 10, wherein the oxidizing atmosphere contains oxygen gas as a main component.
12. 12. The method for manufacturing a semiconductor integrated circuit device according to the item 10 or 11, wherein the thermal oxidation is performed while supplying the oxidizing atmosphere around the wafer.
13. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of synthesizing water from oxygen and hydrogen using a catalyst at 500 degrees Celsius or less,
(B) The ratio of the partial pressure of the synthesized water to the atmospheric pressure of the entire atmosphere is in the range of 0.5% to 5%, and the oxidizing atmosphere containing oxygen gas is heated to a silicon surface of 800 ° C. or more. Forming a silicon oxide film to be a gate insulating film of a field effect transistor on the silicon surface by thermal oxidation while supplying the silicon oxide film around the heated wafer.
14． 14. The method for manufacturing a semiconductor integrated circuit device according to the item 13, wherein the oxidizing atmosphere contains oxygen gas as a main component.
15. 13. The method for manufacturing a semiconductor integrated circuit device according to item 13 or 14, wherein the water is synthesized by causing the catalyst to act on a mixed gas of oxygen and hydrogen.
16. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of synthesizing water from oxygen and hydrogen using a catalyst at a temperature of 500 degrees Celsius or less in a water synthesis section;
(B) The ratio of the partial pressure of the synthesized water to the atmospheric pressure of the entire atmosphere is in the range of 0.5% to 5%, and the oxidizing atmosphere containing oxygen gas is heated to a silicon surface of 800 ° C. or more. A silicon oxide film which is to be a gate insulating film of a field effect transistor is thermally oxidized on the silicon surface in the oxidation processing section while supplying the wafer around the heated wafer through a narrow portion provided between the moisture synthesis section and the oxidation processing section. A step of forming by:
17. 17. The method for manufacturing a semiconductor integrated circuit device according to claim 16, wherein the oxidizing atmosphere contains oxygen gas as a main component.
18. 21. The method for manufacturing a semiconductor integrated circuit device according to the above item 16 or 17, wherein the synthesis of the moisture is performed by causing the catalyst to act on a mixed gas of oxygen and hydrogen.
19. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) synthesizing water from oxygen and hydrogen using a catalyst,
(B) diluting the synthesized first gas containing water with a second gas other than water;
(C) introducing the diluted first gas into the processing region;
(D) forming a silicon oxide film to be a gate insulating film of a field effect transistor on the silicon surface on the wafer by thermal oxidation in the introduced first gas atmosphere in the processing region.
20. 20. The method for manufacturing a semiconductor integrated circuit device according to item 19, wherein the oxidizing atmosphere contains oxygen gas as a main component.
21. 21. The method for manufacturing a semiconductor integrated circuit device according to the above item 19 or 20, wherein the thermal oxidation is performed at 800 ° C. or higher.
22. 22. The method for manufacturing a semiconductor integrated circuit device according to any one of the items 19 to 21, wherein the thermal oxidation is performed while supplying the oxidizing atmosphere around the wafer.
23. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) producing a first gas containing moisture by causing a moisture synthesis catalyst to act on a mixed gas of oxygen and hydrogen;
(B) diluting the first gas with a second gas other than water;
(C) introducing the diluted first gas into the processing region;
(D) forming a silicon oxide film to be a gate insulating film of a field effect transistor on the silicon surface on the wafer by thermal oxidation in the introduced first gas atmosphere in the processing region.
24. 23. The method for manufacturing a semiconductor integrated circuit device according to the item 23, wherein the oxidizing atmosphere contains oxygen gas as a main component.
25. 21. The method for manufacturing a semiconductor integrated circuit device according to the above item 23 or 24, wherein the thermal oxidation is performed at 800 ° C. or higher.
26. 26. The method for manufacturing a semiconductor integrated circuit device according to any one of the items 23 to 25, wherein the thermal oxidation is performed while supplying the oxidizing atmosphere around the wafer.
27. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) producing a first gas containing water by acting a catalyst;
(B) diluting the first gas with a second gas other than water;
(C) introducing the diluted first gas into the processing region;
(D) forming a silicon oxide film to be a gate insulating film of a field effect transistor on the silicon surface on the wafer by thermal oxidation in the introduced first gas atmosphere in the processing region.
28. 28. The method for manufacturing a semiconductor integrated circuit device according to the above item 27, wherein the oxidizing atmosphere contains oxygen gas as a main component.
29. 27. In the manufacturing method of a semiconductor integrated circuit device described in the paragraph 27 or 28, the thermal oxidation is performed at 800 ° C. or higher.
30. 30. The method of manufacturing a semiconductor integrated circuit device according to any one of the items 27 to 29, wherein the thermal oxidation is performed while supplying the oxidizing atmosphere around the wafer.
31. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) producing a first gas containing moisture by causing a moisture synthesis catalyst to act on a mixed gas of oxygen and hydrogen;
(B) diluting the first gas with a second gas containing oxygen as a main component;
(C) introducing the diluted first gas into the processing region;
(D) forming a silicon oxide film to be a gate insulating film of a field effect transistor on the silicon surface on the wafer by thermal oxidation in the introduced first gas atmosphere in the processing region.
32. 32. In the manufacturing method of a semiconductor integrated circuit device according to the above item 31, the oxidizing atmosphere contains oxygen gas as a main component.
33. 31. The method for manufacturing a semiconductor integrated circuit device according to the above item 31 or 32, wherein the thermal oxidation is performed at 800 ° C. or higher.
34. 33. The method for manufacturing a semiconductor integrated circuit device according to any one of the above items 31 to 33, wherein the thermal oxidation is performed while supplying the oxidizing atmosphere around the wafer.
35. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) performing a surface treatment on the silicon surface on the wafer to clean the surface or remove the surface film;
(B) after the step, transferring the wafer to an oxidation processing unit without substantially exposing the wafer to an oxidizing atmosphere;
(C) a step of synthesizing water from oxygen and hydrogen using a catalyst;
(D) forming a silicon oxide film on the silicon surface by thermal oxidation in an atmosphere containing the synthesized water.
36. 36. The method for manufacturing a semiconductor integrated circuit device according to the item 35, wherein the silicon oxide film is to be a gate electrode of a MOS transistor.
37. In the above item 36, the method for producing a semiconductor integrated circuit device further comprises the following steps;
(E) performing a surface treatment in an atmosphere containing nitrogen oxides without exposing the wafer on which the oxide film is formed to the outside air or another oxidizing atmosphere.
38. In the above item 37, the method for producing a semiconductor integrated circuit device further comprises the following steps;
(F) forming an electrode material to be a gate electrode by vapor phase deposition without exposing the surface-treated wafer to outside air or another oxidizing atmosphere;
39. In the above item 36, the method for producing a semiconductor integrated circuit device further comprises the following steps;
(F) forming an electrode material to be a gate electrode by vapor deposition without exposing the wafer on which the oxide film is formed to the outside air or another oxidizing atmosphere;
40. 40. The method for manufacturing a semiconductor integrated circuit device according to any one of the above items 35 to 39, wherein the oxidizing step is performed by lamp heating.
41. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) performing a surface treatment on the silicon surface on the wafer to clean the surface or remove the surface film;
(B) after the step, transferring the wafer to an oxidation processing unit without substantially exposing the wafer to an oxidizing atmosphere;
(C) producing water using a catalyst,
(D) forming a silicon oxide film on the silicon surface by thermal oxidation in an atmosphere containing the synthesized water.
42. 42. The method for manufacturing a semiconductor integrated circuit device according to the item 41, wherein the silicon oxide film is to be a gate electrode of a MOS transistor.
43. In the above item 42, the method for producing a semiconductor integrated circuit device further comprises the following steps;
(E) performing a surface treatment in an atmosphere containing nitrogen oxides without exposing the wafer on which the oxide film is formed to the outside air or another oxidizing atmosphere.
44. In the above item 43, the method for producing a semiconductor integrated circuit device further comprises the following steps;
(F) forming an electrode material to be a gate electrode by vapor phase deposition without exposing the surface-treated wafer to outside air or another oxidizing atmosphere;
45. In the above item 42, the method for producing a semiconductor integrated circuit device further comprises the following steps;
(F) forming an electrode material to be a gate electrode by vapor deposition without exposing the wafer on which the oxide film is formed to the outside air or another oxidizing atmosphere;
46. 45. The method for manufacturing a semiconductor integrated circuit device according to any one of the above items 41 to 45, wherein the oxidizing step is performed by lamp heating.
47. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) synthesizing water from oxygen and hydrogen using a catalyst,
(B) forming, by thermal oxidation, a silicon oxide film to be a gate insulating film of a field effect transistor on the silicon surface on the wafer in the synthesized atmosphere containing water;
(C) a step of subjecting the wafer, on which the silicon oxide film has been formed, to a surface treatment in a gas atmosphere containing nitrogen oxide without contacting the outside air after the above step.
48. 48. In the manufacturing method of a semiconductor integrated circuit device according to the above item 47, the silicon oxide film is to be a gate electrode of a MOS transistor.
49. In the above item 48, the method for producing a semiconductor integrated circuit device further comprises the following steps;
(E) performing a surface treatment in an atmosphere containing nitrogen oxides without exposing the wafer on which the oxide film is formed to the outside air or another oxidizing atmosphere.
50. 49. In the above 49, the method for manufacturing a semiconductor integrated circuit device further includes the following steps;
(F) forming an electrode material to be a gate electrode by vapor phase deposition without exposing the surface-treated wafer to outside air or another oxidizing atmosphere;
51. In the above item 48, the method for producing a semiconductor integrated circuit device further comprises the following steps;
(F) forming an electrode material to be a gate electrode by vapor deposition without exposing the wafer on which the oxide film is formed to the outside air or another oxidizing atmosphere;
52. 52. The method for manufacturing a semiconductor integrated circuit device according to any one of the items 47 to 51, wherein the oxidizing step is performed by lamp heating.
53. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) forming an element isolation groove on a silicon surface on a wafer;
(B) forming an insulating film from the outside in the device isolation groove;
(C) flattening the silicon surface to expose a portion of the silicon surface where a thermal oxide film is to be formed;
(D) a step of synthesizing water with a catalyst and forming a thermal oxide film to be a gate insulating film of a field effect transistor in the exposed portion in an atmosphere containing the water.
54. 54. In the manufacturing method of a semiconductor integrated circuit device according to the above item 53, the flattening is performed by a chemical mechanical method.
55. 55. In the manufacturing method of a semiconductor integrated circuit device described in the paragraph 53 or 54, the flattening is performed by chemical mechanical polishing.
56. 55. The method for manufacturing a semiconductor integrated circuit device according to any one of the items 53 to 55, wherein the insulating film from the outside is formed by CVD (Chemical Vapor Deposition).
57. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) forming an element isolation groove on a silicon surface on a wafer;
(B) forming an insulating film by deposition in the device isolation groove;
(C) a step of synthesizing moisture with a catalyst and forming a thermal oxide film to be a gate insulating film of a field effect transistor on a silicon surface surrounded by the element isolation trench in an atmosphere containing the moisture.
58. In the above item 57, the method for producing a semiconductor integrated circuit device further comprises the following steps;
(D) after the step (b), flattening the silicon surface to expose a portion of the silicon surface where a thermal oxide film is to be formed.
59. 57. In the manufacturing method of a semiconductor integrated circuit device described in the paragraph 57 or 58, the flattening is performed by a chemical mechanical method.
60. 59. The manufacturing method of a semiconductor integrated circuit device according to any one of the above items 57 to 59, wherein the planarization is performed by chemical mechanical polishing.
61. 61. The method for manufacturing a semiconductor integrated circuit device according to any one of the above items 57 to 60, wherein the external insulating film is formed by CVD (Chemical Vapor Deposition).
62. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
The silicon surface on the wafer is heated by a lamp in an oxidizing atmosphere in which the ratio of the partial pressure of moisture to the entire atmospheric pressure is in the range of 0.5% to 5%. Forming a silicon oxide film to be an insulating film by thermal oxidation;
63. 63. The method for manufacturing a semiconductor integrated circuit device according to the paragraph 62, wherein the oxidizing atmosphere contains oxygen gas as a main component.
64. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) generating a first gas containing moisture by causing a catalyst to act on a mixed gas of oxygen and hydrogen;
(B) diluting the first gas with a second gas other than water;
(C) introducing the diluted first gas into the processing region;
(D) forming a silicon oxide film to be a gate insulating film of a field effect transistor on the silicon surface on the wafer in the introduced first gas atmosphere in the processing region by thermal oxidation by lamp heating;
65. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of introducing a non-processed wafer into an oxidizing section which is preheated to the extent that moisture does not condense and kept in a substantially non-oxidizing atmosphere;
(B) In the oxidizing section, the silicon surface on the introduced wafer is heated by a lamp under an oxidizing atmosphere in which the ratio of the partial pressure of water to the whole atmospheric pressure is 0.1% or more. Forming a silicon oxide film to be a gate insulating film of the field effect transistor on the silicon surface by thermal oxidation.
66. 66. The method for manufacturing a semiconductor integrated circuit device according to claim 65, wherein the non-oxidizing atmosphere is a gas obtained by adding a small amount of oxygen gas mainly to nitrogen gas.
67. 66. In the manufacturing method of a semiconductor integrated circuit device described in the paragraph 65 or 66, the preheating temperature is 100 degrees Celsius or more and 500 degrees or less.
68. 67. The method of manufacturing a semiconductor integrated circuit device according to any one of the items 65 to 67, wherein a surface temperature of the wafer during the oxidation treatment is 700 degrees Celsius or more.
69. 70. The method for manufacturing a semiconductor integrated circuit device according to any one of items 65 to 68, wherein the non-oxidizing atmosphere is introduced into the oxidizing unit after being preheated to such a degree that moisture does not condense.
70. 70. The method for manufacturing a semiconductor integrated circuit device according to any one of the items 65 to 69, wherein the wafer is preheated to such an extent that moisture does not condense and then introduced into the oxidation processing section.
71. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
The ratio of the partial pressure of water to the total atmospheric pressure is in the range of 0.5% to 5%, and the silicon surface on the wafer is heated to 800 ° C. or more in an oxidizing atmosphere containing oxygen gas. Forming a silicon oxide film having a thickness of 5 nm or less to be a gate insulating film of a field effect transistor on the silicon surface under the above-mentioned conditions by thermal oxidation.
72. 71. The method for manufacturing a semiconductor integrated circuit device according to the item 71, wherein the oxidizing atmosphere contains oxygen gas as a main component.
73. 72. The method for manufacturing a semiconductor integrated circuit device according to the item 71 or 72, wherein the thermal oxidation is performed while supplying the oxidizing atmosphere around the wafer.
74. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
The ratio of the partial pressure of moisture to the atmospheric pressure of the entire atmosphere is in the range of 0.5% to 5%, and in an oxidizing atmosphere containing oxygen gas, a tunnel insulating film of a flash memory is formed on the silicon surface on the wafer. Forming a silicon oxide film to be formed by thermal oxidation.
75. 74. The method for manufacturing a semiconductor integrated circuit device according to the item 74, wherein the oxidizing atmosphere contains oxygen gas as a main component.
76. 74. In the manufacturing method of a semiconductor integrated circuit device described in the paragraph 74 or 75, the thermal oxidation is performed while supplying the oxidizing atmosphere to the periphery of the wafer.
77. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of generating water with a catalyst,
(B) forming a first thermal oxide film on the first silicon surface region on the wafer in the first oxidation processing unit while supplying an atmosphere gas containing water generated by the catalyst to the first oxidation processing unit; The process of
(C) a step of producing moisture by burning oxygen and hydrogen before the step (a) or after the step (b);
(D) While supplying an atmosphere gas containing moisture generated by combustion to the first or second oxidation processing section, a second heat is applied to the second silicon surface region on the wafer in the second oxidation processing section. Forming an oxide film;
78. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
In an oxidizing atmosphere in which the ratio of the partial pressure of moisture to the atmospheric pressure of the entire atmosphere is in the range of 0.5% to 5%, the main surface of the wafer is held so as to be substantially horizontal. Forming a silicon oxide film to be a gate insulating film of a MOS transistor on the silicon surface on the main surface by thermal oxidation.
79. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) using a catalyst to synthesize water from a non-stoichiometric mixture of oxygen and hydrogen that is richer in oxygen than the stoichiometric ratio corresponding to water under a temperature condition that does not cause an explosion;
(B) forming a silicon oxide film on the surface of the silicon on the wafer by thermal oxidation in the synthesized oxidizing atmosphere containing water.
80. A method of manufacturing a semiconductor integrated circuit device comprising the following steps;
(A) a step of introducing a wafer to be processed into a high-temperature oxidation processing section at a temperature of 700 ° C. or more maintained in a non-oxidizing atmosphere containing a small amount of oxygen such that oxidation does not substantially proceed;
(B) synthesizing water from oxygen and hydrogen using a catalyst at a temperature of 500 degrees Celsius or less,
(C) In the oxidizing section, in a oxidizing atmosphere in which the ratio of the partial pressure of the synthesized water to the whole atmospheric pressure is 0.5% to 5%, and the silicon surface on the wafer is 700 ° C. Forming a silicon oxide film to be a gate insulating film of the field-effect transistor on the silicon surface by thermal oxidation under the above-described heated condition.

(Other outlines of the present invention)
The above and other outlines of the invention of the present application are classified as follows as follows.

A. A method for manufacturing a semiconductor integrated circuit device, comprising the following steps (a) and (b):
(A) a step of generating water by catalytic action from hydrogen and oxygen,
(B) The oxygen containing a low concentration of water is supplied to or near the main surface of the semiconductor wafer heated to a predetermined temperature, so that at least reproducibility of oxide film formation and uniformity of oxide film thickness can be ensured. Forming an oxide film having a thickness of 5 nm or less on the main surface of the semiconductor wafer at an oxide film growth rate of about

    B. The method for manufacturing a semiconductor integrated circuit device according to the above item A, wherein the oxide film is a gate oxide film of a MOSFET.

    C. The method for manufacturing a semiconductor integrated circuit device according to item A, wherein the oxide film has a thickness of 3 nm or less.

    D. The method for manufacturing a semiconductor integrated circuit device according to the above item A, wherein a heating temperature of the semiconductor wafer is 800 to 900 ° C.

    E. FIG. The method for manufacturing a semiconductor integrated circuit device according to the above item A, wherein after the step (b), the main surface of the semiconductor wafer is subjected to an oxynitridation treatment, whereby nitrogen is applied to the interface between the oxide film and the substrate. A method for manufacturing a semiconductor integrated circuit device, comprising segregating.

    F. The method for manufacturing a semiconductor integrated circuit device according to the above item A, wherein the oxide film is formed by single-wafer processing.

    G. FIG. The method for manufacturing a semiconductor integrated circuit device according to item A, wherein the oxide film is formed by a batch process.

H. A method for manufacturing a semiconductor integrated circuit device, comprising the following steps (a) and (b):
(A) a step of generating water by catalytic action from hydrogen and oxygen,
(B) a main surface of a semiconductor wafer or a semiconductor wafer obtained by heating oxygen containing water at a concentration that can provide an initial withstand voltage better than an oxide film formed in a dry oxygen atmosphere containing no water at a predetermined temperature, or Forming an oxide film having a thickness of 5 nm or less on the main surface of the semiconductor wafer by supplying the film to the vicinity.

    I. The method for manufacturing a semiconductor integrated circuit device according to the item H, wherein the concentration of the water is 40% or less.

    J. The method for manufacturing a semiconductor integrated circuit device according to the item H, wherein the concentration of the water is 0.5 to 5%.

    K. The method for manufacturing a semiconductor integrated circuit device according to the above item H, wherein the thickness of the oxide film is 3 nm or less.

L. A method for manufacturing a semiconductor integrated circuit device, comprising the following steps (a) to (c):
(A) transferring a semiconductor wafer having a first oxide film formed on a main surface thereof to a cleaning unit, and removing the first oxide film by wet cleaning;
(B) transporting the semiconductor wafer from the cleaning unit to an oxidation processing unit in an inert gas atmosphere without bringing the semiconductor wafer into contact with the atmosphere;
(C) supplying oxygen containing a low concentration of water generated from hydrogen and oxygen by a catalytic action to the main surface of the semiconductor wafer heated to a predetermined temperature or in the vicinity thereof, at least reproducibility of oxide film formation and oxide film Forming a second oxide film having a thickness of 5 nm or less on the main surface of the semiconductor wafer at an oxide film growth rate sufficient to ensure uniformity of the thickness.

    M. The method for manufacturing a semiconductor integrated circuit device according to the item L, wherein the thickness of the oxide film is 3 nm or less.

    N. L. The method of manufacturing a semiconductor integrated circuit device according to item L, wherein the second oxide film is formed after removing the first oxide film and before forming the second oxide film. A natural oxide film that is undesirably formed on the surface of the wafer, and an initial oxide film that is undesirably formed on the surface of the semiconductor wafer due to contact with the oxygen as a part thereof; A method for manufacturing a semiconductor integrated circuit device, wherein the total thickness of the initial oxide film is equal to or less than half the thickness of the entire second oxide film.

    O. The method for manufacturing a semiconductor integrated circuit device according to the item L, wherein a total film thickness of the natural oxide film and the initial oxide film is one third or less of a total film thickness of the second oxide film. A method for manufacturing a semiconductor integrated circuit device, comprising:

    P. Forming a first oxide film on a first region and a second region of the semiconductor wafer, and then removing the first oxide film formed on the first region of the semiconductor wafer; Forming a second oxide film on the first insulating film remaining in the region and the second region; and forming at least one of the first and second oxide films in the step (a) And (b). A method of manufacturing a semiconductor integrated circuit device.

  The effects obtained by typical aspects of the invention disclosed in the present application will be briefly described as follows.

  According to the present invention, a high quality ultra-thin gate oxide film having a thickness of 5 nm or less and a uniform thickness can be formed with good reproducibility, so that a fine MOSFET having a gate length of 0.25 μm or less can be formed. The reliability and the manufacturing yield of the semiconductor integrated circuit device having the above can be improved.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In all the drawings for describing the embodiments, members having the same functions are denoted by the same reference numerals, and repeated description thereof will be omitted.

  In addition, for convenience of explanation, the present invention will be described by being divided into some examples or items. However, each of these embodiments or items is not separate, and some of the other modified examples and some of them are mutually reciprocal. It goes without saying that there is a relationship between the details of the process and the devices used for some of the processes. That is, the individual devices or unit processes described in the series of embodiments will not be repeated one by one when they can be applied to other embodiments almost as they are. Conversely, individual devices or unit processes described independently will not be repeated one by one when they can be applied to other embodiments almost as they are.

(Semiconductor process A)
A method of manufacturing a CMOSFET (Complementary Metal Oxide Semiconductor Field Effect Transistor) according to the present embodiment will be described with reference to FIGS. 1 to 26 (mainly, FIGS. 1 to 8, 10, 16, and 22 to 26).

  First, as shown in FIG. 1, a semiconductor substrate 1 made of single crystal silicon having a specific resistance of about 10 Ωcm was heat-treated to form a thin silicon oxide film 2 having a thickness of about 10 nm on its main surface (thermal oxidation process A1). Thereafter, a silicon nitride film 3 having a thickness of about 100 nm is deposited on the silicon oxide film 2 by a CVD method. Next, as shown in FIG. 2, a photoresist 4 having an element isolation region is formed on the silicon nitride film 3, and the silicon nitride film 3 is patterned using the photoresist 4 as a mask.

  Next, after removing the photoresist 4, the silicon oxide film 2 and the semiconductor substrate 1 are sequentially etched using the silicon nitride film 3 as a mask, as shown in FIG. 5a is formed, and then a thermal oxidation treatment at 900 to 1150 ° C. is performed to form a silicon oxide film 6 on the inner wall of the groove 5a (thermal oxidation process A2).

Next, as shown in FIG. 4, a film thickness of about 800 nm is formed on the semiconductor substrate 1 by a CVD method using, for example, ozone (O ₃ ) and tetraethoxysilane ((C ₂ H ₅ O) ₄ Si) as a source gas. After the silicon oxide film 7 is deposited, as shown in FIG. 5, the silicon oxide film 7 is polished by a chemical mechanical polishing (CMP) method, and the groove is formed by using the silicon nitride film 3 as a polishing stopper. The element isolation groove 5 is formed by leaving the silicon oxide film 7 only inside 5a. Subsequently, a heat treatment at about 1000 ° C. is performed to densify the silicon oxide film 7 inside the element isolation trench 5.

Next, after the silicon nitride film 3 is removed by wet etching using hot phosphoric acid, as shown in FIG. 6, a photoresist 8 in which a formation region (left side in the drawing) of the p-channel MOSFET is opened is used as a mask. Then, an impurity for forming an n-type well is ion-implanted in the semiconductor substrate 1 and an impurity for adjusting a threshold voltage of the p-channel MOSFET is ion-implanted. As an impurity for forming an n-type well, for example, P (phosphorus) is used, and ions are implanted at an energy of 360 keV and a dose of 1.5 × 10 ¹³ / cm ² . As the impurity for adjusting the threshold voltage, for example, P is used, and ions are implanted at an energy of 40 keV and a dose of 2 × 10 ¹² / cm ² .

Next, after removing the photoresist 8, as shown in FIG. 7, a p-type well is formed in the semiconductor substrate 1 using the photoresist 9 in which the formation region (the right side in the figure) of the n-channel MOSFET is opened as a mask. The impurity for adjusting the threshold voltage of the n-channel MOSFET is further ion-implanted. As the impurity for forming the p-type well, for example, B (boron) is used, and ion implantation is performed at an energy of 200 keV and a dose of 1.0 × 10 ¹³ / cm ² . As the impurity for adjusting the threshold voltage, for example, boron fluoride (BF ₂ ) is used, and ions are implanted at an energy of 40 keV and a dose of 2 × 10 ¹² / cm ² .

  Next, after removing the photoresist 9, as shown in FIG. 8, the semiconductor substrate 1 is heat-treated at 950 ° C. for about 1 minute to expand and diffuse the n-type impurity and the p-type impurity, thereby forming a p-channel MOSFET. An n-type well 10 is formed on the semiconductor substrate 1 in the formation region, and a p-type channel region 12 is formed near the surface thereof. At the same time, a p-type well 11 is formed on the semiconductor substrate 1 in the n-channel type MOSFET formation region, and an n-type channel region 13 is formed near the surface thereof.

  Next, a gate oxide film is formed on each surface of the n-type well 10 and the p-type well 11 by the following method (thermal oxidation process A3).

  FIG. 9 is a schematic diagram of a single-wafer oxide film forming apparatus used for forming a gate oxide film. As shown, the oxide film forming apparatus 100 is connected to a subsequent stage of a cleaning apparatus 101 that removes an oxide film on the surface of the semiconductor wafer 1A by a wet cleaning method before forming a gate oxide film. By employing such an integrated cleaning-oxidizing processing system, the semiconductor wafer 1A subjected to the cleaning processing in the cleaning apparatus 101 can be transferred to the oxide film forming apparatus 100 in a short time without contact with the atmosphere. The formation of a natural oxide film on the surface of the semiconductor wafer 1A during the period from the removal of the oxide film to the formation of the gate oxide film can be minimized.

The semiconductor wafer 1A loaded on the loader 102 of the cleaning apparatus 101 is first transported to the cleaning chamber 103, and subjected to a cleaning process using a cleaning liquid such as NH ₄ OH + H ₂ O ₂ + H ₂ O, and then to a hydrofluoric acid cleaning chamber 104. And subjected to a cleaning treatment with dilute hydrofluoric acid (HF + H ₂ O) to remove the silicon oxide film on the surface (FIG. 10). Thereafter, the semiconductor wafer 1A is transported to the drying chamber 105 and subjected to a drying process to remove water on the surface. Moisture remaining on the surface of the semiconductor wafer 1A is sufficiently removed because it causes a structural defect such as Si-H or Si-OH in a gate oxide film or a gate oxide film / silicon interface to form a charge trap. It is necessary to keep.

  The semiconductor wafer 1A after the drying process is immediately transferred to the oxide film forming apparatus 100 through the buffer 106.

  The oxide film forming apparatus 100 is configured in a multi-chamber system including, for example, an oxide film forming chamber 107, an oxynitride film forming chamber 108, a cooling stage 109, a loader / unloader 110, and the like. And a robot hand 113 for loading (unloading) the semiconductor wafer 1A into (from) each of the processing chambers. The inside of the transfer system 112 is kept in an inert gas atmosphere such as nitrogen in order to minimize formation of a natural oxide film on the surface of the semiconductor wafer 1A due to mixing with the atmosphere. Further, the inside of the transfer system 112 is kept in an ultra-low moisture atmosphere of ppb level in order to minimize the attachment of moisture to the surface of the semiconductor wafer 1A. The semiconductor wafer 1 </ b> A carried into the oxide film forming apparatus 100 is first transferred to the oxide film forming chamber 107 via the robot hand 113 in units of one or two wafers.

  FIG. 11A is a schematic plan view illustrating an example of a specific configuration of the oxide film forming chamber 107, and FIG. 11B is a cross-sectional view taken along line BB ′ of FIG. .

  The oxide film forming chamber 107 includes a chamber 120 composed of a multi-walled quartz tube, and heaters 121a and 121b for heating the semiconductor wafer 1A are installed at upper and lower portions thereof. Inside the chamber 120, a disc-shaped heat equalizing ring 122 for uniformly dispersing the heat supplied from the heaters 121a and 121b over the entire surface of the semiconductor wafer 1A is housed, and the semiconductor wafer 1A is held horizontally above the ring. The susceptor 123 is placed. The heat equalizing ring 122 is made of a heat-resistant material such as quartz or SiC (silicon carbide), and is supported by a support arm 124 extending from a wall surface of the chamber 120. A thermocouple 125 for measuring the temperature of the semiconductor wafer 1A held by the susceptor 123 is provided near the heat equalizing ring 122. For heating the semiconductor wafer 1A, for example, a heating method using a lamp 130 as shown in FIG. 12 may be adopted in addition to the heating method using the heaters 121a and 121b.

  One end of a gas introduction pipe 126 for introducing water, oxygen, and a purge gas into the chamber 120 is connected to a part of the wall surface of the chamber 120. The other end of the gas introduction pipe 126 is connected to a catalyst-type moisture generator described later. A partition 128 having a large number of through holes 127 is provided in the vicinity of the gas introduction pipe 126, and gas introduced into the chamber 120 passes through the through holes 127 of the partition 128 and enters the chamber 120. Spread evenly. One end of an exhaust pipe 129 for discharging the gas introduced into the chamber 120 is connected to another part of the wall surface of the chamber 120.

  FIG. 13 and FIG. 14 are schematic diagrams showing a catalytic-type water generating apparatus connected to the chamber 120. The moisture generator 140 includes a reactor 141 made of a heat-resistant and corrosion-resistant alloy (for example, a Ni alloy known as “Hastelloy”), and contains Pt (platinum), Ni ( A coil 142 made of a catalyst metal such as nickel (Ni) or Pd (palladium) and a heater 143 for heating the coil 142 are housed.

  A process gas composed of hydrogen and oxygen and a purge gas composed of an inert gas such as nitrogen or Ar (argon) are introduced into the reactor 141 from a gas storage tank 144a, 144b, 144c through a pipe 145. In the middle of the pipe 145, mass flow controllers 146a, 146b, 146c for adjusting the amount of gas, and opening / closing valves 147a, 147b, 147c for opening and closing the gas flow path are provided. The amounts and component ratios are precisely controlled by these.

The process gas (hydrogen and oxygen) introduced into the reactor 141 is excited by contacting the coil 142 heated to about 350 to 450 ° C., and hydrogen radicals are generated from hydrogen molecules (H ₂ → 2H ^+). ), Oxygen radicals are generated from oxygen molecules (O ₂ → 2O ⁻ ). Since these two radicals are extremely active chemically, they react quickly to produce water (2H ⁺ + O ⁻ → H ₂ O). This water is mixed with oxygen in the connection portion 148 and diluted to a low concentration, and is introduced into the chamber 120 of the oxide film formation chamber 107 through the gas introduction pipe 126.

  Since the above-described catalytic water generator 140 can control the amounts of hydrogen and oxygen involved in the generation of water with high accuracy, the concentration of water introduced into the oxide film forming chamber 107 together with oxygen can be reduced. It can be controlled in a wide range and with high precision from an ultra-low concentration of ppt or less to a high concentration of about several tens of percent. Further, since water is instantaneously generated when the process gas is introduced into the reactor 141, a desired moisture concentration can be obtained in real time. Therefore, hydrogen and oxygen can be introduced into the reactor 141 at the same time, and there is no need to introduce oxygen prior to the introduction of hydrogen as in a conventional moisture generation system employing a combustion method. As the catalyst metal in the reactor 141, a material other than the above-described metals may be used as long as it can radicalize hydrogen or oxygen. The catalyst metal may be used after being processed into a coil shape, or may be processed into, for example, a hollow tube or a fine fiber filter and the process gas may be passed through the inside.

  An example of a sequence of forming a gate oxide film using the oxide film forming apparatus 100 will be described with reference to FIG.

  First, the chamber 120 of the oxide film forming chamber 107 is opened, and the semiconductor wafer 1A is loaded on the susceptor 123 while introducing a purge gas (nitrogen) therein. The time from loading the semiconductor wafer 1A into the chamber 120 to loading it on the susceptor 123 is 55 seconds. Thereafter, the chamber 120 is closed, and a purge gas is continuously introduced for 30 seconds to sufficiently exchange the gas in the chamber 120. The susceptor 123 is previously heated by the heaters 121a and 121b so that the semiconductor wafer 1A is quickly heated. The heating temperature of the semiconductor wafer 1A is in the range of 800 to 900 ° C., for example, 850 ° C. If the wafer temperature is lower than 800 ° C., the quality of the gate oxide film is deteriorated. On the other hand, when the temperature is 900 ° C. or more, the surface of the wafer is likely to be roughened.

  Next, oxygen and hydrogen are introduced into the reactor 141 of the moisture generator 140 for 15 seconds, the generated water is introduced into the chamber 120 together with oxygen, and the surface of the semiconductor wafer 1A is oxidized for 5 minutes, so that the film thickness is 5 nm or less. For example, a gate oxide film 14 of, eg, 4 nm is formed (FIG. 16).

  When oxygen and hydrogen are introduced into the reactor 141, hydrogen is not introduced before oxygen. It is dangerous to introduce hydrogen before oxygen because unreacted hydrogen flows into the hot chamber 120. On the other hand, when oxygen is introduced before hydrogen, the oxygen flows into the chamber 120, and a low-quality oxide film (initial oxide film) is formed on the surface of the semiconductor wafer 1A during standby. Therefore, hydrogen is introduced at the same time as oxygen, or at a timing slightly later than oxygen (within 0 to 5 seconds) in consideration of work safety. By doing so, the thickness of the initial oxide film undesirably formed on the surface of the semiconductor wafer 1A can be suppressed to a minimum.

  FIG. 17 is a graph showing the dependence of the moisture concentration on the growth rate of the oxide film, where the horizontal axis indicates the oxidation time and the vertical axis indicates the oxide film thickness. As shown in the figure, the growth rate of the oxide film is the lowest when the moisture concentration is 0 (dry oxidation), and increases as the moisture concentration increases. Therefore, in order to form an ultra-thin gate oxide film having a thickness of about 5 nm or less with good reproducibility and a uniform film thickness, it is necessary to lower the moisture concentration to slow down the oxide film growth rate and to achieve stable oxidation conditions. It is effective to form a film by using.

FIG. 18 is a graph showing the dependency of the moisture concentration on the oxide film initial withstand voltage of a MOS diode composed of a semiconductor substrate, a gate oxide film, and a gate electrode. The horizontal axis represents one electrode (gate electrode) of the MOS diode. The applied voltage and the vertical axis indicate the defect density in the gate oxide film. Here, in order to make the influence of the moisture concentration obvious, a gate oxide film having a thickness of 9 nm and an area of 0.19 cm ² was formed by (1) oxidation temperature = 850 ° C., moisture concentration = 0, and (2) oxidation temperature = A MOS diode formed at 850 ° C., a water concentration of 0.8%, and (3) using a vertical diffusion furnace at an oxidation temperature of 800 ° C. and a water concentration of 40% was used. As shown in the figure, the gate oxide film formed under the low moisture condition of the water concentration = 0.8% is formed under the condition of the gate oxide film formed at the water concentration = 0 (dry oxidation) and the high moisture condition of the water concentration = 40%. A good initial breakdown voltage was exhibited as compared with any of the gate oxide films obtained.

  FIG. 19 is a graph showing the dependency of the water concentration on the amount of voltage change when a constant current (Is) is passed between the electrodes of the MOS diode. As shown in the figure, in the MOS diode using the gate oxide film formed with the moisture concentration = 0 (dry oxidation), the voltage change was large due to the high defect density in the oxide film.

  FIG. 20 shows the thickness distribution of the gate oxide film formed using the oxide film forming apparatus 100 in the wafer surface. Here, the case where the wafer temperature is set to 850 ° C. and the oxidation is performed at a water concentration of 0.8% for 2 minutes and 30 seconds is shown. As shown in the drawing, the maximum value of the film thickness was 2.881 nm and the minimum value was 2.814 nm, and good in-plane uniformity with a variation of the film thickness of ± 1.18% was obtained.

  From the above, the preferable concentration of water (water / water + oxygen) introduced into the chamber 120 of the oxide film formation chamber 107 is an initial withstand voltage superior to that obtained by dry oxidation (moisture concentration = 0). The concentration may be set to the lower limit and within the range of about 40%, which is the upper limit in the case where the conventional combustion method is employed. Particularly, an ultra-thin gate oxide film having a thickness of about 5 nm or less may be formed in a uniform thickness. It can be concluded that the water concentration is preferably in the range of 0.5% to 5% in order to form the film with good reproducibility and high quality.

  FIG. 21 shows a breakdown of the components of the gate oxide film obtained by thermal oxidation. The graph on the right side of the figure shows the gate oxide film having a thickness of 4 nm formed by the method of the present embodiment described above, and the graph on the center. Indicates a gate oxide film having a thickness of 4 nm formed by the conventional method using the combustion method, and the left graph indicates a gate oxide film having a thickness of 9 nm formed by the same conventional method.

  As shown in the figure, in the present embodiment, an integrated cleaning-oxidizing treatment system is employed to minimize the contact with oxygen in the atmosphere from the pre-cleaning to the formation of the oxide film. The thickness of this natural oxide film formed prior to the formation of a controllable oxide film in the apparatus is increased from 0.7 nm (17.5% of the total film thickness) of the conventional method to 0.3 nm (total film thickness). 7.5%). In addition, as a result of adopting a catalyst-based water generation method and immediately introducing the oxidizing species into the oxide film forming apparatus, prior to the formation of the intended original oxide film, contact with oxygen in the oxidizing species occurs. The thickness of the undesired initial oxide film can be reduced from 0.8 nm (20% of the total film thickness) of the conventional method to 0.3 nm (7.5% of the total film thickness). As a result, it was possible to form a high quality ultra-thin gate oxide film in which the intended original controllable oxide film occupies 85% of the total film thickness. Further, as described above, the moisture concentration of the oxidizing species was optimized, and the film growth rate was reduced to form a film under stable oxidation conditions. As a result, a high-quality ultra-thin gate oxide film was uniformly formed. The film could be formed with good reproducibility by the film thickness.

  Next, the CMOS process after forming the gate oxide film will be briefly described.

  As shown in FIG. 14, after the formation of the gate oxide film 14 is completed, first, a purge gas is introduced into the chamber 120 of the oxide film formation chamber 107 for 2 minutes and 20 seconds, and the oxidizing species remaining in the chamber 120 is exhausted. Subsequently, the semiconductor wafer 1A is unloaded from the susceptor 123 in 55 seconds and carried out of the chamber 120.

Next, the semiconductor wafer 1A is transported to the oxynitride film forming chamber 108 shown in FIG. 9 and the semiconductor wafer 1A is subjected to a heat treatment in an NO (nitrogen oxide) or N ₂ O (nitrogen oxide) atmosphere to thereby perform gate oxidation. Nitrogen segregates at the interface between the film 14 and the semiconductor substrate 1.

When the thickness of the gate oxide film 14 is reduced to about 5 nm, distortion generated at the interface between the semiconductor substrate 1 and the semiconductor substrate 1 due to a difference in thermal expansion coefficient becomes apparent, and hot carriers are generated. Since the nitrogen segregated at the interface with the semiconductor substrate 1 relaxes the distortion, the oxynitridation can improve the reliability of the ultra-thin gate oxide film 14. Incidentally, when performing oxynitriding using N ₂ O, so also proceeds oxidation by oxygen generated by the decomposition of N ₂ O, the thickness of the gate oxide film 14 is thicker about 1 nm. In this case, the gate oxide film can be set to 4 nm by performing an oxynitridation process after forming a gate oxide film having a thickness of 3 nm in the oxide film forming chamber 107. On the other hand, when NO is used, the gate oxide film is hardly thickened by the oxynitriding process.

  Next, the semiconductor wafer 1A after the oxynitriding treatment is cooled to room temperature by the cooling stage 109, and then is carried out of the oxide film forming apparatus 100 through the loader / unloader 110 to deposit a conductive film for a gate electrode. To a CVD apparatus (not shown). At this time, the CVD apparatus is connected to the subsequent stage of the oxide film forming apparatus 100, and the process from the formation of the gate oxide film to the deposition of the conductive film for the gate electrode is continuously and continuously performed, thereby effectively contaminating the gate oxide film 14. Can be prevented.

  Next, as shown in FIG. 22, a gate electrode 15 having a gate length of 0.25 μm is formed on the gate oxide film 14. The gate electrode 15 is formed by sequentially depositing a 150 nm-thick n-type polycrystalline silicon film and a 150 nm-thick non-doped polycrystalline silicon film on the semiconductor substrate 1 by a CVD method, and then performing dry etching using a photoresist as a mask. The film is formed by patterning.

Next, as shown in FIG. 23, a p-type impurity, for example, B (boron) is ion-implanted into the formation region of the p-channel MOSFET from the vertical direction and the oblique direction to the n-type well 10 on both sides of the gate electrode 14. A p ^- type semiconductor region 16 and a p-type semiconductor region 17 are formed. Further, an n-type impurity, for example, P (phosphorus) is ion-implanted into the formation region of the n-channel MOSFET from the vertical direction and the oblique direction, and the n ⁻ -type semiconductor regions 18 and n are implanted into the p-type well 11 on both sides of the gate electrode 14. A type semiconductor region 19 is formed.

Next, as shown in FIG. 24, the silicon oxide film deposited on the semiconductor substrate 1 by the CVD method is anisotropically etched to form a sidewall spacer 20 having a thickness of about 0.15 μm on the side wall of the gate electrode 14. . At this time, the gate oxide film 14 above the p-type semiconductor region 17 and the gate oxide film 14 above the n-type semiconductor region 19 are removed. Subsequently, a p-type impurity, for example, B (boron) is ion-implanted into a formation region of the p-channel MOSFET to form ap ⁺ -type semiconductor region 21 in the n-type well 10 on both sides of the gate electrode 14. In addition, an n-type impurity, for example, P (phosphorus) is ion-implanted into a formation region of the n-channel MOSFET to form an n ⁺ -type semiconductor region 22 in the p-type well 11 on both sides of the gate electrode 14.

Next, as shown in FIG. 25, the gate electrode 14 of the p-channel type MOSFET, the p ⁺ type semiconductor region 21 (source region and drain region), the gate electrode 14 of the n-channel type MOSFET, and the n ⁺ type semiconductor region 22 (source Region, drain region), a TiSi ₂ (titanium silicide) layer 23 is formed. The TiSi ₂ layer 23 is formed by heat-treating a Ti film deposited on the semiconductor substrate 1 by a sputtering method to react with the semiconductor substrate 1 and the gate electrode 14, and then removing the unreacted Ti film by etching. Through the above steps, a p-channel MOSFET (Qp) and an n-channel MISFET (Qn) are completed.

  Then, as shown in FIG. 26, connection holes 25 to 28 are formed in the silicon oxide film 24 deposited on the semiconductor substrate 1 by the plasma CVD method, and subsequently, an Al alloy film deposited on the silicon oxide film 24 by the sputtering method. Is patterned to form the wirings 29 to 31, whereby the CMOS process of the present embodiment is almost completed.

(Semiconductor process B)
A method for manufacturing a MOSFET (LOCOS isolation process) according to the present embodiment will be described with reference to FIGS. In this process, a conventional isolation is used instead of a shallow trench isolation (STI). In this case, there is a limit in terms of miniaturization, but there is an advantage that a conventional process can be directly used. Regardless of the STI or SGI (Shallow Groove Isolation) of the semiconductor process 1 and the LOCOS isolation of the present embodiment, as long as the MOSFET does not share the source or drain with other transistors, the MOSFET is surrounded by an isolation region in principle. .

  First, as shown in FIG. 27, a semiconductor substrate 1 is heat-treated to form a thin silicon oxide film 2 having a thickness of about 10 nm on its main surface (thermal oxidation process B1). A silicon nitride film 3 of about 100 nm is deposited by a CVD method. Next, as shown in FIG. 28, a photoresist 4 having an element isolation region formed therein is formed on the silicon nitride film 3, and the silicon nitride film 3 is patterned using the photoresist 4 as a mask.

  Next, after removing the photoresist 4, as shown in FIG. 29, the field oxide film 40 is formed in the element isolation region by thermally treating the semiconductor substrate 1 (thermal oxidation process B2).

  Next, the silicon nitride film 3 is removed by wet etching using hot phosphoric acid, and the surface of the semiconductor substrate 1 is cleaned by wet cleaning. An ultra-thin gate oxide film 14 having a thickness of 5 nm or less is formed by the method described above (thermal oxidation process B3) (FIG. 32).

  An ultra-thin gate oxide film having a thickness of 5 nm or less is applied to a batch type vertical oxide film forming apparatus 150 (oxidizing apparatus 3; vertical batch oxidation furnace) as shown in FIG. Can also be formed. FIG. 31 shows an example of a sequence of forming a gate oxide film using the vertical oxide film forming apparatus 150. The sequence in this case is almost the same as that in FIG. 15, but there is a slight time difference between the loading and unloading of the wafer. As described above, in this case, since a hot wall method is generally used, it is relatively important to add a small amount of oxygen gas to the purge gas so as not to substantially oxidize.

  Thereafter, a MOSFET is formed on the main surface of the semiconductor substrate 1 in the same manner as in the first embodiment.

(Common items related to oxidation process, etc.)
Hereinafter, details of a processing apparatus and a processing process that can be commonly applied to each semiconductor process disclosed in the present application will be described.

  As described above, FIG. 9 is a schematic view of a single-wafer-type oxide film forming apparatus (multi-chamber method) used for forming a gate oxide film. As shown, the oxide film forming apparatus 100 includes a cleaning apparatus 101 for removing an oxide film (generally, a surface film) on the surface of a semiconductor wafer 1A by a wet cleaning method (or a dry method) prior to forming a gate oxide film. It is connected to the subsequent stage. By adopting such a cleaning-oxidation integrated processing system, the semiconductor wafer 1A subjected to the cleaning process in the cleaning apparatus 101 is converted into the atmosphere (in general, an atmosphere such as an undesired oxidizing atmosphere or other surface conditions that deteriorate the surface state). Since the oxide film can be transferred to the oxide film forming apparatus 100 in a short time without contact, a natural oxide film is formed on the surface of the semiconductor wafer 1A after the oxide film is removed and before the gate oxide film is formed. Can be suppressed as much as possible.

  The semiconductor wafer 1A after the drying process is immediately transferred to the oxide film forming apparatus 100 through the buffer 106.

  The oxide film forming apparatus 100 is configured in a multi-chamber system including, for example, an oxide film forming chamber 107, an oxynitride film forming chamber 108, a cooling stage 109, a loader / unloader 110, and the like. And a robot hand 113 for loading (unloading) the semiconductor wafer 1A into (from) each of the processing chambers. In order to minimize the formation of a natural oxide film on the surface of the semiconductor wafer 1A due to the mixing of the atmosphere, the inside of the transfer system 112 is set to an inert gas atmosphere such as nitrogen (a vacuum may be used. When the pressure is made positive with an inert gas or the like, an effect of preventing undesired gas from being mixed in from the outside and from each processing chamber is obtained. In order to minimize the adhesion of moisture to the surface of the semiconductor wafer 1A, the inside of the transfer system 112 is kept in an ultra-low moisture atmosphere of ppb level (in general, moisture contained in a well-maintained vacuum-system degassing is reduced). (Less than several ppm). The semiconductor wafer 1 </ b> A carried into the oxide film forming apparatus 100 is first placed in the oxide film forming chamber 107 via the robot hand 113 in a unit of one or two sheets (generally, a single wafer is referred to as one or two units. (When specifying one sheet unit or two sheets unit, they are referred to as single sheet and two sheets, respectively).

  As described above, FIG. 11A is a schematic plan view showing an example of a specific configuration of the oxide film forming chamber 107 (the single-wafer apparatus in FIG. 9), and FIG. 11B is a plan view in FIG. FIG. 2 is a cross-sectional view (oxidizing apparatus 1; hot-wall type single-wafer oxidizing furnace) taken along the line B ′.

  The oxide film forming chamber 107 includes a chamber 120 composed of a multi-walled quartz tube, and heaters 121a and 121b (in the case of a hot wall type) for heating the semiconductor wafer 1A are installed at the upper part and the lower part. I have. Inside the chamber 120, a disc-shaped heat equalizing ring 122 for uniformly dispersing the heat supplied from the heaters 121a and 121b over the entire surface of the semiconductor wafer 1A is housed, and the semiconductor wafer 1A is horizontally held on the upper part thereof ( By arranging the wafer surface almost horizontally with respect to vertical gravity, there is an effect that the influence of the concentration distribution of the mixed gas can be eliminated, which is particularly important in increasing the diameter of a 300φ wafer or the like.) It is placed. The heat equalizing ring 122 is made of a heat-resistant material such as quartz or SiC (silicon carbide), and is supported by a support arm 124 extending from a wall surface of the chamber 120. A thermocouple 125 for measuring the temperature of the semiconductor wafer 1A held by the susceptor 123 is provided near the heat equalizing ring 122. The semiconductor wafer 1A may be heated by a heater 130a, 121b, or by a lamp 130 as shown in FIG. 12 (oxidizing apparatus 2; lamp-heating single-wafer oxidation furnace). In this case, the lamp heating can be started after the wafer is placed in a predetermined position, and since the temperature of the wafer surface rapidly decreases when the lamp is turned off, it is formed at the time of insertion and withdrawal in the case of a hot wall or the like. The initial oxide film and the like can be reduced to a negligible extent. When water is added by a lamp, it is effective to prevent the dew condensation by preheating not only the water introduction part but also the oxidation furnace itself to about 140 degrees Celsius.

  One end of a gas introduction pipe 126 for introducing water, oxygen, and a purge gas into the chamber 120 is connected to a part of the wall surface of the chamber 120. The other end of the gas introduction pipe 126 is connected to a catalyst type water generating device. A partition 128 having a large number of through holes 127 is provided in the vicinity of the gas introduction pipe 126, and gas introduced into the chamber 120 passes through the through holes 127 of the partition 128 and enters the chamber 120. Spread evenly. One end of an exhaust pipe 129 for discharging the gas introduced into the chamber 120 is connected to another part of the wall surface of the chamber 120.

  As described above, FIG. 13 and FIG. 14 are schematic views showing a catalytic-type water generating apparatus connected to the chamber 120. The moisture generator 140 includes a reactor 141 made of a heat-resistant and corrosion-resistant alloy (for example, a Ni alloy known as “Hastelloy”), and contains Pt (platinum), Ni ( A coil 142 made of a catalyst metal such as nickel (Ni) or Pd (palladium) and a heater 143 for heating the coil 142 are housed.

  A process gas composed of hydrogen and oxygen and a purge gas composed of an inert gas such as nitrogen or Ar (argon) are introduced into the reactor 141 from a gas storage tank 144a, 144b, 144c through a pipe 145. In the middle of the pipe 145, mass flow controllers 146a, 146b, 146c for adjusting the amount of gas, and opening / closing valves 147a, 147b, 147c for opening and closing the gas flow path are provided. The amounts and component ratios are precisely controlled by these.

The process gas (hydrogen and oxygen) introduced into the reactor 141 is about 350 to 450 ° C. (for example, under normal pressure, the explosive combustion of hydrogen occurs at a hydrogen concentration of 4% or more in the presence of sufficient oxygen. Considering the safety of mass production equipment, it is considered desirable to introduce an oxygen-rich oxygen-hydrogen mixed gas into the reactor so that hydrogen does not remain.) Hydrogen radicals are generated from molecules (H ₂ → 2H ⁺ ), and oxygen radicals are generated from oxygen molecules (O ₂ → 2O ⁻ ). Since these two radicals are extremely active chemically, they react quickly to produce water (2H ⁺ + O ⁻ → H ₂ O). This water is mixed with oxygen in the connection portion 148 and diluted to a low concentration, and is introduced into the chamber 120 of the oxide film formation chamber 107 through the gas introduction pipe 126. In this case, it is also possible to dilute with argon instead of oxygen. That is, the atmosphere supplied to the oxidation furnace is 1% moisture and 99% argon.

  Since the above-described catalytic water generator 140 can control the amounts of hydrogen and oxygen involved in the generation of water with high accuracy, the concentration of water introduced into the oxide film forming chamber 107 together with oxygen can be reduced. It can be controlled in a wide range and with high precision from an ultra-low concentration of ppt or less to a high concentration of about several tens of percent. Further, since water is instantaneously generated when the process gas is introduced into the reactor 141, a desired moisture concentration can be obtained in real time. Therefore, hydrogen and oxygen can be simultaneously introduced into the reactor 141 (in a general case, oxygen is introduced slightly earlier for safety), and as in a conventional moisture generation system employing a combustion method, hydrogen and oxygen can be introduced. It is not necessary to introduce oxygen prior to the introduction of. As the catalyst metal in the reactor 141, a material other than the above-described metals may be used as long as it can radicalize hydrogen or oxygen. The catalyst metal may be used after being processed into a coil shape, or may be processed into, for example, a hollow tube or a fine fiber filter and the process gas may be passed through the inside.

  In FIG. 14, the temperature of the water generating furnace 140, the hydrogen sensor, the filter, the dilution section, the purge gas or dilution gas supply section, and the connection section of the oxidation furnace are controlled or heated to about 140 degrees Celsius in order to prevent dew condensation. I have. Here, the hydrogen sensor is for detecting hydrogen remaining without being synthesized. Further, the filter is a gas filter inserted so as to act as a kind of orifice so that in the unlikely event that hydrogen combustion or the like occurs on the oxidation furnace side, it is not transmitted to the synthesis furnace side. The purge gas, diluent gas, and moisture are both supplied to the oxidation furnace after preheating to a temperature that does not cause condensation (generally, about 100 to 200 degrees Celsius). In the lamp heating furnace as shown in FIG. 12, it is necessary to consider the preheating of the furnace body itself or the wafer to be processed itself. In this case, it is possible to preheat the wafer in the oxidation furnace by using the purge gas. In the case of a lamp heating furnace, it is particularly necessary to pay attention to a preheating mechanism for preventing dew condensation at a wafer introduction portion. In any case, it is relatively effective to heat or control the temperature to about 140 degrees Celsius. Generally, the oxidation process is performed in a steady state while supplying a predetermined atmosphere gas to the oxidation processing section at a constant flow rate and constantly supplementing the consumed components with a new atmosphere gas.

  An example of a sequence of forming a gate oxide film using the oxide film forming apparatus 100 (FIG. 9) will be further described with reference to FIG.

  First, the chamber 120 (FIG. 11) of the oxide film forming chamber 107 (FIG. 9) is opened, and a purge gas (nitrogen) is introduced therein (as shown in FIG. (Slight oxygen or the like may be added to prevent surface roughness.) The semiconductor wafer 1A is loaded on the susceptor 123. The time from loading the semiconductor wafer 1A into the chamber 120 to loading it on the susceptor 123 is 55 seconds. Thereafter, the chamber 120 is closed, and a purge gas is continuously introduced for 30 seconds to sufficiently exchange the gas in the chamber 120. The susceptor 123 is previously heated by the heaters 121a and 121b so that the semiconductor wafer 1A is quickly heated. The heating temperature of the semiconductor wafer 1A is in the range of 800 to 900 ° C., for example, 850 ° C. If the wafer temperature is lower than 800 ° C., the quality of the gate oxide film is deteriorated. On the other hand, when the temperature is 900 ° C. or more, the surface of the wafer is likely to be roughened.

  When oxygen and hydrogen are introduced into the reactor 141, hydrogen is not introduced before oxygen. It is dangerous to introduce hydrogen before oxygen because unreacted hydrogen flows into the hot chamber 120. On the other hand, when oxygen is introduced before hydrogen, the oxygen flows into the chamber 120, and a low-quality oxide film (initial oxide film) is formed on the surface of the semiconductor wafer 1A during standby. Therefore, hydrogen is introduced at the same time as oxygen, or at a timing slightly later than oxygen (within 0 to 5 seconds) in consideration of work safety. By doing so, the thickness of the initial oxide film undesirably formed on the surface of the semiconductor wafer 1A can be suppressed to a minimum.

  An ultra-thin gate oxide film having a thickness of 5 nm or less (it is also effective to a certain extent for gates and other oxide films having a larger thickness as well) is a single-wafer or batch-type oxide film formation. The apparatus (oxidizing furnaces 1 to 3) can also be formed by attaching a combustion type water generating apparatus 160 as shown in FIG. 33 (oxidizing apparatus 4; oxygen-hydrogen combustion method or hydrogen combustion method oxidation furnace).

  In this case, after the oxidizing species containing a relatively high concentration of water is generated in the water generating device 160, the oxidizing species with a low moisture concentration is obtained by adding oxygen to the oxidizing species. In this case, the valve (Vvent) is set to open and the valve (Vprocess) is set to close in advance so that the oxidizing species is not sent to the oxide film forming apparatus until the water concentration decreases to a desired concentration. Then, after the moisture concentration is sufficiently reduced, the valve (Vvent) is closed and the valve (Vprocess) is switched to open to send the oxidizing species to the oxide film forming apparatus.

  The above method has disadvantages as compared with the above-described catalyst method, such as a dust source such as a valve immediately before the oxide film forming apparatus and a dead space caused by providing the valve. , And the suppression of the initial oxide film can be realized.

(Semiconductor process C)
As shown in FIG. 34, the oxide film forming method of the present invention employs a tunnel oxide film 43 (thermal oxidation process C1) and a second gate oxide film 44 (thermal oxidation process C2) of a flash memory having a floating gate 44 and a control gate 42. ) Can be applied to the case of forming a thin film having a thickness of 5 nm or less.

(Semiconductor process D)
Further, the oxide film forming method of the present invention is applicable to a case where two or more kinds of gate oxide films having different film thicknesses are formed on the same semiconductor chip, for example, an LSI in which a memory LSI and a logic LSI are mixed on the same semiconductor chip. Can also be applied. In this case, a thin gate oxide film (thermal oxidation process D1) having a thickness of 5 nm or less and a relatively thick gate oxide film (thermal oxidation process D2) having a thickness of 5 nm or more can both be formed by the method of the present invention. However, a thin gate oxide film may be formed by the method of the present invention, and a thick gate oxide film may be formed by a conventional method.

(Applicability of various oxidation methods of the present application)
The applicability of the above-described catalytic moisture generation thermal oxidation method, low moisture oxidation method (including partially using the hydrogen combustion method), and high moisture oxidation using the conventional hydrogen combustion method shown in the present application are summarized below.

  That is, oxidation processes A3, B3, C1, C2, D1 and the like (the first type) are exemplified as processes which are most effective by applying the catalytic moisture generation thermal oxidation method and the low moisture oxidation method.

  Although the application of high moisture oxidation by the conventional hydrogen combustion method is also possible, as a process which is effective by applying the catalytic moisture generation thermal oxidation method and the low moisture oxidation method, oxidation processes A1, A2, B1, B2, D2 Etc. (Class 2).

  In particular, in a line in which an oxidizing furnace and a catalyzing oxidizing furnace are mixed in a hydrogen combustion method, it is of practical value to use both methods depending on the properties and thickness of the oxide film.

(Applicability of various oxidation devices of the present application)
The applicability of the various oxidation apparatuses shown in the present application described above is summarized below. Basically, any of the oxidizing apparatuses 1 to 4 shown in the present application can be applied to the first and second oxidizing steps. However, when it is necessary to precisely control the atmosphere using a multi-chamber or the like, it is desirable to use the oxidizing apparatus 1 or 2.
In addition, the operating pressure during the oxidation of each oxidation treatment apparatus is generally performed at normal pressure (600 Torr to 900 Torr), but may be performed at reduced pressure. In this case, the oxidation rate is easily set to be low, and there are additional effects such as the possibility of explosion of hydrogen being reduced. It is also possible to perform high pressure oxidation. In this case, there is an advantage that a high oxidation rate can be realized at a relatively low temperature.

(Points to note regarding disclosure)
As described above, the invention made by the inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and can be variously modified without departing from the gist thereof. Needless to say.

  The present invention is useful when applied to the manufacture of a semiconductor integrated circuit device having a fine MOSFET having a gate length of 0.25 μm or less.

FIG. 5 is a main-portion cross-sectional view showing the method for manufacturing the semiconductor integrated circuit device according to Embodiment 1 of the present invention. FIG. 5 is a main-portion cross-sectional view showing the method for manufacturing the semiconductor integrated circuit device according to Embodiment 1 of the present invention. FIG. 5 is a main-portion cross-sectional view showing the method for manufacturing the semiconductor integrated circuit device according to Embodiment 1 of the present invention. FIG. 5 is a main-portion cross-sectional view showing the method for manufacturing the semiconductor integrated circuit device according to Embodiment 1 of the present invention. FIG. 5 is a main-portion cross-sectional view showing the method for manufacturing the semiconductor integrated circuit device according to Embodiment 1 of the present invention. FIG. 5 is a main-portion cross-sectional view showing the method for manufacturing the semiconductor integrated circuit device according to Embodiment 1 of the present invention. FIG. 5 is a main-portion cross-sectional view showing the method for manufacturing the semiconductor integrated circuit device according to Embodiment 1 of the present invention. FIG. 5 is a main-portion cross-sectional view showing the method for manufacturing the semiconductor integrated circuit device according to Embodiment 1 of the present invention. FIG. 2 is a schematic view of a single-wafer oxide film forming apparatus used for forming a gate oxide film. FIG. 5 is a main-portion cross-sectional view showing the method for manufacturing the semiconductor integrated circuit device according to Embodiment 1 of the present invention. (A) is a schematic plan view showing an example of the configuration of the oxide film forming chamber, and (b) is a cross-sectional view along the line B-B 'in (a). (A) is a schematic plan view showing another example of the configuration of the oxide film formation chamber, and (b) is a cross-sectional view along the line B-B 'in (a). It is the schematic which shows the water generator of a catalytic system connected to the chamber of the oxide film formation chamber. It is the schematic which expands and shows a part of FIG. FIG. 4 is an explanatory diagram illustrating an example of a sequence of forming a gate oxide film. FIG. 5 is a main-portion cross-sectional view showing the method for manufacturing the semiconductor integrated circuit device according to Embodiment 1 of the present invention. 4 is a graph showing the dependence of the moisture concentration on the growth rate of an oxide film. 6 is a graph showing the dependency of the moisture concentration on the initial withstand voltage of the oxide film of the MOS diode. 4 is a graph showing the dependency of the water concentration on the amount of voltage change when a constant current flows between the electrodes of a MOS diode. FIG. 4 is an explanatory diagram showing a film thickness distribution of a gate oxide film in a wafer surface. 4 is a graph showing a breakdown of components of a gate oxide film. FIG. 5 is a main-portion cross-sectional view showing the method for manufacturing the semiconductor integrated circuit device according to Embodiment 1 of the present invention. FIG. 5 is a main-portion cross-sectional view showing the method for manufacturing the semiconductor integrated circuit device according to Embodiment 1 of the present invention. FIG. 5 is a main-portion cross-sectional view showing the method for manufacturing the semiconductor integrated circuit device according to Embodiment 1 of the present invention. FIG. 5 is a main-portion cross-sectional view showing the method for manufacturing the semiconductor integrated circuit device according to Embodiment 1 of the present invention. FIG. 5 is a main-portion cross-sectional view showing the method for manufacturing the semiconductor integrated circuit device according to Embodiment 1 of the present invention. FIG. 13 is a cross-sectional view of a principal part illustrating the method for manufacturing the semiconductor integrated circuit device according to the second embodiment of the present invention. FIG. 13 is a cross-sectional view of a principal part illustrating the method for manufacturing the semiconductor integrated circuit device according to the second embodiment of the present invention. FIG. 13 is a cross-sectional view of a principal part illustrating the method for manufacturing the semiconductor integrated circuit device according to the second embodiment of the present invention. It is sectional drawing which shows the other example of a structure of an oxide film formation chamber. FIG. 4 is an explanatory diagram illustrating an example of a sequence of forming a gate oxide film. FIG. 13 is a cross-sectional view of a principal part illustrating the method for manufacturing the semiconductor integrated circuit device according to the second embodiment of the present invention. FIG. 5 is a schematic view showing another example of the oxide film forming method according to the present invention. FIG. 11 is a cross-sectional view of a principal part showing another example of a method for manufacturing a semiconductor integrated circuit device according to the present invention.

Explanation of reference numerals

REFERENCE SIGNS LIST 1 semiconductor substrate 1A semiconductor wafer 2 silicon oxide film 3 silicon nitride film 4 photoresist 5 element isolation groove 5a groove 6 silicon oxide film 7 silicon oxide film (TEOS)
Reference Signs List 8 photoresist 9 photoresist 10 n-type well 11 p-type well 12 p-type channel region 13 n-type channel region 14 gate oxide film 15 gate electrode 16 p-type semiconductor region 17 p-type semiconductor region 18 n-type semiconductor region 19 n Type semiconductor region 20 sidewall spacer 21 p ⁺ type semiconductor region 22 n ⁺ type semiconductor region 23 TiSi 2 layer 24 silicon oxide film 25 to 28 connection hole 29 to 31 wiring 40 field oxide film 41 floating gate 42 control gate 43 tunnel oxide film 44 Second gate oxide film 100 Oxide film formation device 101 Cleaning device 102 Loader 103 Cleaning room 104 Hydrofluoric acid cleaning room 105 Drying room 106 Buffer 107 Oxide film formation room 108 Oxynitride film formation room 109 Cooling stage 110 Loader / unloader 112 Transport system 113 Bot hand 120 Chamber 121a Heater 121b Heater 122 Heat equalizing ring 123 Susceptor 124 Support arm 125 Thermocouple 126 Gas inlet tube 127 Through hole 128 Partition wall 129 Exhaust tube 130 Lamp 140 Water generator 141 Reactor 142 Coil 143 Heaters 144a to 144c Gas storage Tank 145 Piping 146a to 146c Mass flow controller 147a to 147c Opening / closing valve 148 Connection part 150 Vertical oxide film forming device 160 Water generating device Qn N-channel MOSFET
Qp p-channel MOSFET

Claims (5)

A method for manufacturing a semiconductor integrated circuit device, comprising:
(A) introducing a semiconductor wafer into a heat treatment chamber of an oxidation furnace;
(B) replacing the gas atmosphere in the heat treatment chamber with nitrogen;
(C) synthesizing water from oxygen and hydrogen using a catalyst at a first temperature;
(D) introducing the synthesized water into a heat treatment chamber of the oxidation furnace to form an oxidizing atmosphere containing water on the first main surface of the semiconductor wafer in the chamber while maintaining a vaporized state; ,
(E) heating the main surface of the semiconductor wafer by a ramp to a second temperature higher than the first temperature in the oxidizing atmosphere containing the moisture in the heat treatment chamber, thereby forming a first main surface of the semiconductor wafer; A step of forming an insulating film by thermally oxidizing the upper silicon surface,
(F) after the step (e), replacing the oxidizing atmosphere containing water in the heat treatment chamber with nitrogen.   2. The method according to claim 1, wherein the insulating film is a gate insulating film of a field effect transistor.   3. The method according to claim 2, wherein the thickness of the gate insulating film of the field effect transistor is 5 nm or less, and the gate length of the field effect transistor is 0.25 [mu] m or less.   4. The method according to claim 3, wherein the thickness of the gate insulating film of the field effect transistor is 3 nm or less. 2. The method according to claim 1, wherein the first temperature is equal to or lower than 500 [deg.] C., and the second temperature is equal to or higher than 800 [deg.] C.

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