JP2004205700A - Image forming apparatus and high voltage power source device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent the occurrence of a failure of a high voltage power source device in the case of turning on the high voltage bias of one polarity before that of the other polarity is sufficiently lowered in switching the polarity of output bias and in the case of simultaneously turning on the high voltage bias of both polarities by a malfunction of a CPU. <P>SOLUTION: In an image forming apparatus and the high voltage power source device possessing a load current detecting means having a plurality of high voltage generating parts and to detect an electric current made to flow in a load by the application of DC output voltage and an overcurrent protective means to stop the operation of the high voltage generating parts in the case that the load current detecting means detects an abnormal electric current, a protective means to stop the operation of one high voltage generating part until the DC output voltage generated by another high voltage generating part becomes equal to or lower than specified voltage is constituted by using the overcurrent protective means. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
[Industrial applications]
The present invention relates to a high-voltage power supply used for an image forming apparatus.
[0002]
[Prior art]
2. Description of the Related Art A high-voltage power supply device is provided in an image forming apparatus employing an electrophotographic method, and is indispensable for an image forming process on paper or the like. As the high-voltage power supply device, various types of modules such as a charging high-voltage power supply for outputting a charging bias, a development high-voltage power supply for outputting a developing bias, a transfer high-voltage power supply for outputting a transfer bias, and a fixing high-voltage power supply for outputting a fixing bias are provided. Power is present. Each of these high-voltage modules has different specifications depending on the configuration of the image forming apparatus, such as a DC power supply with an AC power supply superimposed thereon and a DC minus power supply with a DC positive power supply superimposed thereon. It is configured. Also, there are various specifications for a specified voltage, a specified current, a constant current control method, a constant voltage control method, a single value output, a multi-step value control output, a load condition, and the like.
[0003]
Among them, it is indispensable to use a constant voltage control circuit or a constant current control circuit so that a constant voltage or current can be output under various conditions.
[0004]
Normally, the constant voltage control circuit is provided with a voltage detection circuit, and the constant current control circuit is provided with a current detection circuit.
[0005]
On the other hand, there is a case where both the voltage detection circuit and the current detection circuit are provided in the constant voltage control circuit, and the constant voltage control is performed while detecting the current value. Further, both the voltage detection circuit and the current detection circuit are provided in the constant voltage control circuit, and a control operation is first performed so that the current becomes constant, and an output voltage value at that time is detected, and the detected voltage value is used. There is also a method of performing a constant voltage control operation by performing arithmetic processing.
[0006]
This is because, for example, in the case of a transfer bias, the resistance value of the transfer roller or the like greatly changes depending on environmental conditions, particularly humidity, so that when a bias is applied only with a constant voltage control, the transfer current fluctuates and transfer failure easily occurs. It is. When the bias is applied only by the constant current control, for example, when the width of the transfer material passing over the transfer roller is small, the “region where no transfer material exists” has a lower impedance than the “region where the transfer material exists”. Therefore, a current flows in the “region where the transfer material does not exist”, and a problem arises in that the “region where the transfer material exists” easily causes transfer failure due to insufficient current.
[0007]
In addition, there is a method of superimposing a DC plus power supply on a DC minus power supply in the high-voltage power supply device.
This is because, for example, in the case of a transfer bias, in order to remove the toner attached to the transfer roller at the time of the cleaning operation of the image forming apparatus, it is necessary to apply a bias having a polarity opposite to the bias used at the time of normal transfer. .
[0008]
Furthermore, there is a method of providing an overcurrent protection circuit that detects that an overcurrent has flown into the load based on a detection value of the current detection circuit and stops applying a bias.
This is to prevent the image forming apparatus and the high voltage power supply from being damaged by the overcurrent.
[0009]
Conventional example 1
FIG. 4 shows a configuration in which a DC plus power supply is superimposed on a DC minus power supply, and outputs a bias having both a positive bias and a negative bias. The positive bias is provided with both a voltage detection circuit and a current detection circuit to perform constant voltage control. FIG. 10 is a block diagram of a conventional image forming apparatus further provided with an overcurrent protection circuit.
[0010]
1 is an image forming apparatus, 2 is a CPU, 3 is a high-voltage transformer, 4 is a transformer driving circuit for switching the high-voltage transformer 3, 5 is a fuse resistor, 6 is a transistor for controlling power supplied to the high-voltage transformer 3, and 7 is an electrolytic cell. Capacitor 8; constant voltage control circuit 9; snubber diode 9; high voltage diode 10; high voltage capacitor 11; , 16 are transistors for controlling the power supplied to the high voltage transformer 13, 17 is an electrolytic capacitor, 18 is a constant voltage control circuit, 19 is a snubber diode, 20 is a high voltage diode, 21 is a high voltage capacitor, 22 is a bleeder resistor, and 23 and 24. Is an output voltage detection resistor, 25 is an AC grounding capacitor, and 26 is a load current detection. Use the operational amplifier, the load current detection resistor 28 is a phase compensating capacitor 27, 29 denotes a DC power source, 30 is a current limiting resistor, 32 and 33 the overcurrent operation threshold voltage V_TH, 34 is a comparison circuit, 35 is a latch diode, 36 and 37 are pull-up resistors, 38 and 39 FETs, 40 and 41 are resistors, 42 and 43 are diodes, 44 and 45 are resistors, and 51 is a load. is there.
[0011]
Next, the operation will be described.
First, the output operation of the positive bias will be described.
FIG. 5 shows the relationship between the output voltage of the D / A port 1 and the high output voltage (HVout).
First, the CPU 2 outputs CLK1 having a predetermined frequency / Duty. The CLK1 is sent to the transformer drive circuit 4, which switches the high-voltage transformer 3. The high-voltage transformer 3 boosts the input voltage and generates a high voltage having a predetermined pulsating waveform. The high voltage having a predetermined pulsating waveform generated by the high voltage transformer 3 is rectified by the high voltage diode 10 and the high voltage capacitor 11, and a high voltage DC bias having a positive polarity is generated. Next, the CPU 2 outputs a voltage corresponding to the desired high-voltage output voltage from the D / A port 1 to the constant voltage control circuit 8 via the resistor 40 (when the output of the D / A port 1 becomes Va or more). , Plus bias occurs). On the other hand, the high output voltage is detected by the divided voltages of the detection resistors 23 and 24. The constant voltage control circuit 8 controls the transistor 6 so that the output detection voltage is equal to the voltage value from the D / A port 1 of the CPU 2, and maintains the high output voltage at a desired voltage.
On the other hand, at least one of the ON / OFF port of the CPU 2 and CLK2 is turned off, and the output operation of the negative bias is stopped.
[0012]
Next, the load current detection operation will be described.
Load current I flowing to load 51_loadReturns from the ground of the operational amplifier 26 to the high voltage transformer 3 via the current limiting resistor 30, the load current detecting resistor 27, and the bleeder resistor 22. The voltage value Va is input to the non-inverting input terminal of the operational amplifier 26 by the DC power supply 29, and the voltage value of the inverting input terminal is also controlled to Va. Therefore, the load current I_loadThe DC component is converted into a voltage by the following equation, where the resistance value of the detection resistor 27 is R27, and the CPU 2 detects the load current value via the A / D port.
Load current detection voltage VI = load current I_load  × R27 + Va
On the other hand, the AC component returns from the high voltage capacitor 21 and the AC grounding capacitor 25 to the high voltage transformer 3 through the bleeder resistor 22.
[0013]
Next, the operation of the overcurrent protection circuit will be described.
The load current detection voltage VI detected by the load current detection operation is also input to the comparison circuit 34, and the comparison circuit 34 outputs the overcurrent operation threshold voltage V set by the resistors 32 and 33._THAnd the load current detection voltage VI. Overcurrent operation threshold voltage V_THIn the case of the load current detection voltage VI, the output of the comparison circuit 34 becomes an open drain, and the H level is input to the gate of the FET 38 by the pull-up resistor 36. As a result, the gate voltage of the FET 39 becomes L and the FET 39 does not operate, so that the plus bias is output normally. On the other hand, the overcurrent operation threshold voltage V_TH<In the case of the load current detection voltage VI, the output of the comparison circuit 34 becomes L, and the L level is input to the gate of the FET 38. As a result, the gate voltage of the FET 39 becomes H, the FET 39 operates to reduce the input voltage Va from the D / A port 1 to the constant voltage control circuit 8 or less, and stops the output operation of the positive bias. When the output of the comparison circuit 34 becomes L, the diode 35 conducts and the overcurrent operation threshold voltage V_THDrops to the VF of the diode 35 (about 0.6 V). Therefore, the threshold voltage V after the load current detection voltage VI decreases_THLThe output operation of the plus bias is stopped until the value becomes below.
[0014]
Next, a negative bias output operation will be described.
The CPU 2 outputs CLK2 of a predetermined frequency / Duty. The CLK2 is sent to the transformer drive circuit 14, which switches the high-voltage transformer 31. Next, the CPU 2 sets the ON / OFF port to the H level, and operates the constant voltage control circuit 18. The constant voltage control circuit 18 detects the positive voltage of the electrolytic capacitor 17 based on the voltage division of the resistors 44 and 45, and controls the transistor 16 so that the input voltage to the high-voltage transformer 31 becomes a predetermined voltage. The high voltage transformer 31 boosts the input voltage and generates a high voltage having a predetermined pulsating waveform. The high voltage having a predetermined pulsating waveform generated by the high voltage transformer 31 is rectified by the high voltage diode 20 and the high voltage capacitor 21 to generate a negative high voltage DC bias. The generated high-voltage bias is applied to the load 51 via the bleeder resistor 12.
On the other hand, at least one of the D / A port 1 and CLK1 of the CPU 2 is turned off, and the output operation of the positive bias is stopped.
Further, the resistor 41 and the diodes 42 and 43 prevent the voltage between the resistor 23 and the resistor 24 from becoming 0 V or less when a negative bias is output, and prevent a positive bias from being output.
[0015]
[Conventional example 2]
FIG. 6 shows a configuration in which a DC minus power supply is superimposed on a DC plus power supply, and outputs a bias having both a positive bias and a negative bias. The negative bias is provided with both a voltage detection circuit and a current detection circuit to perform constant voltage control. FIG. 10 is a block diagram of a conventional image forming apparatus further provided with an overcurrent protection circuit.
Components already described in Conventional Example 1 are denoted by the same reference numerals, and description thereof is omitted.
81 and 82 are diodes, 83, 84 and 85 are resistors, 86 is a diode, and 87 is a FET.
[0016]
Next, the operation will be described.
First, a negative bias output operation will be described.
FIG. 7 shows the relationship between the output voltage of the D / A port 1 and the high output voltage (HVout).
First, the CPU 2 outputs CLK1 having a predetermined frequency / Duty. The CLK1 is sent to the transformer drive circuit 4, which switches the high-voltage transformer 3. The high-voltage transformer 3 boosts the input voltage and generates a high voltage having a predetermined pulsating waveform. The high voltage having a predetermined pulsating waveform generated by the high voltage transformer 3 is rectified by the high voltage diode 81 and the high voltage capacitor 11, and a high voltage DC bias having a negative polarity is generated. Next, the CPU 2 outputs a voltage corresponding to a desired high-voltage output voltage from the D / A port 1 to the constant voltage control circuit 8 via the resistor 40 (when the output of the D / A port 1 becomes Va or less). , And a negative bias occurs). On the other hand, the high output voltage is detected by the divided voltages of the detection resistors 23 and 24. The constant voltage control circuit 8 controls the transistor 6 so that the output detection voltage is equal to the voltage value from the D / A port 1 of the CPU 2, and holds the high output voltage at a desired voltage.
On the other hand, at least one of the ON / OFF port of the CPU 2 and CLK2 is turned off, and the output operation of the positive bias is stopped.
[0017]
Next, the load current detection operation will be described.
Load current I flowing to load 51_loadReturns from the ground of the operational amplifier 26 to the high voltage transformer 3 via the current limiting resistor 30, the load current detecting resistor 27, and the bleeder resistor 22. The voltage value Va is input to the non-inverting input terminal of the operational amplifier 26 by the DC power supply 29, and the voltage value of the inverting input terminal is also controlled to Va. Therefore, the load current I_loadThe DC component is subjected to voltage conversion by the following equation, where the resistance value of the detection resistor 27 is R27, and the CPU 2 detects the load current via the A / D port.
Load current detection voltage VI = Va− (load current I_load  × R27)
On the other hand, the AC component returns from the high voltage capacitor 21 and the AC grounding capacitor 25 to the high voltage transformer 3 through the bleeder resistor 22.
[0018]
Next, the operation of the overcurrent protection circuit will be described.
The load current detection voltage VI detected by the load current detection operation is also input to the comparison circuit 34. The comparison circuit 34 has an overcurrent operation threshold voltage V_THAnd the load current detection voltage VI. Overcurrent operation threshold voltage V_TH<In the case of the load current detection voltage VI, the output of the comparison circuit 34 becomes L, and the L level is input to the gate of the FET 38. As a result, H is input to the gate of the FET 87 and the FET 87 does not operate, so that the minus bias is output normally. When the output of the comparison circuit 34 is L, the diode 35 is turned on and the overcurrent operation threshold voltage V_THIs set by the voltage division of the resistor 32 and the combined resistance of the resistor 33, the diode 35, and the resistor 83. On the other hand, the overcurrent operation threshold voltage V_THIn the case of> the load current detection voltage VI, the output of the comparison circuit 34 becomes an open drain, and the H level is input to the gate of the FET 38. As a result, the gate voltage of the FET 87 becomes L, the FET 87 operates, the input voltage from the D / A port 1 to the constant voltage control circuit 8 becomes equal to or higher than Va, and the output operation of the negative bias is stopped. When the output of the comparison circuit 34 becomes H, the diode 35 becomes non-conductive, and the overcurrent operation threshold voltage V_THRises to the partial pressure of the resistor 32 and the resistor 33. Threshold voltage V after load current detection voltage rises_{TH H}Until the above, the output operation of the negative bias is stopped.
[0019]
Next, the output operation of the positive bias will be described.
The CPU 2 outputs CLK2 of a predetermined frequency / Duty. The CLK2 is sent to the transformer drive circuit 14, which switches the high-voltage transformer 31. Next, the CPU 2 sets the ON / OFF port to the H level, and operates the constant voltage control circuit 18. The constant voltage control circuit 18 detects the positive voltage of the electrolytic capacitor 17 based on the voltage division of the resistors 44 and 45, and controls the transistor 16 so that the input voltage to the high-voltage transformer 31 becomes a predetermined voltage. The high voltage transformer 31 boosts the input voltage and generates a high voltage having a predetermined pulsating waveform. The high voltage having a predetermined pulsating waveform generated by the high voltage transformer 31 is rectified by the high voltage diode 82 and the high voltage capacitor 21 to generate a high voltage DC bias having a positive polarity. The generated high-voltage bias is applied to the load 51 via the bleeder resistor 12.
On the other hand, at least one of the D / A port 1 and CLK1 of the CPU 2 is turned off, and the output operation of the negative bias is stopped.
Further, the resistance 84, the resistance 85, and the diode 86 prevent the voltage between the resistance 23 and the resistance 24 from becoming 5 V or more at the time of the positive bias output, and prevent the negative bias from being output.
[0020]
According to the methods described in Conventional Example 1 and Conventional Example 2, the CPU 2 controls the output of the bias OFF and the positive bias or the negative bias in accordance with a predetermined image forming operation. For example, control is performed such that a positive bias is output during image formation, and a negative bias is output during a sheet interval where no recording paper exists.
[0021]
[Problems to be solved by the invention]
As described above, in a conventional image forming apparatus, control is performed such that one high-voltage power supply device outputs a positive bias and a negative bias alternately. However, there is a delay from when one high-voltage power supply is turned off to when the bias actually decreases. For example, in the first conventional example, when the CPU simultaneously switches the negative bias OFF and the positive bias ON, the positive bias output operation is started with the negative bias remaining in the high-voltage power supply device. When the positive bias performs constant voltage control, the high voltage power supply outputs a predetermined positive bias after canceling out the remaining negative bias.Therefore, the high voltage power supply may be temporarily overloaded and cause a failure of the high voltage power supply. is there. In order to solve the above problem, a control is performed in which a predetermined blank period for turning off the bipolar bias is provided between the time when the negative bias is turned off and the time when the plus bias is turned on. However, since the delay time until the bias actually decreases also depends on the load state, a blank period having a margin is set. As a result, when the image formation speeds up or when a speed such as the polarity switching during the image formation is required, an image defect may occur. Further, there is a disadvantage that control of the CPU becomes complicated. Furthermore, if the control for simultaneously outputting the plus bias and the minus bias is performed due to a malfunction of the CPU, there is a possibility that the high-voltage power supply device may fail.
[0022]
The present invention has been made in view of such a conventional problem. When the polarity of the output bias is switched, the other high voltage bias is turned on before the other high voltage bias is sufficiently reduced. It is an object of the present invention to prevent a failure of a high-voltage power supply when a high-voltage bias of both polarities is simultaneously turned on due to a malfunction. It is another object of the present invention to minimize the output bias polarity switching time within a range that does not overload the high-voltage power supply.
[0023]
Means and action for solving the problem
In order to achieve the above object, an image forming apparatus and a high-voltage power supply according to claim 1 of the present invention include a step-up transformer, a driving unit that drives the step-up transformer, and a pulsating voltage output by the step-up transformer. A plurality of high voltage generating units including a rectifying and smoothing means for generating a DC output voltage, the load current detecting means detecting a current flowing to a load by applying the DC output voltage; and In an image forming apparatus and a high-voltage power supply having an overcurrent protection unit that stops the operation of the high-voltage generation unit when an abnormal current is detected, the DC output voltage generated by one of the high-voltage generation units is reduced to a predetermined voltage or less. Until the above, the protection means for stopping the operation of the other high-voltage generation unit is configured using the overcurrent protection means.
[0024]
An image forming apparatus and a high-voltage power supply according to a second aspect of the present invention are the image forming apparatus and the high-voltage power supply according to the first aspect, wherein the plurality of high-voltage generating units generate DC output voltages having different polarities. It is characterized by the following.
[0025]
An image forming apparatus and a high-voltage power supply according to a third aspect of the present invention are the image forming apparatus and the high-voltage power supply according to the first and second aspects, wherein at least one or more high-voltage generators among the plurality of high-voltage generators are provided. The unit is a constant voltage control circuit.
An image forming apparatus and a high-voltage power supply according to a fourth aspect of the present invention are the image forming apparatus and the high-voltage power supply according to the first to third aspects, wherein the protection unit and the overcurrent protection unit are configured by an electric circuit. The feature is that.
[0026]
【Example】
(First embodiment)
FIG. 1 is a block diagram of an image forming apparatus according to an embodiment of the present invention.
In the same manner as in the conventional example 1, a DC plus power supply is superimposed on a DC minus power supply to output a bias having both a positive bias and a negative bias, and the positive bias is provided by providing both a voltage detection circuit and a current detection circuit and a constant voltage. The control is performed and an overcurrent protection circuit is provided.
The components already described in FIG. 4 of the first conventional example are denoted by the same reference numerals and description thereof is omitted.
Further, the bias output operation, the load current detection operation, and the overcurrent protection circuit operation are the same as those in the first conventional example, and thus description thereof is omitted.
Reference numeral 101 denotes an FET, and the gate of the FET 101 is connected to the ON / OFF port of the CPU 2.
[0027]
Next, the operation will be described.
First, the operation at the time of negative bias output will be described.
As described in the first conventional example, the CPU 2 outputs the CLK2 of the predetermined frequency / Duty and sets the ON / OFF port to the H level, so that the minus bias V− is generated between the resistor 22 and the resistor 12. Further, assuming that the resistance values of the resistors 12, 22, 23, and 24 are R12, R22, R23, and R24, a current I- expressed by the following equation flows through a path indicated by a solid line in FIG.
I − = {(Va−V −) / R22}
+ {(Va-V-) / (R12 + R23 + R24)}
[0028]
On the other hand, the load current I flowing through the load 51_loadPasses through the path indicated by the broken line in FIG.
As a result, the following voltages are input to the A / D port and the comparison circuit 34 of the CPU 2.
VI = I- * R27 + Va
[0029]
Next, when the ON / OFF port is set to the H level, the FET 101 is turned on, and the overcurrent operation threshold voltage V_THTo 0V. As a result, the output of the comparison circuit 34 becomes L, and the FET 39 operates to make the input voltage from the D / A port 1 to the constant voltage control circuit 8 L. Thereafter, even if the ON / OFF port is turned off, that is, the minus bias is turned off, the diode 35 conducts and the overcurrent operation threshold voltage V_THHas dropped to the VF (about 0.6 V) of the diode 35, the input voltage from the D / A port 1 to the constant voltage control circuit 8 remains at L. In this state, even if a voltage is output from the D / A port 1 and the plus bias is turned on, the output operation of the plus bias remains stopped. Thereafter, the voltage of V− decreases due to spontaneous discharge, and the I− and load current detection voltage VI also decrease. Then, V- is sufficiently reduced, and the overcurrent operation threshold voltage V_THLWhen the load current detection voltage VI is reached, the output of the comparison circuit 34 becomes H, and a positive bias output operation is started.
[0030]
That is, even if the output polarity is switched from the minus bias to the plus bias, the output operation of the plus bias does not start until the minus bias has sufficiently decreased, so that the overload state of the high-voltage power supply device can be prevented. Further, the CPU 2 can simultaneously set the switching of the output polarity, so that the switching of the output polarity can be performed in the shortest time within a range that does not overload the high-voltage power supply device without complicating the control. Further, even if the CPU 2 malfunctions and the plus bias and the minus bias are simultaneously operated, no plus bias is generated, so that it is possible to prevent the high voltage power supply from being overloaded.
[0031]
In this embodiment, the FET 101 is added. However, at the time of the negative bias output, the overcurrent operation threshold voltage V_TH<If the constant is set so as to be the load current detection voltage VI, the FET 101 becomes unnecessary.
[0032]
(Second embodiment)
FIG. 2 is a block diagram of the image forming apparatus according to the embodiment of the present invention.
As in the second conventional example, a configuration in which a DC minus power supply is superimposed on a DC plus power supply outputs a bias having both a positive bias and a negative bias. The control is performed and an overcurrent protection circuit is provided.
The components already described in FIG. 6 of the conventional example 2 are denoted by the same reference numerals and description thereof is omitted.
Further, the bias output operation, the load current detection operation, and the overcurrent protection circuit operation are the same as those of the second conventional example, and thus the description is omitted.
151 is a resistor, and 152 is an FET.
[0033]
Next, the operation will be described.
First, the operation at the time of positive bias output will be described.
When the CPU 2 outputs CLK2 of a predetermined frequency / Duty and sets the ON / OFF port to the H level, a positive bias V + is generated between the resistor 22 and the resistor 12. Assuming that the resistance values of the resistors 12, 22, 23, and 24 are R12, R22, R23, and R24, a current I + represented by the following equation flows through a path indicated by a solid line in FIG.
I + = {(V + -Va) / R22}
+ {(V + -Va) / (R12 + R23 + R24)}
[0034]
On the other hand, the load current I flowing through the load 51_loadPasses through the path indicated by the broken line in FIG.
As a result, the following voltages are input to the A / D port and the comparison circuit 34 of the CPU 2.
VI = Va- (I + * R27)
[0035]
Next, when the ON / OFF port is set to the H level, the FET 101 and the FET 152 are turned on, and the overcurrent operation threshold voltage V_THTo H (Va or more). As a result, the output of the comparison circuit 34 becomes H, and the FET 38 and the FET 157 operate to set the input voltage from the D / A port 1 to the constant voltage control circuit 8 to H (Va or more). Then, even if the ON / OFF port is turned off, that is, the plus bias is turned off, the overcurrent operation threshold voltage V set by the voltage division of the resistor 32 and the resistor 33 is set._THIs higher than the load current detection voltage VI, the output of the comparison circuit 34 remains H, and the input voltage from the D / A port 1 to the constant voltage control circuit 8 remains H. In this state, even if a voltage is output from the D / A port 1 and the negative bias is turned on, the output operation of the negative bias remains stopped. Thereafter, the voltage of V + decreases due to spontaneous discharge, and accordingly, I + decreases, and the load current detection voltage VI increases. Then, V + drops sufficiently, and the overcurrent operation threshold voltage V_THWhen the load current detection voltage VI is reached, the output of the comparison circuit 34 becomes L, the FET 157 becomes inactive, and a negative bias output operation is started.
[0036]
That is, even if the output polarity is switched from the positive bias to the negative bias, the output operation of the negative bias does not start until the positive bias has sufficiently decreased, so that the overload state of the high-voltage power supply device can be prevented. Further, the CPU 2 can simultaneously set the switching of the output polarity, so that the switching of the output polarity can be performed in the shortest time within a range that does not overload the high-voltage power supply device without complicating the control. Further, even if the CPU 2 malfunctions and operates the plus bias and the minus bias at the same time, no minus bias is generated, so that the overload state of the high-voltage power supply can be prevented.
[0037]
In this embodiment, a resistor 151 and FETs 101 and 152 are added. However, at the time of the plus bias output, the overcurrent operation threshold voltage V_THIf the constant is set so as to satisfy the load current detection voltage VI, the resistor 151 and the FETs 010 and 152 become unnecessary.
[0038]
(Third embodiment)
FIG. 3 is a block diagram of the image forming apparatus according to the embodiment of the present invention.
A configuration in which a DC plus power supply is superimposed on a DC minus power supply outputs biases of both positive and negative biases.The negative bias is provided with both a voltage detection circuit and a current detection circuit to perform constant voltage control. A protection circuit is provided.
Those described in Conventional Example 1 and Conventional Example 2 are denoted by the same reference numerals and description thereof is omitted.
Further, the bias output operation, the load current detection operation, and the overcurrent protection circuit operation are the same as those of the first and second prior arts, and thus the description is omitted.
Note that the relationship between the output voltage of the D / A port 1 and the high output voltage (HVout) in the negative bias output operation is the same as in FIG.
201 and 202 are high voltage diodes, 203, 204 and 205 are resistors, and 206 is an FET.
[0039]
Next, the operation will be described.
First, the operation at the time of positive bias output will be described.
When the CPU 2 outputs CLK1 of a predetermined frequency / Duty and sets the ON / OFF port to H level, a positive bias V + is generated at the output. Further, assuming that the resistance values of the resistors 12, 23, and 24 are R12, R23, and R24, a current I + of the following equation flows through a path indicated by a solid line shown in FIG.
I + = {(V + -Va) / R12}
+ {(V + -Va) / (R23 + R24)}
On the other hand, the load current I flowing through the load 51_loadPasses through the path indicated by the broken line in FIG.
As a result, the following voltages are input to the A / D port and the comparison circuit 34 of the CPU 2.
VI = Va- (I + * R27)
[0040]
Next, when the ON / OFF port is set to the H level, the FET 101 and the FET 152 are turned on, and the overcurrent operation threshold voltage V_THTo H (Va or more). As a result, the output of the comparison circuit 34 becomes H, and the FET 38 and the FET 206 operate to make the input voltage from the D / A port 1 to the constant voltage control circuit 18 H (Va or more). Then, even if the ON / OFF port is turned off, that is, the plus bias is turned off, the overcurrent operation threshold voltage V set by the voltage division of the resistor 32 and the resistor 33 is set._THIs higher than the load current detection voltage VI, the output of the comparison circuit 34 remains at H, and the input voltage from the D / A port 1 to the constant voltage control circuit 18 remains at H. In this state, even if the voltage is output from the D / A port 1 and the negative bias is turned on, the output operation of the negative bias remains stopped. Thereafter, the voltage of V + decreases due to spontaneous discharge, and I + also decreases accordingly. As a result, the load current detection voltage VI increases. Then, V + drops sufficiently, and the overcurrent operation threshold voltage V_TH<When the load current detection voltage VI is reached, the output of the comparison circuit 34 becomes L, the FET 206 becomes inactive, and the output operation of the negative bias is started.
[0041]
That is, even if the output polarity is switched from the positive bias to the negative bias, the output operation of the negative bias does not start until the positive bias has sufficiently decreased, so that the overload state of the high-voltage power supply device can be prevented. Further, the CPU 2 can simultaneously set the switching of the output polarity, so that the switching of the output polarity can be performed in the shortest time within a range that does not overload the high-voltage power supply device without complicating the control. Further, even if the CPU 2 malfunctions and operates the plus bias and the minus bias at the same time, no minus bias is generated, so that the overload state of the high-voltage power supply can be prevented.
In this embodiment, a resistor 151 and FETs 101 and 152 are added. However, at the time of the plus bias output, the overcurrent operation threshold voltage V_THIf the constant is set so as to satisfy the load current detection voltage VI, the resistor 151 and the FETs 101 and 152 become unnecessary.
[0042]
【The invention's effect】
As described above, according to the present invention, when one of the high-voltage biases is turned on before the other high-voltage bias is sufficiently reduced at the time of switching the polarity of the output bias, or when the high-voltage bias of both polarities is turned on due to malfunction of the CPU. Are turned on at the same time, it is possible to prevent the breakdown of the high-voltage power supply device. Further, the polarity switching time of the output bias can be minimized within a range that does not overload the high-voltage power supply device.
Further, by using the circuit configuration also as the overcurrent protection circuit, the above function can be achieved at a low cost.
[Brief description of the drawings]
FIG. 1 is a block diagram of an image forming apparatus according to a first embodiment.
FIG. 2 is a block diagram illustrating an image forming apparatus according to a second exemplary embodiment.
FIG. 3 is a block diagram of an image forming apparatus according to a third embodiment.
FIG. 4 is a block diagram of an image forming apparatus according to Conventional Example 1.
FIG. 5 shows a positive bias high-voltage table in Conventional Example 1.
FIG. 6 is a block diagram of an image forming apparatus according to Conventional Example 2.
FIG. 7 shows a plus bias high voltage table in Conventional Example 2.
[Explanation of symbols]
1: image forming apparatus, 2: CPU, 3: high-voltage transformer, 4: transformer drive circuit, 5: fuse resistor, 6: transistor, 7: electrolytic capacitor, 8: constant voltage control circuit, 9: snubber diode, 10: high voltage Diode, 11: high voltage capacitor, 12: bleeder resistance, 13: high voltage transformer, 14: transformer drive circuit, 15: fuse resistance, 16: transistor, 17: electrolytic capacitor, 18: constant voltage control circuit, 19: snubber diode, 20 : High voltage diode, 21: high voltage capacitor, 22: bleeder resistor, 23, 24: output voltage detection resistor, 25: capacitor, 26: operational amplifier, 27: load current detection resistor, 28: phase compensation capacitor, 29: DC power supply, 30: current limiting resistor, 32, 33: resistor, 34: comparison circuit, 35: diode, 36, 37 Pull-up resistors, 38, 39: FET, 40, 41: resistor, 42, 43: diode, 44, 45: resistor, 51: load, 81, 82: diode, 83, 84, 85: resistor, 86: diode, 87: FET, 101: FET, 151: resistance, 152: FET, 201, 202: high voltage diode, 203, 204, 205: resistance, 206: FET.

Claims (4)

A step-up transformer,
Driving means for driving the step-up transformer;
A plurality of high voltage generators including a rectifying and smoothing pulsating voltage output by the step-up transformer to generate a DC output voltage;
Load current detection means for detecting a current flowing to a load by applying the DC output voltage,
An image forming apparatus and a high-voltage power supply device having an overcurrent protection unit that stops operation of the high-voltage generation unit when the load current detection unit detects an abnormal current;
The protection means for stopping the operation of the other high-voltage generation unit is configured using the overcurrent protection means until the DC output voltage generated by one of the high-voltage generation units becomes equal to or lower than a predetermined voltage. Image forming apparatus and high voltage power supply The image forming apparatus according to claim 1, wherein the plurality of high-voltage generating units generate DC output voltages having different polarities. The image forming apparatus and the high-voltage power supply according to claim 1, wherein at least one high-voltage generator among the plurality of high-voltage generators is a constant voltage control circuit. The image forming apparatus and the high-voltage power supply according to claim 1, wherein the protection unit and the overcurrent protection unit are configured by an electric circuit.

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