JP2004200679A - Method for manufacturing multilayer circuit board - Google Patents

Abstract

An object of the present invention is to provide a method of manufacturing a multilayer circuit board capable of suppressing deformation and delamination by suppressing shrinkage in a plane direction and improving dimensional accuracy.
A plurality of first insulating layers made of a first inorganic composition, which are thicker than the first insulating layer and shrink at a higher temperature than the first insulating layer with the application of heat. The laminated body formed by laminating the plurality of second insulating layers 1g to 1k made of the second inorganic composition to be started is lower than the shrinkage starting temperature of the second insulating layer and starts shrinking of the first insulating layer. By heating in a first temperature region higher than the temperature, the first insulating layers 1a to 1f are largely contracted in the thickness direction as compared with the plane direction, and then the laminate is shrunk by the second insulating layer. By heating in a second temperature range higher than the starting temperature, the second insulating layers 1g to 1k are largely shrunk in the thickness direction as compared with the plane direction, and the laminate is sintered.
[Selection diagram] FIG.

Description

  The present invention relates to a method for manufacturing a multilayer wiring board used for a semiconductor device, a composite electronic component, and the like.

  Conventionally, multilayer circuit boards have been used for semiconductor devices, composite electronic components, and the like.

  As such a conventional multilayer circuit board, for example, a wiring conductor or a via-hole conductor is provided inside a laminate in which a plurality of insulating layers made of an inorganic composition are laminated, and these are connected to each other. Known is a structure in which a mounting portion for connecting an electronic component element is provided on the surface, and in order to increase the dimensional accuracy, a combination of two types of insulating layers formed of different inorganic compositions is used. It is known that a multi-layer circuit board is constituted by such a method (for example, see Patent Document 1).

  When manufacturing the above-described multilayer circuit board, first, as shown in FIG. 3, a plurality of insulating layers 31a to 31e are prepared, and a wiring conductor 32 and a via-hole conductor 33 are provided on each of the insulating layers. Thereafter, as shown in FIG. 4, the insulating layers 31a to 31e are stacked and baked integrally, whereby the multilayer circuit board 30 is manufactured. At this time, the inorganic composition forming the insulating layers 31a, 31c and 31e and the inorganic composition forming the insulating layers 31b and 31d have different temperatures at which shrinkage starts with firing.

According to such a method of manufacturing a multilayer circuit board, when an insulating layer having a low shrinkage start temperature starts shrinking, shrinkage in a plane direction is suppressed by the insulating layer having a high shrinkage start temperature in an unsintered state. . On the other hand, when the insulating layer having a high shrinkage start temperature starts shrinking, the shrinkage in the plane direction is suppressed by the insulating layer having a low shrinkage start temperature. Attempts have been made to increase the dimensional accuracy of the multilayer circuit board by suppressing shrinkage in the plane direction of the laminate and greatly shrinking in the thickness direction by the mechanism described above.
JP 2001-15875 A

  However, in the above-described conventional manufacturing method, when firing the laminated body, when the insulating layer having a low shrinkage start temperature starts shrinking, the stress due to shrinkage is too large, or the rigidity of the insulating layer having a high shrinkage start temperature is insufficient. For example, there is a disadvantage that it is impossible to sufficiently suppress shrinkage in the plane direction. In this case, since the shrinkage in the plane direction of the laminated body becomes large, the dimensional accuracy of the multilayer circuit board is remarkably reduced, and the entire structure of the multilayer circuit board is disadvantageously deformed.

  Furthermore, according to the above-described conventional manufacturing method, since the uppermost layer and the lowermost layer of the laminated body are limited in the suppression of shrinkage on only one side, the stress of shrinkage in the plane direction is concentrated particularly at the end. , Deformation and delamination are likely to occur. When such deformation occurs, there is a disadvantage that the mountability of the electronic component element is deteriorated particularly in the vicinity of the via hole conductor, the end of the cavity, and the vicinity of the end of the laminate. Defects that lead to deterioration of properties and strength are induced.

  The present invention has been devised in view of the above-described drawbacks, and has as its object to suppress the occurrence of deformation and delamination by suppressing shrinkage in the plane direction, and to manufacture a multilayer circuit board capable of increasing dimensional accuracy. It is to provide a method.

  The method for manufacturing a multilayer wiring board according to the present invention includes a plurality of first insulating layers made of a first inorganic composition, the first insulating layers being thicker than the first insulating layers, and being more intense than the first insulating layers with the application of heat. A step A of forming a laminate by laminating a plurality of second insulating layers made of a second inorganic composition that starts shrinking at a high temperature, and setting the laminate to a temperature lower than the shrinkage start temperature of the second insulating layer. And, by heating in a first temperature region higher than the shrinkage start temperature of the first insulating layer, the first insulating layer is largely shrunk in the thickness direction as compared with the plane direction, and then the laminate is removed. By heating the second insulating layer in a second temperature range higher than the shrinkage start temperature of the second insulating layer, the second insulating layer is largely shrunk in the thickness direction as compared with the surface direction, and the first and second insulation layers are shrunk. B) sintering the layer.

  Further, in the method for manufacturing a multilayer wiring board of the present invention, the thickness of the first insulating layer in the step A is set to 50% or less of the thickness of the second insulating layer.

  Further, in the method for manufacturing a multilayer wiring board according to the present invention, the first insulating layer constitutes an uppermost layer and a lowermost layer of the laminate.

  Still further, in the method for manufacturing a multilayer wiring board according to the present invention, a mounting portion for an electronic component element is provided on one main surface of the laminate.

  Still further, in the method for manufacturing a multilayer wiring board according to the present invention, a via-hole conductor and a wiring conductor made of a conductive material containing any one of silver, copper, and gold are arranged inside the laminate. Things.

  In the method for manufacturing a multilayer wiring board according to the present invention, the first insulating layer may have a volume corresponding to 90% of the total shrinkage before the second insulating layer starts shrinking in the step B. The contraction is completed.

  Further, in the method for manufacturing a multilayer wiring board according to the present invention, the second insulating layer is formed of a ceramic green sheet, and the first insulating layer is formed by applying an inorganic composition paste to a main surface of the second insulating layer. It is characterized by the following.

  Still further, in the method for manufacturing a multilayer wiring board according to the present invention, when the first insulating layer shrinks in the step B, the shrinkage of the first insulating layer in the surface direction is caused by the rigidity of the unsintered second insulating layer. In addition, when the second insulating layer shrinks, the shrinkage of the second insulating layer in the plane direction is suppressed by the rigidity of the first insulating layer.

  Furthermore, in the method for manufacturing a multilayer circuit board of the present invention, the laminate in the step A has a rectangular shape, and the first insulating layer and the second insulating layer are formed by applying heat in the step B. It is characterized in that the laminate shrinks at least three times more in the laminating direction of the laminate than in a direction parallel to one side of the laminate and the other side orthogonal to the one side.

  According to the method for manufacturing a multilayer circuit board of the present invention, the laminate is heated in the first temperature range lower than the shrinkage start temperature of the second insulating layer and higher than the shrinkage start temperature of the first insulating layer. By shrinking the first insulating layer more largely in the thickness direction than in the plane direction, and thereafter, heating the laminate in a second temperature region higher than the shrinkage start temperature of the second insulating layer. The first and second insulating layers are sintered by shrinking the second insulating layer more largely in the thickness direction than in the plane direction. That is, when the first insulating layer contracts, the contraction of the first insulating layer in the plane direction is suppressed by the rigidity of the unsintered second insulating layer, and when the second insulating layer contracts, the second insulating layer contracts. Since the contraction of the insulating layer in the plane direction is suppressed by the rigidity of the first insulating layer, as a result, the contraction in the plane direction is suppressed, and the warpage of the multilayer circuit board is suppressed and the dimensional accuracy is increased. be able to.

  Further, according to the method for manufacturing a multilayer circuit board of the present invention, the first insulating layer and the second insulating layer constituting the laminate start shrinking at a high temperature. The thickness of the second insulating layer starts shrinking at a low temperature. The thickness of the first insulating layer is larger than that of the first insulating layer. Thus, since the first insulating layer having a low shrinkage start temperature has a small stress due to the shrinkage, the shrinkage in the plane direction is more effectively suppressed by the second insulating layer having a high shrinkage start temperature.

  Further, according to the method for manufacturing a multilayer wiring board of the present invention, by setting the thickness of the first insulating layer in the step A to 50% or less of the thickness of the second insulating layer, the first insulating layer having a low shrinkage onset temperature can be obtained. Shrinkage of the layer in the plane direction can be further suppressed.

  Further, according to the method for manufacturing a multilayer wiring board of the present invention, the first insulating layer forms the uppermost layer and the lowermost layer of the multilayer body. Therefore, since the thickness of the first insulating layer having a low shrinkage start temperature is small, the shrinkage in the surface direction is suppressed even on the outermost surface where the force for suppressing shrinkage does not easily act, so that deformation or delamination occurs. It becomes difficult to do.

  Furthermore, according to the method for manufacturing a multilayer wiring board of the present invention, even when a mounting portion for an electronic component element is provided on one main surface of the laminate, the vicinity of the via-hole conductor, the cavity end, and the laminate Since deformation is less likely to occur at the ends and the like, a wide mountable area can be ensured.

  Furthermore, according to the method for manufacturing a multilayer wiring board of the present invention, even when there is a difference in the shrinkage initiation temperatures of the insulating layers, the temperature at which sintering is completed may be the same for both the first insulating layer and the second insulating layer. Therefore, sintering at a low temperature becomes possible, and a via-hole conductor and a wiring conductor made of a conductive material containing any one of silver, copper, and gold, which are metals having a low melting point, can be arranged inside the laminate. This makes it possible to obtain a multilayer circuit board having a low circuit conductor resistance value.

  Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

  FIG. 1 is a sectional view of a multilayer circuit board manufactured by the manufacturing method of the present invention, wherein 1a to 1f are first insulating layers, 1g to 1k are second insulating layers, 2 is a wiring conductor, 3 is a via hole conductor. It is.

  The multilayer circuit board 10 shown in FIG. 1 has a structure in which first insulating layers 1a to 1f and second insulating layers 1g to 1k are stacked. The wiring conductors 2 are formed inside and on the surface of the multilayer circuit board 10, and the wiring conductors on the surface mainly function as connection pads serving as mounting portions for electronic component elements. Mainly function as wiring for electrically connecting each circuit element and circuit elements such as inductors and capacitors.

  The first insulating layers 1a to 1f are made of a first inorganic composition, and the second insulating layers 1g to 1k are made of a second inorganic composition. The materials of these inorganic compositions are, for example, 800 ° C to 1200 ° C. A glass-ceramic material that can be fired at a relatively low temperature is preferably used. The glass-ceramic material includes glass powder and ceramic powder. The glass powder includes 30 to 100 parts by weight, and the material excluding glass powder is ceramic powder.

  In the present embodiment, for example, the first insulating layer is made of a material having a composition of 85 parts by weight of glass powder, and the second insulating layer is made of a material having a composition of 55 parts by weight of glass powder.

As a specific composition of the glass powder, for example, as essential components, 20 to 70 parts by weight of SiO ₂ , 0.5 to 30 parts by weight of Al ₂ O ₃ , 3 to 60 parts by weight of MgO, and as an optional component , 0 to 35 parts by weight of CaO, 0 to 35 parts by weight 0 to 35 parts by weight, the SrO and BaO, B ₂ O ₃ 0 to 20 parts by weight, 0 to 30 parts by weight of ZnO, the TiO ₂ 0 parts, 0-3 parts by weight of Na ₂ O, include those containing 0-5 parts by weight of Li ₂ O.

As the ceramic powder, at least one selected from Al ₂ O ₃ , SiO ₂ , MgTiO ₃ , CaZrO ₃ , CaTiO ₃ , Mg ₂ SiO ₄ , BaTi ₄ O ₉ , ZrTiO ₄ , SrTiO ₃ , BaTiO ₃ , and TiO ₂ No.

  According to the combination of the glass powder and the ceramic powder having the above composition, sintering at a low temperature of 1000 ° C. or less is possible, and silver (melting point: 960 ° C.), copper (melting point: 1083 ° C.), gold (melting point: 1063 ° C.), and a low-loss circuit can be formed. Further, the dielectric constant can be controlled, which is suitable for miniaturization and low loss of the circuit by increasing the dielectric constant, or high-speed transmission by decreasing the dielectric constant. In addition, by controlling various compositions within the above range, the firing shrinkage behavior can be easily controlled and changed.

  Note that the wiring conductor 2 and the via-hole conductor 3 are made of a conductive material containing any one of silver, copper, and gold, and the thickness is set to, for example, 5 to 25 μm.

  The diameter of the via-hole conductor 3 can be set arbitrarily. When the thickness of the insulating layer in which the via-hole conductor 3 is embedded is 10 to 300 μm, the diameter of the via-hole conductor 3 is set to, for example, 50 to 300 μm.

  Next, a method for manufacturing the above-described multilayer wiring board will be described with reference to the drawings.

(Step A)
1a to 1f shown in FIG. 2 are first insulating layers made of a first inorganic composition, and 1g to 1k are second insulating layers made of a second inorganic composition. These insulating layers are, for example, mixed with an organic binder, an organic solvent and, if necessary, a plasticizer into powder obtained by combining the above-described glass powder and ceramic powder, and slurried. This is a ceramic green sheet obtained by forming a tape by using the above method and cutting it into a predetermined size. At this time, the first insulating layers 1a to 1f are formed thinner than the second insulating layers 1g to 1k, and the thickness of each of the first insulating layers 1a to 1f is set to, for example, 2 to 150 μm. The thickness of each of the second insulating layers 1g to 1k is set, for example, to 10 to 300 μm.

  Next, the first insulating layer and the second insulating layer are bonded to each other, a through hole is formed in the obtained sheet by punching or the like, and a conductive paste is filled in the through hole to form a via-hole conductor 3. A conductor paste is applied to the main surface of the substrate by a screen printing method or the like to form the wiring conductor 2.

In the present embodiment, for example, as the first inorganic composition, the glass powder is 40 parts by weight of SO ₂ , ₂ parts by weight of Al ₂ O ₃ , 15 parts by weight of MgO, 1 part by weight of CaO, and 15 parts by weight of BaO. Parts by weight, 20 parts by weight of B ₂ O ₃ , 1 part by weight of ZnO, 0.5 parts by weight of TiO ₂ , 0.5 parts by weight of Na ₂ O, 5 parts by weight of Li ₂ O, and the ceramic powder, comprises MgTiO ₃ and the composition of 15 parts by weight, and the second inorganic composition is a glass powder, a SO ₂ 40 parts by weight, _Al 2 _{O 3} and 2 parts by weight, 15 parts by weight of MgO, 1 part by weight of CaO , BaO 15 parts by weight, BO ₃ 20 parts by weight, ZnO 1 part by weight, TiO ₂ 0.5 parts by weight, Na ₂ O 0.5 parts by weight, Li ₂ O 5 parts by weight, and ceramic powder , Al ₂ O ₃ of 45 parts by weight. A slurry obtained by adding an acrylic binder as an organic binder and toluene as an organic solvent to these inorganic compositions was prepared to form ceramic green sheets to be a first insulating layer and a second insulating layer, respectively. The material of the wiring conductor and the via-hole conductor is, for example, a paste obtained by adding ethyl cellulose as an organic binder and 2-2-4-trimethyl-3--3-pentadiol monoisobutyrate as an organic solvent to silver powder. Using.

  The sheets thus obtained are laminated in a predetermined lamination order to form a laminate.

(Step B)
Next, the obtained laminate is heated in a first temperature region lower than the shrinkage start temperature of the second insulating layer and higher than the shrinkage start temperature of the first insulating layer, whereby the first insulating layer 1a is heated. To 1f is largely contracted in the thickness direction as compared with the surface direction. Thereafter, the laminate is heated in a second temperature range higher than the shrinkage start temperature of the second insulating layer, so that the second insulating layers 1g to 1k are larger in the thickness direction than in the plane direction. By shrinking, the first and second insulating layers are sintered. That is, when the first insulating layers 1a to 1f shrink, the shrinkage of the first insulating layers 1a to 1f in the plane direction is suppressed by the rigidity of the unsintered second insulating layers 1g to 1k. When the insulating layers 1g to 1k shrink, the shrinkage of the second insulating layers 1g to 1k in the plane direction is suppressed by the rigidity of the first insulating layers 1a to 1f. As a result, the shrinkage in the plane direction is suppressed. As a result, warpage of the multilayer circuit board can be suppressed, and dimensional accuracy can be increased.

  In the present embodiment, the first insulating layer is formed of an inorganic composition having a shrinkage start temperature of 690 ° C., and the second insulating layer is formed of an inorganic composition having a shrinkage start temperature of 783 ° C. As a result, the firing shrinkage of the laminate is reduced. The linear shrinkage in the plane direction at the time of completion is as small as 3%, and a multilayer circuit board with less warpage and deformation can be obtained.

  Regarding the volume shrinkage in firing, the first insulating layers 1a to 1f have a volume equivalent to 90% of the total shrinkage before the second insulating layers 1g to 1k start shrinking in the step B. It is desirable that the shrinkage be completed, more preferably 95% or more.

  Here, the start of shrinkage means that shrinkage accompanying sintering of the inorganic composition is started. The organic binder contained in the insulating layer is decomposed and removed by heating, and at this time, shrinkage of about 0 to 1% may occur. This is accompanied by the removal of the binder, and the sintering of the inorganic composition is performed. Is different from the substantial contraction by Although the binder removal temperature varies depending on the binder used, it ends up to about 500 ° C. for an acrylic or methacrylic binder and about 600 ° C. for a butyral binder. As for the shrinkage initiation temperature in firing, the difference between the temperatures is preferably 10 ° C. or more, more preferably 20 ° C. or more. Although the firing shrinkage of the laminate is completed through the process B, in the present invention, the end of the firing shrinkage means a time point at which the total volume shrinkage has progressed by 99% or more.

  Further, in the laminate, the second insulating layer made of the second inorganic composition, which starts shrinking at a higher temperature than the first insulating layer with the application of heat, is thicker than the first insulating layer. ing. That is, the thickness of the first insulating layers 1a to 1f is smaller than the thickness of the second insulating layers 1g to 1k. As a result, the stress caused by the contraction of the first insulating layer having a low shrinkage start temperature is small, so that the shrinkage in the surface direction is more effectively suppressed by the second insulating layer having a high shrinkage start temperature.

  Further, since the thickness of the first insulating layers 1a to 1f in the step A is set to 50% or less of the thickness of the second insulating layer, the thickness of the insulating layer having a low shrinkage onset temperature in the plane direction when shrinking is reduced. The suppression will work even more effectively.

  Further, the first insulating layers 1a to 1f constitute the uppermost layer and the lowermost layer of the laminate. Accordingly, since the thickness of the first insulating layers 1a and 1f having a low shrinkage start temperature is small, the shrinkage in the surface direction is suppressed even on the outermost surface where the effect of suppressing shrinkage does not work. Is less likely to occur.

  Further, even when the mounting portion of the electronic component element is provided on one main surface of the laminate, deformation is unlikely to occur at an end or the like, so that a wide mounting area can be secured.

  Then, even if there is a difference in the shrinkage initiation temperature of the insulating layer, the temperature at which sintering is completed may be the same for both the first insulating layer and the second insulating layer. Inside, it is possible to arrange a via-hole conductor and a wiring conductor made of a conductive material containing one of silver, copper, and gold, which are metals having a low melting point, and to form a multilayer circuit board having a low circuit conductor resistance value. Obtainable.

  Note that the present invention is not limited to the above-described embodiment, and various changes, improvements, and the like can be made without departing from the gist of the present invention.

  For example, in the above-described embodiment, the ceramic green sheets are used for forming the first insulating layers 1a to 1f and bonded to the ceramic green sheets used for forming the second insulating layer. Instead, the first inorganic composition in the form of paste is used for forming the first insulating layers 1a to 1f, and this is applied to the main surface of the ceramic green sheet used for forming the second insulating layer by printing or the like. Alternatively, it may be formed directly. In this case, the first insulating layer having a small thickness can be formed relatively easily by applying a paste or the like, and the first insulating layer can be formed as compared with a case where the first insulating layer having a small thickness is formed of a ceramic green sheet or the like. Has an advantage that the workability in forming the substrate is improved and the productivity of the multilayer circuit board can be improved.

  In the above-described embodiment, when the laminate is heated in the first temperature region and the second temperature region, a weight that is large enough to cover the entire upper surface of the laminate is placed on the laminate. For example, deformation of the multilayer circuit board and delamination can be more effectively prevented by the weight of the weight.

  Further, in the above-described embodiment, the stacked body is formed by alternately stacking the first insulating layers and the second insulating layers. Alternatively, a plurality of first insulating layers and a plurality of first insulating layers may be formed. A laminate may be formed by continuously laminating two insulating layers in the thickness direction.

  Furthermore, in the above-described embodiment, the first and second insulating layers are alternately stacked to distribute the first and second insulating layers substantially uniformly in the thickness direction of the stacked body. For example, the first and second insulating layers may be distributed to some extent non-uniformly in the thickness direction of the laminate in order to maintain a good balance of the distribution of the wiring conductors and the like. For example, when the first and second insulating layers are distributed unevenly in the thickness direction of the laminate, the laminate is vertically positioned so that the second insulating layer is distributed in a large number in the lower region in the thickness direction of the laminate. If firing is performed during the firing step, even if the vicinity of the center of the laminate is deformed so as to protrude upward, the protruding portion is gradually lowered by the own weight received from the entire laminate until firing is completed. Finally, a multilayer circuit board having a substantially flat outer shape is obtained.

  Furthermore, in the present embodiment, as the conductor paste used for forming the wiring conductors and the like, an inorganic component composed entirely of silver powder is used, but a predetermined amount of an additive such as glass frit is added thereto. Needless to say, it may be used. For example, when the content of the silver powder is 99.9% or more, the first insulating layer starts shrinking at a temperature lower than the temperature at which shrinkage starts (650 ° C. or less). The compactness is increased by the compression effect due to the contraction of the first insulating layer and the second insulating layer, and the conductor resistance of the circuit can be reduced. It is preferable that the solid content of such a conductor paste is set, for example, in a range of 90% to 99.9%, whereby the denseness of the wiring conductor can be improved.

  Furthermore, the uppermost layer and the lowermost layer of the laminate according to the present invention, which are not shown in the above embodiments, mean the layers exposed on the main surface side of the laminate, for example, It also includes a layer exposed on the bottom surface of the cavity formed on the surface.

  Further, after the firing shrinkage is completed, the surface of the wiring conductor may be subjected to a surface treatment such as a plating process. In the present invention, a multilayer circuit board which is densely sintered even at a low temperature firing can be obtained. The liquid and the like are less likely to erode the laminate, and the efficiency of the surface treatment process can be increased.

  Furthermore, the manufacturing method of the present invention is also applicable to the case of manufacturing a motherboard for taking out a plurality of multilayer circuit boards, which can be cut out. Such a motherboard for taking a plurality of substrates has a plurality of substrate regions corresponding to the multilayer circuit substrate in a one-to-one relationship, and cuts along boundaries between adjacent substrate regions to form a plurality of multilayer circuit substrates. This method is used in a method of obtaining a plurality of multilayer circuit boards at the same time by dividing, and when the present invention is applied to such a mother board for obtaining a plurality of pieces, a dicing line is used for firing a laminate. There is almost no inconvenience such as displacement or distortion from the designed position due to deformation or the like, so that there is also an advantage that the mother board can be cut accurately and a multilayer circuit board with high dimensional accuracy can be obtained. .

  Furthermore, electronic component elements such as chip capacitors and ICs may be mounted on the multilayer circuit board of the above-described embodiment, or electronic component elements on the multilayer circuit board may be covered with a resin material or the like. Needless to say.

1 is a cross-sectional view of a multilayer circuit board according to one embodiment of the present invention. It is a figure explaining a manufacturing process of a multilayer circuit board concerning one embodiment of the present invention. It is a figure explaining the manufacturing process of the conventional multilayer circuit board. It is sectional drawing of the conventional multilayer circuit board.

Explanation of reference numerals

DESCRIPTION OF SYMBOLS 1 ... Multilayer circuit board 1a-1f ... 1st insulating layer 1g-1k ... 2nd insulating layer 2 ... Wiring conductor 3 ... Via hole conductor

Claims (9)

A plurality of first insulating layers made of a first inorganic composition, and a second inorganic composition which is thicker than the first insulating layer and starts to shrink at a higher temperature than the first insulating layer with the application of heat. A step A of forming a laminate by laminating a plurality of second insulating layers made of a material;
By heating the laminate in a first temperature region lower than the shrinkage start temperature of the second insulating layer and higher than the shrinkage start temperature of the first insulating layer, the first insulating layer can be heated in a plane direction. Then, the laminate is heated in a second temperature range higher than the shrinkage start temperature of the second insulating layer, so that the second insulating layer is reduced in the surface direction. B) sintering the first and second insulating layers by largely shrinking in the thickness direction to sinter the first and second insulating layers. 2. The method according to claim 1, wherein the thickness of the first insulating layer in the step A is set to 50% or less of the thickness of the second insulating layer. 3. The method according to claim 1, wherein the first insulating layer forms an uppermost layer and a lowermost layer of the multilayer body. 4. The method for manufacturing a multilayer circuit board according to claim 3, wherein a mounting portion for an electronic component element is provided on one main surface of the laminate. A via-hole conductor and a wiring conductor made of a conductive material (one or several kinds selected from (including any one of) silver, copper, and gold) are disposed inside the laminate. Item 5. The method for manufacturing a multilayer circuit board according to any one of Items 1 to 4. The volume contraction corresponding to 90% of the total contraction amount of the first insulating layer is completed before the second insulating layer starts contracting in the step B. 6. The method for manufacturing a multilayer wiring board according to any one of 1 to 5. 7. The method according to claim 1, wherein the second insulating layer is formed of a ceramic green sheet, and the first insulating layer is formed by applying an inorganic composition paste to a main surface of the second insulating layer. A method for manufacturing the multilayer circuit board according to any one of the above. When the first insulating layer shrinks in the step B, the shrinkage in the plane direction of the first insulating layer is suppressed by the rigidity of the unsintered second insulating layer, and when the second insulating layer shrinks, The method according to any one of claims 1 to 7, wherein shrinkage of the second insulating layer in a plane direction is suppressed by rigidity of the first insulating layer. The laminate in the step A has a rectangular shape, and the first insulating layer and the second insulating layer are in contact with one side of the laminate and the other side orthogonal to the one side with the application of heat in the step B. 9. The method for manufacturing a multilayer circuit board according to claim 1, wherein the shrinkage is at least three times greater in the stacking direction of the stacked body than in the parallel direction.

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