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JP2004062491A - Stabilized dc power supply circuit - Google Patents

Stabilized dc power supply circuit Download PDF

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Publication number
JP2004062491A
JP2004062491A JP2002219366A JP2002219366A JP2004062491A JP 2004062491 A JP2004062491 A JP 2004062491A JP 2002219366 A JP2002219366 A JP 2002219366A JP 2002219366 A JP2002219366 A JP 2002219366A JP 2004062491 A JP2004062491 A JP 2004062491A
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voltage
transistor
current
output
circuit
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JP2002219366A
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JP3860089B2 (en
Inventor
Shinji Kawashima
川島 伸治
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Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
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Renesas Semiconductor Manufacturing Co Ltd
Kansai Nippon Electric Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that a variance in protective operation characteristic is caused by hfe of a transistor for voltage control in a circuit for detecting the base current of the transistor for the voltage control, controlling the conduction of the transistor for the voltage control and performing protection from overvoltage and load short-circuit. <P>SOLUTION: A stabilized DC power supply circuit is provided with an overcurrent limiting circuit 18 for detecting a main current flowing to the transistor Q11 for the voltage control in a resistor R11 for current detection, controlling the conduction between the output of a differential amplifier 15 and voltage dividing resistors R12 and R13 for voltage detection on the basis of a current flowing to the resistor R11 for the current detection and limiting the current flowing to the transistor Q11 for the voltage control. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、直流安定化電源回路に関し、特に電圧制御用トランジスタを保護する過電流制限回路を備えた直流安定化電源回路に関する。
【0002】
【従来の技術】
直流安定化電源回路の一例として特開2000−187515号公報(先行技術1)に開示された回路を図2から説明する。図において、1は非安定化直流電圧(入力電圧)Viが供給される入力端子、2は安定化された出力電圧Voが出力される出力端子、3は接地端子、Q1はPNP型の電圧制御用トランジスタ(第1のトランジスタ)で、エミッタからコレクタに通じる主電流路が入力端子1と出力端子2間に直列的に接続されている。R1、R2は出力端子2と接地端子3間に直列接続された電圧検出用抵抗(第1、第2の抵抗)、4は基準電圧Vrを発生する基準電圧発生回路、5は電圧検出用抵抗R1、R2によって分圧された接続点6の電圧Veと基準電圧発生回路4の基準電圧Vrとを入力し、その差電圧を増幅する差動増幅器、7は差動増幅器5の出力により電圧制御用トランジスタQ1を駆動制御するドライバ回路で、図示例では、ベースが差動増幅器5の出力に接続され、コレクタが入力端子1に、エミッタが直列接続された第3、第4、第5の抵抗R3、R4、R5を介して接地された第2のトランジスタQ2と、ベースが第2のトランジスタQ2のエミッタに、コレクタが電圧制御用トランジスタQ1のベースに、エミッタがダイオード接続された第4のトランジスタQ4を介して第4、第5の抵抗R4、R5の接続点にそれぞれ接続された第3のトランジスタQ3で構成されている。8は過電流制限回路で、図示例ではベースがドライバ回路7の第2のトランジスタQ2のエミッタに接続された抵抗R3、R4の接続点に、エミッタが電圧検出用抵抗である第1、第2の抵抗R1、R2の接続点6にそれぞれ接続された第5のトランジスタQ5と、ベースが第5のトランジスタQ5のコレクタに、エミッタが差動増幅器5の出力にそれぞれ接続され、コレクタが接地された第6のトランジスタQ6で構成されている。第2〜第5のトランジスタQ2〜Q5はNPN型、第6のトランジスタQ6はPNP型である。図2に付属した他の回路は説明を省略する。
【0003】
この直流安定化電源回路は、基準電圧Vrと出力端子2の出力電圧Voに比例した接続点6に表れる分圧電圧Veの差電圧を差動増幅器5で増幅し、ドライバ回路7のトランジスタQ2、Q3によって電流増幅し、電圧制御用トランジスタQ1のベース電圧を制御することにより、出力電圧Voを安定した所定の電圧に設定することができる。一方、出力電流が増大すると電圧制御用トランジスタQ1のベース電流Ibが増大し、トランジスタQ3のエミッタ電圧が上昇する。この結果、過電流制限回路8のトランジスタQ5のベース電圧が上昇し、このトランジスタQ5のコレクタ、エミッタ間を導通してコレクタ電圧を引き下げ、さらにPNP型トランジスタQ6のベース電圧を引き下げるため、トランジスタQ6が導通し、差動増幅器5の出力を低下させる。このようにして差動増幅器5の出力電圧が低下すると、トランジスタQ2、Q3を通して電圧制御用トランジスタQ1のベース電流が制限されるため、この直流安定化電源回路は過電流から保護される。さらに、負荷が短絡するなど出力端子2の出力電圧が低下し、大電流が流れる状態では、分圧電圧Veが接地電圧に近づき、差動増幅器5は電圧制御用トランジスタQ1が出力電圧を所定の電圧に引き上げるように動作させようとする。これにより電圧制御用トランジスタQ1のベース電流は増大するためトランジスタQ3のエミッタ電圧は上昇する。その結果、トランジスタQ5、Q6は導通状態となり、差動増幅器5の出力電圧を引き下げ、電圧制御用トランジスタQ1の動作を制限させるように作用するが、さらには出力端子2の電圧が所定の電圧のときあるいは過電流状態のときに対して、負荷短絡状態では分圧電圧Veが接地電圧に近い低電圧に引き下げられるため、トランジスタQ5のベース、エミッタ間電圧は、過電流制限時より大きくすることができ、トランジスタQ5のコレクタ、エミッタ間抵抗を過電流制限時より低くでき、差動増幅器5の出力を確実に引き下げ、電圧制御用トランジスタQ1の動作を確実に制限することができる。この直流安定化電源回路は図3に示すように出力電流がゼロの状態から定格出力電流I1までは定格出力電圧V1を保ち、定格出力電流I1を超える過電流状態では出力電圧、出力電流ともやや減少し、さらに定格出力電流I1を大きく超える負荷が短絡に近い状態では出力電圧、出力電流とも減少し、負荷短絡状態では出力電圧はゼロに近く、出力電流を定格出力電流I1の数分の1に抑える、いわゆる「フ」の字特性を示す。
【0004】
フの字特性を有する直流安定化電源回路の他の例として特開平2−170213号公報(先行技術2)に開示された回路を図4に示す。図において、1、2、3はそれぞれ入力端子、出力端子、接地端子、Q1は電圧制御用トランジスタ、R1、R2は直列接続された電圧検出用抵抗で、入力端子1と出力端子2の間には電圧制御用トランジスタQ1のエミッタからコレクタに通じる主電流路が直列的に接続され、出力端子2と接地端子3の間には電圧検出用抵抗R1、R2が直列接続されている。4は基準電圧発生回路、5は基準電圧発生回路4の基準電圧Vrと抵抗R1、R2で分圧された分圧電圧Veがそれぞれ入力され、増幅された差電圧を出力する差動増幅器、7は差動増幅器5の出力により電圧制御用トランジスタQ1を駆動制御するドライバ回路で、図示例では、ベースが差動増幅器5の出力に、コレクタが入力端子1にそれぞれ接続され、エミッタが抵抗R6を介して接地された第2のトランジスタQ2と、ベースが第2のトランジスタQ2のエミッタに、コレクタが電圧制御用トランジスタQ1のベースにそれぞれ接続され、エミッタが抵抗R7を介して接地された第3のトランジスタで構成されている。8は過電流制限回路で、ベースがドライバ回路7の第2のトランジスタQ2のエミッタに、コレクタが差動増幅器5の出力に、エミッタが第1、第2の抵抗R1、R2の接続点6にそれぞれ接続された第7のトランジスタQ7で構成されている。この回路ではトランジスタQ1はPNP型、他のトランジスタQ2、Q3、Q7はそれぞれNPN型を示す。また9は入力端子1と差動増幅器5の出力の間に接続された定電流回路を示す。
【0005】
この直流安定化電源回路は図2回路と同様に基準電圧Vrと出力端子2の出力電圧Voに比例した分圧電圧Veの差電圧を差動増幅器5で増幅し、トランジスタQ2、Q3によって電流増幅し、電圧制御用トランジスタQ1のベース電圧を制御することにより、出力電圧Voを安定した所定の電圧に設定することができる。一方、出力電流が増大すると電圧制御用トランジスタQ1のベース電流が増大し抵抗R7の端子間電圧が増大し、トランジスタQ3のエミッタ電圧が上昇し、トランジスタQ3の導通が制限されるため、定格電流を超える大電流が流れると電圧制御用トランジスタQ1は電流制限される。このとき過電流制限回路8のトランジスタQ7のエミッタには高い分圧電圧Veが供給されるため、トランジスタQ7は導通しない。さらにドライバ回路7の入力電圧が上昇し、出力電流が増大し過電流状態となるとトランジスタQ2のエミッタ電圧がさらに上昇する。これによりトランジスタQ3は電圧制御用トランジスタQ1にさらに電流を流すように制御するが、過電流制限回路8のトランジスタQ7のベース電圧が分圧電圧Veに設定されたエミッタ電圧を超え、さらに上昇するとトランジスタQ7のコレクタ、エミッタ間が導通しドライバ回路7の入力電圧を制限するため電圧制御用トランジスタQ1に流れる電流が制限され過電流から保護される。さらに出力電流が増大し負荷が短絡状態となると出力端子2と接地端子3の端子間電圧が低下する。この状態では差動増幅器5は基準電圧Vrと分圧電圧Veの差が大きいため、差動増幅器5は電圧制御用トランジスタQ1にさらに大きな電流を流させる大きな差電圧を出力し、ドライバ回路7のトランジスタQ2、Q3のベース電圧を順次上昇させ、電圧制御用トランジスタQ1のベースに大きな電流を流し、短絡状態の負荷に大電流を供給するように作動する。負荷が短絡状態となり出力端子電圧が低下するとトランジスタQ7のエミッタ電圧(分圧電圧Ve)が低下すると同時にベース電圧が上昇するため、コレクタ、エミッタ間が導通し、ドライバ回路7の入力と接地間を短絡する。そのため電圧制御用トランジスタQ1のベース電流Ibが制限され、出力電流(短絡電流)が制限される。
【0006】
このように各先行技術1、2に開示された直流安定化電源回路は負荷短絡状態を含む過電流から保護される。
【0007】
【発明が解決しようとする課題】
ところで図2,図4に示す回路は、電圧制御用トランジスタのベース電流の大きさを検出して過電流制限や短絡からの保護をしているが、電圧制御用トランジスタのhfeがばらつくと、同じ出力電流でもベース電流値が異なり、過電流制限や短絡保護の動作点が電圧制御用トランジスタのhfeにより左右されるという問題があった。
【0008】
そのため特に電圧制御用トランジスタのhfeを管理して製造する必要があり、hfeの値に応じて電圧制御用トランジスタのベースに接続される抵抗の値を調整する必要があるなど製造管理が煩雑であった。
【0009】
また過電流制限回路の過電流検出部が電圧制御用トランジスタのドライブ回路に組み込まれているため、ドライブ回路のトランジスタのばらつきも抑える必要があった。
【0010】
【課題を解決するための手段】
本発明は上記課題の解決を目的として提案されたもので、入力端子と出力端子間に電流検出用抵抗と電圧制御用トランジスタの主電流路とを直列的に接続し、出力端子と接地端子間に電圧検出用抵抗を接続し、電圧検出用抵抗によって分圧された電圧と基準電圧とを差動増幅器に入力して各電圧の差電圧を増幅し、この増幅された差電圧により前記電圧制御用トランジスタを導通制御して出力端子に安定化された直流電圧を出力するとともに、電流検出用抵抗の電圧降下を検出しこの検出電圧により差動増幅器の出力と電圧検出用分圧抵抗の間を導通制御して前記電圧制御用トランジスタに流れる電流を制限する過電流制限回路を備えたことを特徴とする直流安定化電源回路を提供する
【0011】
【発明の実施の形態】
本発明による直流安定化電源回路は、入力端子と電圧制御用トランジスタの間に挿入した電流検出用抵抗の電圧降下を検出し、この検出電圧により、基準電圧と出力端子電圧に比例した分圧電圧の電圧差を増幅する差動増幅器の出力と、電圧検出用抵抗の接続部との間を導通制御して前記電圧制御用トランジスタに流れる電流を制限する過電流制限回路を備えたことを特徴とするが、この過電流制限回路は、エミッタが電流検出用抵抗と電圧制御用トランジスタの間に接続され、ベース、コレクタ間が短絡され、コレクタが定電流源回路を介して接地された第1のトランジスタと、ベースが第1のトランジスタのベースと共通接続され、エミッタが入力端子に接続され、コレクタが抵抗を介して接地された第2のトランジスタとからなる電流ミラー回路と、ベースが第2のトランジスタのコレクタに接続され、コレクタが差動増幅器の出力に、エミッタが電圧検出用分圧抵抗の間にそれぞれ接続された第3のトランジスタを含む回路で構成することができる。
【0012】
【実施例】
以下に本発明の実施例を図1から説明する。図において、11は非安定化直流電圧(入力電圧)Viが供給される入力端子、12は安定化された出力電圧Voが出力される出力端子、13は接地端子、R11は電流検出用抵抗、Q11はPNP型の電圧制御用トランジスタ、R12、R13は直列接続されて中間の接続点で電圧が検出される電圧検出用抵抗(電圧検出用分圧抵抗)で、入力端子11と出力端子12間に、電流検出用抵抗R11と電圧制御用トランジスタQ11のエミッタからコレクタに通じる主電流路が直列的に接続され、出力端子12と接地端子13間に抵抗R12、R13が直列接続されている。14は基準電圧Vrを発生する基準電圧発生回路、15は電圧検出用抵抗R12、R13によって分圧された電圧Veと基準電圧発生回路4の基準電圧Vrとを入力し、その差電圧を増幅する差動増幅器、16は差動増幅器15の出力と電圧制御用トランジスタQ11のベース間に挿入され差動増幅器15の入力電圧である分圧電圧Veと基準電圧Vrの差電圧が一定になるように電圧制御用トランジスタQ11を導通制御し、出力端子2に安定化された出力電圧Voを出力する。17は電圧制御用トランジスタQ11を安全動作領域内で動作させるように制限する安全動作領域制限回路で、抵抗R14、逆方向配置された過電圧検出用ツェナーダイオードD1、抵抗R15、順方向配置された過電圧検出用ダイオードD2を電圧制御用トランジスタQ11のエミッタ、コレクタ間に直列接続することにより構成され、トランジスタQ11の両端にかかる過電圧をダイオードD1、D2で吸収し保護する。18は過電流制限回路で、一対のトランジスタ(第1、第2のトランジスタ)Q12、Q13の各ベースを共通接続し、一方のトランジスタQ12のベース、コレクタ間を直結し、そのエミッタを前記抵抗R14を介して電流検出用抵抗R11と電圧制御用トランジスタQ11の接続点に接続し、トランジスタQ12のコレクタを電流源19を介して接地し、他のトランジスタQ13のエミッタを抵抗R16を介して入力端子11に、コレクタを抵抗R17を介して接地して、電流ミラー回路を構成する第1、第2のトランジスタQ12、Q13の他のトランジスタQ13のコレクタにトランジスタ(第3のトランジスタ)Q14のベースを、このトランジスタQ14のコレクタを差動増幅器5の出力端子に接続し、エミッタを電圧検出用抵抗R12、R13の接続点に接続している。図示例では第1、第2のトランジスタQ12、Q13はPNP型、第3のトランジスタQ14はNPN型である。
【0013】
上記直流安定化電源回路の動作を説明する。入力端子11に入力電圧Viを供給すると基準電圧発生回路14の出力に基準電圧Vrを発生する。一方、出力端子12には、入力端子11の電圧から電圧制御用トランジスタQ11のエミッタ、コレクタ間電圧を差し引いた電圧が発生し、この電圧に応じて電圧検出用抵抗R12、R13の接続点に分圧電圧Veが発生する。基準電圧Vrと分圧電圧Veはそれぞれ差動増幅器15に入力され、各電圧Vr、Veの増幅された差電圧がドライブ回路16を介して電圧制御用トランジスタQ11のベースに接続される。そのため電圧制御用トランジスタQ11のエミッタ、コレクタ間電圧は前記電圧Vr、Veの差電圧に応じて変化し出力端子12の出力電圧を一定の電圧Voを出力し入力端子11に供給される入力電圧Viが変動しても出力端子12には安定化された出力電圧Voが出力される。
【0014】
次にこの直流安定化電源回路の保護回路の動作を説明する。入力端子11に供給された入力電圧Viに大振幅のリプルやラインノイズが重畳して電圧制御用トランジスタQ11の安全動作領域を超える過大な電圧が供給されてダイオードD1の逆方向電圧を超えると、抵抗R14、R15に電流が流れる。そのため電圧制御用トランジスタQ11のエミッタ、コレクタ間にかかる電圧は、ダイオードD1の逆方向電圧とダイオードD2の順方向電圧、各抵抗R14、R15の端子間電圧を加算した電圧に制限され電圧制御用トランジスタQ11は保護される。電流ミラー回路を構成する一対のトランジスタQ12、Q13は、トランジスタQ12に流れる電流が増減するとトランジスタQ13のコレクタ電流も増減する。トランジスタQ12のエミッタは抵抗R14を介して電流検出用抵抗R11と電圧制御用トランジスタQ11のエミッタの接続点に接続されているため、電流検出用抵抗R11に電流が流れると抵抗R11の端子間電圧は上昇し、トランジスタQ12のエミッタ電圧は低下する。その結果、トランジスタQ12のエミッタ電流は増大し、これによりトランジスタQ13のコレクタ電流も増大するため抵抗R17を介して接地されたコレクタ電圧は上昇する。即ち、電流検出用抵抗R11に流れる電流に対応してトランジスタQ13のコレクタ電圧は変動し抵抗R11に流れる電流が増大すればトランジスタQ13のコレクタ電圧は上昇する。このようにしてトランジスタQ13のコレクタ電圧が上昇するとトランジスタQ14のベース、エミッタ間電圧が上昇するため、電流検出用抵抗R11に流れる電流、即ち出力端子12から負荷に流れる出力電流が増大するとトランジスタQ14は非導通状態から導通状態に移行し、差動増幅器15の出力と接地間を導通し、差動増幅器15の出力を引き下げ、ドライブ回路16を通して電圧制御用トランジスタQ11のベース電圧を引き上げ、電圧制御用トランジスタQ11のエミッタ、コレクタ間電圧を上昇させ、出力電圧Voを引き下げるとともに電流を制限する。また出力端子12と接地端子13間に接続された負荷が短絡するなど出力端子12の電圧がほぼ接地電圧まで低下した場合、接続点の分圧電圧Veはほぼ接地電圧となり、差動増幅器15は基準電圧Vrとの差電圧を出力し出力端子12の電圧を引き上げるように電圧制御用トランジスタQ11を制御しようとするが、負荷短絡状態では電流検出用抵抗R11に大電流が流れ、これによりトランジスタQ12のエミッタ電圧が引き下げられるため、トランジスタQ13のコレクタ電流が増大し、トランジスタQ14を導通させ、差動増幅器15の出力を接地し、電圧制御用トランジスタQ11のベース電圧を引き上げ、電圧制御用トランジスタQ11のエミッタ、コレクタ間電圧を上昇させ、出力電圧Voを引き下げるとともに電流を制限する。
【0015】
このようにこの直流安定化電源回路は出力電流が出力端子2に負荷を接続していないほぼ0の状態から所定の電流までは出力電圧を一定に保ち、出力電流が所定電流を超えると電圧制御用トランジスタQ11のエミッタ、コレクタ電圧が上昇するとともに、コレクタ電流が制限されるため、出力電圧が低下するとともに出力電流が低下するいわゆるフの字特性を示し、負荷短絡状態を含む過電流から保護される。この直流安定化電源回路では、電圧制御用トランジスタQ11の動作を制限するトランジスタQ14は、電圧制御用トランジスタQ11やそのドライブ回路16から分離独立しており、トランジスタQ14のベースに供給される電圧は、電圧制御用トランジスタQ11のベース電流によって設定されるのではなく、電圧制御用トランジスタQ11に流れる主電流を電流検出用抵抗R11によって直接的に検出し電流ミラー回路によって増幅して供給されるため、トランジスタQ14のベースに供給される電圧は電圧制御用トランジスタQ11のhfeに影響されず、またエミッタには、電圧検出用抵抗の分圧電圧が供給されるため、過電流状態で出力端子12の電圧が低下した状態および負荷短絡状態で出力端子12の電圧が接地電圧に近接した状態では定格出力電流状態での分圧電圧に対して低い電圧に設定できるため、特に負荷短絡状態では先行技術1、2に比してトランジスタQ14のベース、エミッタ間電圧を大きくでき、小さな短絡電流でも確実に電圧制御用トランジスタQ11を導通制御でき、保護回路が動作状態での内部消費電力を低減でき、フの字特性を改善することができる。
【0016】
【発明の効果】
以上のように、本発明による直流安定化電源回路は、電圧制御用トランジスタのhfeのばらつきに影響されず、負荷短絡状態を含む過電流制限を確実にでき、短絡電流を抑え内部消費電力を低減したフの字特性の良好な直流安定化電源回路を実現できる。
【図面の簡単な説明】
【図1】本発明による直流安定化電源回路を示す回路図
【図2】過電流制限回路付き直流安定化電源回路の一例を示す回路図
【図3】図2に示す回路の出力電圧−出力電流特性図
【図4】過電流制限回路付き直流安定化電源回路の他の例を示す回路図
【符号の説明】
11 入力端子
12 出力端子
13 接地端子
14 基準電圧発生回路
15 差動増幅器
16 ドライブ回路
18 過電流制限回路
Q11 電圧制御用トランジスタ
Q14 トランジスタ
R11 電流検出用抵抗
R12、R13 電圧検出用分圧抵抗
Ve 分圧電圧
Vi 入力電圧
Vo 出力電圧
Vr 基準電圧
[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a stabilized DC power supply circuit, and more particularly to a stabilized DC power supply circuit having an overcurrent limiting circuit for protecting a voltage control transistor.
[0002]
[Prior art]
A circuit disclosed in Japanese Patent Application Laid-Open No. 2000-187515 (Prior Art 1) will be described with reference to FIG. 2 as an example of a DC stabilized power supply circuit. In the figure, 1 is an input terminal to which an unstabilized DC voltage (input voltage) Vi is supplied, 2 is an output terminal to which a stabilized output voltage Vo is output, 3 is a ground terminal, and Q1 is a PNP type voltage control. In the transistor for use (first transistor), a main current path from the emitter to the collector is connected in series between the input terminal 1 and the output terminal 2. R1 and R2 are voltage detection resistors (first and second resistors) connected in series between the output terminal 2 and the ground terminal 3, 4 is a reference voltage generation circuit for generating a reference voltage Vr, and 5 is a voltage detection resistor. A differential amplifier which receives the voltage Ve of the connection point 6 divided by R1 and R2 and the reference voltage Vr of the reference voltage generation circuit 4 and amplifies the difference voltage, and 7 controls the voltage by the output of the differential amplifier 5 A driver circuit for driving and controlling the transistor Q1. In the example shown in the figure, a third, fourth, and fifth resistors are connected in which the base is connected to the output of the differential amplifier 5, the collector is connected to the input terminal 1, and the emitter is connected in series. A second transistor Q2 grounded via R3, R4, R5, a fourth transistor Q2 having a base connected to the emitter of the second transistor Q2, a collector connected to the base of the voltage controlling transistor Q1, and an emitter diode-connected; The fourth through the transistor Q4, and is constituted by a third transistor Q3 connected respectively to the connection point of the fifth resistor R4, R5. Reference numeral 8 denotes an overcurrent limiting circuit. In the illustrated example, a base is connected to a connection point of the resistors R3 and R4 connected to the emitter of the second transistor Q2 of the driver circuit 7, and the first and second transistors have emitters for voltage detection. And a fifth transistor Q5 connected to a connection point 6 between the resistors R1 and R2, a base connected to the collector of the fifth transistor Q5, an emitter connected to the output of the differential amplifier 5, and a collector grounded. It is composed of a sixth transistor Q6. The second to fifth transistors Q2 to Q5 are of NPN type, and the sixth transistor Q6 is of PNP type. Description of other circuits attached to FIG. 2 is omitted.
[0003]
This DC stabilized power supply circuit amplifies the difference voltage between the reference voltage Vr and the divided voltage Ve appearing at the connection point 6 in proportion to the output voltage Vo of the output terminal 2 by the differential amplifier 5, and the transistor Q2 of the driver circuit 7, By amplifying the current by Q3 and controlling the base voltage of the voltage control transistor Q1, the output voltage Vo can be set to a stable predetermined voltage. On the other hand, when the output current increases, the base current Ib of the voltage control transistor Q1 increases, and the emitter voltage of the transistor Q3 increases. As a result, the base voltage of the transistor Q5 of the overcurrent limiting circuit 8 rises, and the collector and emitter of the transistor Q5 conduct. This lowers the collector voltage, and further lowers the base voltage of the PNP transistor Q6. It conducts and reduces the output of the differential amplifier 5. When the output voltage of the differential amplifier 5 decreases in this way, the base current of the voltage control transistor Q1 is limited through the transistors Q2 and Q3, and this DC stabilized power supply circuit is protected from overcurrent. Further, when the output voltage of the output terminal 2 decreases and a large current flows, for example, when the load is short-circuited, the divided voltage Ve approaches the ground voltage, and the voltage control transistor Q1 sets the output voltage of the differential amplifier 5 to a predetermined value. Attempts to operate to increase the voltage. As a result, the base current of the voltage control transistor Q1 increases, so that the emitter voltage of the transistor Q3 increases. As a result, the transistors Q5 and Q6 are turned on, which lowers the output voltage of the differential amplifier 5 and acts to limit the operation of the voltage control transistor Q1, but further reduces the voltage of the output terminal 2 to a predetermined voltage. Since the divided voltage Ve is reduced to a low voltage close to the ground voltage when the load is short-circuited, as compared with the time of the overcurrent state or the overcurrent state, the voltage between the base and the emitter of the transistor Q5 may be larger than that during the overcurrent limit. As a result, the resistance between the collector and the emitter of the transistor Q5 can be made lower than that at the time of limiting the overcurrent, the output of the differential amplifier 5 can be reduced reliably, and the operation of the voltage control transistor Q1 can be restricted reliably. As shown in FIG. 3, this DC stabilized power supply circuit maintains the rated output voltage V1 from the state where the output current is zero to the rated output current I1, and in the overcurrent state exceeding the rated output current I1, both the output voltage and the output current are slightly increased. The output voltage and the output current decrease when the load that greatly decreases and further exceeds the rated output current I1 is short-circuited, and when the load is short-circuited, the output voltage is close to zero and the output current is reduced to a fraction of the rated output current I1. In other words, the so-called “F” character characteristic is suppressed.
[0004]
FIG. 4 shows a circuit disclosed in Japanese Unexamined Patent Application Publication No. 2-170213 (prior art 2) as another example of a stabilized DC power supply circuit having a square-shaped characteristic. In the drawing, reference numerals 1, 2, and 3 denote input terminals, output terminals, and ground terminals, respectively, Q1 denotes a voltage control transistor, and R1 and R2 denote voltage detection resistors connected in series between the input terminal 1 and the output terminal 2. A main current path from the emitter to the collector of the voltage control transistor Q1 is connected in series, and voltage detection resistors R1 and R2 are connected in series between the output terminal 2 and the ground terminal 3. 4 is a reference voltage generating circuit, 5 is a differential amplifier which receives the reference voltage Vr of the reference voltage generating circuit 4 and the divided voltage Ve divided by the resistors R1 and R2, and outputs an amplified difference voltage. Is a driver circuit for driving and controlling the voltage control transistor Q1 by the output of the differential amplifier 5. In the illustrated example, the base is connected to the output of the differential amplifier 5, the collector is connected to the input terminal 1, and the emitter is connected to the resistor R6. A second transistor Q2 grounded through the third transistor Q2, a base connected to the emitter of the second transistor Q2, a collector connected to the base of the voltage controlling transistor Q1, and a third grounded emitter connected through the resistor R7. It is composed of transistors. Reference numeral 8 denotes an overcurrent limiting circuit. The base is at the emitter of the second transistor Q2 of the driver circuit 7, the collector is at the output of the differential amplifier 5, and the emitter is at the connection point 6 of the first and second resistors R1 and R2. It is composed of seventh transistors Q7 connected to each other. In this circuit, the transistor Q1 is of the PNP type, and the other transistors Q2, Q3, Q7 are of the NPN type. Reference numeral 9 denotes a constant current circuit connected between the input terminal 1 and the output of the differential amplifier 5.
[0005]
This DC stabilized power supply circuit amplifies the difference voltage between the reference voltage Vr and the divided voltage Ve proportional to the output voltage Vo of the output terminal 2 by the differential amplifier 5 and the current amplification by the transistors Q2 and Q3 as in the circuit of FIG. By controlling the base voltage of the voltage control transistor Q1, the output voltage Vo can be set to a stable predetermined voltage. On the other hand, when the output current increases, the base current of the voltage control transistor Q1 increases, the voltage between the terminals of the resistor R7 increases, the emitter voltage of the transistor Q3 increases, and the conduction of the transistor Q3 is limited. When a large current exceeding the value flows, the voltage control transistor Q1 is current-limited. At this time, since the high divided voltage Ve is supplied to the emitter of the transistor Q7 of the overcurrent limiting circuit 8, the transistor Q7 does not conduct. Further, when the input voltage of the driver circuit 7 increases, the output current increases, and an overcurrent state occurs, the emitter voltage of the transistor Q2 further increases. As a result, the transistor Q3 controls the current to flow further through the voltage controlling transistor Q1, but when the base voltage of the transistor Q7 of the overcurrent limiting circuit 8 exceeds the emitter voltage set to the divided voltage Ve and further rises, the transistor Q3 Since the collector and the emitter of Q7 conduct to limit the input voltage of the driver circuit 7, the current flowing through the voltage control transistor Q1 is limited and is protected from overcurrent. When the output current further increases and the load is short-circuited, the voltage between the output terminal 2 and the ground terminal 3 decreases. In this state, since the difference between the reference voltage Vr and the divided voltage Ve is large in the differential amplifier 5, the differential amplifier 5 outputs a large difference voltage that causes a larger current to flow through the voltage control transistor Q1. The base voltage of the transistors Q2 and Q3 is sequentially increased, a large current flows through the base of the voltage control transistor Q1, and a large current is supplied to the short-circuited load. When the load is short-circuited and the output terminal voltage drops, the emitter voltage (divided voltage Ve) of the transistor Q7 drops and the base voltage rises at the same time, so that the collector and the emitter conduct, so that the input between the driver circuit 7 and the ground is connected. Short circuit. Therefore, the base current Ib of the voltage control transistor Q1 is limited, and the output current (short-circuit current) is limited.
[0006]
Thus, the stabilized DC power supply circuits disclosed in the prior arts 1 and 2 are protected from overcurrent including a load short-circuit state.
[0007]
[Problems to be solved by the invention]
By the way, the circuits shown in FIGS. 2 and 4 detect the magnitude of the base current of the voltage control transistor to protect from overcurrent and short-circuit. However, if the hfe of the voltage control transistor varies, the same applies. The output current also has a different base current value, and there is a problem in that the operating point of overcurrent limitation and short-circuit protection is influenced by hfe of the voltage control transistor.
[0008]
Therefore, it is particularly necessary to control and manufacture the hfe of the voltage control transistor, and it is necessary to adjust the value of the resistor connected to the base of the voltage control transistor according to the value of hfe. Was.
[0009]
Further, since the overcurrent detection section of the overcurrent limiting circuit is incorporated in the drive circuit of the voltage control transistor, it is necessary to suppress variations in the transistors of the drive circuit.
[0010]
[Means for Solving the Problems]
The present invention has been proposed for the purpose of solving the above-mentioned problem, and a resistor for current detection and a main current path of a transistor for voltage control are connected in series between an input terminal and an output terminal, so that an output terminal and a ground terminal are connected. And a reference voltage and a voltage divided by the voltage detecting resistor are input to a differential amplifier to amplify a difference voltage between the voltages, and the amplified voltage difference is used to control the voltage. Controls the conduction of the output transistor and outputs a stabilized DC voltage to the output terminal, detects the voltage drop of the current detection resistor, and detects the voltage drop between the output of the differential amplifier and the voltage detection resistor. [0011] A DC stabilized power supply circuit is provided, comprising an overcurrent limiting circuit for controlling conduction and limiting a current flowing through the voltage control transistor.
BEST MODE FOR CARRYING OUT THE INVENTION
A DC stabilized power supply circuit according to the present invention detects a voltage drop of a current detection resistor inserted between an input terminal and a voltage control transistor, and detects a voltage drop in proportion to a reference voltage and an output terminal voltage by the detected voltage. And an overcurrent limiting circuit that controls conduction between the output of the differential amplifier that amplifies the voltage difference between the differential amplifier and the connection of the voltage detection resistor to limit the current flowing through the voltage control transistor. However, this overcurrent limiting circuit has a first circuit in which an emitter is connected between a current detecting resistor and a voltage controlling transistor, a base and a collector are short-circuited, and a collector is grounded via a constant current source circuit. A current consisting of a transistor and a second transistor whose base is commonly connected to the base of the first transistor, whose emitter is connected to the input terminal, and whose collector is grounded via a resistor And a circuit including a third transistor whose base is connected to the collector of the second transistor, the collector is connected to the output of the differential amplifier, and the emitter is connected between the voltage detecting voltage dividing resistors. be able to.
[0012]
【Example】
An embodiment of the present invention will be described below with reference to FIG. In the figure, 11 is an input terminal to which an unstabilized DC voltage (input voltage) Vi is supplied, 12 is an output terminal to which a stabilized output voltage Vo is output, 13 is a ground terminal, R11 is a current detecting resistor, Q11 is a PNP-type voltage controlling transistor, R12 and R13 are voltage detecting resistors (voltage detecting voltage dividing resistors) connected in series and detecting a voltage at an intermediate connection point, between the input terminal 11 and the output terminal 12. The current detection resistor R11 and the main current path from the emitter to the collector of the voltage control transistor Q11 are connected in series, and the resistors R12 and R13 are connected in series between the output terminal 12 and the ground terminal 13. Reference numeral 14 denotes a reference voltage generation circuit for generating a reference voltage Vr, and reference numeral 15 denotes a voltage Ve divided by the voltage detection resistors R12 and R13 and the reference voltage Vr of the reference voltage generation circuit 4, and amplifies a difference voltage therebetween. The differential amplifier 16 is inserted between the output of the differential amplifier 15 and the base of the voltage control transistor Q11 so that the differential voltage between the divided voltage Ve, which is the input voltage of the differential amplifier 15, and the reference voltage Vr is constant. The conduction control of the voltage control transistor Q11 is performed, and the stabilized output voltage Vo is output to the output terminal 2. Reference numeral 17 denotes a safe operation area limiting circuit for limiting the voltage control transistor Q11 so as to operate within the safe operation area, and includes a resistor R14, an overvoltage detecting zener diode D1 arranged in a reverse direction, a resistor R15, and a forward arranged overvoltage. The detection diode D2 is connected in series between the emitter and the collector of the voltage control transistor Q11. The overvoltage applied to both ends of the transistor Q11 is absorbed and protected by the diodes D1 and D2. An overcurrent limiting circuit 18 connects the bases of a pair of transistors (first and second transistors) Q12 and Q13 in common, directly connects the base and collector of one transistor Q12, and connects the emitter of the transistor R12 to the resistor R14. , The collector of the transistor Q12 is grounded via the current source 19, and the emitter of the other transistor Q13 is connected to the input terminal 11 via the resistor R16. The collector of the first and second transistors Q12 and Q13 constituting the current mirror circuit is connected to the collector of the other transistor Q13 by connecting the base of the transistor (third transistor) Q14 to the collector via the resistor R17. The collector of the transistor Q14 is connected to the output terminal of the differential amplifier 5, and the emitter is connected to a voltage detecting resistor. It is connected to the connection point of R12, R13. In the illustrated example, the first and second transistors Q12 and Q13 are of PNP type, and the third transistor Q14 is of NPN type.
[0013]
The operation of the stabilized DC power supply circuit will be described. When the input voltage Vi is supplied to the input terminal 11, a reference voltage Vr is generated at the output of the reference voltage generation circuit 14. On the other hand, a voltage, which is obtained by subtracting the voltage between the emitter and the collector of the voltage control transistor Q11 from the voltage of the input terminal 11, is generated at the output terminal 12, and is connected to the connection point of the voltage detection resistors R12 and R13 according to this voltage. A voltage Ve is generated. The reference voltage Vr and the divided voltage Ve are respectively input to the differential amplifier 15, and the amplified difference voltage between the voltages Vr and Ve is connected to the base of the voltage control transistor Q11 via the drive circuit 16. Therefore, the voltage between the emitter and the collector of the voltage control transistor Q11 changes according to the difference voltage between the voltages Vr and Ve, and the output voltage of the output terminal 12 outputs a constant voltage Vo and the input voltage Vi supplied to the input terminal 11 Is stabilized, the output terminal 12 outputs the stabilized output voltage Vo.
[0014]
Next, the operation of the protection circuit of the DC stabilized power supply circuit will be described. When a large amplitude ripple or line noise is superimposed on the input voltage Vi supplied to the input terminal 11 and an excessive voltage exceeding the safe operation area of the voltage control transistor Q11 is supplied and exceeds the reverse voltage of the diode D1, A current flows through the resistors R14 and R15. Therefore, the voltage applied between the emitter and the collector of the voltage control transistor Q11 is limited to a voltage obtained by adding the reverse voltage of the diode D1, the forward voltage of the diode D2, and the voltage between the terminals of the resistors R14 and R15. Q11 is protected. In the pair of transistors Q12 and Q13 forming the current mirror circuit, when the current flowing through the transistor Q12 increases or decreases, the collector current of the transistor Q13 also increases or decreases. Since the emitter of the transistor Q12 is connected to the connection point between the current detection resistor R11 and the emitter of the voltage control transistor Q11 via the resistor R14, when a current flows through the current detection resistor R11, the voltage between the terminals of the resistor R11 becomes As a result, the emitter voltage of the transistor Q12 decreases. As a result, the emitter current of the transistor Q12 increases, and the collector current of the transistor Q13 also increases, so that the collector voltage grounded via the resistor R17 increases. That is, the collector voltage of the transistor Q13 fluctuates according to the current flowing through the current detection resistor R11, and if the current flowing through the resistor R11 increases, the collector voltage of the transistor Q13 increases. When the collector voltage of the transistor Q13 rises in this manner, the voltage between the base and the emitter of the transistor Q14 rises. Therefore, when the current flowing through the current detecting resistor R11, that is, the output current flowing from the output terminal 12 to the load increases, the transistor Q14 becomes The state changes from the non-conducting state to the conducting state, the conduction between the output of the differential amplifier 15 and the ground is performed, the output of the differential amplifier 15 is reduced, the base voltage of the voltage control transistor Q11 is increased through the drive circuit 16, and the voltage control is performed. The voltage between the emitter and the collector of the transistor Q11 is increased, the output voltage Vo is reduced, and the current is limited. Further, when the voltage at the output terminal 12 drops to almost the ground voltage, such as when the load connected between the output terminal 12 and the ground terminal 13 is short-circuited, the divided voltage Ve at the connection point becomes almost the ground voltage, and the differential amplifier 15 An attempt is made to control the voltage control transistor Q11 so as to output a difference voltage from the reference voltage Vr and raise the voltage at the output terminal 12. However, when the load is short-circuited, a large current flows through the current detection resistor R11. , The collector current of the transistor Q13 increases, the transistor Q14 is turned on, the output of the differential amplifier 15 is grounded, the base voltage of the voltage control transistor Q11 is raised, and the voltage of the voltage control transistor Q11 is reduced. Raises the voltage between the emitter and collector, reduces the output voltage Vo and limits the current .
[0015]
As described above, this DC stabilized power supply circuit keeps the output voltage constant from the state where the output current is almost zero with no load connected to the output terminal 2 to a predetermined current, and controls the voltage when the output current exceeds the predetermined current. Since the emitter and collector voltages of the transistor Q11 rise and the collector current is limited, the output voltage decreases and the output current decreases, so that the output current decreases. You. In this DC stabilized power supply circuit, the transistor Q14 for restricting the operation of the voltage control transistor Q11 is independent of the voltage control transistor Q11 and its drive circuit 16, and the voltage supplied to the base of the transistor Q14 is Rather than being set by the base current of the voltage control transistor Q11, the main current flowing through the voltage control transistor Q11 is directly detected by the current detection resistor R11 and amplified and supplied by the current mirror circuit. The voltage supplied to the base of Q14 is not affected by the hfe of the voltage control transistor Q11, and the divided voltage of the voltage detection resistor is supplied to the emitter. The voltage of the output terminal 12 is close to the ground voltage in the reduced state and the load short-circuit state In this state, the voltage between the base and the emitter of the transistor Q14 can be increased as compared with the prior arts 1 and 2, especially when the load is short-circuited. The conduction of the voltage control transistor Q11 can be reliably controlled even with the current, the internal power consumption when the protection circuit is in operation can be reduced, and the fold-back characteristics can be improved.
[0016]
【The invention's effect】
As described above, the stabilized DC power supply circuit according to the present invention is not affected by the variation in hfe of the voltage control transistor, can reliably limit the overcurrent including the load short-circuit state, suppress the short-circuit current, and reduce the internal power consumption. Thus, a stabilized DC power supply circuit having good square-shaped characteristics can be realized.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing a stabilized DC power supply circuit according to the present invention. FIG. 2 is a circuit diagram showing an example of a stabilized DC power supply circuit with an overcurrent limiting circuit. FIG. 3 is an output voltage-output of the circuit shown in FIG. FIG. 4 is a circuit diagram showing another example of a stabilized DC power supply circuit with an overcurrent limiting circuit.
DESCRIPTION OF SYMBOLS 11 Input terminal 12 Output terminal 13 Ground terminal 14 Reference voltage generating circuit 15 Differential amplifier 16 Drive circuit 18 Overcurrent limiting circuit Q11 Voltage controlling transistor Q14 Transistor R11 Current detecting resistors R12, R13 Voltage detecting dividing resistor Ve Voltage division Voltage Vi Input voltage Vo Output voltage Vr Reference voltage

Claims (2)

入力端子と出力端子間に電流検出用抵抗と電圧制御用トランジスタの主電流路とを直列的に接続し、出力端子と接地端子間に電圧検出用抵抗を接続し、電圧検出用抵抗によって分圧された電圧と基準電圧とを差動増幅器に入力して各電圧の差電圧を増幅し、この増幅された差電圧により前記電圧制御用トランジスタを導通制御して出力端子に安定化された直流電圧を出力するとともに、電流検出用抵抗に流れる電流に基いて差動増幅器の出力と電圧検出用分圧抵抗の間を導通制御して前記電圧制御用トランジスタに流れる電流を制限する過電流制限回路を備えたことを特徴とする直流安定化電源回路。The current detection resistor and the main current path of the voltage control transistor are connected in series between the input terminal and the output terminal, the voltage detection resistor is connected between the output terminal and the ground terminal, and the voltage is divided by the voltage detection resistor. The amplified voltage and the reference voltage are input to a differential amplifier to amplify a difference voltage between the voltages, and the DC voltage stabilized at an output terminal by controlling conduction of the voltage control transistor by the amplified difference voltage. And an overcurrent limiting circuit that controls conduction between the output of the differential amplifier and the voltage dividing resistor for voltage detection based on the current flowing through the current detecting resistor to limit the current flowing to the voltage controlling transistor. A stabilized DC power supply circuit comprising: 過電流制限回路は、エミッタが電流検出用抵抗と電圧制御用トランジスタの間に接続され、ベース、コレクタ間が短絡され、コレクタが定電流源回路を介して接地された第1のトランジスタと、ベースが第1のトランジスタのベースと共通接続され、エミッタが入力端子に接続され、コレクタが抵抗を介して接地された第2のトランジスタとからなる電流ミラー回路と、ベースが第2のトランジスタのコレクタに接続され、コレクタが差動増幅器の出力に、エミッタが電圧検出用分圧抵抗の間にそれぞれ接続された第3のトランジスタを含むことを特徴とする請求項1に記載の直流安定化電源回路。The overcurrent limiting circuit includes a first transistor having an emitter connected between a current detecting resistor and a voltage controlling transistor, a short circuit between a base and a collector, a collector grounded via a constant current source circuit, and a base. Are commonly connected to the base of the first transistor, the current mirror circuit includes a second transistor having an emitter connected to the input terminal, and a collector grounded via a resistor, and a base connected to the collector of the second transistor. 2. The stabilized DC power supply circuit according to claim 1, further comprising a third transistor connected to the output of the differential amplifier and connected to the output terminal of the differential amplifier.
JP2002219366A 2002-07-29 2002-07-29 DC stabilized power supply circuit Expired - Fee Related JP3860089B2 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103135646A (en) * 2013-01-23 2013-06-05 苏州硅智源微电子有限公司 Low voltage current limiting circuit
CN104319992A (en) * 2014-09-22 2015-01-28 矽力杰半导体技术(杭州)有限公司 Differential circuit and integrated circuit using same

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102018126913A1 (en) * 2018-10-29 2020-04-30 Knorr-Bremse Systeme für Nutzfahrzeuge GmbH Surge protection circuit for a control device for a vehicle, control device for a vehicle and method for testing an overvoltage protection circuit for a control device for a vehicle

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103135646A (en) * 2013-01-23 2013-06-05 苏州硅智源微电子有限公司 Low voltage current limiting circuit
CN104319992A (en) * 2014-09-22 2015-01-28 矽力杰半导体技术(杭州)有限公司 Differential circuit and integrated circuit using same
CN104319992B (en) * 2014-09-22 2017-06-16 矽力杰半导体技术(杭州)有限公司 Differential circuit and apply its integrated circuit

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