JP2004026624A - Method of manufacturing substrate for semiconductor device, substrate for semiconductor device and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a substrate for semiconductor device having low defect density over a wide area. <P>SOLUTION: A 1st GaN layer 5 having a plurality of pits 5b corresponding to a growth suppression mask 4a is formed by forming an SiO<SB>2</SB>film 4 on a base substrate 1, forming a plurality of the growth suppression masks 4a each composed of a dot like (circular) SiO<SB>2</SB>having ≤2.5 μm maximum width to disperse on the base substrate 1 and growing the GaN layer from a non-mask forming part where the growth suppression mask 4a is not formed. After that, the SiO<SB>2</SB>growth suppression mask 4a is removed and a 2nd GaN layer 6 is grown on the 1st GaN layer 5 until the surface becomes flat. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor element substrate, a method for manufacturing the same, and a semiconductor element using the substrate.
[0002]
[Prior art]
As a 410 nm band short wavelength semiconductor laser element, Jpn. J. et al. Appl. Phys. Vol. 37 (1998) pp. In L1020, after forming a GaN layer on a sapphire substrate, SiO formed on the GaN layer ₂ Is a stripe pattern mask, and this SiO 2 ₂ After forming a GaN thick film by selective lateral growth from the growth nucleus generated in the striped portion of the GaN layer exposed from the mask, the GaN thick film is peeled off to form a substrate, and an n-GaN buffer layer on the GaN substrate, n-InGaN crack prevention layer, n-AlGaN / GaN modulation doped superlattice cladding layer, n-GaN optical waveguide layer, n-InGaN / InGaN multiple quantum well active layer, p-AlGaN carrier block layer, p-GaN optical waveguide layer , A p-AlGaN / GaN modulation-doped superlattice cladding layer and a p-GaN contact layer have been reported. However, in this semiconductor laser, only a transverse fundamental mode oscillation of about 30 mW and reliability up to about 30 mW are obtained, and reliability at high output is not obtained.
[0003]
[Problems to be solved by the invention]
The conventional selective lateral growth substrate (ELOG substrate) as described above is SiO. ₂ The GaN layer is formed by selective lateral growth from the growth nucleus generated in the striped portion of the GaN layer exposed from the mask. At this time, defects are reduced in the region where the GaN layer is selectively laterally grown.
[0004]
However, in this conventional method, since the growth nucleus formation density is high and the growth nuclei are crosslinked in a small state, defects are generated in the crosslinked portion. In order to use it as a substrate, it is necessary to form a GaN layer having a certain thickness, and even if the defect density at the bridge portion is small, the defect density increases as the film thickness is increased. Therefore, it has been difficult to form a low defect area over a wide range.
That is, in the conventional ELOG substrate, the low defect area is limited to a narrow area. However, in order to obtain a highly reliable semiconductor laser, it is necessary that the portion on the substrate where the waveguide is formed is a low defect region. Therefore, the conventional ELOG substrate in which the low defect region is limited to a narrow region is effective for a semiconductor laser having a narrow stripe structure as shown in the above-mentioned document, but has a wide stripe structure. The reliability of the semiconductor laser cannot be obtained.
[0005]
In order to obtain a highly reliable semiconductor laser capable of high-power oscillation, it is necessary to have a wide stripe structure. To obtain high reliability in a wide stripe semiconductor laser, GaN with few defects over a wide range. It is necessary to configure using a substrate. In other words, it has been difficult to obtain a semiconductor laser having high output and high reliability with the conventional ELOG substrate.
[0006]
In the above description, the semiconductor laser has been described as an example. However, the reliability of a semiconductor element including a semiconductor layer on a semiconductor element substrate generally depends on the defect density of the substrate. Therefore, it is required over the entire semiconductor device to obtain a substrate with few defects over a wide range.
[0007]
In view of the above circumstances, the present invention provides a semiconductor element substrate having a low defect density over a wide range, a manufacturing method thereof, and a highly reliable semiconductor element using the semiconductor element substrate manufactured by the method. It is for the purpose.
[0008]
[Means for Solving the Problems]
The method for manufacturing a substrate for a semiconductor element of the present invention includes a first step of discretely forming a plurality of growth suppression masks having a maximum width of 2.5 μm or less on a base substrate,
A second step of forming a first GaN layer having a plurality of holes by growing a GaN layer from a non-mask forming portion on which the growth suppression mask is not formed on the base substrate;
And a third step of forming a second GaN layer on the first GaN layer.
[0009]
Note that a step of removing the growth suppression mask may be included after the second step and before the third step.
[0010]
The manufacturing method further includes a fourth step of forming a plurality of new growth suppression masks having a maximum width of 2.5 μm or less on the second GaN layer, and the new growth on the second GaN layer. A fifth step of growing a GaN layer from a non-mask forming portion where no suppression mask is formed to form a third GaN layer having a plurality of holes, and a fourth step on the third GaN layer. And a sixth step of forming the GaN layer. In addition, in including the fourth process to the sixth process, the fourth process to the sixth process may be included once or a plurality of times. Here, including a plurality of times means forming a layer having a plurality of new holes on the upper surface of the GaN layer grown on the GaN layer having the previously formed holes, and further including the new holes. A process for crystal growth of a new GaN layer on a GaN layer is repeated a plurality of times to form a semiconductor device substrate.
[0011]
Further, it may include a step of removing the new growth suppression mask after the fifth step and before the sixth step.
[0012]
In the above manufacturing method, it is desirable that an interval between the growth suppression masks is 2.5 μm or less. Note that the distance between the masks means, for example, the shortest distance from the masks formed closest to each other among the masks formed around the mask when attention is paid to one mask. .
[0013]
The ratio of the area occupied by the mask on the upper surface of the layer on which the growth suppression mask is formed is preferably 40% or more and 90% or less.
[0014]
Furthermore, the growth suppression mask is preferably made of a dielectric material. As a dielectric material, SiO ₂ , Al ₂ O ₃ , SiN and the like.
[0015]
Note that a step of forming a conductive GaN layer doped with a conductive impurity in the uppermost layer may be included.
[0016]
As the base substrate, the surface of the base substrate on which the growth suppression mask is formed is GaN, sapphire, SiC, ZnO, LiGaO. ₂ LiAlO ₂ , ZrB ₂ , GaAs, GaP, Ge, or Si is desirable. For example, the base substrate itself is GaN, sapphire, SiC, ZnO, LiGaO. ₂ LiAlO ₂ , ZrB ₂ , GaAs, GaP, Ge, or Si, or GaN, sapphire, SiC, ZnO, LiGaO ₂ LiAlO ₂ , ZrB ₂ , GaAs, GaP, Ge, or Si, and a GaN layer formed on the base substrate main part.
[0017]
The method for manufacturing a semiconductor element substrate of the present invention may further include a step of removing the base substrate. Here, not only the base substrate but also the case of removing any layer other than the uppermost layer from the base substrate side is included. For example, a conductive GaN layer may be formed as the uppermost layer, and then the base substrate to the GaN layer below the conductive GaN layer may be removed, and the conductive GaN layer may be used as a semiconductor element substrate.
[0018]
The semiconductor element of the present invention is characterized by comprising a semiconductor layer on the semiconductor element substrate manufactured by the above-described method for manufacturing a semiconductor element substrate of the present invention. The semiconductor element substrate of the present invention here includes a semiconductor element substrate manufactured by removing any layer other than the uppermost layer from the base substrate side.
[0019]
The substrate for a semiconductor device of the present invention has a plurality of holes grown from a non-mask forming portion other than a base substrate and a plurality of growth suppression masks having a maximum width of 2.5 μm or less formed discretely on the base substrate. And a second GaN layer formed on the first GaN layer.
[0020]
In addition, the substrate for a semiconductor device of the present invention is further grown from a non-mask formation portion other than a plurality of new growth suppression masks having a maximum width of 2.5 μm or less formed discretely on the second GaN layer. A third GaN layer having a plurality of holes and a fourth GaN layer formed on the third GaN layer may be provided.
[0021]
In the semiconductor element substrate of the present invention, the growth suppression mask formed on the base substrate and the growth suppression mask formed on the second GaN layer may remain or may be removed.
[0022]
In the semiconductor element substrate of the present invention, it is desirable that the distance between the growth suppression masks is 2.5 μm or less.
[0023]
The ratio of the area occupied by the mask on the upper surface of the layer on which the growth suppression mask is formed is preferably 40% or more and 90% or less.
[0024]
【The invention's effect】
According to the method for manufacturing a substrate for a semiconductor device of the present invention, a plurality of growth suppression masks having a maximum width of 2.5 μm or less are discretely formed on a base substrate, and a plurality of holes are formed by growing from portions other than the mask. Since the first GaN layer is formed and the second GaN layer is formed by crystal growth on the layer having the plurality of holes, the growth nucleation density can be reduced as compared with the conventional method. As a result, a GaN layer having a low defect density region over a wide range can be formed.
[0025]
Further, a plurality of new growth suppression masks are formed on the uppermost GaN layer, a GaN layer having a plurality of holes corresponding to the mask is formed, and then a new GaN layer having the holes is newly formed. By repeating the process of crystal growth of the GaN layer one or more times, a GaN layer having a lower defect can be obtained.
[0026]
In addition, since the layer having a plurality of holes is formed by discretely forming a plurality of growth suppression masks having a maximum width of 2.5 μm or less on the base substrate and growing from a portion other than the mask, for example, A GaN layer having a hole can be easily formed as compared with a method in which a GaN layer without a hole is formed once and then a hole is formed by etching or the like.
[0027]
By setting the ratio of the area occupied by the growth suppression mask in the layer formed with the mask to 40% or more and 90% or less, the holes of the GaN layer having a plurality of holes corresponding to the mask also have the same hole diameter and Since the growth nucleus density can be effectively reduced by growing the GaN layer on the GaN layer having such a hole, a GaN layer having a low defect density can be formed. Can be obtained.
[0028]
Further, if a conductive GaN layer is formed as the uppermost layer, a conductive semiconductor element substrate having a low defect density can be manufactured.
[0029]
Moreover, since the semiconductor element of this invention is equipped with the semiconductor layer on the board | substrate for semiconductor elements of this invention with few defects, it can acquire high reliability.
[0030]
The substrate for a semiconductor element of the present invention has a plurality of holes grown from a portion other than the mask using a plurality of growth suppression masks having a maximum width of 2.5 μm or less formed discretely on the base substrate. A GaN layer comprising a first GaN layer and a second GaN layer crystal-grown on the first GaN layer, and formed by crystal growth on a GaN layer having a plurality of holes Has a low-defect region over a wide range and can be highly reliable as a substrate.
[0031]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[0032]
The substrate for a semiconductor device according to the first embodiment of the present invention includes a first GaN layer 5 having a plurality of holes 5b on the base substrate 1 and the first GaN layer 5 as shown in FIG. A second GaN layer 6 formed by crystal growth thereon is laminated.
[0033]
First, as shown in FIG. 1A, this substrate for a semiconductor element is formed on a base substrate 1 with an SiO 2 layer thereon. ₂ A film 4 is formed, and then, as shown in FIG. ₂ Non-mask formation in which the dot-shaped growth suppression mask 4a is not formed on the base substrate 1 as shown in FIG. 1C. A first GaN layer 5 having a plurality of holes 5b corresponding to the growth suppression mask 4a is formed by growing a GaN layer from the portion, and then SiO 2 ₂ The growth suppression mask 4a is removed, and as shown in FIG. 1D, the second GaN layer 6 is grown on the first GaN layer 5 until the surface is flattened.
[0034]
Here, the growth suppression mask 4a has a maximum width (maximum diameter of the mask 4a on the upper surface of the base substrate 1) of 2.5 μm or less, and a ratio of the area occupied by the mask on the upper surface of the base substrate 1 is 40% or more, 90 % Or less is desirable. A GaN layer is grown so that holes formed using this mask have the same diameter and occupied area as the mask. Moreover, it is preferable that the film thickness of the GaN layer having the hole is equal to or larger than the mask diameter.
[0035]
By using the growth suppression mask 4a, the first GaN layer 5 having a plurality of holes 5b can be easily obtained, and the second GaN layer 6 is formed on the first GaN layer 6 by selective lateral growth. In comparison, the growth nucleation density can be reduced. Further, by reducing the growth nucleation density, defects due to strain caused by lattice mismatch with the substrate can be reduced.
[0036]
When the second GaN layer 6 is grown by selective lateral growth on the first GaN layer 5 having the hole 5b, the upper surface of the first GaN layer 5 and the portion of the GaN layer that becomes the inner surface of the hole 5b are used. It is thought that the nucleus of growth will occur. By setting the diameter and depth of the hole in a predetermined relationship, for example, the maximum width of the mask 4a is set to 1 μm or less, and by appropriately setting the depth of the hole according to this, the growth from the hole 5b can be made. The lateral growth from the growth nuclei generated on the upper surface of the first GaN layer 5 can speed up the closing of the upper part of the hole, and a part of the space can be formed in the lower part of the hole 5b. By having such a space, it is possible to effectively reduce defects due to distortion caused by a difference in thermal expansion coefficient from the substrate.
[0037]
FIG. 2 shows a semiconductor element substrate according to the second embodiment of the present invention. In the semiconductor element substrate of the second embodiment, as shown in FIG. 2A, a mask 4a is formed on the base substrate 1 on the upper surface of the second GaN layer 6 formed in the first embodiment. A plurality of new growth suppression masks 7a are formed by the same method as that formed, and a third GaN layer having a plurality of holes using the growth suppression masks 7a as shown in FIG. 8 and a fourth GaN layer 9 is formed on the third GaN layer 8 by selective lateral growth as shown in FIG. Thus, by repeating the formation of a GaN layer having a plurality of holes and the formation of a new GaN layer by selective lateral growth on the GaN layer having the holes, a GaN layer with further reduced defects can be obtained. it can. This process may be repeated three or more times.
[0038]
In this embodiment, SiO is used as a growth suppression mask. ₂ However, any material can be used as long as it can maintain the function as a mask material that suppresses the growth of the GaN layer. ₂ Not only alumina (Al ₂ O ₃ ) Or a dielectric such as silicon nitride (SiN) may be used.
[0039]
FIG. 3 is a view of the semiconductor laminated surface as viewed from above, and shows a typical layout when a growth suppression mask is formed. As shown in FIG. 3A, the growth suppression mask is aligned so that the mask width Ax and the mask interval Bx, and the mask width Ay and the mask interval By are equal (4 times symmetrical). Alternatively, as shown in FIG. 3B, the masks may be arranged in an equilateral triangle shape (so as to be 6-fold symmetric). Moreover, as shown in FIG.3 (c), you may arrange in disorder. However, in any case, it is desirable that the distance between the nearest neighbor masks (Za, Zb, Zc in each figure) is 2.5 μm or less. In FIG. 3 (c), since the masks are arranged randomly, the distance from the nearest neighbor mask differs for each mask, but the distance from the nearest neighbor mask is 2.5 μm or less for each mask. It is desirable to do so.
[0040]
In the above embodiment, the mask shape is circular. However, the mask shape is not limited to a circle, and a polygon or any other shape can be adopted.
[0041]
As the base substrate 1, at least the surface on which the growth suppression mask is formed is GaN, sapphire, SiC, ZnO, LiGaO. ₂ LiAlO ₂ , ZrB ₂ , GaAs, GaP, Ge, Si are used. Specifically, the base substrate 1 itself is GaN, sapphire, SiC, ZnO, LiGaO. ₂ LiAlO ₂ , ZrB ₂ , GaAs, GaP, Ge, or Si, or GaN, sapphire, SiC, ZnO, LiGaO. ₂ LiAlO ₂ , ZrB ₂ , GaAs, GaP, Ge, or Si, and a main part of the base substrate, and a GaN layer formed on the main part of the base substrate.
[0042]
As shown in FIG. 1 (d) or FIG. 2 (c), the uppermost GaN layer may be included from the base substrate 1 to form a semiconductor element substrate, or the base substrate 1 is removed as shown in FIG. Thus, a semiconductor element substrate can be obtained.
[0043]
Further, in the above-described embodiment, the case where the growth of GaN is undoped has been described. However, by introducing conductive impurities during the growth of GaN, an n-type or p-type GaN layer is grown, and after the growth of the conductive GaN layer, As shown in FIG. 4, the base substrate 1 can be removed to form a conductive semiconductor element substrate.
[0044]
Further, as shown in FIG. 5A, an n-type or p-type GaN layer 9 ′ into which conductive impurities are introduced on the uppermost GaN layer 9 of the semiconductor substrate shown in FIG. As shown in FIG. 5B, the conductive GaN layer 9 ′ may be used as a conductive semiconductor element substrate by removing the base substrate 1 to the GaN layer 9 and growing it to a thickness of about 200 μm.
[0045]
In any case, since the defect density of the uppermost GaN layer is reduced, the reliability of the semiconductor element formed by laminating the semiconductor layer on the GaN layer is improved.
[0046]
Note that when a semiconductor element such as a semiconductor laser is formed by stacking a semiconductor layer such as an active layer over a conductive substrate, an electrode can be formed on the back surface of the substrate, which can simplify the element manufacturing process. it can.
[0047]
The substrate for a semiconductor device according to the present invention has a low defect density, and thus has a high reliability and a high-speed information / image processing and a substrate for manufacturing optical / electronic devices required in the fields of communication, measurement, medical care and printing. It can be applied as Examples of the semiconductor element or the optical / electronic device herein include a field effect transistor, a semiconductor laser element, a semiconductor optical amplifier, a semiconductor light emitting element, and a photodetector.
[0048]
Hereinafter, the manufacturing method of the substrate for a semiconductor device according to the embodiment of the present invention will be described more specifically with reference to examples.
[0049]
In the following, trimethylgallium (TMG), trimethylaluminum (TMA), trimethylindium (TMI) and ammonia are used as growth materials, silane gas is used as n-type dopant gas, and cyclopentadienylmagnesium (Cp) is used as p-type dopant. ₂ Mg) was used.
[0050]
(Example 1)
First, as shown in FIG. 1A, SiH is formed on a (0001) plane sapphire substrate 1 which is a base substrate. ₄ Gas and N ₂ SiO having a thickness of about 0.5 μm by plasma CVD using O gas ₂ A film 4 was formed.
[0051]
Then SiO ₂ A resist pattern (not shown) in which dots having a diameter of 2.5 μm or less are formed on the film 4 by a photolithography method at a pitch equivalent to the dot diameter, and CHF is used to form a CHF. ₃ / O ₂ SiO by RIE dry etching method using gas ₂ The film 4 was etched. Then remove the resist ₂ It was removed by plasma ashing. In this way, a plurality of dot-like SiO as shown in FIG. ₂ A pattern in which the growth suppression masks 4a are discretely arranged is formed. At this time, SiO on the sapphire substrate 1 ₂ The occupied area of the growth suppression mask 4a was set to be 40% or more and 90% or less of the total area of the upper surface of the substrate 1.
[0052]
Next, a GaN buffer layer (not shown) of 20 nm is formed at a temperature of 500 ° C., and subsequently, the temperature is set to 1050 ° C., and the first GaN layer 5 is grown on the GaN buffer layer from the non-mask forming portion by about 3 μm. It was. The first GaN layer 5 is grown from the sapphire substrate 1 of the non-mask forming part, and the SiO 2 ₂ Since it does not grow on the growth suppression mask 4a, it becomes a layer having a plurality of holes 5b as shown in FIG. Since the first GaN layer 5 grew slightly laterally from the non-mask forming portion and was also formed on the edge of the mask 4a, the diameter of the hole 5b was slightly smaller than the diameter of the mask 4a. At this time, the film thickness of the first GaN layer 5 having the holes 5b is desirably equal to or larger than the diameter of the holes 5b.
[0053]
Then, SiO with buffered hydrofluoric acid ₂ After removing the growth suppressing mask 4a by etching, the temperature is set to 1080 ° C., and the second GaN layer is formed again by the MOCVD method as shown in FIG. 6 was crystal-grown. Thus, the second GaN layer 6 having a low defect density was formed.
[0054]
As a result of performing the etch pit density evaluation performed by immersing the substrate in the semiconductor element so as to be immersed in an etching solution, as compared with the substrate for a semiconductor element manufactured by a conventional manufacturing method, The defect density was reduced by 2 to 4 digits.
[0055]
Next, an embodiment of a method for manufacturing a substrate for a semiconductor element formed using a base substrate 1 which is composed of a base substrate main portion and a GaN layer formed on the base substrate main portion will be described. To do.
[0056]
(Example 2)
First, as shown in FIG. 6A, a GaN buffer layer 1B having a thickness of about 20 nm is formed on a (0001) plane sapphire 1A, which is a main part of a base substrate, by a metal organic chemical vapor deposition method at a temperature of 500 ° C. Subsequently, the base substrate 1 was formed by growing the GaN layer 1C by about 2 μm at a temperature of 1050 ° C.
[0057]
On the base substrate 1, SiH ₄ Gas and N ₂ SiO having a thickness of about 0.5 μm by plasma CVD using O gas ₂ A film 4 was formed.
[0058]
Then SiO ₂ A resist pattern (not shown) for forming dots having a diameter of 2.5 μm or less at a pitch equivalent to the dot diameter is formed on the film 4 by photolithography, and CHF is used to form CHF. ₃ / O ₂ SiO by RIE dry etching method using gas ₂ The film was etched. Then remove the resist ₂ It was removed by plasma ashing. In this way, SiO as shown in FIG. ₂ A pattern in which a plurality of dots are discretely arranged is formed. At this time, the occupied area of dots on the GaN layer 1C was set to be 40% or more and 90% or less of the total area of the upper surface of the GaN layer 1C.
[0059]
Next, again, the temperature was set to 1050 ° C., and the dot-like SiO 2 ₂ As a growth suppression mask 4a, a GaN layer was grown on the GaN layer 1C from the non-mask forming portion. The GaN layer grows from the GaN layer 1C of the non-mask forming part, and the SiO ₂ Since it does not grow on the growth suppression mask 4a, the first GaN layer 5 having a plurality of holes 5b as shown in FIG. 6C is obtained. Since the first GaN layer 5 grew slightly laterally from the non-mask forming portion and was also formed on the edge of the mask 4a, the diameter of the hole 5b was slightly smaller than the diameter of the mask 4a.
[0060]
Then, SiO with buffered hydrofluoric acid ₂ After removing the growth suppressing mask 4a by etching, the temperature is set again to 1050 ° C., and the second GaN layer 6 is crystallized until the surface is flattened by the lateral growth as shown in FIG. 6D. Grown up. Thus, the second GaN layer 6 having a low defect density was formed.
[0061]
Further, according to the same procedure as in FIG. 6B to FIG. 6D described above, as shown in FIG. ₂ A growth suppression mask 7a is formed, and a third GaN layer 8 having a plurality of holes 8b is grown as shown in FIG. 2 (b). Further, as shown in FIG. 2 (c), the plurality of holes 8b are grown. By growing the fourth GaN layer 9 on the third GaN layer 8 having the surface until the surface is flattened, a substrate for a semiconductor device with a further reduced defect density could be obtained.
[0062]
About the semiconductor element substrate thus formed, as a result of performing etch pit density evaluation performed by immersing in an etching solution, as compared with a semiconductor element substrate manufactured by a conventional manufacturing method, The defect density was reduced by 2 to 6 digits.
[0063]
In Examples 1 and 2, SiO 2 ₂ The substrate in which the growth suppression masks 4a and 7a are buried by growing the upper GaN layer as it is without removing the growth suppression masks 4a and 7a. It is good.
[0064]
Next, an embodiment of a method for manufacturing a substrate for a semiconductor element, in which the step of removing the growth suppression mask is omitted, will be described.
[0065]
(Example 3)
First, a substrate in which a buffer layer 1B and a GaN layer 1C were stacked on the SiC base main part 1A by MOCVD was prepared, and used as the base substrate 1 (FIG. 6A).
[0066]
SiH on the base substrate 1 (that is, on the GaN layer 1C) ₄ Gas and N ₂ SiO having a thickness of about 0.5 μm by plasma CVD using O gas ₂ A film 4 was formed.
[0067]
Then SiO ₂ A resist pattern (not shown) in which dots having a diameter of 2.5 μm or less are formed on the film 4 by a photolithography method at a pitch equivalent to the dot diameter, and CHF is used to form a CHF. ₃ / O ₂ SiO by RIE dry etching method using gas ₂ The film 4 was etched. Then remove the resist ₂ It was removed by plasma ashing. In this way, a plurality of dot-like SiO ₂ A pattern in which the growth suppression masks 4a are discretely arranged is formed (FIG. 6B). At this time, SiO on the base substrate ₂ The occupied area of the growth suppression mask 4a was set to be 40% or more and 90% or less of the total area of the upper surface of the substrate 1.
[0068]
Next, the temperature was set to 1050 ° C., and the first GaN layer 5 was grown on the substrate from the non-mask forming portion by about 3 μm. The first GaN layer 5 is grown from the non-mask-forming portion of the base substrate 1, and SiO 2 ₂ Since it does not grow on the growth suppression mask 4a, a layer having a plurality of holes 5b is formed (FIG. 6C).
[0069]
Thereafter, the temperature was set to 1080 ° C., and the second GaN layer 6 was crystal-grown by the MOCVD method again as shown in FIG. 7A until the surface was flattened by the lateral growth. Thus, the second GaN layer 6 having a low defect density was formed.
[0070]
Further, by the same procedure, the dot pattern-like SiO ₂ A growth suppression mask 7a is formed, a third GaN layer 8 having a plurality of holes 8b is grown, and a fourth GaN layer 9 is flat on the third GaN layer 8 having the plurality of holes 8b. By growing the crystal until it was formed, a substrate for a semiconductor element with a reduced defect density as shown in FIG. 7B could be obtained.
[0071]
About the semiconductor element substrate thus formed, as a result of performing etch pit density evaluation performed by immersing in an etching solution, as compared with a semiconductor element substrate manufactured by a conventional manufacturing method, The defect density was reduced by about 4 to 6 digits.
[0072]
Next, an example of a semiconductor laser element which is an example of a semiconductor element provided with the semiconductor element substrate of the above example will be described.
[0073]
Example 4
As shown in FIG. 8, the n-GaN contact layer 10 and the n-Ga on the GaN layer 9 of the semiconductor element substrate formed by the method of Example 2. _1-z1 Al _z1 N (2.5 nm) / GaN (2.5 nm) superlattice cladding layer 11, n-Ga _1-z2 Al _z2 N optical waveguide layer 12, In _x2 Ga _1-x2 N (Si doped) / In _x1 Ga _1-x1 N multiple quantum well active layer 13 (0.5>x1> x2 ≧ 0), p-Ga _1-z3 Al _z3 N carrier blocking layer 14, p-Ga _1-z2 Al _z2 N optical waveguide layer 15, p-Ga _1-z1 Al _z1 An N (2.5 nm) / GaN (2.5 nm) superlattice cladding layer 16 and a p-GaN contact layer 17 were stacked. Here, the composition ratio of the GaAlN semiconductor layer was 1 ≧ z1>z3> z2 ≧ 0.
[0074]
Subsequently, SiO ₂ A film (not shown) and a resist (not shown) are formed, and the resist in a stripe region having a width of about 30 μm and SiO 2 are formed by ordinary lithography. ₂ In order to leave the film, SiO other than this region ₂ Remove the film and resist. Etching was performed halfway through the p-type superlattice cladding layer 16 by selective etching using RIE (reactive ion etching apparatus). The remaining thickness of the p-type superlattice cladding layer 16 in this etching was set to a thickness that can achieve refractive index guiding. Then resist and SiO ₂ The membrane was removed.
[0075]
Next, again SiO ₂ A film (not shown) and a resist (not shown) are formed, and SiO other than the stripe region and the region including the region 20 μm outside from each end of the stripe region is formed. ₂ The film and the resist were removed, and etching was performed by RIE until the n-GaN contact layer 10 was exposed. Thereafter, using an ordinary lithography technique, an n-side electrode 18 made of Ti / Al is formed on the surface of the n-GaN contact layer 10, and a p-side electrode made of Ni / Au in the form of stripes on the surface of the p-GaN contact layer 17. 19 was formed. Thereafter, the substrate was polished and the sample was cleaved, and one of the resonator surfaces formed was coated with a high reflectance coating and the other with a low reflectance coating, and then formed into a chip to complete a semiconductor laser device.
[0076]
Since this semiconductor laser element has a wide stripe structure formed on the low-defect GaN layer 9, high reliability can be obtained even under high output.
[0077]
In the semiconductor laser device having the above configuration, the oscillation wavelength λ can be controlled in the range of 380 ≦ λ ≦ 550 (nm) by controlling the composition of the active layer.
[0078]
As the semiconductor laser device of this embodiment, a refractive index waveguide type semiconductor laser having a wide stripe ridge structure with a stripe width of 30 μm has been described. However, a laser having a current confinement structure or a ridge structure embedded therein is used for refractive index waveguide. A semiconductor laser with a built-in mechanism may be used. Further, the substrate for a semiconductor device of the present invention can be applied to the production of a semiconductor laser device that oscillates in a fundamental transverse mode with a stripe width of about 1 to 2 μm.
[0079]
Further, a semiconductor laser element in which the conductivity of each semiconductor layer in the above embodiment is reversed (n-type and p-type are interchanged) may be formed.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a manufacturing process of a substrate for a semiconductor device according to a first embodiment of the invention.
FIG. 2 is a perspective view showing a manufacturing process of a substrate for a semiconductor device according to a second embodiment of the present invention.
FIG. 3 is a diagram showing an example layout of a growth suppression mask.
FIG. 4 is a perspective view of a semiconductor device substrate formed by removing a base substrate.
FIG. 5 is a perspective view of a conductive semiconductor element substrate.
6 is a perspective view showing a manufacturing process of a semiconductor element substrate in accordance with Example 2 of the present invention. FIG.
FIG. 7 is a perspective view showing a manufacturing process of a semiconductor element substrate in Example 3 of the present invention.
FIG. 8 is a sectional view showing a semiconductor laser device using a semiconductor device substrate according to an embodiment of the present invention.
[Explanation of symbols]
1 Base board
1A Base board main part
1B GaN buffer layer
1C GaN layer
4 SiO ₂ film
4a SiO ₂ Growth suppression mask
5 First GaN layer
5b hole
6 Second GaN layer
7a SiO ₂ Growth suppression mask
8 Third GaN layer
8b hole
9 Fourth GaN layer

Claims (15)

A first step of discretely forming a plurality of growth suppression masks having a maximum width of 2.5 μm or less on a base substrate;
A second step of forming a first GaN layer having a plurality of holes by growing a GaN layer from a non-mask forming portion on which the growth suppression mask is not formed on the base substrate;
And a third step of forming a second GaN layer on the first GaN layer. 2. The method of manufacturing a substrate for a semiconductor device according to claim 1, further comprising a step of removing the growth suppression mask after the second step and before the third step. A fourth step of forming a plurality of new growth suppression masks having a maximum width of 2.5 μm or less on the second GaN layer;
A fifth step of growing a GaN layer from a non-mask forming portion on which the new growth suppression mask is not formed on the second GaN layer to form a third GaN layer having a plurality of holes. When,
The method for manufacturing a substrate for a semiconductor device according to claim 1, further comprising a sixth step of forming a fourth GaN layer on the third GaN layer. 4. The method of manufacturing a substrate for a semiconductor device according to claim 3, further comprising a step of removing the new growth suppression mask after the fifth step and before the sixth step. 5. The method for manufacturing a substrate for a semiconductor element according to claim 1, wherein an interval between the growth suppression masks is 2.5 μm or less. 6. The semiconductor element substrate according to claim 1, wherein a ratio of an area occupied by the mask on an upper surface of a layer on which the growth suppression mask is formed is 40% or more and 90% or less. Production method. The method for manufacturing a substrate for a semiconductor device according to claim 1, wherein the growth suppression mask is made of a dielectric material. 8. The method for manufacturing a substrate for a semiconductor device according to claim 1, further comprising a step of forming a conductive GaN layer doped with a conductive impurity as the uppermost layer. The surface on which the growth suppression mask of the base substrate is formed is any one of GaN, sapphire, SiC, ZnO, LiGaO ₂ , LiAlO ₂ , ZrB ₂ , GaAs, GaP, Ge, or Si. 9. The method of manufacturing a substrate for a semiconductor element according to claim 1, wherein the substrate is configured. The method for manufacturing a substrate for a semiconductor device according to claim 1, further comprising a step of removing the base substrate. A semiconductor element comprising a semiconductor layer on a semiconductor element substrate manufactured by the method for manufacturing a semiconductor element substrate according to claim 1. A base substrate;
A first GaN layer having a plurality of holes grown from a non-mask forming portion other than a plurality of growth suppression masks having a maximum width of 2.5 μm or less formed discretely on the base substrate;
A semiconductor device substrate comprising: a second GaN layer formed on the first GaN layer. A third GaN layer having a plurality of holes grown from a non-mask forming portion other than a plurality of new growth suppression masks having a maximum width of 2.5 μm or less formed discretely on the second GaN layer; ,
13. The substrate for a semiconductor device according to claim 12, further comprising a fourth GaN layer formed on the third GaN layer. 14. The semiconductor element substrate according to claim 12, wherein a distance between the growth suppression masks is 2.5 [mu] m or less. 15. The semiconductor element substrate according to claim 12, wherein a ratio of an area occupied by the mask on an upper surface of the layer on which the growth suppression mask is formed is 40% or more and 90% or less.

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