JP2003522419A - Silicon nanoparticle field effect transistor and transistor memory device - Google Patents

Abstract

(57) Abstract: Silicon nanoparticles (18) Transistors (30, 32, 34) and transistor memory devices. The transistor according to the present invention has silicon nanoparticles (18) having a size of about 1 nm in the gate region (34) of the field effect transistor (30, 32, 34). The resulting transistor is a transistor in which a single electron flow controls the operation of the transistor. Room temperature operation is possible with a new transistor structure with the aid of irradiation, which is directed towards silicon nanoparticles to create the holes required for electrons to flow within the quantum structure. Also, the transistor according to the invention forms the basis of a memory device. The device is a flash memory device that stores charge instead of a magnetic effect.

Description

Detailed Description of the Invention

TECHNICAL FIELD OF THE INVENTION The present invention relates to a transistor. More particularly, the present invention relates to single-electron technology transistors, which are transistors that control the operation of the device by transporting electrons one at a time.

BACKGROUND OF THE INVENTION Transistors are the basic building blocks of electronic devices. The ability of a transistor depends mainly on its switching speed and its power consumption. Faster switching transistors improve performance. Transistors with lower power consumption save energy and suppress heat generation. The latter effect is especially important in devices that rely on built-in power supplies.

The power required to switch a transistor is a function of the amount of current required to operate the device. Much work has been done to reduce the amount of current. The ultimate goal is to realize a device that operates with a single electron. In single electronic electronics, the operation of the device is based on the concept of one carrier per bit of information. That is, it is based on manipulating the electrons flowing into a small substructure, more specifically, a transistor, into a transistor.

First, researchers in the United States manufactured transistors based on single electrons about 15 years ago, using the techniques used to manufacture state-of-the-art semiconductor chips. Also,
They fabricated a single electronic device by coating a semiconductor substrate with a thin layer of insulation, on which fine particles of indium were sprayed. And they placed the tip of the scanning tunneling microscope above it. By adjusting the voltage applied to the tip and substrate, they controlled the entry and exit of single electrons into the grain. A troublesome problem for operating such devices at room temperature is the problem of thermal fluctuations.

To date, fairly long-range quantum effects on transport properties have been observed primarily at temperatures close to liquid helium / liquid nitrogen. Therefore, an important step in the actual development of single electronic devices is to allow operation at higher temperatures, eg room temperature. Therefore, there is a need for improved devices that control the operation of the device by the flow of electrons. It is an object of the present invention to provide such an improved device as a silicon nanoparticle field effect transistor.

(Means for Solving the Problem) The present invention relates to a transistor including silicon nanoparticles (having a diameter of about 1 nm). In a preferred embodiment, the silicon nanoparticles occupy the gate region of the transistor. The resulting transistor is a transistor in which a single electron flow controls the operation of the transistor. Room temperature operation is possible with a new transistor structure with the aid of irradiation, which is directed towards the silicon nanoparticles in order to generate the holes needed for the electrons to flow in the quantum structure. Also, the transistor according to the invention forms the basis of a memory device. The device is a flash memory device that stores charge instead of the magnetic effect. Other features, objects, and advantages of the invention will be apparent with reference to the detailed description and drawings.

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a single electron transistor device based on several basic units of silicon nanoparticles. Silicon nanoparticles provide a set of discrete levels that capture electrons, which levels have energy spacings that are much larger than the thermal fluctuation energy. Silicon nanoparticles with a diameter of about 1 nm have a set of discrete states obtained from quantum mechanical wave-like electronic properties, and can capture / emit single charge carriers and have a size of about 1 eV. Energy spacing of 0.24 eV and has a set of discrete charging potential energies of 0.24 eV. We have demonstrated single electron transport through particles at room temperature. I-obtained using a scanning tunneling microscope
The V spectrum shows a single electron charging effect at intervals of about 0.26 eV. Furthermore, when light was irradiated and charge resonance was applied, almost complete single-electron conductance resonances were observed at intervals corresponding to the energy level intervals of quantum dots (nanoparticles). This evolved form allows a single electron transistor operating at room temperature with the aid of irradiation.

A set of discrete states resulting from quantum-mechanical wave-like electronic properties in silicon nanoparticles allows the capture / emission of single charge carriers. Energy is a multiple of the basic unit E = h ² / 3md ² , where m is the mass of the electron, h is the Planck's constant and d is the diameter of the particle. For particles according to the present invention, d is about 1 nm, providing an energy spacing of 1 eV, which is 50 times greater than room temperature thermal energy fluctuations (0.025 eV). 2 of the surface temperature of the sun
Only thermal fluctuations at temperatures close to 12,000 ° C, which is more than double, can interfere with single-electron processes within the particles. Thus, a particle-based transistor device according to the present invention can easily sustain a single-electron process at room temperature, or at any other temperature encountered under laboratory or practical field conditions. Such a transistor device is exactly a high temperature single electron device.

The spacing of energy states is sensitive to the diameter of the particles (secondary dependence). For particles with a diameter of 6 nm, the spacing drops to 0.027 eV. For this size, the thermal fluctuation at room temperature is equal to the energy of the single electron process. Therefore, dimensions of much less than 6 nm must be used to ensure high quality operation at room temperature. Even at 6 nm, the device must be cooled to the temperature of liquid nitrogen in order for a fairly high resolution single electron process to appear. Therefore, the transistor device according to the present invention preferably uses silicon nanoparticles having a diameter of about 1 nm.

In addition to the energy dispersal provided by quantum mechanics, there is energy dispersal due to charging potential energy. Capacitance C for sufficiently small particles
Is very small, so that the presence of a single electron in the trap increases the electrical potential e ² / C to an amount greater than the energy corresponding to thermal fluctuations. In this case, the discrete values of electrical potential energy may cause single electron processes to emerge. The unit e ² / C due to a single electron is called a Coulomb blockade.

Thus, in the single electron device concept, there is an interaction between the three energies: quantum energy, charging energy, and thermal fluctuation energy. It is basically an interaction between size and temperature. The capacity C = 2πεd of a spherical particle is proportional to the diameter d of the particle (the charging energy is inversely proportional to the diameter), whereas the quantum energy is inversely proportional to the square of the diameter.
Therefore, the potential energy due to the discreteness of charge is more important for larger dimensions. At medium size, the two are comparable. However, in the case of silicon nanoparticles used in transistors according to the invention, quantum energy dominates. Single-electron devices can be operated at a given temperature if at least one of these two discrete systems dominates the energy of thermal fluctuations. For the transistor according to the invention, the intrinsic charging unit is 0.24 eV, which is smaller than the quantum energy (1 eV). However, each of these has a thermal fluctuation energy (0.0
Much larger than 25 eV). Discrete, that is, single-electron process is 1
It is maintained even at a high temperature of about 2,000 ° C.

The operation of the transistor according to the invention needs help. Silicon nanoparticles with a diameter of about 1 nm are essentially non-conductive. Because all electron energy levels are filled with non-moving electrons. A typical doping concentration of 10 ¹⁵ / cm ³ boron atoms distributes only 10 ⁻⁶ electron vacancies per particle (essentially none). Even high-concentration doping with a concentration of 10 ¹⁷ / cm ³ is insufficient. However, the lack of non-conductivity does not interfere with the operation of high temperature devices based on the single electron charging effect. Furthermore, the present invention provides a means to create vacancies for trapping electrons by quantum energy levels, both single-electron charging at discrete temperatures and single-electron electronic operation at high temperatures. To do. Irradiating the silicon nanoparticles with light creates the holes necessary for single electron operation. Such behavior has been demonstrated by experiments.

An experimental device as shown in FIG. 1 was used to test the principles of the invention. The experimental device of FIG. 1 uses a scanning tunneling microscope 10 to
This is a model of the operation of the FET transistor. FIG. 1 shows the setup for the experiment, in which the tip 12 of the scanning tunneling microscope 10 is arranged at a constant height above the silicon nanoparticle film material 14 on the substrate 16. The silicon nanoparticles 18 contained in the film 14 are represented in an exaggerated size by the particles 18 in FIG. In this two terminal configuration, the tip 12 acts as the source and the substrate 16 acts as the drain. We probed the conductance of the particles by recording the IV spectrum of membrane 14.

The configuration of FIG. 1 can be represented by a double barrier model. Particle 18 is
A quantum well with a vacuum barrier due to the gap between the particles and the tip 12 and a barrier due to the gap between the particles 18 and the substrate 16 is represented. In experimental measurements, the tunnel current was set to 1 nA, the bias voltage was set to 3 V in constant current mode, and the tip height was set to several angstroms. The feedback loop was then disconnected and held in a mode where tip 12 was at a constant height during the IV spectrum measurement. For the substrate 16 (grounded), the voltage at the tip is
The tunnel current was recorded varying from 6 to + 3V.

The measurement results are shown in FIGS. 2 to 5. FIG. 2 is an IV response, in the absence of photostimulation, the tunneling current was recorded for a (grounded) substrate while varying the tip voltage in the range of −6 to +3 eV. Stairs due to electrification are visible, but not clearly resolved. FIG. 2 shows the average value of 16 individual spectra. Higher average numbers tend to have drift due to the difficulty of maintaining the tip at a constant height, which can blur this structure. FIG. 3, which is the derivative of the IV curve shown in FIG. 2, clearly shows a series of resonances at 0.26 eV intervals for both positive and negative tip bias with respect to the substrate. .

In the case of ultra-fine silicon nanoparticles, the energy level spacing based on the general theory of particles in a box is E = h ² / 3md ² , which is d = 1. 1 nm
And m = electron mass gives an energy interval of Δ = 1.03 eV. Also, the capacity of the particle is C = 2πεd, where ε is the dielectric constant of silicon, which is d = 1 nm and ε = 12ε ₀ ,
This gives a capacity of 6.7 × 10 ⁻¹⁹ F. The intrinsic charge due to a single electron of charge e is δ
= A ^e 2 ^/C=0.24eV. According to theory, as long as the temperature is in the order of kT << δ, Δ, as in the case of this experiment, the action due to the discrete charge (charging effect) and the discrete energy spectrum (level interval) is the Or it should coexist at a higher temperature. Since Δ ≧ δ, the Δ sequence should appear as a modulation with a smaller period δ. However, we have not observed any modulation at or near Δ, and we find that the staircase measurement interval of 0.26 eV is consistent with intrinsic single-electron charging, Therefore, we consider the observed resonance structure to be due to charging. Therefore,
Single electronic devices operate on the basis of charging effects.

In order to investigate the effect of light stimulation, further data were taken by means of the experimental setup shown in FIG. 1, the membrane 14 containing nanoparticles 18 was stimulated by light from a mercury lamp. . The irradiation spectral width ranges from 300 nm to 600 nm, with a maximum at 350 nm. The Pyrex glass port, through which mercury stimulating light is coupled to the vacuum system, is 270
In nm, it has a transmittance cutoff. Here, the IV response shown in FIG. 4 shows a second regular staircase structure superimposed on the spectra obtained under dark conditions without photostimulation as shown in FIGS. 2 and 3. It is very clear. The derivative of the IV curve shown in FIG. 4 is shown in FIG. 5 at 1.0 eV equal to the quantum level spacing of particles from a large negative bias relative to the substrate to a tip bias of −1 eV. The series clearly shows a series of resonances.

In the bias region (≦ −1V) where both series coexist, the current step at the DC voltage level follows a very simple rule. That is, eη (V _{n, k} −
V _t ) = δn + ε _k , where n = 0, 1, 2 ,. ． ． Is the number of electrons already present in the dot, k = 1, 2 ,. ． ． Represents the energy level of the dot, η is the ratio of the collector capacitance to the whole, and ε _k is the energy of the kth level of the particle. The derivation of this simple equation applies initially to empty particles, where kT << δ, Δ, and E> ε _f . The staircase appears when the voltage is aligned with the Fermi level of the emitter, with the kth energy level of the particle, by considering the dots charged by n electrons already present there. This condition gives a constant modulation period that is greatly affected by Δ when Δ >> δ. Therefore, as the Fermi energy level at the tip is scanned across the energy level of the particle, we relate the additional modulation resonance observed to the spacing of the tunneling channels.

The light effect is easily understood by the generation of holes. At typical doping concentrations with 10 ¹⁵ / cm ³ boron atoms, this is typical for wafers such as those used to generate nanoparticles for the experiments described herein. However, particles with a diameter of 1 nm do not contain even one millionth of holes, so there are no empty levels for injected electrons. The actual laboratory temperature is not high enough to generate holes. However, irradiation with light produces the holes necessary to drive the process.

This observation contains some interesting implications for the relative tunneling rates in and out of silicon nanoparticles. Since charge accumulation is observed, the tip-to-particle tunneling rate Γ ^e should not be much less than the particle-to-substrate tunneling rate Γ ^c . If Γ ^e << Γ ^c , no charge is stored in the particles and only the visual structure is concerned with energy quantization. Further, according to theory, as in this case, if the energy discrete Δ is dominant and Γ ^e / Γ ^c ≦ 1, two fine structures can be easily distinguished. That is, an energy-quantized structure with a larger period modulates a hyperfine structure with a smaller period associated with charging. If Γ ^e / Γ ^c ≧ 1, the modulation period increases due to charge storage and is equal to Δ + 2δ. It can be inferred that Γ ^e and Γ ^c are of similar order because the period measured for the discrete energy is equal to an atomic transition.

The data demonstrate the potential to operate single electron transistors with the aid of irradiation based on silicon nanoparticles such as the transistor shown in FIG.
FIG. 6 shows a schematic of a field effect transistor with nanoparticles implanted in the gate oxide as a buried gate. It shows a source electrode 17a, a drain electrode 17b, and a gate electrode 17c, each with electrical leads for applying a voltage bias, which, in addition, shows a nanoparticle floating buried gate (for clarity). Outside the gate area). The embedded nanoparticle gate 18a is connected to a voltage source and can therefore be biased regardless of the source-drain external gate, or it may be used as an unbiased floating gate. Source-drain conductance can also be obtained directly from IV characteristics measured using a precision semiconductor parameter analyzer. The characteristics are measured with the source grounded and the drain voltage fixed at 1 mV. The source-drain conductance oscillates when the gate voltage changes when the particle size is such that single electron charging or quantum energy spacing dominates thermal energy. The vibration period is a single electron charging or quantum energy interval. In the device shown in FIG. 6, the silicon nanoparticles 18 are used as the buried gate layer in SiMOSFE.
Implanted in the T gate region 20. Lateral transport through particles between the source-drain channel of a transistor exhibits a single-electron effect, depending on the gate bias. UV irradiation may be used to switch single electron operation.
The device may operate as a dual electrical / optical device. The nanoparticles may be optically or electrically stimulated to produce a blue laser beam within the body of the transistor. On the other hand, it operates as a single electronic electronic device. In addition, the transistor behaves as a memory device if tunneling from the particle gate to the substrate or drain is reduced by providing sufficient insulation such that Γ ^c << Γ ^e .

Silicon particle floating flash memory devices are effective in using a medium for storing electric charges instead of using a medium for storing magnetic effects.
It must electrically insulate the subelements of the medium from each other and from the connections to the power supply elements (source-drain). The islands (particles or so-called quantum dots) of silicon that are electrically floating (insulated from all other elements) in the space of the insulating oxide of the gate of the field effect transistor are shown in FIG. It forms the basis of this device. FIG. 7 is a schematic cross-sectional view of a nanoparticle memory device, showing the source 30, drain 32, and gate 34 of the device. The silicon nanoparticles 18 consist of a thin oxide (tunnel oxide) 36 grown on the channel surface and having a thickness of 1 to 2 nm, and a control oxide (around 5 nm thicker than that grown to cover the particles). To 10 nm). The device shown in FIG. 7 enables fast access, low power consumption, and maximum miniaturization. In order to realize faster and more efficient devices and higher density integration, the competition to miniaturize the device size is
As it continues, it is important to develop methods to synthesize silicon floating gates (particles) that are small enough to fit in the gate oxide. In order to be able to reduce the floating gate in flash memory to the order of a nanometer, which behaves substantially like a quantum dot,
Processing technology must pursue miniaturization. If so, it is processed with minimal disruption to conventional silicon technology and operates at or above room temperature. The ultrafine silicon nanoparticles according to the invention make it possible to implement such a technique.

The deposition of particles (sandwich-like entrapment) into the gate oxide is S
i Nanoparticle gun is used. The gun emits particles to the gate region along with the deposited control oxide. The concept of particle gun is similar to the ion beam gun used for ion implantation. However, the particle energy need not be as great. This is because the particles are deposited, not driven. In particle guns, particles in a colloidal state in a volatile liquid (such as acetone or alcohol) are used. A jet or stream of colloid leaks into the system. Mechanisms such as plasma or radiation sources are used to charge the particles. And the particles are
It is accelerated to the required energy. The mass filter selects the size,
Used to remove any residue from the solvent.

The particle gun may be configured as shown in FIG. The gun includes a Si nanoparticle inlet 38 for supplying particles. The inlet 38, which may be a nebulizer, utilizes Si nanoparticles in a colloidal state in a volatile liquid (such as acetone, water or alcohol). The colloid jet or stream is the gun's S
Radiated or leaked into the i-particle ion source 40. Most volatile solvent droplets evaporate leaving the Si particles flying. In the ion source 40, the particles become charged as they fly. The generated particle ions are accelerated (into a focusing lens 42 powered by a feedthrough electrical connection 44 (
Propulsion), where the particle ions are focused, collimated, and
Be accelerated. The accelerated particles select mass (size) and enter into velocity filter 46 to remove non-silicon species such as residual solvent material. Velocity filter 46 is powered via feedthrough 47 (for clarity,
Some feedthroughs, such as the feedthrough for inlet 38, are not shown in FIG. 8). The choice of mass is important to ensure that no material from the solvent is present in the Si nanoparticle beam. A mass selectivity of about 2/1000 may be achieved. The particle energy at the outlet of velocity filter 46 is in the range of 500 eV to 10 keV. Finally, the particle beam is transmitted to the decelerator 4
8 which can reduce the energy of the particles, 500 eV (1
The decelerator 48 may be omitted if it emits particles with a selected mass (dimension) having an energy of less than or equal to eV), but the speed of the outlet is not critical.
The degree of vacuum in the gun shown in FIG. 8 is monitored and controlled via vacuum port 50.

The memory device shown in FIG. 7 may be fabricated by such techniques as using N-channel or p-channel Si material. As shown in FIGS. 9a to 9b, in the N-channel memory where the channel is rich in excess electrons, the source (
Positive biasing of the gate with respect to (grounded) and drain (biased to about 0.1V) will attract electrons from the channel, tunnel a thin oxide and charge the silicon nanoparticles (writing step). . By reversing the polarity of the gate bias, as shown in FIG. 9c, charge can be transferred back from the silicon nanoparticles to the channel (erase step). If the lateral leakage between silicon nanoparticles and the losses that may occur in the source-drain are negligible, long-term storage of charges can be achieved and the resulting memory is robust. It is a thing. The number of charges that can be accommodated in each silicon nanoparticle depends on the size of the silicon nanoparticle and the gate bias on the source-drain. A large gate voltage increases the number of stored electrons. The smaller silicon nanoparticle size results in a large single-electron charge, thus limiting the number of electrons.

In a p-channel memory where the channel is rich in holes, negative biasing the gate with respect to the source and drain attracts holes from the channel, tunneling a thin oxide and charging the particles during the writing step. Let It can be erased by reversing the polarity of the gate voltage. The shift of the effective memory threshold voltage that holds the charge on the particles is given by the simple equation, V _T = (qnt ₀ / ε _o ) + (1/2) (qnd / ε _p ), where n Is the surface density of the nanoparticles, q is the charge of the electrons, t ₀ is the thickness of the control oxide, d is the diameter of the nanoparticles, and ε ₀ and ε _p are respectively , The dielectric constant of oxides and particles. Particle density is the ¹⁰ 12 / cm _^2, when t 0 = 7 nm, a particle diameter of 1 nm, a shift of about 0.35 eV / 1 Electronic / 1 particles is achieved. This shift is an excellent shift. Because it is
This is because the subthreshold current of the transistor is changed by five digits.

The ultrafine particles according to the invention offer several advantages for transistor technology.
First of all, these ultrafine particles can be housed in significantly miniaturized transistors. Second, our process and colloidal filtration, together with the mass spectrometry provided by the particle gun delivery system, control dimensional limitations and selection with high quality. The narrow mass distribution (<0.25%) ensures that the discrete energy system is well defined and the device threshold is sharp. Various changes in the size of the particles when taken as a whole change the discrete spectrum into a quasi-continuous spectrum, obliterating the device threshold. So far, dimensions smaller than 5 nm have not been achievable, with dimensional variations exceeding 5 to 10%. Third, the particles are so small that the single-electron charging and quantum energy spacing is larger than the thermal energy, so that the single-electron process is operational at room temperature or higher. Furthermore, the discrete levels are spaced so that more than one level of the particle is available, in other words the particles may operate as a multi-level memory system. . Fourth, the single electron intrinsic charging energy is high enough that it limits the number of electrons that can be accommodated in each particle to one. Fifth, by using ultrafine particles, at the same particle density, thicker internal particle oxides can be achieved. The thicker oxide improves the insulation of the particles, thus it further limits lateral leakage and thereby improves the memory of the device. Furthermore, because thin tunnel oxides are used, nanoparticle memory can operate at lower voltage compared to conventional flash memory. By using a thin oxide between the particles and the silicon channel, instead of injecting hot carriers at higher voltage, they can be charged by quantum tunneling. Therefore, in order to prevent hot carrier deterioration, S
Direct tunneling is desirable in charging and discharging i-particles. Finally, a lower voltage means that fewer electrons are contained in the particle.

The present invention includes a method of converting silicon bulk crystals into individual silicon nanoparticles. Silicon nanoparticles may be coalesced or reconstituted into crystals, solids, films and the like. The method of producing nanoparticles according to the present invention is such that etching is performed while slowly and slowly feeding bulk silicon, for example, a wafer into a chemical etching bath.
An electrochemical treatment that involves what is done in the presence of an external electrical current. The meniscus appears as a very thin slice of silicon, which occurs at the etchant solution-air interface. By slowly pumping silicon, large meniscus fragments are produced. In short, when a silicon material is gradually fed into the etching bath while passing an electric current, a moving meniscus is generated.
This process enriches the microstructures of the material. further,
This process makes the skin of silicon material very brittle. The ultra-fine structure, which is a silicon nanoparticle, is separated from the material and recovered.

A preferred embodiment of the method according to the invention is shown in FIG. This preferred embodiment may include a silicon single crystal wafer 100, a platinum cathode 120 in the form of a plate or wire, hydrofluoric acid, H ₂ O ₂ solution, and methanol or water for use in the etching bath 140. Use with no other chemicals.
A preferred silicon wafer has a (100) or (111) orientation, a resistivity of 1 to 10 Ωcm, and is p-type boron-doped silicon.

The wafer 100 and the cathode 120 are connected to a constant current source 160 driven by a power supply 180. The cathode 120 is vertically or horizontally immersed in the etching solution. The silicon wafer 100 is gradually fed. By way of example, it is known that a speed of about 1 mm / h gives good results. When the silicon wafer 100 is gradually dipped into the solution at a distance from the cathode 120, a meniscus appears where the silicon wafer 100 contacts the surface 200 of the etching bath 140. When pumping the wafer, the current is kept constant. As an example, it is known that a current of 15 mA gives good results. The magnetic stirrer 220 ensures that the chemicals contained in the etchant are uniformly mixed. The meniscus migrates along the silicon wafer 100 as it is gradually submerged and etches to create silicon nanoparticle structures on the epidermis of the silicon material. By using H ₂ O ₂ (as a catalyst) and a large current, a large etching rate is achieved, which results in a film with interconnected substructures having very small dimensions close to the size limit. To generate. Moreover, lateral anodization creates a high current concentration in the skin of the silicon wafer 100, so that a high etching rate leads to ultrafine nanoparticle structures, especially at the meniscus (air-liquid interface). By slowly pumping the sample into the etchant at a constant rate, a large meniscus-like region of the sample is obtained, thereby enriching the ultrafine nanosubstructure.

Then, the silicon wafer 100 is pulled out from the etching bath 140, and the silicon nanoparticles are separated from the surface of the silicon wafer 100 to obtain nanoparticles. In the preferred method, first the silicon wafer 100 is
It is taken out of the etching bath 140 and washed with methanol. For large-scale production of nanoparticles, it may be preferable to empty or move the etching bath in such a manner that the etching bath 140 and the silicon wafer 100 are separated. Then, the silicon wafer 100 is preferably ultrasonic acetone (
Immerse in a tank of ethanol, methanol, or some other solvent for a while. By the action of sonication, the very surface layer of the silicon film on the wafer 100, which is a luminescent nanostructured network weakly bound to each other, crumbles into ultrafine silicon nanoparticles, Leave a bottom layer of dark red luminescent silicon nanoparticle material. The colloid is allowed to settle. Larger yellowed / orange luminescent particles settle within a few hours, leaving a bluish luminescent colloid. Very low abundance ratio (1
Larger clusters left over at / 1000) may remain in the colloid. These can be separated by filtering the colloid using a commercially available 200 nm filter, which results in a highly uniform particle size distribution. The colloids are stable, indicating that the silicon nanoparticles are small enough that they remain in suspension, as evidenced by their persistence of intrinsic emission over several weeks. In general, any method that separates the silicon nanoparticles from the etched anode is suitable, but a solvent that is ultrasonically provided with a breaking force is preferred. Shake, scrape off, or
Impacting is another technique that may be used to break the particles apart, by way of non-limiting example. That said, ultrasound seems to work best.

The remainder of the silicon wafer 100 may be reused 2-3 times, or any number of times depending on its thickness (used as a source to generate additional nanoparticles). ). This reduces raw material costs. The silicon nanoparticles according to the present invention have excellent electronic, chemical and structural qualities. The preferred use of H ₂ O ₂ as part of the etchant solution for producing silicon nanoparticles is that it is ideal for stretching modes without di- or tri-hydrides acting as non-emissive electron traps. Provide a high quality hydrogen film (termination reaction or passivation) dominated by. The high quality coating completely protects the silicon particles from uncontrolled poor quality post-interactions in the atmosphere that causes the non-emissive traps. Moreover, the preferred etchant leaves no oxygen on the particles. However, once the electrochemical etching process is complete, the hydrogen film may be replaced by a high quality oxygen film by post-dip in H ₂ O ₂ .
This is due to the fact that the high quality of the hydrogen termination reaction allows hydrogen to be terminated by a very thin, high quality oxygen termination reaction. This is 1/1
It is a self-regulating process that yields a 4Å thick oxide layer on bulk Si at trap concentrations below 0 ¹⁴ . The oxide coating provides additional protection and hardening against laser damage. The optical properties of the silicon nanoparticles are not compromised by such high quality oxide termination reactions (passivation). In terms of chemistry, H ₂ O ₂ is an oxidant that removes almost all types of contaminants (organic substances, metals, alkaline substances, metal hydroxides) from silicon surfaces by oxidative dissolution and complex formation reactions. Is.

While various embodiments of the present invention have been illustrated and described, it should be understood that other modifications, substitutions and variations are readily apparent to those of ordinary skill in the art. Such changes, substitutions and variations can be made without departing from the spirit and scope of the invention as defined by the claims. Various features of the invention are set forth in the appended claims.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration for an experiment, in which a tip of a scanning tunneling microscope is placed above a film material at a constant height to simulate a two-terminal device.

FIG. 2 is a diagram showing an IV response, in which a tunnel current was recorded with respect to a (grounded) substrate while changing a tip voltage in a range of −6 to +3 eV.

[Figure 3]   FIG. 3 is the derivative of the IV curve shown in FIG.

FIG. 4 shows the IV response of the experimental setup shown in FIG. 1 obtained by irradiation from a mercury lamp.

[Figure 5]   FIG. 5 is the derivative of the IV curve shown in FIG.

FIG. 6 shows an exemplary single electron silicon nanoparticle transistor according to the present invention.

FIG. 7 is a cross-sectional view showing an exemplary flash memory device according to the present invention.

[Figure 8]   FIG. 8 is a diagram illustrating a silicon nanoparticle gun.

[Figure 9]   9a to 9c are diagrams showing the operation of the memory device shown in FIG.

[Figure 10]   FIG. 10 is a diagram illustrating a method for producing silicon nanoparticles.

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 29/06 601 H01L 27/10 434 29/78 29/78 371 29/788 29/792 (81) designation Country EP (AT, BE, CH, CY, DE, DK, ES, FI, FR, GB, GR, IE, IT, LU, MC, NL, PT, SE, TR), OA (BF, BJ, CF) , CG, CI, CM, GA, GN, GW, ML, MR, NE, SN, TD, TG), AP (GH, GM, KE, LS, MW, MZ, SD, SL, SZ, TZ, UG) , ZW), EA (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM), AE, AG, AL, AM, AU, BB, BG, BR, BY, BZ, CA, N, CR, CU, CZ, DE, DM, DZ, EE, GD, GE, HR, HU, ID, IL, IN, IS, JP, KP, KR, LC, LK, LR, LT, LV, MA , MG, MK, MN, MX, MZ, NO, NZ, PL, RO, SG, SI, SK, SL, TT, UA, UZ, VN, YU, ZA (72) Inventor Zarine, Joel United States Illinois 61801 Urbana E Michigan Avenue 508 Apartment 34 (72) Inventor Belomoin, Jenadi Illinois, USA 61801 Urbana E Florida Avenue 1209 Bee 33 F Term (Reference) 5F083 EP02 EP07 EP09 EP17 EP23 EP42 ER03 ER14 ER22 ER30 FZ01 GA01 GA05 GA09 GA09 GA09 GA09 GA09 GA09 PR05 5F101 BA07 BA12 BA54 BB05 BE07 BH13 5F140 AA34 AC20 AC32 BA01 BB19

Claims (8)

[Claims] 1. A single electron transistor device, comprising:   Source (17a),   Drain (17b),   A gate (17c) having a gate region (20),   Silicon nanoparticles implanted in the gate region,   Single-electron transistor device with. 2. The single electron transistor device of claim 1, further comprising a buried gate contact for electrically stimulating the silicon nanoparticles, separate from the contact to the gate. 3. The silicon nanoparticles have a diameter of about 1 nm.
Single electron transistor device according to. 4. The single electron transistor device of claim 1, wherein the silicon nanoparticles have an energy spacing of about 1 eV. 5. A source, a drain, a gate having a gate region, and at least some silicon nanoparticles (18) implanted in the gate region (20).
) And a single-electron device having a silicon nanoparticle within the silicon nanoparticle to allow single electrons to conduct between the source and drain at room temperature. A method of operating a single electronic device comprising: generating at least one hole; and applying a voltage between a drain and a source. 6. The method of operating a single electronic device as claimed in claim 4, wherein the step of generating holes in the silicon nanoparticles is accomplished by irradiating the silicon nanoparticles. 7. The method of operating a single electronic device according to claim 5, wherein the step of generating holes uses light having a spectral width of 300 to 600 nm. 8. A transistor memory device comprising a source (30), a drain (32), and a gate region (20) comprising silicon nanoparticles contained within a control oxide (36).
) And a gate (34) remote from the tunnel oxide disposed between the source and the drain.