JP2003347862A - Circuit for preventing pop sound - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent pop sound, using minimal number of capacitors. <P>SOLUTION: Switches 2-1 to 2-n for setting operation modes are grounded at first ends via a voltage-converting resistor 9 and connected at second ends to constant current sources 3-1 to 3-n for providing weighted output currents, respectively. Connection points of the switches 2-1 to 2-n with the voltage- converting resistor 9 are connected to first inputs of comparator circuits 1-1 to 1-(2<SP>n</SP>-1) and to a capacitor 6 at outside via terminals 5 attached to components. Second inputs of the comparator circuits 1-1 to 1-(2<SP>n</SP>-1) are connected to reference power sources 8-1 to 8-n for providing weighted output voltages. At the output stage, an output control current ICO depending on the comparison result is obtained, and the external capacitor 6 and the voltage- converting resistor 9 prevent pop sound. <P>COPYRIGHT: (C)2004,JPO

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an audio semiconductor integrated circuit, and more particularly, to an audio semiconductor integrated circuit having a switch operational amplifier circuit and configured to switch its operation mode. Regarding what we planned.

[0002]

2. Description of the Related Art Conventionally, as a circuit of this kind, for example,
A device having a configuration as shown in FIG. 2 is publicly known. That is, the conventional circuit will be described below with reference to the same drawing. First, although the conventional circuit is not shown, a plurality of switch operational amplifier circuits having a known / known configuration, for example, Each of them is provided so as to form an audio signal filter circuit, and FIG. 2 mainly shows an example of a circuit configuration of a control circuit portion for switching the operation mode. The control circuit portion includes a comparison circuit COMP1 corresponding to a switch operational amplifier (not shown).
1, COMP21, COMP22, ..., COMPn1,
COMPna (a = 2 ⁿ -1) is provided, and n switches SW1 to SWn are provided. By the combination of switching of the n switches SW1 to SWn, the supply current to the switch operational amplifier (not shown) is determined. The operation mode of the audio signal filter circuit using the switch operational amplifier can be switched by performing the switching.

[0003] Comparison circuits COMP11, COMP21, C
OMP22,..., COMPn1 and COMPna have the same basic circuit configuration. In this circuit configuration example, pnp transistors Q1 and Q2 forming a differential circuit and a current mirror circuit are used. Constituent np
It has n-type transistors Q3 to Q6. Then, each comparison circuit COMP1
1, COMP21, COMP22, ..., COMPn1,
While a constant reference voltage V _TH is applied to the base of the transistor Q2 of COMPna, the switches SW1 to S
By switching Wn, a low input control voltage V _IL (<reference voltage V _TH ) or a high input control voltage V _IH (> reference voltage V _TH ) is applied to the base of the transistor Q1. Control voltage V _IL or high input control voltage V _IH
Is compared with the reference voltage V _TH, and a predetermined current is output from the transistor Q4 or the transistor Q6 according to the comparison result.

Further, the output current obtained from the transistor Q4 of the comparison circuit COMP11 is equal to the output current of the next comparison circuit COM.
The comparison circuit COMP is connected to the transistors Q1 and Q2 of P21.
The output current obtained from the eleventh transistor Q6 is supplied to the transistors Q1 and Q2 of the next-stage comparison circuit COMP22, and the output current obtained from the transistor Q4 of the comparison circuit COMP21 is supplied to the next-stage comparison circuit COMP (not shown).
31 to the transistors Q1 and Q2 and to the comparison circuit CO
The output current obtained from the transistor Q6 of the MP21 is supplied to the transistors Q1 and Q2 of the next-stage comparison circuit COMP32 (not shown), and the output current obtained from the transistor Q4 of the comparison circuit COMP22 is supplied to the next-stage comparison circuit COMP33 (not shown). The output current obtained from the transistors Q1 and Q2 to the transistor Q6 of the comparison circuit COMP22 is from the smaller number to the larger number of the suffix n of COMPna, such as to the transistors Q1 and Q2 of the next-stage comparison circuit COMP34 (not shown). Then, the output current is transmitted by the current mirror circuit.
In this circuit configuration example, pnp transistors Q11, Q12, Q13, Q14, Q15, Q1
6, Q17, Q18, Q7 and a transistor (not shown) constitute a current mirror circuit.

The operation in this configuration will be described generally. First, for example, assuming that the low input control voltage V _IL is selected by the switch SW1, as a result of comparison with the reference voltage V _TH , the connection to the transistors Q1 and Q2 is made. The same amount of current as the current I _REF of the constant current source is output to the collector of the transistor Q4, while the high input control voltage V
_{If IH} is selected, the same amount of current as I _REF is output to the collector of transistor Q6. The current output to the collector of Q4 or Q6 is Q11 or Q1.
2 or a current mirror circuit formed by Q13 and Q14, the next-stage comparison circuit COMP21 or COMP21
22 flows into the emitters of Q1 and Q2. Similarly, the output current based on the comparison result of the previous stage flows into the emitters of Q1 and Q2 of the next stage, and the output is controlled by the collector of either Q4 or Q6 of the comparison circuit COMPn1,. The current is output as a current Ico.

By the way, in this conventional circuit, when the operation mode is changed by switching the switches SW1 to SWn, the output control current is instantaneously changed. From the speaker (not shown)
That is, it is known that a sound generally referred to as “buzz sound” is output. Therefore, in the conventional circuit, the switches SW1 to SWn and the corresponding comparison circuits COMP11, COMP21, COMP22,.
.. Rn are inserted between the base of each transistor Q1 of COMPn1 and COMPna, and capacitors C1,... Are connected between the connection point between the base of the transistor Q1 and the resistor Rn and the ground. .. Cn is inserted to form a so-called time constant circuit so that the change in output control current is made slow to suppress generation of pop noise.

[0007]

However, in the configuration of the conventional circuit described above, in order to make the time constant of the time constant circuit, in other words, the delay time sufficiently large,
The capacitance value of the capacitor Cn needs to be on the order of several μF. Since a capacitor having such a capacitance value cannot be realized in a semiconductor integrated circuit, it must be connected to the outside of the semiconductor integrated circuit. for that reason,
In a semiconductor integrated circuit, it is necessary to provide a terminal for externally attaching a capacitor, and a number corresponding to the number n of stages of the comparison circuit COMP is required, so that the so-called package cost of the semiconductor integrated circuit increases. Alternatively, since a plurality of external capacitors are required, there is a problem that a device using the above-described conventional circuit is expensive.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and provides a pop noise preventing circuit capable of preventing the occurrence of pop noise by minimizing the number of externally required capacitors.

[0009]

In order to achieve the object of the present invention, the pop noise prevention circuit according to the present invention comprises n switches for setting 2 ⁿ operation modes by a combination of ON and OFF. , One end of each is connected to ground via a voltage conversion resistor, and the other end of each is connected to a constant current source.
Connection points between the switches and the voltage conversion resistor,
One input terminals of the (2 ⁿ -1) comparison circuits are connected,
A reference power supply is connected to the other input terminals of the (2 ⁿ -1) comparison circuits, and a capacitor is connected to a connection point between the n switches and the voltage conversion resistor, The n constant current sources provided corresponding to the n switches have output currents of i as a reference current and s =
When set to an integer from 1 to n, are weighted with the respective 2 ^s × i, wherein the (2 ⁿ -1) the other input terminal of the number of comparison circuits, respectively connected (2 ⁿ -1) number of The reference power supply has VTHm = ｛2, where i is the reference current, R is the resistance of the voltage conversion resistor, and m is an integer from 1 to (2 ⁿ -1). × (m−
1) +1｝ × i × R, and a reference constant current source is connected to the first of the (2 ⁿ -1) comparison circuits, while each of the comparison circuits is It has two output stages, and is configured to output a current to one of the two output stages in accordance with a determination result. One of the two output stages has an output current of While connected to the next-stage comparison circuit so as to be supplied as a power supply current of the next-stage comparison circuit via the mirror circuit, the other output stage is provided so as to be capable of outputting a current to the outside of the comparison circuit.

In such a configuration, the current value of the constant current source is weighted, the current is caused to flow through one voltage conversion resistor, and the voltage generated in the voltage conversion resistor is compared with each of the comparison circuits. By applying a common voltage to one of the input terminals, there is no need to provide a voltage conversion resistor for each switch, unlike the prior art, so that the voltage change when the switch is turned on and off is delayed. Only one capacitor is needed to connect to the voltage conversion resistor.
The pop noise can be reliably prevented by using a minimum number of capacitors.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG. The members, arrangements, and the like described below do not limit the present invention, and can be variously modified within the scope of the present invention. First, a pop noise prevention circuit according to an embodiment of the present invention will be described with reference to FIG. Note that, in FIG. 1, the pop noise prevention circuit according to the embodiment of the present invention is conveniently divided into almost halves in view of the limitation of the display space, one of which is shown in FIG. (B)
Each of them is shown, and the connection portion of both circuits is represented by describing A and B in a circle. First. The pop noise prevention circuit according to the embodiment of the present invention is an example realized in a semiconductor integrated circuit for controlling an audio signal circuit, and the semiconductor integrated circuit for controlling an audio signal circuit includes:
A plurality of, for example, switch operational amplifier circuits (not shown) having a well-known and well-known configuration are provided so as to form an audio signal filter circuit. In FIG. An example of a circuit configuration of a control circuit portion for performing switching is shown.

The audio signal circuit controlling semiconductor integrated circuit (hereinafter referred to as "the integrated circuit") S in the embodiment of the present invention shown in FIG. 1 is (2 ⁿ -1).
Comparison circuits 1-1 to 1- (2 ⁿ -1) and n switches 2
−1 to 2-n, n constant current sources 3-1 to 3-n, and a plurality of transistors 4-1 to 4- (2 ⁿ +6) forming a current mirror circuit (details will be described later). Is a main component. Further, the integrated circuit S is provided with a component external terminal (indicated as “PIN” in FIG. 1) 5, and between the component external terminal 5 and the ground outside the integrated circuit S. The capacitor 6 is connected.

The specific circuit configuration will be described below. First, the first to (2 ⁿ -1) -th comparison circuits 1-1 to 1- (2
ⁿ -1) have the same basic configuration, and are denoted by the same reference numerals and symbols in FIG. In FIG. 1, the first to (2 ⁿ -1) ^th comparison circuits 1-1 to 1- (2 ⁿ -1) are each described as "COMPm". Here, m is an integer assigned in ascending order from 1 to (2 ⁿ -1). Specifically, the configuration will be described. The first to (2 ⁿ -1) ^th comparison circuits 1-1 to 1- (2 ⁿ -1) first include pnp-type first and second transistors. (In FIG. 1, they are denoted as “Q1” and “Q2,” respectively)
4-2 is configured as the differential amplifier circuit. That is, the first and second transistors 4-1 and 4-1
The -2 emitter is connected to the reference constant current source 7 and the collector of the first transistor 4-1 is connected to an npn-type third transistor (denoted as "Q3" in FIG. 1). 4) The collector of 4-3, the collector of the second transistor 4-2 is connected to the collector of an npn-type fifth transistor (denoted as "Q5" in FIG. 1) 4-5, respectively. Has become.

As will be described later, first to n-th transistors are provided on the base (one input terminal) side of the first transistor 4-1.
Switches (in FIG. 1, “SW1”,
"SW2",... "SWn") 2-1 to 2-n
Are connected to the base (the other input terminal) of the second transistor 4-2.
-1 is connected to apply the reference voltage VTH1. The second to (2 ⁿ -1) ^th comparison circuits 1-2 to 1-2
1- (2 ⁿ -1), each reference power supply is
.., And VTH (2 ⁿ -1). In FIG. 1, respective reference voltages are represented as VTH2,..., VTH (2 ⁿ -1). The reference voltages of these reference power supplies 8-1 to 8 -n are so-called weighted and set as follows.

VTHm = {2 × (m−1) +1} × i × R

Here, R is a first to a
A voltage-converting resistor (in FIG. 1, a resistor provided between the base of the first transistor 4-1 and the ground of the (2 ⁿ -1) comparison circuits 1-1 to 1- (2 ⁿ -1) R _CI ") 9). m is the first to (2 ⁿ -1) ^th comparison circuits 1-1.
With the number of 1- (2 ⁿ -1), m = 1, 2,... (2 ⁿ -1).

The third transistor 4-3 has n
A pn-type fourth transistor (“Q4” in FIG. 1)
4-4) together with the current mirror circuit. That is, the third transistor 4-3
Is a so-called diode-connected state in which the collector and the base are connected to each other, while the base of the third transistor 4-3 and the base of the fourth transistor 4-4 are connected to each other. It has become. further,
The emitters of the third and fourth transistors 4-3 and 4-4 are both connected to the ground, so that the output control current Ico1 can be obtained at the collector of the fourth transistor 4-4. The collector of the fourth transistor 4-4 is connected to a switch operational amplifier (not shown), and the output control current Ico1 is supplied as a current necessary for the operation of the switch operational amplifier. That is, the fourth transistor 4-4 is connected to the comparison circuit 1
-1 to form the other output stage. In FIG. 1, Ico1, Ico2, and Ico2 are provided near the collector of the fourth transistor 4-4 of each of the first to (2 ⁿ -1) comparison circuits 1-1 to 1- (2 ⁿ -1). ..., Ico (2 ⁿ -1),
Ico (2 ⁿ ) and each output control current are shown.

On the other hand, the fifth transistor 4-5 has an np
A current mirror circuit is configured together with an n-type sixth transistor (denoted as “Q6” in FIG. 1) 4-6. That is, the fifth transistor 4-5
Is a so-called diode-connected state in which the collector and the base are connected to each other, while the base of the fifth transistor 4-5 and the base of the sixth transistor 4-6 are connected to each other. It has become. further,
The emitters of the fifth and sixth transistors 4-5 and 4-6 are both connected to the ground, and the collector current of the sixth transistor 4-6 is a pnp type seventh and eighth transistor (see FIG. In the case of 1, "Q7",
According to 4-7 and 4-8, the first and second transistors 4--2 of the second comparison circuit 1-2 at the next stage are connected via a current mirror circuit configured as described below. 1,
4-2. That is, the sixth transistor 4-6 forms one output stage of the comparison circuit 1-1.

First, the collector of the seventh transistor 4-7 is connected together with the base to form a so-called diode connection, and the base is connected to the eighth transistor 4-7.
8 and are interconnected. The collector of the seventh transistor 4-7 is connected to the collector of the sixth transistor 4-6. A power supply voltage (not shown) is applied to the emitters of the seventh and eighth transistors 4-7 and 4-8, while the collector of the eighth transistor 4-8 is connected to the second stage of the next stage. Are connected to the emitters of the first and second transistors 4-1 and 4-2 of the comparison circuit 1-2.

On the other hand, the base of the first transistor 4-1 is connected to each of the first to (2 ⁿ -1) ^th comparison circuits 1-1 to 1- (2
^n- 1) are mutually connected to the base of the first transistor 4-1 and to the component external terminal 5. One end of each of the first to n-th switches 2-1 to 2-n is connected to the base of the first transistor 4-1 and the component external terminal 5, and the first to n-th switches 2-1 to 2-n 2-
The other ends of n are respectively connected to first to n-th constant current sources 3-1 to 3-n. Further, a voltage conversion resistor 9 is connected between the base of the first transistor 4-1 and the ground. Here, the first to n-th constant current sources 3-1 to 3-n
Is a reference current i, the output current of which is set to a so-called weighted value as follows.

I _CIs = 2 ^s × i

Note that s = 1, 2, 3,... N.

Next, the operation of the above configuration will be described. First, the first to n-th switches 2-1 to 2-n
Are set in accordance with the desired operation mode of the present integrated circuit S, and the combination of ON and OFF is set, and the number of the combinations is 2 ⁿ . The current from the first to n-th constant current sources 3-1 to 3-n is converted into a voltage according to the on / off combination of the first to n-th switches 2-1 to 2-n. To the input resistor 9 to generate the input control voltage _VCI . The input control voltage V _CI is set to the first to n-th switches 2-1 to 2-1.
The number of voltage values corresponding to the number 2 ⁿ of 2-n on / off combinations is taken, and each voltage is V _CIk
= 2 × k × i × R. Where k is
k = 0, 1, 2,..., 2 ⁿ -2, 2 ⁿ -1.

The first to n-th switches 2-1 to 2-2
An operation in a typical case among 2 ⁿ setting states of −n will be described. First, a case where all the first to n-th switches 2-1 to 2-n are set to off (open state) will be described. In this case, the first to n-th switches 2-1 to 2-n Since no current flows from the first to n-th constant current sources 3-1 to 3-n to the voltage conversion resistor 9 via n, the voltage drop is the voltage drop in the voltage conversion resistor 9. The input control voltage V _{CI 0} becomes zero.
Thus, the base of the reference voltage VTH1 = i × R of the second transistor 4-2 of the first comparator circuit 1-1 base potential of the first transistor 4-1, i.e., larger than the input control voltage V _{CI 0} As a result, the reference constant current I _REF from the reference constant current source 7 flows into the first transistor 4-1 and is output to the collector side of the fourth transistor 4-4 as the output control current Ico1. .

Next, the case where only the first switch 2-1 is on (closed state) and all the other switches 2-2 to 2-n are off will be described. the vessel 9, the current I _{CI 1} from the first constant current source 3-1 flows, the input control voltage V _{CI 1} in this case, V _{CI 1}
= 2 × i × R, which is higher than the reference voltage VTH1 = i × R which is the base potential of the second transistor 4-2. Therefore, the reference constant current I _REF is supplied to the second transistor 4
-2, and as a result, the first and second comparators 1-2 in the next stage through the current mirror circuit formed by the seventh and eighth transistors 4-7 and 4-8. It flows into the emitters of the transistors 4-1 and 4-2. In the second comparator circuit 1-2, V _{CI 1} being applied to the base of the first transistor 4-1 =
2 × i × R is smaller than the reference voltage VTH2 = 3 × i × R applied to the base of the second transistor 4-2. Therefore, the reference constant current I _REF flows into the collector of the first transistor 4-1 and is output as the output control current Ico2 on the collector side of the fourth transistor 4-4.

Next, when only the second switch 2-2 is turned on (closed state), the other switches 2-1 and 2-3 to 2-n
If There will explain all cases off, in this case, the voltage converting resistor 9, a current I _{CI 2} from the second constant current source 3-2 flows, the input control voltage V in this case
_{CI 2} is, V _{CI 2} is V _CI = 4 × i × R next, based reference voltage VTH1 = i × next than atmospheric R of the second transistor 4-2 of the first comparator circuit 1-1, reference constant Current I _REF
Is connected to a second comparison circuit 1 in the next stage through a current mirror circuit including seventh and eighth transistors 4-7 and 4-8.
-2 flows into the emitters of the first and second transistors 4-1 and 4-2. In the second comparison circuit 1-2, V _{CI 2} = 4 × i × R applied to the base of the first transistor 4-1 is applied to the base of the second transistor 4-2. Reference voltage V
Since TH2 is larger than 3 × i × R, the reference constant current I
_REF flows into the second transistor 4-2, and eventually flows into the emitters of the first and second transistors 4-1 and 4-2 of the next-stage comparison circuit (not shown). In the next comparison circuit (not shown), the second transistor 4
The reference voltage VTH3 applied to the base of -2 is VTH3
= 5 × i × R, and V _{CI 2} = 4 × i × R applied to the base of the first transistor 4-1 becomes smaller than the potential of the second transistor 4-2. Current I
_REF flows into the collector of the first transistor 4-1, and an output control current Ico3 is obtained on the collector side of the fourth transistor 4-4.

Next, only the first switch 2-1 is turned off.
A case where other switches 2-2 to 2-n are turned on will be described.
Then, in this case, other than the first constant current source 3-1, other
Constant current from each of constant current sources 3-2-3-n is for voltage conversion
Since the current flows into the resistor 9, the input control voltage V_CI(2ⁿ-2)
V_CI(2ⁿ-2) = ｛2 × (2ⁿ-2)｝ × i × R. That
As a result, the input control voltage V_CI(2ⁿ-2) is the second (2ⁿComparison circuit of -1)
1- (2ⁿ-1) applied to the base of the second transistor 4-2
Reference voltage VTH (2ⁿ-1) = ｛2 × (2ⁿ-2) +
1｝ × i × R, and the reference current I_REFIs the second (2ⁿ-
1) comparison circuit 1- (2 ⁿ-1) of the first transistor 4-1
It flows into the collector, and the fourth transistor 4-4
The output control current Ico (2ⁿ-1) output as
It will be.

Next, the first to n-th switches 2-1 to 2-2
The case where -n is all on will be described. In this case,
Since the constant current from all the constant current sources 3-1 to 3-n flows into the voltage conversion resistor 9, the input control voltage V _CI (2 ⁿ -1)
Is V _CI (2 ⁿ −1) = {2 × (2 ⁿ −1)} × i × R.
As a result, the (2 ⁿ -1) comparator circuit 1- (2 ⁿ -1) of the second reference voltage is applied to the base of the transistor 4-2 VTH of
(2 ⁿ −1) = {2 × (2 ⁿ −2) +1} × i × R, and the reference current I _REF is ^{equal to} the (2 ⁿ −1) ^th comparison circuit 1− (2 ⁿ −1)
Flows into the collector of the second transistor 4-2, and is output as an output control current Ico (2 ⁿ ) on the collector side of the sixth transistor 4-6.

As described above, the first to n-th switches 2-1 to 2-2
Although the operation in the typical ON / OFF setting state of −n has been described, the first to (2 ⁿ −1) ^th comparison circuits 1-1 to 1- (2 ^The output control current Ico is obtained according to the comparison operation in ( ^n- 1). As described above, the pop noise prevention circuit according to the embodiment of the present invention includes the first to n-th switches 2-1 to 2-1.
The operation mode of 2 ⁿ cases can be switched by turning on / off 2-n, but the first to n-th switches 2-1 to 2-1
The change of the input control voltage when 2-n is turned on / off is performed by sharing one capacitor 6 connected to the voltage conversion resistor 9 via the component external terminal 5. In addition, the generation of so-called pop noise at the time of switching operation modes is prevented by using as few external components as possible.

[0030]

As described above, according to the present invention,
A resistor and a capacitor for preventing pop noise caused by turning off and on multiple switches can be shared by multiple switches, so that pop noise is generated by using the minimum necessary capacitors. Can be reliably prevented, and the circuit configuration can be simplified by reducing the number of components.

[Brief description of the drawings]

FIG. 1 is a configuration diagram illustrating a configuration example of a pop noise prevention circuit according to an embodiment of the present invention. FIG. 1A is a configuration diagram illustrating a configuration of a preceding stage, and FIG. It is a block diagram showing a structure.

FIG. 2 is a configuration diagram illustrating an example of a conventional circuit.

[Explanation of symbols]

1-1 to 1- (2 ⁿ -1) comparison circuits 2-1 to 2-n switches 3-1 to 3-n constant current source 5 components external terminals 6 capacitors 9 voltage conversion resistors vessel

Continuation of front page    F-term (reference) 5J092 AA02 AA12 CA41 CA93 FA14                       FR01 HA08 HA19 HA25 HA29                       HA38 KA01 KA05 KA09 KA17                       KA25 KA27 MA21 SA05 VL02                 5J500 AA02 AA12 AC41 AC93 AF14                       AH08 AH19 AH25 AH29 AH38                       AK01 AK05 AK09 AK17 AK25                       AK27 AM21 AS05 LV02 RF01

Claims (2)

[Claims] 1. An n number of switches for setting 2 ⁿ operation modes by a combination of on / off, one end of each of which is connected to ground via a voltage conversion resistor, A constant current source is connected to each of the other ends, and a connection point between the n switches and the voltage conversion resistor is connected to one of (2 ⁿ -1) comparison circuits. Are connected to the other input terminals of the (2 ⁿ -1) comparison circuits, respectively. A reference power supply is connected to the input terminals of the (2 ⁿ -1) comparison circuits. Is connected to a capacitor, and the n constant current sources provided corresponding to the n switches are configured such that, when i is a reference current and i is an integer from s = 1 to n, Are weighted as 2 ^s × i, respectively, and the (2 ⁿ −1) comparison times Each of the (2 ⁿ -1) reference power supplies connected to the other input terminal of the path has a voltage, i represents the reference current, R represents the resistance value of the voltage conversion resistor, and m = 1. when set to an integer up to (2 ⁿ -1) from each VTHm = {2 × (m- 1) +1} × i ×
The reference constant current source is connected to the first comparison circuit among the (2 ⁿ -1) comparison circuits, and each of the comparison circuits has two output stages. And outputting a current to one of the two output stages in accordance with the determination result. One of the two output stages outputs the current to the next stage via a current mirror circuit. A pop circuit, which is connected to a next-stage comparison circuit so as to be supplied as a power supply current of the comparison circuit, and the other output stage is provided so as to be able to output a current to the outside of the comparison circuit. Prevention circuit. 2. The method according to claim 1, wherein a time constant circuit comprising the capacitor and the voltage conversion resistor delays a voltage change when the first to n-th switches are turned on and off. The pop noise prevention circuit according to 1.