JP2003338616A - Solid-state image pickup device and manufacturing method therefor - Google Patents
Solid-state image pickup device and manufacturing method thereforInfo
- Publication number
- JP2003338616A JP2003338616A JP2002144702A JP2002144702A JP2003338616A JP 2003338616 A JP2003338616 A JP 2003338616A JP 2002144702 A JP2002144702 A JP 2002144702A JP 2002144702 A JP2002144702 A JP 2002144702A JP 2003338616 A JP2003338616 A JP 2003338616A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- gate insulating
- film
- solid
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 35
- 238000006243 chemical reaction Methods 0.000 claims abstract description 53
- 230000002093 peripheral effect Effects 0.000 claims abstract description 34
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 33
- 229910052681 coesite Inorganic materials 0.000 claims abstract description 17
- 229910052906 cristobalite Inorganic materials 0.000 claims abstract description 17
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 17
- 229910052682 stishovite Inorganic materials 0.000 claims abstract description 17
- 229910052905 tridymite Inorganic materials 0.000 claims abstract description 17
- 238000012546 transfer Methods 0.000 claims abstract description 10
- 239000004065 semiconductor Substances 0.000 claims description 43
- 238000000034 method Methods 0.000 claims description 35
- 239000007772 electrode material Substances 0.000 claims description 32
- 239000000463 material Substances 0.000 claims description 27
- 238000003384 imaging method Methods 0.000 claims description 26
- 238000012545 processing Methods 0.000 claims description 14
- 235000012239 silicon dioxide Nutrition 0.000 claims description 14
- 239000000758 substrate Substances 0.000 claims description 8
- 238000004891 communication Methods 0.000 claims description 7
- 229910052726 zirconium Inorganic materials 0.000 claims description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 6
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 6
- 229910052719 titanium Inorganic materials 0.000 claims description 5
- 229910052735 hafnium Inorganic materials 0.000 claims description 4
- 229910052757 nitrogen Inorganic materials 0.000 claims description 3
- 230000000694 effects Effects 0.000 claims 4
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 claims 3
- 239000002184 metal Substances 0.000 abstract description 15
- 229910052751 metal Inorganic materials 0.000 abstract description 15
- 230000007547 defect Effects 0.000 abstract description 14
- 238000011109 contamination Methods 0.000 abstract description 12
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 5
- 230000010354 integration Effects 0.000 abstract description 2
- 230000002349 favourable effect Effects 0.000 abstract 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 8
- 239000012535 impurity Substances 0.000 description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 238000002955 isolation Methods 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 238000005530 etching Methods 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 238000009271 trench method Methods 0.000 description 1
- MBYLVOKEDDQJDY-UHFFFAOYSA-N tris(2-aminoethyl)amine Chemical compound NCCN(CCN)CCN MBYLVOKEDDQJDY-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、撮像領域としての
光電変換領域部(画素部)とその周辺回路部とを同一チ
ップに混載する固体撮像素子及びその製造方法に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device in which a photoelectric conversion region (pixel unit) as an imaging region and its peripheral circuit unit are mounted on the same chip, and a method for manufacturing the same.
【0002】[0002]
【従来の技術】近年、MOSプロセスの微細化技術の進
展と共に、従来の固体撮像素子であるCMOSイメージ
センサ(CMOS Image Sensor )が再び注目されている。
このCMOSイメージセンサの特徴としては、撮像領域
となる光電変換領域部(画素部)とその周辺のロジック
回路やメモリ回路を含む周辺回路部とを同一プロセスで
形成可能であるため、比較的、同一チップへの集積化が
可能である点が挙げられるが、いかに撮像デバイスとし
ての画質性能を損なわずに、多機能の回路を混載してい
くかが重要な課題となっている。そして、微細化された
MOSプロセスの1つの鍵となる技術としてゲート絶縁
膜の形成プロセスが挙げられる。2. Description of the Related Art In recent years, a CMOS image sensor, which is a conventional solid-state image pickup device, has been receiving attention again with the progress of miniaturization technology of MOS process.
A feature of this CMOS image sensor is that the photoelectric conversion area portion (pixel portion) serving as an image pickup area and the peripheral circuit portion including the logic circuit and the memory circuit around the photoelectric conversion area portion can be formed in the same process. Although it can be integrated on a chip, how to mount multi-functional circuits together without impairing the image quality performance as an imaging device is an important issue. Then, as one of the key techniques of the miniaturized MOS process, there is a process of forming a gate insulating film.
【0003】以下、従来例として、撮像領域を含まない
通常のMOSプロセス(ロジック回路)のゲート絶縁膜
形成プロセスについて説明する。図4は、従来のゲート
絶縁膜形成プロセスの各工程を示す断面図である。ま
ず、図4(A)に示すように、n型またはp型シリコン
基板100上に、シリコン酸化膜による素子分離層10
1を形成し、活性領域とフィールド領域を区画する。こ
の方法としては、例えば、酸化膜を埋め込み、平坦化す
ることによるTRENCH法を用いてもよいし、あるい
は、熱酸化による分離LOCOS(Local Oxidationof
Si )法を用いてもよい。次いで、シリコン基板100
上の素子分離層101によって区画されたn型MOSト
ランジスタとなる活性領域に対してp型半導体ウェル領
域102を形成し、p型MOSトランジスタとなる活性
領域に対してn型半導体ウェル領域102を形成する。As a conventional example, a gate insulating film forming process of a normal MOS process (logic circuit) that does not include an imaging region will be described below. FIG. 4 is a cross-sectional view showing each step of a conventional gate insulating film forming process. First, as shown in FIG. 4A, an element isolation layer 10 made of a silicon oxide film is formed on an n-type or p-type silicon substrate 100.
1 to define the active region and the field region. As this method, for example, a TRENCH method by filling an oxide film and flattening it may be used, or a separation LOCOS (Local Oxidation of oxide) by thermal oxidation may be used.
The Si) method may be used. Then, the silicon substrate 100
A p-type semiconductor well region 102 is formed in an active region which becomes an n-type MOS transistor and is divided by the upper element isolation layer 101, and an n-type semiconductor well region 102 is formed in an active region which becomes a p-type MOS transistor. To do.
【0004】次いで図4(B)に示すように、所定のゲ
ート絶縁膜103を形成する。このゲート絶縁膜103
としては、例えば、窒素添加SiO2 膜、SiN膜、ま
たはSiO2 やSiNよりも誘電率の高い膜(いわゆる
High−k膜)を製膜する。なお、High−k膜と
しては、Ti、Hf、Zr等の酸化物が挙げられるが、
これらには限らない。次いで、図4(C)に示すよう
に、ゲート電極材料膜104Aを製膜する。このゲート
電極材料としては、例えば、Poly−Si膜、a−S
i膜、SiGe膜、Poly−Si/WやPoly−S
i/Wsi等の積層膜が挙げられるが、これらには限ら
ない。また、ゲート電極材料には所定の不純物を入れる
場合もある。次いで、図4(D)に示すように、所定の
ゲート配線パターンをレジストに転写することで、レジ
ストマスク105を形成する。次いで、図4(E)に示
すように、前述したレジストマスク105をマスクとし
てゲート電極材料膜104Aにドライエッチを施し、ゲ
ート電極104を形成する。次いで、所定の低濃度不純
物領域、ゲートサイドウォール、高濃度不純物領域、金
属配線等の従来のプロセスを経ることにより、半導体装
置が形成される。Next, as shown in FIG. 4B, a predetermined gate insulating film 103 is formed. This gate insulating film 103
For example, a nitrogen-added SiO2 film, a SiN film, or a film having a higher dielectric constant than SiO2 or SiN (so-called High-k film) is formed. Examples of the High-k film include oxides such as Ti, Hf, and Zr.
It is not limited to these. Next, as shown in FIG. 4C, a gate electrode material film 104A is formed. The gate electrode material is, for example, a Poly-Si film or a-S.
i film, SiGe film, Poly-Si / W and Poly-S
A laminated film such as i / Wsi can be used, but the present invention is not limited thereto. Further, the gate electrode material may contain a predetermined impurity. Next, as shown in FIG. 4D, a resist mask 105 is formed by transferring a predetermined gate wiring pattern to a resist. Next, as shown in FIG. 4E, the gate electrode material film 104A is dry-etched using the above-described resist mask 105 as a mask to form the gate electrode 104. Then, a semiconductor device is formed by undergoing a conventional process such as predetermined low concentration impurity regions, gate sidewalls, high concentration impurity regions, and metal wiring.
【0005】[0005]
【発明が解決しようとする課題】ところで、上記従来例
のような工程で形成されるゲート絶縁膜は、回路性能向
上のため、世代とともに薄膜化が進められているが、一
方で薄膜化することによりゲートリークが大きくなると
いう問題がある。そのため、上述のような高誘電率材料
を用いることにより、ゲート絶縁膜としての誘電率を高
くすることで、実効的な膜厚は薄膜化しつつ、ゲートリ
ークを抑制するプロセスの開発が進められている。例え
ば、一般に0.25μm世代前のMOSプロセスにおい
ては、ゲート絶縁膜としては従来のpure−SiO2
が用いられているが、0.18μm〜0.1μm世代の
ゲート絶縁膜としては、SiO2 に窒素を添加した膜、
0.10μm世代以降のゲート絶縁膜としては、SiN
またはZr、Hf、Ti等の酸化物であるHigh−k
膜が用いられるロードマップが描かれている。By the way, the gate insulating film formed by the steps as in the above-mentioned conventional example is being thinned with the generation in order to improve the circuit performance. Therefore, there is a problem that the gate leak increases. Therefore, by using the high-dielectric constant material as described above, the dielectric constant as a gate insulating film is increased to reduce the effective film thickness while developing a process for suppressing gate leakage. There is. For example, in the MOS process before the 0.25 μm generation, the conventional pure-SiO 2 is generally used as the gate insulating film.
However, as a gate insulating film for the 0.18 μm to 0.1 μm generation, a film obtained by adding nitrogen to SiO2,
SiN is used as the gate insulating film for the 0.10 μm generation and beyond.
Or High-k which is an oxide of Zr, Hf, Ti, etc.
A roadmap is depicted in which the membrane will be used.
【0006】一方で、撮像領域となる光電変換領域部
(画素部)は、光電変換された電子(光電子)と、金属
汚染、プロセスダメージ、界面順位による欠陥を介して
光電変換領域部に漏れ込んでくる電子(暗電子)の比
(S/N比)を大きくとることで、撮像デバイスとして
の性能を向上させなければならない。しかし、SiON
膜、SiN膜、High−k膜等は一般的にSiO2 と
比較して界面順位による欠陥が多く、また、High−
k膜等は金属汚染があることが予想される。On the other hand, the photoelectric conversion area portion (pixel portion) serving as an imaging area leaks into the photoelectric conversion area portion through photoelectrically converted electrons (photoelectrons), metal contamination, process damage, and defects due to interface order. It is necessary to improve the performance as an image pickup device by increasing the ratio of incoming electrons (dark electrons) (S / N ratio). However, SiON
Films, SiN films, High-k films, etc. generally have more defects due to interface order than SiO2.
It is expected that the k film and the like will have metal contamination.
【0007】そこで本発明の目的は、撮像画素を配置し
た画素部とその周辺回路部を同一チップに混載する構成
において、周辺回路部の集積度及び回路性能を向上さ
せ、かつ、撮像デバイスとしての画質向上を図ることが
可能な固体撮像素子及びその製造方法を提供することに
ある。Therefore, an object of the present invention is to improve the degree of integration and circuit performance of the peripheral circuit section in a structure in which the pixel section in which the image pickup pixel is arranged and the peripheral circuit section thereof are mounted together on the same chip, and to provide an image pickup device. An object of the present invention is to provide a solid-state image sensor capable of improving image quality and a manufacturing method thereof.
【0008】[0008]
【課題を解決するための手段】本発明は前記目的を達成
するため、光電変換手段及びその読み出し回路を含む単
位画素を所定の配列で複数配置した画素部と、前記画素
部の駆動回路及び撮像信号の処理回路を含む周辺回路部
とを1つの半導体チップ上に搭載した固体撮像素子にお
いて、前記画素部の少なくとも光電変換領域部の一部に
設けられた第1のゲート絶縁膜と、その他の領域に設け
られた第2のゲート絶縁膜とが互いに異なる材料で形成
されていることを特徴とする。また本発明は、光電変換
手段及びその読み出し回路を含む単位画素を所定の配列
で複数配置した画素部と、前記画素部の駆動回路及び撮
像信号の処理回路を含む周辺回路部とを1つの半導体チ
ップ上に搭載した固体撮像素子の製造方法において、前
記画素部の少なくとも光電変換領域部の一部に設けられ
る第1のゲート絶縁膜と、その他の領域に設けられる第
2のゲート絶縁膜とを互いに異なる材料を用いて形成す
ることを特徴とする。In order to achieve the above object, the present invention provides a pixel section in which a plurality of unit pixels each including a photoelectric conversion means and a readout circuit thereof are arranged in a predetermined array, a driving circuit for the pixel section, and an image pickup. In a solid-state imaging device in which a peripheral circuit section including a signal processing circuit is mounted on one semiconductor chip, a first gate insulating film provided in at least a part of a photoelectric conversion region section of the pixel section, and other The second gate insulating film provided in the region is formed of a different material from each other. Further, according to the present invention, a pixel portion in which a plurality of unit pixels including a photoelectric conversion unit and a readout circuit thereof are arranged in a predetermined array and a peripheral circuit portion including a driving circuit of the pixel portion and a processing circuit of an image pickup signal are one semiconductor. In a method of manufacturing a solid-state image sensor mounted on a chip, a first gate insulating film provided in at least a part of a photoelectric conversion region section of the pixel section and a second gate insulating film provided in other areas are provided. It is characterized in that they are formed using different materials.
【0009】本発明の固体撮像素子及びその製造方法で
は、画素部の少なくとも光電変換領域部の一部に設けら
れた第1のゲート絶縁膜と、その他の領域に設けられた
第2のゲート絶縁膜とが互いに異なる材料より形成され
ることから、光電変換領域部の画質が問題となる部分の
ゲート絶縁膜には界面順位等による欠陥や金属汚染の少
ない膜材を用い、周辺回路部のゲート絶縁膜には誘電率
の高い膜材いることにより、メタル汚染や界面順位によ
る欠陥が多い絶縁膜を、光電変換手段や転送ゲート下に
一度も接触させることなく形成できるため、微細化され
た高性能な回路を集積し、かつ、撮像特性のすぐれたイ
メージセンサを集積できることが可能となる。In the solid-state imaging device and the method of manufacturing the same according to the present invention, the first gate insulating film provided in at least a part of the photoelectric conversion region portion of the pixel portion and the second gate insulating film provided in the other regions. Since the film and the film are made of different materials, the gate insulating film in the photoelectric conversion region where the image quality is a problem uses a film material with less defects and metal contamination due to the interface order, etc. By using a film material with a high dielectric constant for the insulating film, an insulating film with many defects due to metal contamination and interface order can be formed without ever contacting under the photoelectric conversion means or the transfer gate. It becomes possible to integrate a high-performance circuit and an image sensor having excellent imaging characteristics.
【0010】[0010]
【発明の実施の形態】以下、本発明による固体撮像素子
及びその製造方法の実施の形態例について説明する。本
実親の形態は、撮像画素を配置した画素部(光電変換領
域部)とその周辺回路部を同一チップに混載する構成に
おいて、光電変換領域部のゲート絶縁膜には界面順位に
よる欠陥や金属汚染の少ないpure−SiO2 を用
い、周辺回路部のゲート絶縁膜には誘電率の高いSiO
NまたはSiNまたはHigh−k膜を用いることによ
り、画質劣化を抑制した固体撮像素子を提供するもので
ある。BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a solid-state image sensor and a method of manufacturing the same according to the present invention will be described below. This embodiment has a configuration in which the pixel section (photoelectric conversion area section) in which the imaging pixels are arranged and its peripheral circuit section are mixedly mounted on the same chip, and the gate insulating film in the photoelectric conversion area section has defects such as defects and metal due to the interface order. Pure-SiO2, which has less pollution, is used, and SiO with a high dielectric constant is used for the gate insulating film in the peripheral circuit section.
By using an N, SiN, or High-k film, a solid-state image sensor with suppressed image quality deterioration is provided.
【0011】図1〜図3は、本発明の実施の形態による
製造方法を用いたゲート絶縁膜形成プロセスの各工程を
示す断面図であり、各図の左側に周辺回路部の断面を示
し、右側に光電変換領域部(画素部)の断面を示してい
る。以下、光電変換領域部(画素部)と、その他の周辺
回路部とを比較しながら本例による固体撮像素子の構成
とその製造方法について説明する。まず、図1(A)に
示すように、n型またはp型シリコン基板10上に、シ
リコン酸化膜による素子分離層11を形成し、活性領域
とフィールド領域を区画する。この方法としては、例え
ば、酸化膜を埋め込み、平坦化することによるTREN
CH法を用いてもよいし、あるいは、熱酸化による分離
LOCOS(LocalOxidationof Si )法を用いてもよ
い。次いで、シリコン基板10上の素子分離層11によ
って区画されたn型MOSトランジスタとなる活性領域
に対してp型半導体ウェル領域12を形成し、p型MO
Sトランジスタとなる活性領域に対してn型半導体ウェ
ル領域12を形成する。1 to 3 are cross-sectional views showing respective steps of a gate insulating film forming process using the manufacturing method according to the embodiment of the present invention. The left side of each figure shows a cross-section of a peripheral circuit portion. A cross section of the photoelectric conversion region portion (pixel portion) is shown on the right side. Hereinafter, the configuration of the solid-state image sensor according to this example and the method for manufacturing the same will be described by comparing the photoelectric conversion region section (pixel section) with other peripheral circuit sections. First, as shown in FIG. 1A, an element isolation layer 11 made of a silicon oxide film is formed on an n-type or p-type silicon substrate 10 to partition an active region and a field region. As this method, for example, TREN by filling an oxide film and planarizing it
The CH method may be used, or the separation LOCOS (Local Oxidatio of Si) method by thermal oxidation may be used. Next, a p-type semiconductor well region 12 is formed in an active region, which will be an n-type MOS transistor, divided by the element isolation layer 11 on the silicon substrate 10, and a p-type MO transistor is formed.
An n-type semiconductor well region 12 is formed in the active region that will be the S transistor.
【0012】次いで図1(B)に示すように、後に光電
変換領域部のトランジスタのゲート絶縁膜13となる絶
縁膜13Aを形成する。この絶縁膜13Aとしては、こ
こではpure−SiO2 を用いるものとするが、これ
に限らないものとする。次いで図1(C)に示すよう
に、後に光電変換領域部のゲート電極14となるゲート
電極材料膜14Aを形成する。このゲート電極材料とし
ては、例えば、Poly−Si膜、a−Si膜、SiG
e膜、Poly−Si/WやPoly−Si/Wsi等
の積層膜が挙げられるが、これらには限らない。また、
ゲート電極材料には所定の不純物を入れる場合もある。Next, as shown in FIG. 1B, an insulating film 13A which will later become the gate insulating film 13 of the transistor in the photoelectric conversion region is formed. As the insulating film 13A, pure-SiO2 is used here, but it is not limited to this. Next, as shown in FIG. 1C, a gate electrode material film 14A to be the gate electrode 14 of the photoelectric conversion region portion later is formed. Examples of the gate electrode material include a Poly-Si film, an a-Si film, and SiG.
Examples of the film include an e film, a laminated film of Poly-Si / W, Poly-Si / Wsi, and the like, but are not limited thereto. Also,
Predetermined impurities may be added to the gate electrode material.
【0013】次いで図1(D)に示すように、少なくと
も光電変換領域部の一部(ゲート電極材料膜14Aを残
す領域)を含む箇所にレジストマスク20を形成する。
次いで図1(E)に示すように、前述したレジストマス
ク20をマスクとしてエッチングを行い、周辺回路部上
のゲート電極材料膜14Aを除去する。次いで、図2
(F)に示すように、半導体基板10上に後に周辺回路
部のゲート絶縁膜15となる絶縁膜15Aを形成する。
この絶縁膜15Aとしては、例えば、窒素添加SiO2
膜、SiN膜、High−k膜等が挙げられるが、これ
らには限らない。また、High−k膜としては、T
i、Hf、Zr等の酸化物があげられるが、これらには
限らない。次いで図2(G)に示すように、後に周辺回
路部のゲート電極16となる電極材料膜16Aを形成す
る。このゲート電極材料としては、例えば、Poly−
Si膜、a−Si膜、SiGe膜、Poly−Si/W
やPoly−Si/Wsi等の積層膜が挙げられるが、
これらには限らない。また、ゲート電極材料には所定の
不純物を入れる場合もある。なお、前述したゲート電極
材料膜14Aとゲート電極材料膜16Aは、同じ膜種で
あることが望ましい。Next, as shown in FIG. 1D, a resist mask 20 is formed at a portion including at least a part of the photoelectric conversion region (the region where the gate electrode material film 14A is left).
Next, as shown in FIG. 1E, etching is performed using the resist mask 20 described above as a mask to remove the gate electrode material film 14A on the peripheral circuit portion. Then, FIG.
As shown in (F), an insulating film 15A to be the gate insulating film 15 of the peripheral circuit portion later is formed on the semiconductor substrate 10.
As the insulating film 15A, for example, nitrogen-added SiO2 is used.
A film, a SiN film, a High-k film, and the like can be given, but not limited to them. Further, as the High-k film, T
Examples thereof include oxides such as i, Hf, and Zr, but are not limited to these. Next, as shown in FIG. 2G, an electrode material film 16A to be the gate electrode 16 of the peripheral circuit portion later is formed. The gate electrode material is, for example, Poly-
Si film, a-Si film, SiGe film, Poly-Si / W
And laminated films of Poly-Si / Wsi and the like,
It is not limited to these. Further, the gate electrode material may contain a predetermined impurity. It is desirable that the gate electrode material film 14A and the gate electrode material film 16A described above have the same film type.
【0014】次いで図2(H)に示すように、少なくと
も周辺回路部の一部(ゲート電極材料膜16Aを残す領
域)を含む箇所にレジストマスク21を形成する。次い
で図2(I)に示すように、前述したレジストマスク2
1をマスクとしてエッチングを行い、光電変換領域部上
のゲート電極材料膜14A上のゲート電極材料膜16A
を除去する。次いで図3(J)に示すように、所定のゲ
ート配線のパターンニングを行い、レジストマスク22
を形成する。次いで図3(K)に示すように、前述した
レジストマスク22をマスクとして、エッチングにより
ゲート電極14、16を形成する。このようにして、周
辺回路部と光電変換領域とで材質や膜厚の異なるゲート
絶縁膜13、15を形成できる。この後、従来の固体撮
像素子の形成方法と同様にして、周辺回路部には、低濃
度不純物領域、高濃度不純物領域、金属配線を施し、ま
た、光電変換領域部には、光電変換手段であるフォトダ
イオードと、このフォトダイオードで生成した信号電荷
を所定の信号に変換して画素外に出力するための読み出
し回路等を形成することで、固体撮像素子が完成され
る。Next, as shown in FIG. 2H, a resist mask 21 is formed at a portion including at least a part of the peripheral circuit portion (a region where the gate electrode material film 16A is left). Then, as shown in FIG. 2 (I), the resist mask 2 described above is used.
1 is used as a mask to perform etching to form a gate electrode material film 16A on the gate electrode material film 14A on the photoelectric conversion region portion.
To remove. Next, as shown in FIG. 3J, patterning of a predetermined gate wiring is performed, and the resist mask 22
To form. Next, as shown in FIG. 3K, the gate electrodes 14 and 16 are formed by etching using the resist mask 22 described above as a mask. In this way, the gate insulating films 13 and 15 having different materials and film thicknesses can be formed in the peripheral circuit portion and the photoelectric conversion region. Then, in the same manner as in the conventional method for forming a solid-state image sensor, the peripheral circuit section is provided with a low-concentration impurity region, a high-concentration impurity region, and metal wiring, and the photoelectric conversion area section is provided with photoelectric conversion means. A solid-state image sensor is completed by forming a certain photodiode and a readout circuit or the like for converting a signal charge generated by this photodiode into a predetermined signal and outputting it to the outside of the pixel.
【0015】以上のような本実施の形態では、光電変換
領域部の画質が問題となる部分のゲート絶縁膜13には
界面順位等による欠陥や金属汚染の少ないpure−S
iO2 を用い、周辺回路部のゲート絶縁膜15には誘電
率の高いSiONまたはSiNまたはHigh−k膜を
用いることにより、メタル汚染や界面順位による欠陥が
多い絶縁膜を、光電変換手段や転送ゲート下に一度も接
触させることなく形成できるため、微細化された高性能
な回路を集積し、かつ、撮像特性のすぐれたイメージセ
ンサを集積できることが可能となる。In this embodiment as described above, pure-S in which there are few defects due to the interface order or metal contamination in the gate insulating film 13 in the portion where the image quality of the photoelectric conversion region is a problem.
By using iO2 and using a SiON, SiN, or High-k film having a high dielectric constant as the gate insulating film 15 in the peripheral circuit portion, an insulating film having many defects due to metal contamination or interface order can be used as a photoelectric conversion means or a transfer gate. Since it can be formed without contacting the bottom even once, it becomes possible to integrate a miniaturized high-performance circuit and an image sensor having excellent imaging characteristics.
【0016】なお、各絶縁膜の材質等を適宜変更し得る
ことは上述の通りである。また、上述した例において
は、光電変換領域部とその他の周辺回路部とで異なるゲ
ート絶縁膜13、16を形成するものについて説明した
が、この場合の光電変換領域部としては、個々の単位画
素におけるフォトダイオードと電荷転送を目的としたト
ランジスタ部とを含む暗電子による画質劣化が問題とな
る部分的な領域に限定して考えてもよいし、あるいは複
数の単位画素の集合による画素部全体として考えてもよ
い。また、上述した例においては、本発明を単体の固体
撮像素子として構成した場合について説明したが、本発
明は上述のように作製した固体撮像素子を半導体チップ
上に組み込んだ各種の半導体装置、あるいは、上述のよ
うな固体撮像素子をカメラモジュールとして組み込んだ
デジタルカメラ装置、あるいは固体撮像素子による撮像
画像を無線通信や有線通信によって伝送する機能をもっ
た通信装置(携帯型機器を含む)、さらには画像編集等
の処理を行うパソコンやスキャナ等の画像処理装置等に
適用可能であり、これらの装置についても本発明の範囲
に含まれるものである。As described above, the material and the like of each insulating film can be changed as appropriate. Further, in the above-described example, the case where different gate insulating films 13 and 16 are formed in the photoelectric conversion region portion and the other peripheral circuit portions has been described, but in this case, the photoelectric conversion region portion includes individual unit pixels. It may be considered that it is limited to a partial area in which the image quality deterioration due to dark electrons is a problem, including the photodiode and the transistor portion for the purpose of charge transfer, or as the entire pixel portion including a set of a plurality of unit pixels. You may think. Further, in the above-mentioned example, the case where the present invention is configured as a single solid-state image pickup element has been described, but the present invention is a semiconductor device in which the solid-state image pickup element manufactured as described above is incorporated on a semiconductor chip, or , A digital camera device incorporating the solid-state image sensor as a camera module, or a communication device (including a portable device) having a function of transmitting an image captured by the solid-state image sensor by wireless communication or wire communication, The present invention can be applied to an image processing apparatus such as a personal computer or a scanner that performs processing such as image editing, and these apparatuses are also included in the scope of the present invention.
【0017】[0017]
【発明の効果】以上説明したように本発明の固体撮像素
子及びその製造方法によれば、画素部の少なくとも光電
変換領域部の一部に設けられた第1のゲート絶縁膜と、
その他の領域に設けられた第2のゲート絶縁膜とが互い
に異なる材料より形成されることから、光電変換領域部
の画質が問題となる部分のゲート絶縁膜には界面順位等
による欠陥や金属汚染の少ない膜材を用い、周辺回路部
のゲート絶縁膜には誘電率の高い膜材いることにより、
メタル汚染や界面順位による欠陥が多い絶縁膜を、光電
変換手段や転送ゲート下に一度も接触させることなく形
成できるため、微細化された高性能な回路を集積し、か
つ、撮像特性のすぐれたイメージセンサを集積できるこ
とが可能となる。As described above, according to the solid-state image pickup device and the method of manufacturing the same of the present invention, the first gate insulating film provided in at least a part of the photoelectric conversion region portion of the pixel portion,
Since the second gate insulating film provided in the other region is made of a different material from each other, the gate insulating film in the photoelectric conversion region where image quality is a problem has defects such as interface order and metal contamination. By using a film material with a low dielectric constant and a film material with a high dielectric constant for the gate insulating film in the peripheral circuit section,
An insulating film with many defects due to metal contamination and interface order can be formed without ever contacting under the photoelectric conversion means or transfer gate, so that miniaturized high-performance circuits are integrated and the imaging characteristics are excellent. It becomes possible to integrate the image sensor.
【0018】また、上述のような固体撮像素子を含む半
導体装置、カメラ装置、通信装置、画像処理装置、及び
半導体装置の製造方法においても同様に、固体撮像素子
の画素部の少なくとも光電変換領域部の一部に設けられ
た第1のゲート絶縁膜と、その他の領域に設けられた第
2のゲート絶縁膜とが互いに異なる材料より形成される
ことから、光電変換領域部の画質が問題となる部分のゲ
ート絶縁膜には界面順位等による欠陥や金属汚染の少な
い膜材を用い、周辺回路部のゲート絶縁膜には誘電率の
高い膜材いることにより、メタル汚染や界面順位による
欠陥が多い絶縁膜を、光電変換手段や転送ゲート下に一
度も接触させることなく形成できるため、微細化された
高性能な回路を集積し、かつ、撮像特性のすぐれたイメ
ージセンサを集積できることが可能となる。Further, also in the semiconductor device, the camera device, the communication device, the image processing device, and the method for manufacturing the semiconductor device including the solid-state image pickup device as described above, similarly, at least the photoelectric conversion region portion of the pixel portion of the solid-state image pickup device. Since the first gate insulating film provided in a part of the above and the second gate insulating film provided in the other region are made of different materials, the image quality of the photoelectric conversion region portion becomes a problem. Since the gate insulating film in the part uses a film material with less defects due to interface order or metal contamination, and the gate insulating film in the peripheral circuit part has a film material with high dielectric constant, there are many defects due to metal contamination or interface order. Since the insulating film can be formed under the photoelectric conversion means and under the transfer gate without contacting it, a miniaturized high-performance circuit is integrated and an image sensor with excellent imaging characteristics is integrated. It is possible that you can become.
【図1】本発明の実施の形態による製造方法を用いたゲ
ート絶縁膜形成プロセスの各工程を示す断面図である。FIG. 1 is a cross-sectional view showing each step of a gate insulating film forming process using a manufacturing method according to an embodiment of the present invention.
【図2】本発明の実施の形態による製造方法を用いたゲ
ート絶縁膜形成プロセスの各工程を示す断面図である。FIG. 2 is a cross-sectional view showing each step of a gate insulating film forming process using the manufacturing method according to the embodiment of the present invention.
【図3】本発明の実施の形態による製造方法を用いたゲ
ート絶縁膜形成プロセスの各工程を示す断面図である。FIG. 3 is a cross-sectional view showing each step of a gate insulating film forming process using the manufacturing method according to the embodiment of the present invention.
【図4】従来の製造方法を用いたゲート絶縁膜形成プロ
セスの各工程を示す断面図である。FIG. 4 is a cross-sectional view showing each step of a gate insulating film forming process using a conventional manufacturing method.
10……シリコン基板、11……素子分離層、12……
ウェル領域、13、15……ゲート絶縁膜、13A、1
5A……絶縁膜、14、16……ゲート電極、14A、
16A……ゲート電極材料、20、21、22……レジ
ストマスク。10 ... Silicon substrate, 11 ... Element isolation layer, 12 ...
Well region, 13, 15 ... Gate insulating film, 13A, 1
5A ... Insulating film, 14, 16 ... Gate electrode, 14A,
16A ... Gate electrode material, 20, 21, 22 ... Resist mask.
Claims (41)
む単位画素を所定の配列で複数配置した画素部と、前記
画素部の駆動回路及び撮像信号の処理回路を含む周辺回
路部とを1つの半導体チップ上に搭載した固体撮像素子
において、 前記画素部の少なくとも光電変換領域部の一部に設けら
れた第1のゲート絶縁膜と、その他の領域に設けられた
第2のゲート絶縁膜とが互いに異なる材料で形成されて
いる、 ことを特徴とする固体撮像素子。1. A semiconductor comprising a pixel portion in which a plurality of unit pixels including photoelectric conversion means and a readout circuit thereof are arranged in a predetermined array, and a peripheral circuit portion including a driving circuit for the pixel portion and a processing circuit for image pickup signals. In the solid-state imaging device mounted on a chip, the first gate insulating film provided in at least a part of the photoelectric conversion region portion of the pixel portion and the second gate insulating film provided in other regions are mutually A solid-state imaging device, which is formed of different materials.
効果の高い絶縁膜で形成され、前記第2のゲート絶縁膜
は薄膜化された高誘電率材料による絶縁膜で形成されて
いることを特徴とする請求項1記載の固体撮像素子。2. The first gate insulating film is formed of an insulating film having a high dark electron suppressing effect, and the second gate insulating film is formed of an insulating film made of a thinned high dielectric constant material. The solid-state imaging device according to claim 1, wherein
れる全てのトランジスタのゲート領域に設けられている
ことを特徴とする請求項1記載の固体撮像素子。3. The solid-state imaging device according to claim 1, wherein the first gate insulating film is provided in the gate regions of all the transistors included in the pixel portion.
の光電変換手段で生成された信号電荷を転送するトラン
ジスタのゲート領域に設けられ、その他の画素部及び周
辺回路部のトランジスタのゲート領域には前記第2のゲ
ート絶縁膜が設けられていることを特徴とする請求項1
記載の固体撮像素子。4. The first gate insulating film is provided in a gate region of a transistor that transfers a signal charge generated by a photoelectric conversion unit in each unit pixel, and a gate of a transistor in another pixel portion and a peripheral circuit portion. 2. The region is provided with the second gate insulating film.
The solid-state image sensor according to claim 1.
り形成され、第2のゲート絶縁膜は窒素を含有したSi
O2 膜より形成されていることを特徴とする請求項1記
載の固体撮像素子。5. The first gate insulating film is formed of a SiO2 film, and the second gate insulating film is Si containing nitrogen.
The solid-state image pickup device according to claim 1, wherein the solid-state image pickup device is formed of an O2 film.
り形成され、第2のゲート絶縁膜はSiN膜より形成さ
れていることを特徴とする請求項1記載の固体撮像素
子。6. The solid-state imaging device according to claim 1, wherein the first gate insulating film is formed of a SiO 2 film and the second gate insulating film is formed of a SiN film.
り形成され、第2のゲート絶縁膜はHigh−k膜より
形成されていることを特徴とする請求項1記載の固体撮
像素子。7. The solid-state imaging device according to claim 1, wherein the first gate insulating film is formed of a SiO2 film and the second gate insulating film is formed of a High-k film.
O2 膜またはSiN膜より形成され、第2のゲート絶縁
膜はHigh−k膜より形成されていることを特徴とす
る請求項1記載の固体撮像素子。8. The first gate insulating film is nitrogen-added Si
2. The solid-state image pickup device according to claim 1, wherein the solid-state image pickup device is formed of an O2 film or a SiN film, and the second gate insulating film is formed of a High-k film.
またはTiの酸化物であることを特徴とする請求項1記
載の固体撮像素子。9. The High-k film comprises Zr or Hf.
The solid-state image sensor according to claim 1, which is an oxide of Ti.
含む単位画素を所定の配列で複数配置した画素部と、前
記画素部の駆動回路及び撮像信号の処理回路を含む周辺
回路部とを1つの半導体チップ上に搭載した固体撮像素
子の製造方法において、 前記画素部の少なくとも光電変換領域部の一部に設けら
れる第1のゲート絶縁膜と、その他の領域に設けられる
第2のゲート絶縁膜とを互いに異なる材料を用いて形成
する、 ことを特徴とする固体撮像素子の製造方法。10. A semiconductor comprising a pixel portion in which a plurality of unit pixels each including a photoelectric conversion unit and a readout circuit thereof are arranged in a predetermined array, and a peripheral circuit portion including a driving circuit for the pixel portion and a processing circuit for image pickup signals. In the method for manufacturing a solid-state imaging device mounted on a chip, a first gate insulating film provided in at least a part of the photoelectric conversion region portion of the pixel portion and a second gate insulating film provided in other regions are provided. A method for manufacturing a solid-state image sensor, comprising forming using different materials.
制効果の高い絶縁膜を用いて形成し、前記第2のゲート
絶縁膜を薄膜化された高誘電率材料による絶縁膜を用い
て形成することを特徴とする請求項10記載の固体撮像
素子の製造方法。11. The first gate insulating film is formed of an insulating film having a high effect of suppressing dark electrons, and the second gate insulating film is formed of an insulating film made of a thinned high dielectric constant material. The solid-state imaging device manufacturing method according to claim 10, wherein the solid-state imaging device is formed.
まれる全てのトランジスタのゲート領域に用いることを
特徴とする請求項10記載の固体撮像素子の製造方法。12. The method for manufacturing a solid-state image sensor according to claim 10, wherein the first gate insulating film is used for the gate regions of all transistors included in the pixel portion.
内の光電変換手段で生成された信号電荷を転送するトラ
ンジスタのゲート領域に用い、その他の画素部及び周辺
回路部のトランジスタのゲート領域には前記第2のゲー
ト絶縁膜を用いることを特徴とする請求項10記載の固
体撮像素子の製造方法。13. The first gate insulating film is used as a gate region of a transistor that transfers a signal charge generated by a photoelectric conversion unit in each unit pixel, and gate regions of transistors in other pixel units and peripheral circuit units. 11. The method for manufacturing a solid-state image pickup device according to claim 10, wherein the second gate insulating film is used for.
を用い、第2のゲート絶縁膜に窒素を含有したSiO2
膜を用いることを特徴とする請求項10記載の固体撮像
素子の製造方法。14. A SiO2 film is used as the first gate insulating film and a nitrogen-containing SiO2 film is used as the second gate insulating film.
The method for manufacturing a solid-state image sensor according to claim 10, wherein a film is used.
を用い、第2のゲート絶縁膜にSiN膜を用いることを
特徴とする請求項10記載の固体撮像素子の製造方法。15. The method of manufacturing a solid-state imaging device according to claim 10, wherein a SiO 2 film is used for the first gate insulating film and a SiN film is used for the second gate insulating film.
を用い、第2のゲート絶縁膜にHigh−k膜を用いる
ことを特徴とする請求項10記載の固体撮像素子の製造
方法。16. The method of manufacturing a solid-state image pickup device according to claim 10, wherein a SiO2 film is used for the first gate insulating film and a High-k film is used for the second gate insulating film.
iO2 膜またはSiN膜を用い、第2のゲート絶縁膜に
High−k膜を用いることを特徴とする請求項10記
載の固体撮像素子の製造方法。17. The nitrogen-containing S is added to the first gate insulating film.
11. The method for manufacturing a solid-state image pickup device according to claim 10, wherein an iO2 film or a SiN film is used and a High-k film is used as the second gate insulating film.
fまたはTiの酸化物であることを特徴とする請求項1
0記載の固体撮像素子の製造方法。18. The high-k film is made of Zr or H.
2. An oxide of f or Ti.
0. The method for manufacturing a solid-state image sensor according to item 0.
板の上面に前記第2のゲート絶縁膜を形成する工程と、 前記第2のゲート絶縁膜の上面に第2の電極材を形成す
る工程と、 前記第1のゲート絶縁膜を形成する領域に配置された前
記第2の電極材を選択的に除去する工程と、 前記第2のゲート絶縁膜及び第2の電極材の上面に前記
第1のゲート絶縁膜を形成する工程と、 前記第1のゲート絶縁膜の上面に第1の電極材を形成す
る工程と、 前記第2の電極材の上面に積層された第1のゲート絶縁
膜及び第1の電極材を選択的に除去する工程と、 前記第1、第2の電極材及び第1、第2のゲート絶縁膜
を所定パターンのゲート電極及びゲート絶縁膜に形成す
る工程と、 を有することを特徴とする請求項10記載の固体撮像素
子の製造方法。19. A step of forming the second gate insulating film on the upper surface of a semiconductor substrate forming the semiconductor chip; a step of forming a second electrode material on the upper surface of the second gate insulating film; A step of selectively removing the second electrode material arranged in a region where the first gate insulating film is formed, and the first gate material on the upper surface of the second gate insulating film and the second electrode material. A step of forming a gate insulating film, a step of forming a first electrode material on the upper surface of the first gate insulating film, a first gate insulating film and a first electrode film laminated on the upper surface of the second electrode material, And a step of selectively removing the first electrode material, and a step of forming the first and second electrode materials and the first and second gate insulating films on a gate electrode and a gate insulating film having a predetermined pattern. 11. The method for manufacturing a solid-state imaging device according to claim 10, wherein
含む単位画素を所定の配列で複数配置した画素部と、前
記画素部の駆動回路及び撮像信号の処理回路を含む周辺
回路部と、その他の回路部とを1つの半導体チップ上に
搭載した半導体装置において、 前記画素部の少なくとも光電変換領域部の一部に設けら
れた第1のゲート絶縁膜と、その他の領域に設けられた
第2のゲート絶縁膜とが互いに異なる材料で形成されて
いる、 ことを特徴とする半導体装置。20. A pixel section in which a plurality of unit pixels each including a photoelectric conversion unit and a readout circuit thereof are arranged in a predetermined array, a peripheral circuit section including a drive circuit for the pixel section and a processing circuit for image pickup signals, and other circuits. And a second gate provided in the other region, in which a first gate insulating film is provided in at least a part of the photoelectric conversion region of the pixel unit, and a second gate is provided in the other region. A semiconductor device, wherein the insulating film and the insulating film are made of different materials.
制効果の高い絶縁膜で形成され、前記第2のゲート絶縁
膜は薄膜化された高誘電率材料による絶縁膜で形成され
ていることを特徴とする請求項20記載の半導体装置。21. The first gate insulating film is formed of an insulating film having a high effect of suppressing dark electrons, and the second gate insulating film is formed of an insulating film made of a thinned high dielectric constant material. 21. The semiconductor device according to claim 20, wherein:
まれる全てのトランジスタのゲート領域に設けられてい
ることを特徴とする請求項20記載の半導体装置。22. The semiconductor device according to claim 20, wherein the first gate insulating film is provided in the gate regions of all the transistors included in the pixel portion.
内の光電変換手段で生成された信号電荷を転送するトラ
ンジスタのゲート領域に設けられ、その他の画素部及び
周辺回路部のトランジスタのゲート領域には前記第2の
ゲート絶縁膜が設けられていることを特徴とする請求項
20記載の半導体装置。23. The first gate insulating film is provided in a gate region of a transistor that transfers a signal charge generated by a photoelectric conversion unit in each unit pixel, and a gate of a transistor in another pixel portion and a peripheral circuit portion. 21. The semiconductor device according to claim 20, wherein the second gate insulating film is provided in the region.
より形成され、第2のゲート絶縁膜は窒素を含有したS
iO2 膜より形成されていることを特徴とする請求項2
0記載の半導体装置。24. The first gate insulating film is formed of a SiO2 film, and the second gate insulating film is S containing nitrogen.
3. An iO2 film is formed.
0 of the semiconductor device.
より形成され、第2のゲート絶縁膜はSiN膜より形成
されていることを特徴とする請求項20記載の半導体装
置。25. The semiconductor device according to claim 20, wherein the first gate insulating film is formed of a SiO 2 film and the second gate insulating film is formed of a SiN film.
より形成され、第2のゲート絶縁膜はHigh−k膜よ
り形成されていることを特徴とする請求項20記載の半
導体装置。26. The semiconductor device according to claim 20, wherein the first gate insulating film is formed of a SiO 2 film, and the second gate insulating film is formed of a High-k film.
iO2 膜またはSiN膜より形成され、第2のゲート絶
縁膜はHigh−k膜より形成されていることを特徴と
する請求項20記載の半導体装置。27. The first gate insulating film is nitrogen-added S
21. The semiconductor device according to claim 20, wherein the semiconductor device is formed of an iO2 film or a SiN film, and the second gate insulating film is formed of a High-k film.
fまたはTiの酸化物であることを特徴とする請求項2
0記載の半導体装置。28. The High-k film comprises Zr or H
3. An oxide of f or Ti.
0 of the semiconductor device.
含む単位画素を所定の配列で複数配置した画素部と、前
記画素部の駆動回路及び撮像信号の処理回路を含む周辺
回路部と、その他の回路部とを1つの半導体チップ上に
搭載した半導体装置の製造方法において、 前記画素部の少なくとも光電変換領域部の一部に設けら
れる第1のゲート絶縁膜と、その他の領域に設けられる
第2のゲート絶縁膜とを互いに異なる材料を用いて形成
する、 ことを特徴とする半導体装置の製造方法。29. A pixel section in which a plurality of unit pixels each including a photoelectric conversion unit and a readout circuit thereof are arranged in a predetermined array, a peripheral circuit section including a drive circuit of the pixel section and a processing circuit of an image pickup signal, and other circuits. In a semiconductor device, wherein the first gate insulating film is provided in at least a part of the photoelectric conversion region portion of the pixel portion, and the second gate insulating film is provided in the other region. A method of manufacturing a semiconductor device, comprising forming the gate insulating film using different materials from each other.
制効果の高い絶縁膜を用いて形成し、前記第2のゲート
絶縁膜を薄膜化された高誘電率材料による絶縁膜を用い
て形成することを特徴とする請求項29記載の半導体装
置の製造方法。30. The first gate insulating film is formed of an insulating film having a high effect of suppressing dark electrons, and the second gate insulating film is formed of an insulating film made of a thinned high dielectric constant material. 30. The method of manufacturing a semiconductor device according to claim 29, which is formed.
まれる全てのトランジスタのゲート領域に用いることを
特徴とする請求項29記載の半導体装置の製造方法。31. The method of manufacturing a semiconductor device according to claim 29, wherein the first gate insulating film is used for gate regions of all transistors included in a pixel portion.
内の光電変換手段で生成された信号電荷を転送するトラ
ンジスタのゲート領域に用い、その他の画素部及び周辺
回路部のトランジスタのゲート領域には前記第2のゲー
ト絶縁膜を用いることを特徴とする請求項29記載の半
導体装置の製造方法。32. The first gate insulating film is used as a gate region of a transistor that transfers a signal charge generated by a photoelectric conversion unit in each unit pixel, and gate regions of transistors in other pixel units and peripheral circuit units. 30. The method of manufacturing a semiconductor device according to claim 29, wherein the second gate insulating film is used for the semiconductor device.
を用い、第2のゲート絶縁膜に窒素を含有したSiO2
膜を用いることを特徴とする請求項29記載の半導体装
置の製造方法。33. An SiO2 film is used as the first gate insulating film, and nitrogen-containing SiO2 is used as the second gate insulating film.
30. The method of manufacturing a semiconductor device according to claim 29, wherein a film is used.
を用い、第2のゲート絶縁膜にSiN膜を用いることを
特徴とする請求項29記載の半導体装置の製造方法。34. The method of manufacturing a semiconductor device according to claim 29, wherein a SiO 2 film is used for the first gate insulating film and a SiN film is used for the second gate insulating film.
を用い、第2のゲート絶縁膜にHigh−k膜を用いる
ことを特徴とする請求項29記載の半導体装置の製造方
法。35. The method of manufacturing a semiconductor device according to claim 29, wherein a SiO2 film is used for the first gate insulating film and a High-k film is used for the second gate insulating film.
iO2 膜またはSiN膜を用い、第2のゲート絶縁膜に
High−k膜を用いることを特徴とする請求項29記
載の半導体装置の製造方法。36. Nitrogen-doped S is added to the first gate insulating film.
30. The method of manufacturing a semiconductor device according to claim 29, wherein an iO2 film or a SiN film is used and a high-k film is used as the second gate insulating film.
fまたはTiの酸化物であることを特徴とする請求項2
9記載の半導体装置の製造方法。37. The High-k film comprises Zr or H
3. An oxide of f or Ti.
9. The method for manufacturing a semiconductor device according to 9.
板の上面に前記第2のゲート絶縁膜を形成する工程と、 前記第2のゲート絶縁膜の上面に第2の電極材を形成す
る工程と、 前記第1のゲート絶縁膜を形成する領域に配置された前
記第2の電極材を選択的に除去する工程と、 前記第2のゲート絶縁膜及び第2の電極材の上面に前記
第1のゲート絶縁膜を形成する工程と、 前記第1のゲート絶縁膜の上面に第1の電極材を形成す
る工程と、 前記第2の電極材の上面に積層された第1のゲート絶縁
膜及び第1の電極材を選択的に除去する工程と、 前記第1、第2の電極材及び第1、第2のゲート絶縁膜
を所定パターンのゲート電極及びゲート絶縁膜に形成す
る工程と、 を有することを特徴とする請求項29記載の半導体装置
の製造方法。38. A step of forming the second gate insulating film on the upper surface of a semiconductor substrate forming the semiconductor chip, and a step of forming a second electrode material on the upper surface of the second gate insulating film. A step of selectively removing the second electrode material arranged in a region where the first gate insulating film is formed, and the first gate material on the upper surface of the second gate insulating film and the second electrode material. A step of forming a gate insulating film, a step of forming a first electrode material on the upper surface of the first gate insulating film, a first gate insulating film and a first electrode film laminated on the upper surface of the second electrode material, And a step of selectively removing the first electrode material, and a step of forming the first and second electrode materials and the first and second gate insulating films on a gate electrode and a gate insulating film having a predetermined pattern. 30. The method of manufacturing a semiconductor device according to claim 29.
含む単位画素を所定の配列で複数配置した画素部と、前
記画素部の駆動回路及び撮像信号の処理回路を含む周辺
回路部とを1つの半導体チップ上に搭載した固体撮像素
子を具備し、前記固体撮像素子によって被写体の撮影を
行うカメラ装置において、 前記固体撮像素子は、画素部の少なくとも光電変換領域
部の一部に設けられた第1のゲート絶縁膜と、その他の
領域に設けられた第2のゲート絶縁膜とが互いに異なる
材料で形成されている、 ことを特徴とするカメラ装置。39. A semiconductor comprising a pixel portion in which a plurality of unit pixels each including a photoelectric conversion unit and a readout circuit thereof are arranged in a predetermined array, and a peripheral circuit portion including a driving circuit for the pixel portion and a processing circuit for image pickup signals. In a camera device comprising a solid-state imaging device mounted on a chip, wherein the solid-state imaging device captures an image of a subject, the solid-state imaging device is provided in at least a part of a photoelectric conversion region portion of a pixel portion. A camera device, wherein the gate insulating film and the second gate insulating film provided in the other region are formed of different materials from each other.
含む単位画素を所定の配列で複数配置した画素部と、前
記画素部の駆動回路及び撮像信号の処理回路を含む周辺
回路部とを1つの半導体チップ上に搭載した固体撮像素
子を具備し、前記固体撮像素子によって撮像した画像の
通信を行う通信装置において、 前記固体撮像素子は、画素部の少なくとも光電変換領域
部の一部に設けられた第1のゲート絶縁膜と、その他の
領域に設けられた第2のゲート絶縁膜とが互いに異なる
材料で形成されている、 ことを特徴とする通信装置。40. A semiconductor comprising a pixel portion in which a plurality of unit pixels including photoelectric conversion means and a readout circuit thereof are arranged in a predetermined array, and a peripheral circuit portion including a driving circuit for the pixel portion and a processing circuit for image pickup signals. In a communication device comprising a solid-state image sensor mounted on a chip and performing communication of an image captured by the solid-state image sensor, the solid-state image sensor is provided in at least a part of a photoelectric conversion region section of a pixel section. 1. The communication device, wherein the first gate insulating film and the second gate insulating film provided in the other region are formed of different materials.
含む単位画素を所定の配列で複数配置した画素部と、前
記画素部の駆動回路及び撮像信号の処理回路を含む周辺
回路部とを1つの半導体チップ上に搭載した固体撮像素
子を具備し、前記固体撮像素子によって撮像した画像に
対して所定の処理を行う画像処理装置において、 前記固体撮像素子は、画素部の少なくとも光電変換領域
部の一部に設けられた第1のゲート絶縁膜と、その他の
領域に設けられた第2のゲート絶縁膜とが互いに異なる
材料で形成されている、 ことを特徴とする画像処理装置。41. A semiconductor comprising a pixel section in which a plurality of unit pixels including photoelectric conversion means and a readout circuit thereof are arranged in a predetermined array, and a peripheral circuit section including a drive circuit for the pixel section and a processing circuit for image pickup signals. In an image processing device comprising a solid-state image sensor mounted on a chip and performing a predetermined process on an image captured by the solid-state image sensor, the solid-state image sensor is at least a part of a photoelectric conversion region section of a pixel section. The image processing apparatus, wherein the first gate insulating film provided in the above and the second gate insulating film provided in the other region are formed of different materials from each other.
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007294779A (en) * | 2006-04-27 | 2007-11-08 | Sony Corp | Method of manufacturing solid state imaging apparatus |
CN100479176C (en) * | 2006-04-29 | 2009-04-15 | 联华电子股份有限公司 | Image sensing element and manufacturing method thereof |
JP2010056515A (en) * | 2008-08-01 | 2010-03-11 | Sony Corp | Solid-state imaging device, method for manufacturing the same, and imaging apparatus |
JP2010267993A (en) * | 2003-04-30 | 2010-11-25 | Crosstek Capital Llc | CMOS image sensor and manufacturing method thereof |
CN105448943A (en) * | 2015-11-12 | 2016-03-30 | 武汉新芯集成电路制造有限公司 | Backside-illuminated sensor and manufacturing process thereof |
-
2002
- 2002-05-20 JP JP2002144702A patent/JP2003338616A/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2010267993A (en) * | 2003-04-30 | 2010-11-25 | Crosstek Capital Llc | CMOS image sensor and manufacturing method thereof |
JP2007294779A (en) * | 2006-04-27 | 2007-11-08 | Sony Corp | Method of manufacturing solid state imaging apparatus |
CN100479176C (en) * | 2006-04-29 | 2009-04-15 | 联华电子股份有限公司 | Image sensing element and manufacturing method thereof |
JP2010056515A (en) * | 2008-08-01 | 2010-03-11 | Sony Corp | Solid-state imaging device, method for manufacturing the same, and imaging apparatus |
US8525909B2 (en) | 2008-08-01 | 2013-09-03 | Sony Corporation | Solid-state imaging device, method for manufacturing solid-state imaging device, and imaging apparatus |
US8953077B2 (en) | 2008-08-01 | 2015-02-10 | Sony Corporation | Solid-state imaging device, method for manufacturing solid-state imaging device, and imaging apparatus |
CN105448943A (en) * | 2015-11-12 | 2016-03-30 | 武汉新芯集成电路制造有限公司 | Backside-illuminated sensor and manufacturing process thereof |
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