JP2003234971A - Integrated circuit for tuner - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To constitute necessary circuit in an integrated circuit and reduce the number of terminals. <P>SOLUTION: The integrated circuit comprises a first terminal (No.23) for inputting UHF band television signals via a UHF high frequency amplifier circuit 24 switched to an operation mode for receiving television signals in a UHF band, and a second terminal (No.17) for switching the band to make a VHF tuning circuit 26 tuned in a low or high VHF band. A switching voltage generator circuit 18 has a first switch circuit 18a for generating a switching voltage for switching an operation mode of the high frequency amplifier circuit 24, and a second switch circuit 18c for generating a switching voltage for switching the band of the VHF tuning circuit 26. The switching voltages from the first and the second switching circuits 18a, 18c are outputted to the first and the second terminals (No.23), (No.17), respectively. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a tuner integrated circuit used in a television tuner.

[0002]

2. Description of the Related Art FIG. 4 shows a conventional circuit configuration and terminal arrangement of an integrated circuit for a tuner (hereinafter referred to as an integrated circuit), and a connection relationship with its peripheral circuits. The conventional integrated circuit 60 is shown in FIG.
As shown in, each of the two opposite sides has 16 terminals (the numbers in the circles indicate the terminal numbers (No.)).

No. 1 to No. No. 16 terminals are provided on one side 60a, and 17 to No. Up to 32 terminals are provided on the other side 60b. Further, a plurality of circuits as schematically illustrated are configured inside, and the UHF mixing circuit 61 has a balanced input terminal of No. 31, No. 32
Connected to the terminal of the VHF mixing circuit 62, and the input end of the VHF mixing circuit 62 is No. 29 terminals. In addition, each mixing circuit 6
The balanced output ends of Nos. 1 and 62 are Nos. 26, No. 27 terminals.

The VHF mixing circuit 62 includes two oscillation circuits 6
Local oscillation signals are supplied from 3, 64. The VHF low-band oscillation circuit 63 includes two differential oscillation transistors 6
3a and 63b, and the base of one oscillation transistor 63a is No. 3a. No. 1 is connected to the collector of the other oscillation transistor 63b. 2 terminals. The VHF high-band oscillation circuit 64 also has two differential-type oscillation transistors 64a and 64b, and the base of one oscillation transistor 64a is No. 4 terminals,
The other oscillator transistor 64b has a collector of No. 5 terminals.

The UHF mixing circuit 61 includes a UHF oscillation circuit 6
A local oscillation signal is supplied from 5. UHF oscillation circuit 65
Also has two differential type oscillation transistors 65a and 65b, and the base of one oscillation transistor 64a is No. 6
Of the no. 8 terminals. The base of the other oscillation transistor 65b is No. 9 is connected to the collector of the No. 9 terminal.
7 terminals.

No. 17 to No. Data for receiving channel selection and the like are input to the terminal 19 from a television receiver main body (not shown). Specifically, a clock signal is input to the No. 17 terminal, channel selection data and band switching data are input to the No. 18 terminal, and address data is input to the No. 19 terminal. These data are transferred to P via the interface 66.
It is input to the LL circuit 67 and the band switching voltage generation circuit 68. The PLL circuit 67 includes the oscillation circuits 63, 64, 65.
A local oscillation signal is input from. The error signal output from the PLL circuit 67 is DC-converted by the charge pump 69 having a low-pass filter, and then the tuning voltage generating circuit 70 outputs the error signal. The tuning voltage is output to the terminal of 15. Further, a reference signal is input from the reference oscillation circuit 71 to the PLL circuit 67. The oscillator connection end of the reference oscillation circuit 71 is No. 16 terminals.

The switching voltage generating circuit 68 has a plurality of switching circuits inside, and each generates a switching voltage of high level or low level according to the input data. This switching voltage is used for switching the receiving band, etc.
20, No. 23 to No. 25, no. It is output to each terminal of 30. The intermediate frequency amplifier circuit 72 is configured in a balanced type, and its two input terminals are No. 21, No. No. 22 is connected to the output terminal. 11, No. 12 terminals. In addition, No. 3, No. 10, No. 28
The terminal is grounded and the No. A power supply voltage B for supplying each circuit is applied to the terminal of 13.

Peripheral circuits connected to the integrated circuit 60 are provided outside. The television signal in the UHF band passes through the UHF high frequency amplifier circuit 73 and the UHF tuning circuit 74, and then the No. Three
1, No. Balanced input to 32 terminals. The television signal in the VHF band passes through the VHF tuning circuit 75 and then the No. 29
Input to the terminal. The VHF tuning circuit 75 has a switch diode 75a therein and can be switched to tune to a low band or a high band by turning on or off the switch diode. In addition, the intermediate frequency tuning circuit 76
The input end is No. 26, No. No. 27 is connected to the output terminal. 21, No. 22 terminals.

The low-band resonance circuit 77 has a varactor diode 77a, and one end of the low-band resonance circuit 77 is coupled via coupling capacitors 78 and 79, respectively. 1, No. 2 terminal, and the other end is grounded. High band resonance circuit 8
0 also has a varactor diode 80a, one end of which is connected to the No. 1 via coupling capacitors 81 and 82 respectively. 4, N
o. 5 terminals. Furthermore, the UHF resonance circuit 8
3 also has a varactor diode 83a, one end of which is No. 3 via coupling capacitors 84 and 85, respectively. 6, N
o. 7 terminals. The other end is connected to each other via a coupling capacitor. 8, No. 9 terminals. Further, the oscillation element 88 such as a crystal resonator is No. 16 terminals.

In the above configuration, No. The tuning voltage output from the terminal 15 is applied to the cathodes of the varactor diodes 77a, 80a, 83a of the resonance circuits 77, 80, 83, and the oscillation circuits 63 to 65 oscillate at frequencies necessary for their reception bands. . In addition, No. 23 and No. The switching voltage output from the terminal 24 is applied to the VHF tuning circuit 75 to turn on or off the switch diode 75a. When off, VHF tuning circuit 75 is VH
It tunes to the low band in the F band and tunes to the high band when on. Furthermore, No. The switching voltage output from the terminal of 30 is applied to the UHF high frequency amplifier circuit 73. UH
When receiving a television signal in the F band, the switching voltage becomes a high level to operate the UHF high frequency amplifying circuit 73 in an appropriate bias state, and when receiving a television signal in the VHF band, a low level is set to the UHF high frequency amplifying circuit 73. Stop the operation of.

As described above, the intermediate frequency signal is output from each of the mixing circuits 61 and 62 corresponding to each reception band, passes through the intermediate frequency tuning circuit 76 and the intermediate frequency amplifying circuit 72, and the No. 1 signal is output. 11, No. Balanced output to 12 terminals.
The output intermediate frequency signal IF is processed by a demodulation circuit or the like (not shown).

[0012]

In the conventional integrated circuit described above, many terminals are used to couple the resonance circuit to the oscillation circuit. Further, the number of terminals for extracting the switching voltage from the band switching voltage generating circuit is large, and the number of terminals for grounding is also large. Therefore, the connection with the peripheral circuits becomes complicated and the integrated circuit itself cannot be downsized. Further, it has not been possible to downsize a television tuner using an integrated circuit.

It is an object of the present invention to form a necessary circuit in an integrated circuit and reduce the number of terminals.

[0014]

In order to solve the above-mentioned problems, according to the present invention, a switching voltage generating circuit and a UHF high frequency amplifier which is provided outside and which is switched to an operating state at least when receiving a television signal in the UHF band. A first terminal to which a television signal in the UHF band is input via the circuit, and a second terminal for switching the band of an externally provided VHF tuning circuit so as to tune to the low band or the high band of the VHF band And a switching circuit for generating a switching voltage for switching the operating state of the UHF high-frequency amplifier circuit,
A second switch circuit that generates a switching voltage for switching the band of the HF tuning circuit, outputs the switching voltage of the first switch circuit to the first terminal, and outputs the switching voltage of the second switch circuit. The switching voltage was output to the second terminal.

Further, a first two oscillation transistors whose emitters are connected to each other, a second two oscillation transistors whose emitters are connected to each other, and a third two oscillations whose emitters are connected to each other. A transistor, a third terminal to which one end of a first resonance circuit provided outside is connected, and fourth and fifth terminals to which both ends of a second resonance circuit provided outside are connected, respectively. , And a sixth and seventh terminal to which both ends of an externally provided third resonance circuit are respectively connected, and one of the base and the other collector of the first two oscillation transistors are individually separated. Coupled to the third terminal by a coupling capacitor,
One base and the other collector of the second two oscillation transistors are respectively coupled to the fourth terminal by separate coupling capacitors, and the other base and one collector of the second two oscillation transistors are connected. Are coupled to the fifth terminal by individual coupling capacitors, and one base and the other collector of the third two oscillation transistors are coupled to the sixth terminal by individual coupling capacitors, respectively, and The other base and one collector of the second two oscillating transistors are coupled to the seventh terminal by respective coupling capacitors.

Further, the intermediate frequency amplifier circuit is provided with an eighth terminal for outputting an intermediate frequency signal, the intermediate frequency amplifier circuit is configured as a balanced input type and an unbalanced output type, and the output of the intermediate frequency amplifier circuit. The end was connected to the eighth terminal.

Further, a ninth terminal externally provided to which a balanced output terminal of the intermediate frequency tuning circuit is connected is provided, and the intermediate frequency tuning circuit attenuates a video intermediate frequency signal or an audio intermediate frequency signal of an adjacent channel. A trap circuit is provided, the trap frequency of the trap circuit is configured to be switched, and the switch voltage generation circuit is provided with a third switch circuit that generates a switch voltage for switching the trap frequency. The switching voltage of the switch circuit of No. 1 was output to the ninth terminal.

Further, an analog / digital conversion circuit and a tenth terminal for inputting an analog voltage to the analog / digital conversion circuit are provided, and a high level or low level voltage is output to the switching voltage generation circuit. Four switch circuits and opening / closing means interposed between the tenth terminal and the fourth switch circuit are provided, and the opening / closing means is opened when operating the analog / digital conversion circuit. The opening / closing means is closed when the fourth switch circuit is operated.

The PLL circuit, a reference oscillator circuit for supplying a reference signal to the PLL circuit, and an eleventh terminal for connecting an externally provided oscillator to the reference oscillator circuit are provided. The terminals having a low electric potential at high frequencies are provided on both sides of the terminal.

[0020]

BEST MODE FOR CARRYING OUT THE INVENTION A tuner integrated circuit according to the present invention will be described below with reference to FIGS. Here, FIG.
Shows the circuit configuration and terminal arrangement of an integrated circuit for a tuner (hereinafter referred to as an integrated circuit) of the present invention, and the overall connection relationship with its peripheral circuits, and FIGS. 2 and 3 show the detailed configuration.

The integrated circuit 10 of the present invention, as shown in FIG.
Each of the two opposite sides has 12 terminals (the numbers in the circles indicate the terminal numbers (No.)). No. 1 to No. Terminals up to 12 are provided on one side 10a,
No. 13 to No. The terminals up to 24 are the other side 10
b. Further, a plurality of circuits as schematically illustrated are configured inside. The UHF mixing circuit 11 has a balanced input terminal of No. 1 whose first terminal is the first terminal. No. 23 terminal, and No. Two
4 and the VHF mixing circuit 12 has an unbalanced input end connected to the No. 4 terminal. 22 terminals. The balanced output terminals of the mixing circuits 11 and 12 are No. 19, No. 20
Connected to the terminal.

The VHF mixing circuit 12 has two oscillation circuits,
That is, a VHF low-band oscillator circuit (hereinafter, referred to as a low-band oscillator circuit) 13, a VHF high-band oscillator circuit (hereinafter, referred to as a
A local oscillation signal is supplied from a high band oscillator circuit) 14. The low band oscillator circuit 13 is an unbalanced type,
The resonance circuit coupling end is the third terminal No. 1 terminal. The high-band oscillator circuit 14 is a balanced type, and its two resonance circuit coupling ends are the fourth terminals, respectively. No. 2 terminal and No. 5 terminal. 3 terminals. A local oscillation signal is supplied from the UHF oscillation circuit 15 to the UHF mixing circuit 11. The UHF oscillating circuit 15 is also of the balanced type, and the two resonance circuit coupling ends thereof are the sixth terminals, respectively. No. 4 terminal and No. 7 terminal. 5 terminals.

No. 14 to No. Data for receiving channel selection and the like is input to the terminal 16 from a television receiver main body (not shown). For details, the channel selection data, band switching data, etc. are input to the No. 14 terminal. A clock signal is input to the terminal 15 and address data is input to the terminal No. 16. These data are input to the PLL circuit 17 and the switching voltage generating circuit 18 via the interface 16. No. 10 which is the tenth terminal. 13 terminals are analog
Digital conversion circuit (hereinafter referred to as A / D conversion circuit) 19
Are connected. The A / D conversion circuit 19 sends and receives data to and from the interface 16.

The PLL circuit 17 receives the reception channel selection data and the local oscillation signal output from each of the oscillation circuits 13, 14 and 15. The error signal output from the PLL circuit 17 is DC-converted by the charge pump 20 having a low-pass filter, and then the tuning voltage generating circuit 2
1 to No. The tuning voltage is output to the terminal 10. Further, the reference signal is input to the PLL circuit 17 from the reference oscillation circuit 22. The resonance element connection end of the reference oscillation circuit 22 is No. 11 which is the eleventh terminal. 7 terminals.

The switching voltage generating circuit 18 has a plurality of switching circuits therein, and each of them generates a switching voltage of high level or low level according to the inputted band switching data. This switching voltage is used for switching the receiving band, etc., and the tenth terminal (No. 13) and the second terminal (No. 1) are used.
7), the ninth terminal (No. 18), the first terminal (No.
23) is output to each terminal. The intermediate frequency amplifier circuit 23 is configured to be a balanced input type and an unbalanced output type, and one of its input terminals is No. 11 terminal, and the other input terminal is connected to the No. 18 terminal which is the eighth terminal. Note that N
o. 6, No. The terminal of No. 21 is grounded. A power supply voltage B for supplying each circuit is applied to the terminal 8.

Peripheral circuits provided outside are connected to the integrated circuit 10. UHF television signals are UHF
After passing through the high frequency amplifier circuit 24, the UHF tuning circuit 25, etc., the first terminal (No. 23) and the No. Balanced input to 24 terminals. At this time, the UHF high frequency amplifier circuit 24 is controlled to operate by the switching voltage appearing at the first terminal (No. 23). VHF band television signals are VH
No. 1 through the F tuning circuit 26. It is input to the terminal 22.
The VHF tuning circuit 26 includes an input tuning circuit and an interstage tuning circuit, and has a switch diode 26a inside. The switch diode 26a has a second terminal (No. 1).
It is switched on or off by the switching voltage output from 7), whereby the VHF tuning circuit 26 becomes VH.
It can be switched to tune to the F band low band or high band. Further, the intermediate frequency tuning circuit 27 is a balanced type, and its input end is No. 19, No. 20 terminals, one of the output terminals is connected to the ninth terminal (No. 18), and the other is connected to the No. 20 terminal. 11 terminals (indicated by A).

The first resonance circuit 28 is used for low band reception in the VHF band, and one end of the first resonance circuit 28 has a third terminal (No.
1) and the other end is grounded. Second resonance circuit 2
9 is used at the time of high band reception of the VHF shoe, one end of which is connected to the fourth terminal (No. 2) and the other end of which is coupled to the fifth terminal (No. 3). Further, the third resonance circuit 30 is used when receiving the UHF band, one end thereof is connected to the sixth terminal (No. 4), and the other end thereof is coupled to the seventh terminal (No. 5). Each resonance circuit 28, 29, 3
At 0, a varactor diode for changing the resonance frequency is provided. No. for the varactor diode. A tuning voltage is applied from 10. No. A high voltage (higher than the maximum tuning voltage) V is applied to the terminal 10 via the pull-up resistor 32. The resonance element 31 such as a crystal resonator is connected to the eleventh terminal (No. 7). Therefore, the seventh terminal (N
o. No. 7) which is grounded on both sides of high frequency. 6
And No. 8 low-potential terminals are arranged, and the emission of the reference signal appearing at the eleventh terminal (No. 7) is N
o. 6 and No. The effect that can be blocked by the eight terminals is obtained.

In the above configuration, the UHF band television signal or the VHF band television signal is U.
The HF mixing circuit 11 and the VHF mixing circuit 12 convert the intermediate frequency signal into an intermediate frequency signal.
7, through the intermediate frequency amplifier circuit 23, the eighth terminal (No. 1
Unbalanced output to the terminal of 2). The output intermediate frequency signal IF is processed by a demodulation circuit or the like (not shown).

Here, a concrete configuration of each of the oscillation circuits 13 to 15 and each of the resonance circuits 28 to 30 and a connection relationship with other related circuits will be described with reference to FIG. The low-band oscillation circuit 13 has two differential first oscillation transistors 13a and 13b whose emitters are connected to each other, and the base of one oscillation transistor 13a and the collector of the other oscillation transistor 13b have a resonance circuit coupling end. And are coupled to the third terminal (No. 1) via coupling capacitors 13c and 13d, respectively. The other oscillation transistor 1
The base of 3b is grounded at a high frequency. Further, the cathode of the diode 13e is connected to the third terminal (No. 1), and the anode is grounded.

The high-band oscillator circuit 14 is also a differential type second two oscillating transistors 14 whose emitters are connected to each other.
a and 14b, the base of one oscillation transistor 14a and the collector of the other oscillation transistor 14b serve as one resonance circuit coupling end, and the coupling capacitor 1
It is connected to the fourth terminal (No. 2) via 4c and 14d. Further, the base of the other oscillation transistor 14b and the collector of the one oscillation transistor 14a become the other resonance circuit coupling end, and the coupling capacitors 14f,
It is connected to the fifth terminal (No. 3) through 14e.
The cathode of the diode 14g is connected to the fourth terminal (No. 2), and the anode is grounded. The cathode of the diode 14h is connected to the fifth terminal (No. 3), and the anode is grounded.

Further, the UHF oscillation circuit 15 also has two third differential type oscillation transistors 15a and 15b whose emitters are connected to each other, and one oscillation transistor 15a is provided.
And the collector of the other oscillating transistor 15b serve as one resonance circuit coupling end, and are connected to the sixth terminal (No. 4) via coupling capacitors 15c and 15d, respectively. Further, the base of the other oscillating transistor 15b and the collector of the one oscillating transistor 15a become the other resonant circuit coupling end, and the coupling capacitor 15
It is coupled to the seventh terminal (No. 5) via f and 15e. The diode 15 is connected to the sixth terminal (No. 4).
g cathode is connected and the anode is grounded. The cathode of the diode 15h is connected to the seventh terminal (No. 5), and the anode is grounded.

As described above, the resonance circuit coupling end of each oscillation circuit is connected to each terminal through the coupling capacitor, so that the number of terminals is significantly reduced.

The first resonance circuit 28 and the second resonance circuit 2
The cathodes of the varactor diodes 28a and 29a30a provided in the third resonance circuit 30 are No. 9 and No. 9 respectively. 1
0 terminal.

The tuning voltage generating circuit 21 to which the DC voltage is input from the charge pump 20 is a junction FET 21.
a and an NPN transistor 21b, and the drain of the junction FET 21a is N by a resistor 21c.
o. 10 is connected to the terminal and the source is connected to the collector of the NPN transistor 21b. Junction FE
The T21a and the NPN transistor 21b function as variable resistance means. The emitter of the NPN transistor 21b is grounded by the resistor 21d.

Tuning voltage generating circuit 21 and pull-up resistor 3
The impedance ratio with No. 2 changes depending on the voltage output from the charge pump 20, A tuning voltage in the range of approximately 2 to 25 volts is generated at the ten terminal.
This voltage is applied to each varactor diode 28a, 29a, 30.
applied to a.

The connection point between the junction FET 21a and the NPN transistor 21b and each resonance circuit 13, 14, 1
5, diodes 13e, 14h, 15h respectively
A temperature compensation circuit 41 is provided between the cathode and the cathode (not shown in FIG. 1). The temperature compensating circuit 41 includes a junction FET 41a, a drain thereof and a No. Two resistors 41b, 41 connected in series with the terminal 8
The source of the junction FET 41a is considerably the same as that of the NPN transistor 21b in the tuning voltage generating circuit 21.
Connected to the collector. Junction FET 41a
Function as variable resistance means. And two resistors 4
At the connection point of 1b and 41c, a voltage obtained by dividing the power supply voltage (herein referred to as temperature compensation voltage) appears, and this is supplied to the diode 13e via the resistors 13f, 14i and 15i, respectively.
It is applied to the cathode for 14h and 15h.

In the above configuration, each varactor diode 28a, 29a, 30a and each diode 13e, 14
The capacitance values of h and 15h have a positive temperature coefficient, and the capacitance value increases as the temperature rises. Therefore, the oscillation frequency changes to the lower side. Then, due to the action of the PLL circuit 17, the voltage input from the charge pump 20 to the NPN transistor 21b of the tuning voltage generation circuit 21 is lowered, and the voltage between the collector and the emitter of the NPN transistor 21b is increased. The tuning voltage appearing at the terminal of 10 also rises, and works to restore the oscillation frequency to the original level. At this time, the voltage at the connection point between the two resistors 41b and 41c in the temperature compensation circuit 41 also rises. Therefore, the diodes 13e, 14
The voltage applied to the cathodes of h and 15h is higher than in the conventional case.

Generally, the capacitance value between the terminals of the diode decreases as the reverse bias voltage increases.
3e, 14h, and 15h also have the effect of suppressing changes in the oscillation frequency. Therefore, the change in the tuning voltage for returning the changed oscillation frequency to the original value can be small.

Next, FIG. 3 shows a concrete connection relationship between the switching voltage generating circuit 18 and other circuits to which the switching voltage is applied.
Explained by. First, the switching voltage generating circuit 18 in the integrated circuit 10 has switch circuits 18a to 1a each including a transistor (all NPN transistors in this example).
8e, the emitter of the transistor in the first switch circuit 18a is connected to the first terminal (No. 23) and is grounded via the resistor. Transistor 1
The base of 8b is connected to the base of the transistor in the first switch circuit 18a, the collector is connected to the collector of the transistor in the second switch circuit 18c, and the emitter is grounded.

The collector of the transistor in the second switch circuit 18c is connected to the second terminal (No. 17), and the emitter is grounded. The emitter of the transistor in the third switch circuit 18d is connected to the ninth terminal (No. 18) and is also grounded via the resistor. The collector of the transistor in the fourth switch circuit 18e is connected to the tenth terminal (N
o. 13) and the emitter is grounded. Although the structure of the opening / closing means 18f is not described in detail, it can be composed of another switch transistor or the like. Then, the switch circuit 18
The collectors of the transistors in Nos. a and 18d are No.
8 terminals. An on / off control signal is input from the interface 16 to each base. Opening / closing means 1
The opening and closing of 8f is also controlled by the interface 16.

Next, the A / D conversion circuit 19 has a No. The power supply voltage is supplied from the terminal of No. 8 through the resistor 51, and the tenth terminal (No. 13) passes through the resistor 51. 8 terminals. The operation / non-operation of the A / D conversion circuit 19 is controlled by the interface 16. In addition, the ninth terminal (No. 18) and the No. The terminals of 19 are coupled together by a capacitor 52. In addition, No. A DC cut capacitor 53 is inserted between the terminal 18 and the other input end of the intermediate frequency amplifier circuit 23. further,
The ninth terminal (No. 18) has a No. The power supply voltage is supplied from the terminal 8 through the resistor 54.

The UHF high frequency amplifier circuit 24 is composed of a FET (field effect transistor), and its first gate has UH.
An F band television signal is input. The amplified television signal is input to the first terminal (No. 23) through the UHF tuning circuit 25, and is also transmitted through the inductance element 55 for phase inversion. It is input to 24 terminals. Therefore, the first terminal (No. 23) and the No. 24
A television signal is balanced-input between the terminals.
Further, one end of the resonance inductance element 56 is connected to the first gate, and the other end is grounded by the resistor 57. Then, the resonance inductance element 56 and the resistor 57
The connection point with No. 24 terminals.

A power supply voltage is supplied to the anode of the switch diode 26a in the VHF tuning circuit 26, and its cathode is connected to the second terminal (No. 17) in a direct current manner. Further, the intermediate frequency tuning circuit 27 is No. 19,
No. A parallel tuning circuit 27a to which an intermediate frequency signal is input from both terminals of 20 and one end of the parallel tuning circuit 27 and N
o. It has the 1st trap circuit 27b inserted between the terminal of 11, and the 2nd trap circuit 27c inserted between the other end and the 9th terminal (No. 18). The second trap circuit 27c is provided with a varactor diode Dv, and a power supply voltage is applied to its cathode. Also,
The anode is connected to the ninth terminal (No. 18). Therefore, the capacitor 52 is connected in parallel to the varactor diode Dv in the second trap circuit 27c. These trap circuits 27b and 27c are for attenuating the video intermediate frequency signal of one adjacent channel in the intermediate frequency band and attenuating the audio intermediate frequency signal of the other adjacent channel.

In the above structure, when receiving a low band television signal in the VHF band, the respective transistors of the first to third switch circuits 18a, 18b and 18c are turned off. Then, the first terminal (No. 2)
The switching voltage of 3) becomes low level, and the UHF high frequency amplifier circuit 24 does not operate because the bias voltage is not applied to the first gate. On the other hand, since the switching voltage of the second terminal (No. 17) becomes high level, the VHF tuning circuit 26 tunes to the low band because the switch diode 26a is turned off. When receiving a high-band television signal, the transistor of the first switch circuit 18a and the transistor 18b are turned off, and the transistor of the second switch circuit 18c is turned on. Then, the switching voltage of the second terminal (No. 17) becomes low level, and V
The HF tuning circuit 26 tunes to a high band because the switch diode 26a is turned on. When receiving a UHF band television signal, the first switch circuit 1
The transistor 8a and the transistor 18b are turned on, and the transistor of the second switch circuit 18c is turned off. Then, the switching voltage of the first terminal (No. 23) becomes high level, and the UHF high frequency amplifier circuit 24 operates by applying the bias voltage to the first gate.

Therefore, the first terminal (No. 23) is UH
Not only as an input terminal for F band television signals,
It is also used as an output terminal of a switching voltage for the switch circuit 18a for switching the operation of the UHF high frequency amplifier circuit 24. Furthermore, the tuning frequency band of the VHF tuning circuit 26 can be switched only by the switching voltage of the second terminal (No. 17). Therefore, the number of terminals that output a switching voltage for switching the reception band can be reduced.

On the other hand, the switching voltage of the ninth terminal (No. 18) changes to high level or low level by turning on or off the transistor in the third switch circuit 18d. Correspondingly, the capacitance value of the varactor diode Dv in the second trap circuit 27c changes, and the trap frequency changes to high or low. Therefore, it is possible to select an appropriate trap frequency corresponding to two types of television signals in which the difference between the video intermediate frequency and the audio intermediate frequency is different. Therefore, the ninth terminal (No. 1) to which the intermediate frequency signal is input
Since 8) can be used as the switching voltage output terminal of the third switch circuit 18d, the trap frequency can be changed without increasing the number of terminals.

When the opening / closing means 18f is closed, the switching voltage of the fourth switch circuit 18e can be output to the tenth terminal (No. 13). When the opening / closing means 18f is opened and an analog voltage such as an AFT (automatic fine tuning) voltage is input to the tenth terminal (No. 13), a digital signal is output from the A / D conversion circuit 19 and the interface 1
Can be sent to 6. The digital signal is sent from the interface 16 to the PLL circuit 17, and the PLL circuit 17 controls the oscillation frequencies of the oscillation circuits 13, 14, and 15. Therefore, the tenth terminal (No. 13) can be used not only as an analog voltage input terminal but also as an output terminal for the switching voltage of the fourth switch circuit 18e.

[0048]

As described above, according to the present invention, the UHF band television signal is input via the UHF high frequency amplifier circuit which is provided outside and is switched to the operating state at least when receiving the UHF band television signal. The first terminal to be connected and the VHF tuning circuit provided outside are connected to V
A first terminal for generating a switching voltage for switching the operating state of the UHF high-frequency amplifier circuit, and a second terminal for switching the band so as to tune to the low band or the high band of the HF band. Circuit and VHF
A second switch circuit that generates a switching voltage for switching the band of the tuning circuit, outputs the switching voltage of the first switch circuit to the first terminal, and outputs the switching voltage of the second switch circuit to the first terminal. Since it is output to the second terminal, the low band, high band and UHF band of the VHF band can be received even if the number of terminals is reduced.

A third terminal to which one end of a first resonance circuit provided outside is connected and a fourth terminal and a fifth terminal to which both ends of a second resonance circuit provided outside are respectively connected. A terminal and a sixth and a seventh terminal to which both ends of a third resonance circuit provided outside are connected respectively, and one base and the other collector of the first two oscillation transistors are individually provided. Coupled to the third terminal by means of a coupling capacitor, and one base and the other collector of the second two oscillation transistors are coupled to the fourth terminal by separate coupling capacitors, respectively, and the second two oscillation transistors are coupled. The other base and one collector of each of them are coupled to the fifth terminal by respective coupling capacitors, and one base and the other collector of the third two oscillation transistors are individually coupled. Since the second capacitor and the second collector of the second two oscillation transistors are respectively coupled to the seventh terminal by a coupling capacitor and the individual coupling capacitors are coupled to the seventh terminal, three oscillation circuits are formed. Therefore, the number of terminals can be reduced.

Also, the intermediate frequency amplifier circuit and the eighth terminal for outputting the intermediate frequency signal are provided, and the intermediate frequency amplifier circuit is configured as a balanced input type and an unbalanced output type, and the output terminal of the intermediate frequency amplifier circuit is Since it is connected to the eighth terminal, the number of terminals can be reduced.

Further, a ninth terminal externally provided to which the balanced output end of the intermediate frequency tuning circuit is connected is provided, and the intermediate frequency tuning circuit traps the video intermediate frequency signal or the audio intermediate frequency signal of the adjacent channel. It has a circuit and is configured to switch the trap frequency of the trap circuit.The switching voltage generation circuit is provided with a third switch circuit that generates a switching voltage for switching the trap frequency. Since the voltage is output to the ninth terminal, the trap frequency can be switched without increasing the number of terminals.

Further, the analog-digital conversion circuit and the tenth terminal for inputting an analog voltage to the analog-digital conversion circuit are provided, and the switching voltage generation circuit outputs a high-level or low-level voltage. Switch circuit,
An opening / closing means interposed between the tenth terminal and the fourth switch circuit is provided, and the opening / closing means is opened when operating the analog / digital conversion circuit, and when operating the fourth switch circuit. Since the opening / closing means is in the closed state, one terminal can be commonly used as the analog voltage input terminal and the switching voltage output terminal.

Further, a PLL circuit, a reference oscillating circuit for supplying a reference signal to the PLL circuit, and an eleventh terminal for connecting an externally provided oscillating element to the reference oscillating circuit are provided. Since the terminals having the low potential in high frequency are provided on both sides, the effect that the radiation of the reference signal appearing at the eleventh terminal can be blocked by the terminals on both sides is obtained.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an integrated circuit for a tuner of the present invention.

FIG. 2 is a detailed connection diagram of the oscillator circuit and its peripheral circuits in the tuner integrated circuit of the present invention.

FIG. 3 is a detailed connection diagram of a band switching voltage generating circuit and its peripheral circuits in the tuner integrated circuit of the present invention.

FIG. 4 is a block diagram showing a configuration of a conventional tuner integrated circuit.

[Explanation of symbols]

10 integrated circuits 10a, 10b side 11 UHF mixing circuit 12 VHF mixing circuit 13 VHF low-band oscillator circuit i3a, 13b oscillation transistor 13c, 13d coupling capacitors 13e diode 13f resistance 14 VHF high band oscillator 14a, 14b oscillation transistor 14c, 14d, 14e, 14f Coupling capacitors 14g, 14h diode 14i resistance 15 UHF oscillator circuit 15a, 15b oscillation transistor 15c, 15d, 15e, 15f Coupling capacitors 15g, 15h diode 15i resistance 16 interfaces 17 PLL circuit 18 Switching voltage generator 18a First switch circuit 18b transistor 18c Second switch circuit 18d Third switch circuit 18e Fourth switch circuit 18f opening and closing means 19 Analog-to-digital conversion circuit 20 charge pump 21 Tuning voltage generator 21a Junction FET 21b NPN transistor 21c, 21d resistance 22 Reference oscillator 23 Intermediate frequency amplification circuit 24 UHF high frequency amplifier circuit 25 UHF tuning circuit 26 VHF tuning circuit 27 Intermediate frequency tuning circuit 28 First resonance circuit 28a Varactor diode 29 Second resonance circuit 29a Varactor diode 30 Third swing circuit 30a Varactor diode 31 resonator 32 pull-up resistor 41 Temperature compensation circuit 41a Junction FET 41b, 41c resistance 51, 54, 57, 58 resistance 52, 53 condenser 55, 56 Inductance element No. 23 First terminal No. 17 Second terminal No. 1 Third terminal No. 2 4th terminal No. 3 Fifth terminal No. 4th terminal No. 5 Seventh terminal No. 12 Eighth terminal No. 18 Ninth terminal No. 13th terminal No. 7 Eleventh terminal

Claims (6)

[Claims] 1. A UHF band television signal is inputted via a switching voltage generating circuit and a UHF high frequency amplifier circuit which is provided outside and which is switched to an operating state at least when receiving a UHF band television signal. And a second terminal for band switching an externally provided VHF tuning circuit so as to tune to a low band or a high band of the VHF band, and the switching voltage generating circuit includes the UHF high frequency amplifying circuit. A first switch circuit for generating a switching voltage for switching an operating state, and the VH
A second switch circuit for generating a switching voltage for switching the band of the F tuning circuit, outputting the switching voltage of the first switch circuit to the first terminal, and An integrated circuit for a tuner, wherein a switching voltage is output to the second terminal. 2. A first two oscillation transistors whose emitters are connected to each other, a second two oscillation transistors whose emitters are connected to each other, and a third two oscillations whose emitters are connected to each other. A transistor,
A third terminal to which one end of a first resonance circuit provided outside is connected, a fourth terminal and a fifth terminal to which both ends of a second resonance circuit provided outside are respectively connected, and Sixth, in which both ends of the provided third resonance circuit are respectively connected,
A seventh terminal, wherein one base and the other collector of the first two oscillation transistors are respectively coupled to the third terminal by separate coupling capacitors, and the second oscillation transistor of the second two oscillation transistors is coupled. One base and the other collector are respectively coupled to the fourth terminal by separate coupling capacitors, and the other base and one collector of the second two oscillation transistors are respectively coupled by the individual coupling capacitors. The third base and the other collector of the third two oscillation transistors are respectively coupled to the sixth terminal by separate coupling capacitors, and the other of the second two oscillation transistors is coupled. The base and one collector are coupled to the seventh terminal by separate coupling capacitors, respectively. Tuner integrated circuit according to Motomeko 1. 3. An intermediate frequency amplifier circuit and an eighth terminal for outputting an intermediate frequency signal, the intermediate frequency amplifier circuit being configured as a balanced input type and an unbalanced output type, and an output of the intermediate frequency amplifier circuit. The tuner integrated circuit according to claim 1 or 2, wherein an end is connected to the eighth terminal. 4. A ninth terminal externally provided to which a balanced output terminal of an intermediate frequency tuning circuit is connected, said intermediate frequency tuning circuit attenuating a video intermediate frequency signal or an audio intermediate frequency signal of an adjacent channel. A trap circuit is provided, the trap frequency of the trap circuit is configured to be switched, and the switch voltage generation circuit is provided with a third switch circuit that generates a switch voltage for switching the trap frequency. 4. The tuner integrated circuit according to claim 1, wherein the switching voltage of the switch circuit is output to the ninth terminal. 5. An analog-digital conversion circuit, and a tenth terminal for inputting an analog voltage to the analog-digital conversion circuit, wherein the switching voltage generation circuit outputs a high-level or low-level voltage. Four switch circuits and opening / closing means interposed between the tenth terminal and the fourth switch circuit are provided, and the opening / closing means is opened when operating the analog / digital conversion circuit. The opening / closing means is closed when operating the fourth switch circuit.
An integrated circuit for a tuner according to any one of 1. 6. A PLL circuit, a reference oscillating circuit for supplying a reference signal to the PLL circuit, and an eleventh terminal for connecting an externally provided oscillating element to the reference oscillating circuit. 6. The tuner integrated circuit according to claim 1, further comprising a terminal having a low electric potential at a high frequency on both sides of the terminal.