JP2003218489A - Wiring board - Google Patents
Wiring boardInfo
- Publication number
- JP2003218489A JP2003218489A JP2002015423A JP2002015423A JP2003218489A JP 2003218489 A JP2003218489 A JP 2003218489A JP 2002015423 A JP2002015423 A JP 2002015423A JP 2002015423 A JP2002015423 A JP 2002015423A JP 2003218489 A JP2003218489 A JP 2003218489A
- Authority
- JP
- Japan
- Prior art keywords
- melting point
- low melting
- brazing material
- point brazing
- pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 35
- 239000000758 substrate Substances 0.000 claims abstract description 29
- 239000004020 conductor Substances 0.000 claims abstract description 20
- 239000012777 electrically insulating material Substances 0.000 claims abstract description 5
- 238000005219 brazing Methods 0.000 abstract description 64
- 239000000463 material Substances 0.000 abstract description 59
- 238000002844 melting Methods 0.000 abstract description 57
- 230000008018 melting Effects 0.000 abstract description 55
- 229910052751 metal Inorganic materials 0.000 description 14
- 239000002184 metal Substances 0.000 description 14
- 239000000919 ceramic Substances 0.000 description 9
- 230000008646 thermal stress Effects 0.000 description 8
- 230000000694 effects Effects 0.000 description 7
- 239000000945 filler Substances 0.000 description 7
- 238000000034 method Methods 0.000 description 7
- 229920005989 resin Polymers 0.000 description 6
- 239000011347 resin Substances 0.000 description 6
- 239000011521 glass Substances 0.000 description 5
- 239000003870 refractory metal Substances 0.000 description 4
- 239000002904 solvent Substances 0.000 description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 4
- 229910052721 tungsten Inorganic materials 0.000 description 4
- 239000010937 tungsten Substances 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 238000004873 anchoring Methods 0.000 description 3
- 239000002241 glass-ceramic Substances 0.000 description 3
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 3
- 239000000843 powder Substances 0.000 description 3
- 238000007650 screen-printing Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- WPBNNNQJVZRUHP-UHFFFAOYSA-L manganese(2+);methyl n-[[2-(methoxycarbonylcarbamothioylamino)phenyl]carbamothioyl]carbamate;n-[2-(sulfidocarbothioylamino)ethyl]carbamodithioate Chemical compound [Mn+2].[S-]C(=S)NCCNC([S-])=S.COC(=O)NC(=S)NC1=CC=CC=C1NC(=S)NC(=O)OC WPBNNNQJVZRUHP-UHFFFAOYSA-L 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- BRPQOXSCLDDYGP-UHFFFAOYSA-N calcium oxide Chemical compound [O-2].[Ca+2] BRPQOXSCLDDYGP-UHFFFAOYSA-N 0.000 description 1
- 239000000292 calcium oxide Substances 0.000 description 1
- ODINCKMPIJJUCX-UHFFFAOYSA-N calcium oxide Inorganic materials [Ca]=O ODINCKMPIJJUCX-UHFFFAOYSA-N 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- KZHJGOXRZJKJNY-UHFFFAOYSA-N dioxosilane;oxo(oxoalumanyloxy)alumane Chemical compound O=[Si]=O.O=[Si]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O KZHJGOXRZJKJNY-UHFFFAOYSA-N 0.000 description 1
- 238000007606 doctor blade method Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- LQBJWKCYZGMFEV-UHFFFAOYSA-N lead tin Chemical compound [Sn].[Pb] LQBJWKCYZGMFEV-UHFFFAOYSA-N 0.000 description 1
- 239000000395 magnesium oxide Substances 0.000 description 1
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 1
- AXZKOIWUVFPNLO-UHFFFAOYSA-N magnesium;oxygen(2-) Chemical compound [O-2].[Mg+2] AXZKOIWUVFPNLO-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052863 mullite Inorganic materials 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 238000005096 rolling process Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000003566 sealing material Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
- 230000035882 stress Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
Abstract
(57)【要約】
【課題】配線基板の接続パッドと外部電気回路とを接続
する低融点ロウ材に破断が発生し、半導体素子の外部電
気回路への接続信頼性が低下する。
【解決手段】電気絶縁材料から成り、表面に半導体素子
搭載部を有する四角形状の絶縁基体1と、該絶縁基体1
の下面に形成された多数の接続パッド6と、前記絶縁基
体1の前記搭載部から前記接続パッド6にかけて導出さ
れる複数個の配線導体2とから成る配線基板4であっ
て、前記絶縁基体1下面のコーナー部に補助パッド9を
形成するとともに該補助パッド9の表面に窪み部Aや切
り欠き部Bを設けた。
(57) Abstract: A breakage occurs in a low melting point brazing material for connecting a connection pad of a wiring board to an external electric circuit, and the reliability of connection of the semiconductor element to the external electric circuit is reduced. A square-shaped insulating base made of an electrically insulating material and having a semiconductor element mounting portion on a surface, and the insulating base 1
A wiring board 4 comprising: a large number of connection pads 6 formed on the lower surface of the substrate; and a plurality of wiring conductors 2 extending from the mounting portion of the insulating base 1 to the connection pads 6. Auxiliary pads 9 were formed at the corners of the lower surface, and dents A and notches B were provided on the surface of the auxiliary pads 9.
Description
【0001】[0001]
【発明の属する技術分野】本発明は半導体素子収納用パ
ッケージ等に用いられる配線基板に関し、詳しくは実装
した半導体素子の各電極を所定の外部電気回路に長期間
にわたり安定して電気的に接続させることができる配線
基板に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board used for a package for accommodating semiconductor elements, and more particularly, to stably and electrically connect each electrode of a mounted semiconductor element to a predetermined external electric circuit for a long period of time. The present invention relates to a wiring board that can be used.
【0002】[0002]
【従来の技術】従来、半導体素子が搭載される配線基板
は、ガラスセラミック焼結体等の電気絶縁材料から成
り、その表面に半導体素子が搭載される搭載部を有する
絶縁基体と、絶縁基体の半導体素子搭載部またはその周
辺から下面にかけて導出される、例えば銅や銀等の金属
粉末から成る複数個の配線導体と、絶縁基体の下面に形
成され、前記配線導体と電気的に接続された複数個の平
面四角形状をなす接続パッドとから構成されており、絶
縁基体の搭載部に半導体素子をガラス、樹脂、ロウ材等
から成る接着剤を介して接着固定させるとともに半導体
素子の各電極と配線導体とをボンディングワイヤ等の電
気的接続手段を介して電気的に接続し、しかる後、必要
に応じて前記半導体素子を蓋体や封止樹脂で気密封止さ
せることによって半導体装置となる。2. Description of the Related Art Conventionally, a wiring board on which a semiconductor element is mounted is made of an electrically insulating material such as a glass ceramic sintered body, and has an insulating base having a mounting portion on which the semiconductor element is mounted, and an insulating base. A plurality of wiring conductors made of, for example, a metal powder such as copper or silver, which is led out from the semiconductor element mounting portion or its periphery to the lower surface, and a plurality of wiring conductors formed on the lower surface of the insulating base and electrically connected to the wiring conductors. Each of the connection pads having a rectangular shape in a plane, and the semiconductor element is adhered and fixed to the mounting portion of the insulating substrate through an adhesive made of glass, resin, brazing material, and each electrode and wiring of the semiconductor element. The conductor is electrically connected via an electrical connecting means such as a bonding wire, and then the semiconductor element is hermetically sealed with a lid or a sealing resin if necessary. The body system.
【0003】かかる半導体装置は、外部電気回路基板上
に、該外部電気回路基板の回路配線と絶縁基体下面の接
続パッドとが、間に錫−鉛半田等の低融点ロウ材を挟ん
で対向するよう載置させ、しかる後、前記低融点ロウ材
を約200℃〜300℃の温度で加熱溶融させ、外部電
気回路基板の回路配線と絶縁基体下面の接続パッドとを
接合させることにより外部電気回路基板に実装され、同
時に配線基板に搭載されている半導体素子の各電極が配
線導体および低融点ロウ材を介して外部電気回路基板に
電気的に接続されることとなる。In such a semiconductor device, on the external electric circuit board, the circuit wiring of the external electric circuit board and the connection pad on the lower surface of the insulating substrate face each other with a low melting point brazing material such as tin-lead solder interposed therebetween. Then, the low melting point brazing material is heated and melted at a temperature of about 200 ° C. to 300 ° C., and the circuit wiring of the external electric circuit board and the connection pad on the lower surface of the insulating substrate are joined to each other to form an external electric circuit. Each electrode of the semiconductor element mounted on the board and simultaneously mounted on the wiring board is electrically connected to the external electric circuit board through the wiring conductor and the low melting point brazing material.
【0004】[0004]
【発明が解決しようとする課題】しかしながら、上記従
来の半導体素子が搭載される配線基板は絶縁基体がガラ
スセラミック焼結体等のセラミックス材料で形成されて
おり、その熱膨張係数が約3×10-6/℃〜10×10
-6/℃であるのに対し、外部電気回路基板は一般にガラ
スエポキシ樹脂等の樹脂材で形成されており、その熱膨
張係数が30×10-6/℃〜50×10-6/℃であり、
大きく相異することから、配線基板の接続パッドと外部
電気回路基板の回路配線とを低融点ロウ材を介して接合
させて外部電気回路基板上に半導体装置を実装した後、
半導体素子の作動時に発する熱が配線基板の絶縁基体と
外部電気回路基板に繰り返し作用すると、両者間に両者
の熱膨張係数の差に起因して大きな熱応力が繰り返し生
じ、この熱応力で接続パッドと低融点ロウ材との界面付
近で低融点ロウ材に破断が発生し、半導体素子と外部電
気回路との電気的接続が短期間で破れてしまうという問
題があった。However, in the wiring board on which the conventional semiconductor element is mounted, the insulating substrate is made of a ceramic material such as a glass ceramic sintered body, and its thermal expansion coefficient is about 3 × 10. -6 / ℃ ~ 10 × 10
The external electric circuit board is generally formed of a resin material such as glass epoxy resin, while its thermal expansion coefficient is 30 × 10 -6 / ° C to 50 × 10 -6 / ° C. Yes,
Because of the large difference, after connecting the connection pad of the wiring board and the circuit wiring of the external electric circuit board via the low melting point brazing material and mounting the semiconductor device on the external electric circuit board,
When the heat generated during the operation of the semiconductor element repeatedly acts on the insulating substrate of the wiring board and the external electric circuit board, a large thermal stress is repeatedly generated between them due to the difference in the thermal expansion coefficient between the two, and the thermal stress causes the connection pad There is a problem that the low melting point brazing material is ruptured near the interface between the low melting point brazing material and the low melting point brazing material, and the electrical connection between the semiconductor element and the external electric circuit is broken in a short period of time.
【0005】そこで、上記欠点を解消するために絶縁基
体のコーナー部に補助パッドを設け、この補助パッドを
外部電気回路基板に設けたダミーのパッド等に低融点ロ
ウ材を介し接続することによって接続パッドと低融点ロ
ウ材との間に作用する熱応力を除去し、接続パッドと低
融点ロウ材との接合を強固として半導体素子と外部電気
回路との電気的接続の信頼性を向上させるという手段が
考えられる。Therefore, in order to solve the above-mentioned drawbacks, auxiliary pads are provided at the corners of the insulating base, and the auxiliary pads are connected to dummy pads or the like provided on the external electric circuit board by way of a low melting point brazing material. Means for removing the thermal stress acting between the pad and the low melting point brazing material, strengthening the bond between the connection pad and the low melting point brazing material, and improving the reliability of the electrical connection between the semiconductor element and the external electric circuit. Can be considered.
【0006】しかしながら、配線基板の絶縁基体のコー
ナー部に補助パッドを設けた場合、外部電気回路基板上
に配線基板を実装した直後は、補助パッドと外部電気回
路基板に設けたダミーのパッド等との接合が接続パッド
と低融点ロウ材との間に作用する熱応力を除去し、接続
パッドと低融点ロウ材との界面付近で低融点ロウ材に破
断が生じるのを有効に防止することができるものの配線
基板の絶縁基体と外部電気回路基板との間に熱応力が繰
り返し発生作用した際、補助パッドと低融点ロウ材との
界面付近の低融点ロウ材に破断が発生して接続パッドと
低融点ロウ材との界面付近の低融点ロウ材に破断が発生
して接続パッドと低融点ロウ材との間に熱応力が作用す
るのを除去することができなくなり、その結果、配線基
板の絶縁基体と外部電気回路基板との間に発生する熱応
力によって接続パッドと低融点ロウ材との界面付近で低
融点ロウ材に破断が発生し、半導体素子と外部電気回路
との電気的接続の信頼性を長期間にわたり維持すること
ができないという欠点を有する。However, when the auxiliary pad is provided at the corner portion of the insulating substrate of the wiring board, immediately after the wiring board is mounted on the external electric circuit board, the auxiliary pad and the dummy pad provided on the external electric circuit board are provided. Can remove the thermal stress acting between the connection pad and the low melting point brazing material and effectively prevent the low melting point brazing material from breaking near the interface between the connection pad and the low melting point brazing material. Although it is possible, when thermal stress is repeatedly generated between the insulating substrate of the wiring board and the external electric circuit board, the low melting point brazing material near the interface between the auxiliary pad and the low melting point brazing material breaks and the connection pad is formed. It becomes impossible to eliminate the fact that the low melting point brazing material near the interface with the low melting point brazing material breaks and the thermal stress acts between the connection pad and the low melting point brazing material. Insulating substrate and outside The thermal stress generated between the electric circuit board and the low melting point brazing material breaks near the interface between the connection pad and the low melting point brazing material, increasing the reliability of the electrical connection between the semiconductor element and the external electric circuit. It has the drawback that it cannot be maintained for a period of time.
【0007】特に、近時、配線基板の小型化が著しく、
また、半導体素子等の電極数の増加に対応して接続パッ
ドの数も多くなり、絶縁基体の下面に高密度で形成され
るようになりつつあるため、補助パッドの面積をあまり
大きくすることできず、配線基板と外部電気回路基板と
の接続信頼性の向上は、さらに難しくなってきている。Particularly, in recent years, the miniaturization of wiring boards has become remarkable,
In addition, the number of connection pads has increased in response to the increase in the number of electrodes of semiconductor elements and the like, and the density is increasing to be formed on the lower surface of the insulating substrate, so that the area of the auxiliary pad can be made too large. Therefore, it is becoming more difficult to improve the connection reliability between the wiring board and the external electric circuit board.
【0008】[0008]
【課題を解決するための手段】本発明の配線基板は、電
気絶縁材料から成り、表面に半導体素子搭載部を有する
四角形状の絶縁基体と、該絶縁基体の下面に形成された
多数の接続パッドと、前記絶縁基体の前記搭載部から前
記接続パッドにかけて導出される複数個の配線導体とか
ら成る配線基板であって、前記絶縁基体下面のコーナー
部に補助パッドを形成するとともに該補助パッドの表面
に窪み部および/または切り欠き部を設けたことを特徴
とするものである。A wiring board of the present invention is made of an electrically insulating material and has a rectangular insulating base having a semiconductor element mounting portion on its surface, and a large number of connection pads formed on the lower surface of the insulating base. And a plurality of wiring conductors led out from the mounting portion of the insulating base to the connection pad, the auxiliary pad being formed at a corner portion of the lower surface of the insulating base, and the surface of the auxiliary pad. It is characterized in that a recessed portion and / or a cutout portion is provided in.
【0009】また本発明の配線基板は、前記窪み部およ
び/または切り欠き部が複数あり、メッシュ状に配列さ
れていることを特徴とするものである。The wiring board of the present invention is characterized in that it has a plurality of the recessed portions and / or cutout portions and is arranged in a mesh shape.
【0010】本発明の配線基板によれば、絶縁基体下面
のコーナー部に補助パッドを形成するとともに、該補助
パッドに窪み部や切り欠き部を設けたことから、この窪
み部や切り欠き部の側壁面の分、補助パッドと低融点ロ
ウ材との接合面積を増加させるとともに低融点ロウ材が
補助パッドの窪み部や切り欠き部内に入り込んで大きな
アンカー効果を得ることができ、これによって低融点ロ
ウ材を接続パッドに強固に接合することができる。According to the wiring board of the present invention, since the auxiliary pad is formed at the corner of the lower surface of the insulating substrate, and the auxiliary pad is provided with the recess or the notch, the recess or the notch is formed. The side wall surface increases the bonding area between the auxiliary pad and the low melting point brazing filler metal, and the low melting point brazing filler metal can enter the recesses or notches of the auxiliary pad to obtain a large anchoring effect. The brazing material can be firmly bonded to the connection pad.
【0011】特に前記窪み部や切り欠き部を複数設け、
かつメッシュ状に配列しておくと低融点ロウ材と補助パ
ッドとの接合面積がより一層増加するとともに複数の窪
み部や切り欠き部内に低融点ロウ材が入り込んで極めて
大きなアンカー効果を得ることができ、これによって接
続パッドと低融点ロウ材との接合が長期間に亘り維持す
ることができ、半導体素子と外部電気回路との電気的接
続の信頼性を極めて優れたものとすることができる。In particular, a plurality of the recesses and the notches are provided,
Moreover, if they are arranged in a mesh shape, the bonding area between the low melting point brazing material and the auxiliary pad is further increased, and the low melting point brazing material enters into the plurality of recesses or cutouts, and an extremely large anchor effect can be obtained. As a result, the bonding between the connection pad and the low melting point brazing material can be maintained for a long period of time, and the reliability of the electrical connection between the semiconductor element and the external electric circuit can be made extremely excellent.
【0012】[0012]
【発明の実施の形態】次に本発明を添付の図面を基にし
て詳細に説明する。図1は、本発明の配線基板を使用し
た半導体素子収納用パッケージの一実施例を示す断面
図、図2はその下面図、図3は要部拡大平面図であり、
1は絶縁基体、2は配線導体である。この絶縁基体1と
配線導体2とで半導体素子3を搭載する配線基板4が構
成される。DETAILED DESCRIPTION OF THE INVENTION The present invention will now be described in detail with reference to the accompanying drawings. 1 is a cross-sectional view showing an embodiment of a package for housing a semiconductor device using a wiring board of the present invention, FIG. 2 is a bottom view thereof, and FIG. 3 is an enlarged plan view of a main part,
Reference numeral 1 is an insulating substrate, and 2 is a wiring conductor. The insulating substrate 1 and the wiring conductor 2 constitute a wiring board 4 on which the semiconductor element 3 is mounted.
【0013】前記絶縁基体1は、例えば、酸化アルミニ
ウム質焼結体、ガラスセラミック焼結体、窒化アルミニ
ウム質焼結体、ムライト質焼結体、炭化珪素質焼結体等
の電気絶縁材料から成り、その上面に半導体素子3が搭
載収容される凹部1aを有し、該凹部1a底面には半導
体素子3がガラスや樹脂、ロウ材等の接着材を介して接
着固定される。The insulating substrate 1 is made of an electrically insulating material such as an aluminum oxide sintered body, a glass ceramic sintered body, an aluminum nitride sintered body, a mullite sintered body or a silicon carbide sintered body. The upper surface of the recess 1a has a recess 1a in which the semiconductor element 3 is mounted and accommodated, and the semiconductor element 3 is bonded and fixed to the bottom of the recess 1a via an adhesive material such as glass, resin, or brazing material.
【0014】前記絶縁基体1は、例えば、酸化アルミニ
ウム質焼結体から成る場合、酸化アルミニウム、酸化珪
素、酸化カルシウム、酸化マグネシウム等の原料粉末に
適当な有機バインダー、溶剤を添加混合して泥漿状のセ
ラミックスラリーとなすとともに該セラミックスラリー
を従来周知のドクターブレード法やカレンダーロール法
等のシート成型技術を採用してシート状のセラミックグ
リーンシート(セラミック生シート)を得、しかる後、
前記セラミックグリーンシートを切断加工や打ち抜き加
工により適当な形状とするとともにこれを複数枚積層
し、最後に前記積層されたセラミックグリーンシートを
還元雰囲気中、約1600℃の温度で焼成することによ
って製作される。When the insulating base 1 is made of, for example, an aluminum oxide sintered body, a powdery raw material such as aluminum oxide, silicon oxide, calcium oxide, magnesium oxide, etc. is mixed with an appropriate organic binder and solvent, and mixed in a slurry form. The ceramic slurry is formed into a sheet-like ceramic green sheet (ceramic green sheet) by employing a sheet forming technique such as a doctor blade method and a calendar roll method which are well known in the art, and thereafter,
It is manufactured by forming the ceramic green sheets into an appropriate shape by cutting or punching, stacking a plurality of these, and finally firing the stacked ceramic green sheets at a temperature of about 1600 ° C. in a reducing atmosphere. It
【0015】また前記絶縁基体1は、その凹部1a周辺
から側面を介し下面にかけて多数の配線導体2が被着形
成されており、該配線導体2の凹部1a周辺部位には半
導体素子3の各電極がボンディングワイヤ5を介して電
気的に接続され、また絶縁基体1下面に導出された部位
には配線導体2と電気的に接続する複数の平面四角形状
をなす接続パッド6が形成されている。A large number of wiring conductors 2 are formed on the insulating substrate 1 from the periphery of the concave portion 1a to the lower surface via the side surface, and the electrodes of the semiconductor element 3 are formed in the peripheral portion of the wiring conductor 2 around the concave portion 1a. Are electrically connected via bonding wires 5, and a plurality of connection pads 6 each having a rectangular shape in plan view are formed at a portion led out to the lower surface of the insulating substrate 1 so as to be electrically connected to the wiring conductor 2.
【0016】前記配線導体2および接続パッド6は、半
導体素子3の電極を外部電気回路に接続する作用をな
し、例えば、タングステン、モリブデン、マンガン等の
高融点金属からなり、タングステン等の高融点金属粉末
に有機溶剤、溶媒を添加混合して得た金属ペーストを絶
縁基体1となるセラミックグリーンシートに予め従来周
知のスクリーン印刷法により所定パターンに印刷塗布し
ておくことによって、絶縁基体1の凹部1a周辺から下
面にかけて被着形成される。The wiring conductor 2 and the connection pad 6 have a function of connecting the electrode of the semiconductor element 3 to an external electric circuit, and are made of, for example, a refractory metal such as tungsten, molybdenum or manganese, and a refractory metal such as tungsten. The metal paste obtained by adding and mixing an organic solvent and a solvent to the powder is previously printed and applied in a predetermined pattern on the ceramic green sheet to be the insulating substrate 1 by a conventionally known screen printing method, whereby the concave portion 1a of the insulating substrate 1 is formed. It is adhered and formed from the periphery to the lower surface.
【0017】また前記接続パッド6は、配線基板4を外
部電気回路基板に実装する外部端子として作用し、低融
点ロウ材7を介して外部電気回路基板8の回路配線8a
に接合され、これにより半導体素子3の電極が外部電気
回路基板8の回路配線8aと電気的に接続される。Further, the connection pads 6 act as external terminals for mounting the wiring board 4 on the external electric circuit board, and the circuit wiring 8a of the external electric circuit board 8 via the low melting point brazing material 7.
, So that the electrode of the semiconductor element 3 is electrically connected to the circuit wiring 8a of the external electric circuit board 8.
【0018】更に前記絶縁基体1は、図2、図3に示す
ように、下面の各コーナー部に平面四角形状をなす補助
パッド9が形成されており、かつ該補助パッド9の表面
には窪み部Aや切り欠き部Bが形成されている。Further, as shown in FIGS. 2 and 3, the insulating base 1 is formed with auxiliary pads 9 each having a rectangular shape in plan view at each corner of the lower surface thereof, and the auxiliary pads 9 have depressions on the surface thereof. A portion A and a cutout portion B are formed.
【0019】前記補助パッド9は、外部電気回路基板8
に設けたダミーのパッド等に低融点ロウ材7を介して接
合され、絶縁基体1と外部電気回路基板8との間に生じ
る熱応力が接続パッド6と低融点ロウ材7との界面に作
用するのを防止し、これによって接続パッド6と外部電
気回路基板8の回路配線8aとの低融点ロウ材7を介し
ての接合が強固となる。The auxiliary pad 9 serves as an external electric circuit board 8.
Is bonded to a dummy pad or the like provided on the substrate via the low melting point brazing filler metal 7, and thermal stress generated between the insulating substrate 1 and the external electric circuit board 8 acts on the interface between the connection pad 6 and the low melting point brazing filler metal 7. This prevents the connection pad 6 and the circuit wiring 8a of the external electric circuit board 8 from being bonded to each other via the low melting point brazing material 7.
【0020】前記補助パッド9は例えば、タングステ
ン、モリブデン、マンガン等の高融点金属からなり、上
述の配線導体2や接続パッド6と同様の方法、具体的に
はタングステン等の高融点金属粉末に有機溶剤、溶媒を
添加混合して得た金属ペーストを絶縁基体1となるセラ
ミックグリーンシートに予め従来周知のスクリーン印刷
法により所定パターンに印刷塗布しておくことによっ
て、絶縁基体1の各コーナー部に被着形成される。The auxiliary pad 9 is made of, for example, a refractory metal such as tungsten, molybdenum, or manganese, and the same method as that for the wiring conductor 2 or the connection pad 6 described above, specifically, refractory metal powder such as tungsten is used as an organic material. A solvent and a metal paste obtained by adding and mixing the solvent are preliminarily printed and applied to a ceramic green sheet to be the insulating substrate 1 in a predetermined pattern by a conventionally known screen printing method, so that each corner portion of the insulating substrate 1 is covered. Is formed.
【0021】また前記補助パッド9の表面には窪み部A
や切り欠き部Bが形成されており、該窪み部Aや切り欠
き部Bは、補助パッド9と低融点ロウ材7との接合面積
を増加させるとともに低融点ロウ材7をその内部に入り
込ませて大きなアンカー効果を生じさせる作用をなし、
これによって低融点ロウ材7の補助パッド9に対する接
合を非常に強固なものとすることができ、補助パッド9
と低融点ロウ材7との界面付近に破断が生じることはな
く、接続パッド6と低融点ロウ材7との接合を長期間に
亘り維持することが可能となり、半導体素子3と外部電
気回路との電気的接続の信頼性を極めて優れたものとな
すことができる。A depression A is formed on the surface of the auxiliary pad 9.
And the notch B are formed, and the recess A and the notch B increase the bonding area between the auxiliary pad 9 and the low melting point brazing material 7 and allow the low melting point brazing material 7 to enter the inside thereof. And has the effect of producing a large anchor effect,
As a result, the bonding of the low melting point brazing material 7 to the auxiliary pad 9 can be made very strong, and the auxiliary pad 9
Does not break near the interface between the low melting point brazing filler metal 7 and the low melting point brazing filler metal 7, and the connection between the connection pad 6 and the low melting point brazing filler metal 7 can be maintained for a long period of time. The electrical connection reliability can be made extremely excellent.
【0022】前記補助パッド9に窪み部Aや切り欠き部
Bを設けるには、例えば、セラミックグリーンシートに
印刷塗布した補助パッド9となる金属ペーストに金型を
押圧して窪ませる方法や、切り欠き部となるような非印
刷部を設けたスクリーン製版を用いて金属ペーストを印
刷する方法等を用いることができる。In order to provide the recess A and the notch B in the auxiliary pad 9, for example, a method of pressing a metal mold into a metal paste to be the auxiliary pad 9 printed and applied on a ceramic green sheet to make a recess, or a method of cutting It is possible to use a method of printing a metal paste using a screen printing plate having a non-printing portion which becomes a cutout portion.
【0023】なお、前記補助パッド9に形成する窪み部
Aや切り欠き部Bは、その直径が50μm未満では低融
点ロウ材7の補助パッド9に対する接合を強固なものと
することが困難となる傾向がある。従って、前記窪み部
Aや切り欠き部Bは、その直径を50μm以上としてお
くことが好ましい。If the diameter of the recess A or the notch B formed on the auxiliary pad 9 is less than 50 μm, it becomes difficult to firmly bond the low melting point brazing material 7 to the auxiliary pad 9. Tend. Therefore, it is preferable that the recess A and the notch B have a diameter of 50 μm or more.
【0024】また、前記前記補助パッド9に形成する窪
み部Aや切り欠き部Bは、その深さが10μm未満では
低融点ロウ材7の補助パッド9に対する接合を強固なも
のとすることが困難となる傾向がある。従って、前記窪
み部Aや切り欠き部Bは、その深さを10μm以上とし
ておくことが好ましい。If the depth of the recess A or the notch B formed in the auxiliary pad 9 is less than 10 μm, it is difficult to firmly bond the low melting point brazing material 7 to the auxiliary pad 9. Tends to be. Therefore, it is preferable that the recess A and the notch B have a depth of 10 μm or more.
【0025】更に、前記補助パッド9に形成する窪み部
Aや切り欠き部Bは、補助パッドの表面を仮想線で10
×10の格子状にほぼ当分に区切ったとき、50/10
0(格子)を超える各格子内での占有面積が1/2を超
えるようになると、窪み部Aや切り欠き部Bの補助パッ
ド9に占める占有面積が大きくなり、補助パッド9の上
端面と低融点ロウ材7との接合面積が小さくなって、補
助パッド9に対する低融点ロウ材7の接合の信頼性が低
下するおそれがある。従って、前記補助パッド9に形成
する窪み部Aや切り欠き部Bは、補助パッドの表面を仮
想線で10×10の格子状にほぼ当分に区切ったとき、
50/100を超える各格子内での占有面積が1/2を
超えないようにして形成することが好ましい。Further, the recess A and the notch B formed on the auxiliary pad 9 are indicated by imaginary lines 10 on the surface of the auxiliary pad.
50/10 when divided into approximately 10 grids
When the occupied area in each lattice exceeding 0 (lattice) exceeds 1/2, the occupied area of the recessed portion A and the cutout portion B in the auxiliary pad 9 becomes large, and the upper surface of the auxiliary pad 9 becomes The bonding area with the low-melting point brazing material 7 may be reduced, and the reliability of bonding the low-melting point brazing material 7 to the auxiliary pad 9 may decrease. Therefore, when the surface of the auxiliary pad is divided into approximately 10 × 10 grids by virtual lines, the depressions A and the cutouts B formed in the auxiliary pad 9 are approximately divided into
It is preferable that the area occupied in each lattice exceeding 50/100 does not exceed 1/2.
【0026】また更に前記窪み部Aや切り欠き部Bは図
4に示すように複数形成し、かつメッシュ状に配列させ
ておくと低融点ロウ材7と補助パッドとの接合面積がよ
り一層増加するとともに複数の窪み部や切り欠き部内に
低融点ロウ材が入り込んで極めて大きなアンカー効果を
得ることができ、これによって低融点ロウ材7の補助パ
ッド9に対する接合を非常に強固なものとすることがで
き、補助パッド9と低融点ロウ材7との界面付近に破断
が生じることはなく、接続パッド6と低融点ロウ材7と
の接合を長期間に亘り維持することが可能となり、半導
体素子3と外部電気回路との電気的接続の信頼性を極め
て優れたものとなすことができる。Further, if a plurality of the recesses A and the notches B are formed and arranged in a mesh as shown in FIG. 4, the bonding area between the low melting point brazing material 7 and the auxiliary pad is further increased. In addition, the low-melting-point brazing material can enter into the plurality of recesses or cutouts to obtain an extremely large anchoring effect, thereby making the bonding of the low-melting-point brazing material 7 to the auxiliary pad 9 extremely strong. As a result, breakage does not occur in the vicinity of the interface between the auxiliary pad 9 and the low melting point brazing material 7, and the bonding between the connection pad 6 and the low melting point brazing material 7 can be maintained for a long period of time. The reliability of the electrical connection between 3 and the external electric circuit can be made extremely excellent.
【0027】なお、前記補助パッド9にメッシュ状に配
列した窪み部Aや切り欠き部Bはその各々の内寸が50
μm未満では低融点ロウ材7の補助パッド9に対する接
合を強固なものとすることが困難となる傾向がある。従
って、前記補助パッド9にメッシュ状に配列した窪み部
Aや切り欠き部Bはその各々の内寸を50μm以上とし
ておくことが好ましい。The recesses A and the notches B arranged in a mesh on the auxiliary pad 9 have inner dimensions of 50.
If the thickness is less than μm, it tends to be difficult to strengthen the bonding of the low melting point brazing material 7 to the auxiliary pad 9. Therefore, it is preferable that the recesses A and the notches B arranged in a mesh on the auxiliary pad 9 have an inner dimension of 50 μm or more.
【0028】また、前記補助パッド9にメッシュ状に配
列した窪み部Aや切り欠き部Bはその各々の深さが10
μm未満では低融点ロウ材7の補助パッド9に対する接
合を強固なものとすることが困難となる傾向がある。従
って、前記補助パッド9にメッシュ状に配列した窪み部
Aや切り欠き部Bはその各々の深さを10μm以上とし
ておくことが好ましい。The depth of each of the depressions A and the notches B arranged in a mesh on the auxiliary pad 9 is 10
If the thickness is less than μm, it tends to be difficult to strengthen the bonding of the low melting point brazing material 7 to the auxiliary pad 9. Therefore, it is preferable that the depressions A and the notches B arranged in a mesh on the auxiliary pad 9 have a depth of 10 μm or more.
【0029】更に前記補助パッド9にメッシュ状に配列
した窪み部Aや切り欠き部Bは平面視したとき窪み部A
や切り欠き部Bの総面積が補助パッド9の面積の1/2
を超えるようになると、補助パッド 9と
低融点ロウ材7との接合面積が小さくなって、補助パッ
ド9に対する低融点ロウ材7の接合の信頼性が低下する
おそれがある。従って、前記補助パッド9にメッシュ状
に配列した窪み部Aや切り欠き部Bは平面視したとき窪
み部Aや切り欠き部Bの総面積が補助パッド9の面積の
1/2以下となるようにしておくことが好ましい。Further, the recesses A and the notches B arranged in a mesh on the auxiliary pad 9 are the recesses A in plan view.
The total area of the notch B is 1/2 of the area of the auxiliary pad 9
If it exceeds, the bonding area between the auxiliary pad 9 and the low melting point brazing material 7 becomes small, and the reliability of bonding the low melting point brazing material 7 to the auxiliary pad 9 may decrease. Therefore, the recesses A and the notches B arranged in a mesh on the auxiliary pad 9 have a total area of the recesses A and the notches B in a plan view of not more than 1/2 of the area of the auxiliary pad 9. It is preferable that
【0030】かくして本発明の配線基板によれば、絶縁
基体1の凹部1a底面に半導体素子3をガラスや樹脂、
ロウ材等の接着材を介して接着固定するとともにこの半
導体素子3の各電極を配線導体2にボンディングワイヤ
5を介して電気的に接続し、しかる後、絶縁基体1の上
面に金属やセラミックスから成る蓋体11をガラスや樹
脂、ロウ材等の封止材を介して接合させ、絶縁基体1と
蓋体11とから成る容器内部に半導体素子3を気密に封
止することによって製品としての半導体装置が完成す
る。Thus, according to the wiring board of the present invention, the semiconductor element 3 is provided on the bottom surface of the recess 1a of the insulating substrate 1 with glass or resin,
The electrodes of the semiconductor element 3 are electrically connected to the wiring conductors 2 via the bonding wires 5 while being fixedly adhered via an adhesive such as a brazing material, and then the upper surface of the insulating substrate 1 is made of metal or ceramics. The lid 11 made of the above is bonded via a sealing material such as glass, resin, or a brazing material, and the semiconductor element 3 is hermetically sealed inside the container made of the insulating substrate 1 and the lid 11. The device is completed.
【0031】なお、本発明の配線基板は上述の実施の形
態に限定されるものではなく、本発明の要旨を逸脱しな
い範囲であれば種々の変更は可能であり、例えば、前記
配線導体2、接続パッド6および補助パッド9の露出す
る領域にニッケルまたは銅を1μm〜10μm、金を
0.05μm〜5μmの厚さで順次、被着させておく
と、配線導体2、接続パッド6および補助パッド9の酸
化腐蝕を効果的に防ぐことができるとともに、接続パッ
ド6および補助パッド9に対し低融点ロウ材7を、配線
導体2に対しボンディングワイヤ5を強固に接合、接続
させることができる。The wiring board of the present invention is not limited to the above-mentioned embodiment, and various modifications can be made without departing from the scope of the present invention. For example, the wiring conductor 2 and If nickel or copper is sequentially deposited on the exposed regions of the connection pad 6 and the auxiliary pad 9 in a thickness of 1 μm to 10 μm and gold is 0.05 μm to 5 μm, the wiring conductor 2, the connection pad 6, and the auxiliary pad are formed. The oxidative corrosion of 9 can be effectively prevented, and the low melting point brazing material 7 can be firmly joined to the connection pad 6 and the auxiliary pad 9 and the bonding wire 5 can be firmly connected to the wiring conductor 2.
【0032】また上述の実施例では補助パッド9に窪み
部Aと切り欠き部Bの両方を形成したが窪み部Aのみを
形成しても、また切り欠き部Bのみを形成してもよい。In the above-described embodiment, both the recess A and the cutout B are formed in the auxiliary pad 9, but only the recess A or only the cutout B may be formed.
【0033】更に前記補助パッド9は、図5に示すよう
に、絶縁基体1の対角線上に位置する角部を円弧状に成
形しておくと、この角部に大きな応力が集中して補助パ
ッド9と低融点ロウ材7との界面付近の低融点ロウ材7
に破断が生じることを効果的に防止することができ、こ
れによって接続パッド6と低融点ロウ材7との接合をさ
らに長期間に亘り維持することが可能となり、半導体素
子3と外部電気回路との電気的接続の信頼性をより一層
優れたものとなすことができる。従って、前記補助パッ
ド9は絶縁基体1の対角線上に位置する角部を円弧状に
成形しておくことが好ましい。Further, in the auxiliary pad 9, as shown in FIG. 5, if a corner portion located on a diagonal line of the insulating base 1 is formed in an arc shape, a large stress is concentrated on this corner portion, and the auxiliary pad 9 is formed. 9 and the low melting point brazing material 7 near the interface
It is possible to effectively prevent the occurrence of breakage, and thereby, it becomes possible to maintain the bond between the connection pad 6 and the low melting point brazing material 7 for a longer period of time, and to prevent the semiconductor element 3 and the external electric circuit from connecting. The reliability of the electrical connection can be further improved. Therefore, it is preferable that the auxiliary pad 9 has a corner portion located on a diagonal line of the insulating substrate 1 formed in an arc shape.
【0034】[0034]
【発明の効果】本発明の配線基板によれば、絶縁基体下
面のコーナー部に補助パッドを形成するとともに、該補
助パッドに窪み部や切り欠き部を設けたことから、この
窪み部や切り欠き部の側壁面の分、補助パッドと低融点
ロウ材との接合面積を増加させるとともに低融点ロウ材
が補助パッドの窪み部や切り欠き部内に入り込んで大き
なアンカー効果を得ることができ、これによって低融点
ロウ材を接続パッドに強固に接合することができる。According to the wiring board of the present invention, since the auxiliary pad is formed at the corner portion of the lower surface of the insulating substrate, and the auxiliary pad is provided with the recess or the notch, the recess or the notch is provided. By the side wall surface of the portion, the bonding area between the auxiliary pad and the low melting point brazing material can be increased, and the low melting point brazing material can enter the depressions or notches of the auxiliary pad to obtain a large anchoring effect. The low melting point brazing material can be firmly bonded to the connection pad.
【0035】特に前記窪み部や切り欠き部を複数設け、
かつメッシュ状に配列しておくと低融点ロウ材と補助パ
ッドとの接合面積がより一層増加するとともに複数の窪
み部や切り欠き部内に低融点ロウ材が入り込んで極めて
大きなアンカー効果を得ることができ、これによって接
続パッドと低融点ロウ材との接合が長期間に亘り維持す
ることができ、半導体素子と外部電気回路との電気的接
続の信頼性を極めて優れたものとすることができる。In particular, a plurality of the recesses or notches are provided,
Moreover, if they are arranged in a mesh shape, the bonding area between the low melting point brazing material and the auxiliary pad is further increased, and the low melting point brazing material enters into the plurality of recesses or cutouts, and an extremely large anchor effect can be obtained. As a result, the bonding between the connection pad and the low melting point brazing material can be maintained for a long period of time, and the reliability of the electrical connection between the semiconductor element and the external electric circuit can be made extremely excellent.
【図1】本発明の配線基板の一実施例を示す断面図であ
る。FIG. 1 is a sectional view showing an embodiment of a wiring board of the present invention.
【図2】図1に示す配線基板の下面図である。FIG. 2 is a bottom view of the wiring board shown in FIG.
【図3】図2に示す配線基板の要部拡大平面図である。3 is an enlarged plan view of an essential part of the wiring board shown in FIG.
【図4】本発明の他の実施例の要部拡大平面図である。FIG. 4 is an enlarged plan view of an essential part of another embodiment of the present invention.
【図5】本発明の他の実施例の要部拡大平面図である。FIG. 5 is an enlarged plan view of an essential part of another embodiment of the present invention.
1・・・・絶縁基体 1a・・・凹部 2・・・・配線導体 3・・・・半導体素子 4・・・・配線基板 5・・・・ボンディングワイヤ 6・・・・接続パッド 7・・・・低融点ロウ材 8・・・・外部電気回路基板 8a・・・回路配線 9・・・・補助パッド 11・・・蓋体 A・・・・窪み部 B・・・・切り欠き部 1 ... Insulating substrate 1a ... recess 2 ... Wiring conductor 3 ... Semiconductor element 4 ... Wiring board 5 ... Bonding wire 6 ... Connection pad 7 ... Low melting point brazing material 8 ... External electric circuit board 8a ... Circuit wiring 9 ... Auxiliary pad 11 ... Lid A ... Dimples B ... Notch
Claims (2)
搭載部を有する四角形状の絶縁基体と、該絶縁基体の下
面に形成された多数の接続パッドと、前記絶縁基体の前
記搭載部から前記接続パッドにかけて導出される複数個
の配線導体とから成る配線基板であって、 前記絶縁基体下面のコーナー部に補助パッドを形成する
とともに該補助パッドの表面に窪み部および/または切
り欠き部を設けたことを特徴とする配線基板。1. A rectangular insulating base made of an electrically insulating material and having a semiconductor element mounting portion on its surface, a large number of connection pads formed on the lower surface of the insulating base, and the mounting portion of the insulating base to the insulating pad. A wiring board comprising a plurality of wiring conductors led out over a connection pad, wherein an auxiliary pad is formed at a corner portion of the lower surface of the insulating substrate, and a recess and / or a notch is provided on a surface of the auxiliary pad. A wiring board characterized by the above.
数あり、メッシュ状に配列されていることを特徴とする
請求項1に記載の配線基板。2. The wiring board according to claim 1, wherein the wiring board has a plurality of the recesses and / or the notches and is arranged in a mesh.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002015423A JP2003218489A (en) | 2002-01-24 | 2002-01-24 | Wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002015423A JP2003218489A (en) | 2002-01-24 | 2002-01-24 | Wiring board |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2003218489A true JP2003218489A (en) | 2003-07-31 |
Family
ID=27651831
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2002015423A Pending JP2003218489A (en) | 2002-01-24 | 2002-01-24 | Wiring board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2003218489A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009224741A (en) * | 2008-03-19 | 2009-10-01 | Epson Toyocom Corp | Package for electronic component and surface-mounted electronic device |
US7615874B2 (en) | 2005-04-18 | 2009-11-10 | Murata Manufacturing Co., Ltd. | Electronic component module |
-
2002
- 2002-01-24 JP JP2002015423A patent/JP2003218489A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7615874B2 (en) | 2005-04-18 | 2009-11-10 | Murata Manufacturing Co., Ltd. | Electronic component module |
JP2009224741A (en) * | 2008-03-19 | 2009-10-01 | Epson Toyocom Corp | Package for electronic component and surface-mounted electronic device |
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