JP2003209254A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a TFT from being deteriorated in characteristics by allowing to reduce an amount of a light incident from each direction. <P>SOLUTION: The method for manufacturing the semiconductor device comprises the steps of forming a source electrode 38 and a drain electrode 39 disposed between a semiconductor film 34 and an upper shielding film 42 in a tabular state of a long longitudinal shape in a direction perpendicular to a channel direction of a metal, and forming both ends so as to have an inverted tapered shape. Thus, since a light reflected from below becomes a shape suitable to externally reflect and an upper surface side is largely formed, a radiation of a light sneaked around the upper shield film to the semiconductor film 34 is reduced, and light leakage can be suppressed by the radiation of the light to the film 34 as a channel of the TFT. Since a peripheral edge of the film 42 is formed to have a forward tapered shape, the device has a structure suitable to reflect the light radiated from an upper part in an external part direction. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device used as an active matrix substrate in an active matrix type liquid crystal display device and a manufacturing method thereof.
In particular, the present invention relates to a semiconductor device having an excellent light-shielding property and a manufacturing method thereof.

[0002]

2. Description of the Related Art In recent years, in liquid crystal display devices, it has become mainstream to perform image display by an active matrix type liquid crystal display device. The active matrix type liquid crystal display device has an active matrix substrate having a plurality of pixels arranged in a matrix, and a counter substrate arranged so as to face the active matrix substrate. A liquid crystal serving as a display medium is filled between the two substrates to form a liquid crystal layer.

The active matrix substrate has a plurality of pixel electrodes arranged in a matrix for each pixel which is one unit of image display, and each pixel electrode is arranged corresponding to each pixel electrode. Connected to the switching element. A counter electrode is formed on a counter substrate which is arranged to face the active matrix substrate with a liquid crystal layer interposed therebetween.

When an image is displayed using the active matrix type liquid crystal display device having such a structure, on / off of the switching element connected to each pixel electrode formed on the active matrix substrate is controlled, A voltage serving as a display signal is applied to each pixel electrode. When the switching element is turned on and a voltage serving as a display signal is applied to the pixel electrode, a predetermined voltage is applied between the pixel electrode and the counter electrode of the counter substrate to align the liquid crystal of the liquid crystal layer existing between the two electrodes. The state changes, and the change in the alignment state of the liquid crystal changes the amount of light transmitted through each pixel. In this way, the amount of light transmitted through the liquid crystal is controlled for each pixel by turning on / off the switching element and applying a display voltage, so that the screen display is performed as a whole.

A non-linear element such as a thin film transistor (hereinafter abbreviated as TFT) or a diode is used as a switching element for turning on / off the pixel electrode, but it can be formed integrally with a drive circuit of a liquid crystal display device, and ,
A TFT formed of polysilicon is the most preferable in that the response speed can be increased, and therefore, a TFT formed of polysilicon is usually used as the switching element.

However, in the above active matrix type liquid crystal display device, when light is absorbed by light applied to a semiconductor such as silicon, electrons are excited in the semiconductor and holes are excited in the valence band. It is generally known that an electron-hole pair is generated thereby, and a so-called photoelectric effect occurs. Therefore, in the TFT using the polysilicon thin film for the active layer (channel region), when light is irradiated, a photocurrent caused by the electron-hole pair is generated, and the TFT
The leakage current at the time of turning off increases. As a result, when the TFT formed of the polysilicon thin film is irradiated with light, there is a problem that the image quality is deteriorated due to the generation of crosstalk, deterioration of contrast, and the like due to the irradiation of light.

In order to prevent the image quality from being deteriorated by such a photoelectric effect, the TFT is formed on the liquid crystal layer side or the counter substrate which is the light incident side of the active matrix substrate on which the polysilicon TFT is formed. The light-shielding film is provided so as to face the position where
There has been proposed a liquid crystal display device that shields light entering the device.

[0008]

However, the light-shielding film is provided only on the light-incident side of the liquid crystal layer of the liquid crystal display device, and the TFT is
Even if the light that is directly incident on the liquid crystal is blocked, the light that has passed through the portion where the light-shielding film is not formed is the optical portion such as a lens, a polarizing plate, or a mirror provided outside the liquid crystal display device, or the liquid crystal. The TFT may be irradiated with light by being reflected by the inner wall of the display device or the like. In particular, when a liquid crystal display device is used for a transmission type projection display device, in order to magnify and project an image using the liquid crystal display device having a small size, the liquid crystal display device is irradiated with extremely strong light, Since the amount of reflected light that reflects each part inside and outside the liquid crystal display device is large, it is not enough to block the light that directly enters the TFT, and the reflected light that reflects each part causes off-leakage of the TFT. As a result, there is a strong possibility that the display quality will be deteriorated due to the occurrence of crosstalk, the deterioration of contrast, and the like.

As a liquid crystal display device having a structure for preventing incident light directly incident on the TFT and reflected light reflected from each part inside and outside the liquid crystal display device, for example, Japanese Patent Laid-Open No. 2000-1
A liquid crystal display device proposed in Japanese Patent No. 31716 is known.

FIG. 12 is a sectional view illustrating a schematic structure of a semiconductor device used for the active matrix substrate of the liquid crystal display device described in this publication.

The semiconductor device described in this publication is formed on a quartz substrate 1. On the quartz substrate 1, the quartz substrate 1
A lower light-shielding film 2 that shields light emitted from below is formed in a predetermined shape. An insulating film 3 is formed on the quartz substrate 1 on which the lower light-shielding film 2 is formed, and the upper surface thereof has the same height over the entire surface.

On the insulating film 3, an island-shaped silicon thin film 4 to be an active layer of a thin film transistor (TFT) is formed corresponding to the position where the lower light-shielding film is formed. The island-shaped silicon thin film 4 has a channel region formed in the central portion, and a source region and a drain region are formed on both side portions sandwiching the channel region.

A thin gate insulating film 5 is formed on the insulating film 3 on which the silicon thin film 4 to be a TFT is formed. A gate electrode 6 is formed on the gate insulating film 5 corresponding to the channel region formed in the silicon thin film 4. On the gate insulating film 5 on which the gate electrode 6 is formed, the interlayer insulating film 7 is formed as a thick film so as to be thicker in the portion where the lower silicon thin film 4 is formed. Contact holes for electrode extraction are formed in the interlayer insulating film 7 and the gate insulating film 5 at positions corresponding to the source region and the drain region of the underlying silicon thin film 4, respectively.

A metal film is embedded in each contact hole to form a lead electrode 8. Each extraction electrode 8 is connected to the source region and the drain region of the lower silicon thin film 4 via a contact hole, respectively.

A passivation film 9 is formed on the interlayer insulating film 7 on which the extraction electrode 8 is formed. An upper light-shielding film 11 is formed on the passivation film 9 at a position where the lower lower light-shielding film 2 is formed.

In the semiconductor device shown in FIG. 12, the upper light-shielding film 11 and the lower light-shielding film 2 are provided below and above the silicon thin film 4 to be the TFT, respectively, and the light is directly incident on the TFT from above. Incident light is the upper light shielding film 11
The light is shielded by the lower light shielding film 2 and the reflected light from below is shielded by the lower light shielding film 2.

However, in this semiconductor device, it is possible to prevent light from entering the silicon thin film 4 of the TFT at an angle at which the light is reflected inside and outside the liquid crystal display device and is not blocked by the upper light-shielding film 11 and the lower light-shielding film 2. However, there is a problem that the light cannot be shielded sufficiently. Further, the upper light-shielding film 11 and the lower light-shielding film 2 formed on the upper and lower portions, respectively.
If the width is widened, the light blocking effect of blocking the light emitted from each direction can be enhanced, but the widening of the width of each light blocking film causes a problem that the aperture ratio is reduced.

Japanese Unexamined Patent Publication No. 2000-180899 discloses that
A semiconductor device as shown in FIG. 13 is described.

This semiconductor device has a transparent insulating substrate 21, and on the transparent insulating substrate 21, a lower light-shielding film 2 that shields light emitted from below the transparent insulating substrate 21.
2 is formed in a predetermined shape. The peripheral portion of the lower light shielding film 22 is formed in a forward tapered shape so that the light incident from the upper portion is reflected to the outside.

A first interlayer film 23 is formed on the transparent insulating substrate 21 on which the lower light-shielding film 22 is formed, and the upper surface thereof has the same height over the entire surface.

A thin film transistor (TF) is formed on the first interlayer film 23 corresponding to the position where the lower light shielding film 22 is formed.
The island-shaped silicon thin film 24 which becomes the active layer of T) is formed.

A gate oxide film 25 is formed on the first interlayer film 23 on which the silicon thin film 24 serving as a TFT is formed, and the upper surface thereof is flattened. This gate oxide film 2
A gate electrode 26 is formed on the substrate 5 so as to cover the silicon thin film 24 at a position corresponding to the position where the silicon thin film 24 is formed. A second interlayer film 27 is formed on the gate oxide film 25 with the gate electrode 26 formed on, and the upper surface thereof is planarized. An upper light-shielding film 28 is formed on the second interlayer film 27 so as to cover the lower light-shielding film 22 at a position where the lower lower light-shielding film 22 is formed. A third interlayer film 29 is formed on the second interlayer film 27 having the upper light-shielding film 28 formed thereon, and the upper surface thereof is flattened.

In this semiconductor device, similarly to the semiconductor device shown in FIG. 12, an upper light shielding film 28 and a lower light shielding film 22 are provided below and above the TFT, respectively. Moreover, since the forward taper surface is formed at the end portion of the lower light-shielding film 22, the forward taper surface formed at the end portion of the lower light-shielding film 22 prevents the light entering from the periphery of the upper light-shielding film 28 from entering the TFT. Is reflected in the direction in which no is formed.

However, in the semiconductor device having such a structure, the alignment accuracy due to photolithography in the manufacturing process varies, the positions of the upper light-shielding film 28 and the lower light-shielding film 22 are displaced, and the respective laminated films themselves are misaligned. Due to variations in the film thickness or the like, there is a possibility that light that is diffusely reflected in the liquid crystal display device will be applied to the silicon thin film 24 that will become the TFT. An end portion of the lower light-shielding film 22 formed below the silicon thin film 24 is formed in a forward taper shape, and reflects light incident obliquely from above toward the outside where the silicon thin film 24 is not formed. However, it is not possible to prevent the light wrapping around due to irregular reflection from entering the silicon film 24.

The present invention has been made in order to solve the above problems, and it is possible to reduce the amount of light incident from each direction and prevent the deterioration of the characteristics of TFTs, and to manufacture the same. The purpose is to provide a method.

[0026]

The semiconductor device of the present invention comprises:
In order to solve the above problems, an island-shaped semiconductor film which is formed on an insulating film provided on a transparent insulating substrate and serves as a source region, a channel region, and a drain region of a thin film transistor, the transparent insulating substrate, and the insulating film. Connected to the source region and the drain region of the semiconductor film through a lower light-shielding film formed between the two, an interlayer insulating film formed on the semiconductor film, and a contact hole formed in the interlayer insulating film. As described above, a source electrode and a drain electrode that are provided on the interlayer insulating film and extend in a direction orthogonal to the channel direction of the channel region, and an insulating layer formed on the source electrode and the drain electrode. And an upper light-shielding film provided on the insulating layer, and the source electrode and the drain electrode have end portions in a direction orthogonal to the channel direction of the semiconductor film. And it is characterized in that a tapered shape.

In the above semiconductor device of the present invention, the upper light-shielding film is formed such that the lower surface thereof has a length substantially equal to the length of the source electrode and the drain electrode in the direction orthogonal to the channel direction, and the peripheral portion Preferably has a forward tapered shape.

In the above semiconductor device of the present invention, it is preferable that the lower light shielding film is made of a refractory metal material.

In the above semiconductor device of the present invention, the reverse taper inclination angle θ1 of the ends formed on the source electrode and the drain electrode is preferably formed in the range of θ1 = 70 to 80 °.

The method of manufacturing a semiconductor device according to the present invention is
In the method for manufacturing a semiconductor device of the present invention, a step of forming a lower light-shielding film on the transparent insulating substrate, a step of forming an insulating film on the transparent insulating substrate on which the lower light-shielding film is formed, A step of forming an island-shaped semiconductor film to be a thin film transistor on the insulating film, a step of forming a gate insulating film on the insulating film on which the semiconductor film is formed, and the semiconductor film on the gate insulating film Forming a gate electrode at a position corresponding to the above, and using the gate electrode as a mask, implanting an impurity into the semiconductor film to form a channel region in a region of the semiconductor film immediately below the gate electrode, Forming a source region and a drain region in which impurities are implanted in a region of the semiconductor film that is not masked by a gate electrode; forming an interlayer insulating film on the gate insulating film having the gate electrode formed; Forming a contact hole in the insulating film and the gate insulating film to reach the source region and the drain region of the semiconductor film, and forming a metal layer in each contact hole and on the interlayer insulating film, Patterning the metal layer on the film to leave a metal layer extending in a direction orthogonal to the channel direction of the semiconductor film,
A step of forming a source electrode and a drain electrode, a step of sequentially forming a nitride film and an oxide film on the interlayer insulating film on which the source electrode and the drain electrode are formed, and a step of forming an upper light-shielding film on the oxide film And are included.

In the semiconductor device manufacturing method of the present invention, the maximum process temperature in each of the above steps is 900 to
It is preferably in the range of 1200 ° C.

Further, the semiconductor device of the present invention comprises an island-shaped semiconductor film which is formed on an insulating film provided on a transparent insulating substrate and serves as a source region, a channel region and a drain region of a thin film transistor, and the transparent insulating substrate. Through the lower light-shielding film formed between the insulating film and the insulating film, the interlayer insulating film formed on the semiconductor film, and the contact hole formed in the interlayer insulating film. A source electrode and a drain electrode, which are provided on the interlayer insulating film so as to be respectively connected to the drain region and extend in a direction orthogonal to the channel direction of the channel region, and on the source electrode and the drain electrode. An insulating layer formed and an upper light-shielding film provided on the insulating layer are provided, and the same material as the semiconductor film is formed on the insulating film in the same plane as the semiconductor film. Shielding layer of electrically non-conductive What is
It is characterized in that it is formed so as to surround the periphery of the semiconductor film.

In the above semiconductor device of the present invention, it is preferable that the lower light-shielding film is made of a refractory metal material.

In the above semiconductor device of the present invention, the light-shielding layer has a distance from the semiconductor film of 0.05 μm to 0.
It is preferably formed so as to have a range of 10 μm.

In the above semiconductor device of the present invention, the light shielding layer is formed so that the width w of the light shielding layer and the length b of the lower light shielding film are in the range of 0 <w / b <0.7. Preferably.

In the above semiconductor device of the present invention, in the light shielding layer, when the length a of the upper light shielding film is longer than the length b of the lower light shielding film (a ≧ b), the width w of the light shielding layer is w. <A / 2
It is preferably formed in a range that satisfies the above condition.

The method of manufacturing a semiconductor device according to the present invention is
In the method for manufacturing a semiconductor device of the present invention, a step of forming a lower light-shielding film on the transparent insulating substrate, a step of forming an insulating film on the transparent insulating substrate on which the lower light-shielding film is formed, A step of forming an island-shaped semiconductor film to be a thin film transistor on the insulating film, and a light-shielding layer formed of the same material as the semiconductor film; and a step of forming the semiconductor film and the light-shielding layer on the insulating film. A step of forming a gate insulating film, a step of forming a gate electrode on the semiconductor film over the gate insulating film, and a step of implanting an impurity into the semiconductor film using the gate electrode as a mask, Forming a channel region in the region of the semiconductor film directly below the gate electrode and forming a source region and a drain region in which impurities are implanted in the region of the semiconductor film not masked by the gate electrode; A step of forming an interlayer insulating film on the formed gate insulating film, a step of forming contact holes reaching the source region and the drain region of the semiconductor film in the interlayer insulating film and the gate insulating film, respectively. A metal layer is formed in the contact hole and on the interlayer insulating film, and the metal layer on the interlayer insulating film is patterned to leave a metal layer extending in a direction orthogonal to the channel direction of the semiconductor film to form a source electrode. And a step of forming a drain electrode, a step of sequentially forming a nitride film and an oxide film on the interlayer insulating film on which the source electrode and the drain electrode are formed, and a step of forming an upper light-shielding film on the oxide film, It is characterized by including.

[0038]

BEST MODE FOR CARRYING OUT THE INVENTION A semiconductor device and a manufacturing method thereof according to the present invention will be described below with reference to the drawings.

(First Embodiment) The semiconductor device of the first embodiment is used as an active matrix substrate in an active matrix type liquid crystal display device, for example.

FIGS. 1A and 1B respectively show a schematic structure of the semiconductor device according to the first embodiment.
FIG. 1A is a schematic cross-sectional view taken along a channel direction along a channel region sandwiched on both sides by a source region and a drain region in an active layer of this semiconductor device, and FIG. 1B is orthogonal to the channel direction. It is a schematic sectional drawing which follows the direction.

This semiconductor device is formed on a transparent insulating substrate 31 such as a glass substrate. On the transparent insulating substrate 31, a lower light shielding film 32 that shields light emitted from below the transparent insulating substrate 31 is formed in a predetermined shape. An insulating film 33 is formed on the transparent insulating substrate 31 on which the lower light shielding film 32 is formed, and the upper surface thereof is flattened.

On the insulating film 33, at a position corresponding to the position where the lower light-shielding film 32 is formed, an island-shaped semiconductor film 34 which becomes an active layer of a thin film transistor (hereinafter referred to as TFT).
Are formed. A channel region 34c is formed in the center of the island-shaped semiconductor film 34.
A source region 34s and a drain region 34d are formed on both sides sandwiching 4c. The semiconductor film 34 is formed above the lower light shielding film 32 with an area smaller than the area of the lower light shielding film 32.

A thin gate insulating film 35 is formed on the insulating film 33 on which the semiconductor film 34 to be a TFT is formed. A gate electrode 36 is formed on the gate insulating film 35 so as to correspond to the channel region 34c formed in the semiconductor film 34.
Are formed. An interlayer insulating film 37 is formed on the gate insulating film 35 having the gate electrode 36 formed thereon so as to be thicker in a portion where the lower semiconductor film 34 is formed.
In the interlayer insulating film 37 and the gate insulating film 35, the source region 34s and the drain region 34 of the lower semiconductor film 34 are formed.
Contact holes 37a for taking out electrodes are formed corresponding to the positions where d exists.

A source electrode 38 and a drain electrode 39 are provided on the interlayer insulating film 37 so as to cover the contact holes 37a. The source electrode 38 and the drain electrode 39 have contact holes 37, respectively.
The metal filled in a is connected to the source region 34s and the drain region 34d of the semiconductor film 34, respectively.

Source electrode 3 formed on semiconductor film 34
8 and the drain electrode 39 are each formed of a light-shielding metal into a rectangular flat plate shape. The source electrode 38 and the drain electrode 39 are elongated along the channel direction, and are formed in a reverse taper shape so that each end portion in the longitudinal direction is gradually positioned inside as it goes downward. . The angle of inclination of this reverse tapered end is
It is set to 70 to 80 °.

A nitride film 40 and an oxide film 41 are laminated in this order on the interlayer insulating film 37 on which the source electrode 38 and the drain electrode 39 are formed, and the upper surface of the oxide film 41 has a constant height. An upper light-shielding film 42 formed in a forward taper shape is provided on the oxide film 41 so that the peripheral portions thereof are closer to each other as they go upward. The upper light-shielding film 42 is formed such that the dimension of the lower surface thereof in the direction orthogonal to the channel direction is approximately the same as the length of the lower-layer source electrode 38 and drain electrode 39 in the same direction.

Next, the inventors of the present application utilize a wave optical simulation to provide a source electrode 38 and a drain electrode 39 (hereinafter referred to as a metal layer 38) provided above the semiconductor film 34.
In (39)), the optimum setting condition for the inclination angle of the end portion formed in the reverse taper shape to give the best light shielding property is obtained, and the simulation result will be described below.

FIG. 2 shows a semiconductor device used in the wave optics simulation actually performed by the inventors.
FIG. 6 is a cross-sectional view for defining tilt angles θ1 and θ2 formed at the respective ends of the metal layer 38 (39) and the upper light-shielding film 42.

In FIG. 3, the inclination angle θ1 of the metal layer 38 (39) defined as shown in FIG. 2 is incident on the lower semiconductor film 34 channel region 34c when the inclination angle θ1 is variously changed. The graph regarding the result of having calculated | required the light amount to be shown is shown. In FIG. 3, the solid line indicates that the taper-shaped inclination angle θ2 of the upper light shielding film 42 is θ.
When 2 = 60 °, the broken line shows the case where the inclination angle θ2 of the upper light shielding film 42 is θ2 = 0 °.

As is apparent from the graph shown in FIG. 3, the inclination angle θ1 of the metal layer 38 (39) is θ1 = irrespective of the value of the inclination angle θ2 in the upper light shielding film 42.
It is shown that the amount of light incident on the channel region 34c is most reduced in the range of 70 to 80 °. Further, regarding the upper light-shielding film 42, the inclination angle θ2
When θ2 = 60 °, the channel region 34c
It has been shown that the amount of light incident on is reduced.

Regarding the upper light-shielding film 42, the relative positional relationship with the lower metal layer 38 (39) is important, and, for example, an alignment deviation occurs in the installation position of the upper light-shielding film 42, resulting in the channel region 34c. In the width direction, when the dimension of the upper light-shielding film 42 in the width direction becomes longer than the line width of the lower metal layer 38 (39), the intensity of the diffracted light diffracted by the upper light-shielding film 42 and wrapping downward is increased, and the channel The intensity of the light reaching the region 34c may increase. On the other hand, the length of the upper light shielding film 42 in the channel direction is
When the length of the metal layer 38 (39) is the same as or shorter than the length in the same direction, the metal layer 38 (39) and the upper light-shielding film 42 can do double light shielding, and the light incident from above can be surely provided. By blocking the light, the intensity of the diffracted light can be reduced. Further, since the end portion of the upper light-shielding film 42 has a forward tapered shape, as shown in FIG. 2, the light emitted toward the semiconductor layer 32 from above can be efficiently moved upward so as to move away from the semiconductor film 32. Can be reflected.
The shape is suitable for reflecting toward the outside.

In addition, each metal layer 38 (3) having an end portion formed in an inversely tapered shape in the direction orthogonal to the channel direction.
9) is formed such that the length of the upper surface in the same direction is approximately the same as the length of the lower surface of the upper light shielding film 42 in the same direction. Thereby, the diffracted light from the peripheral portion of the upper light shielding film 42 can be effectively shielded. Further, since the metal layer 38 (39) is formed in the inverse taper shape, light entering from below the transparent insulating substrate 31 can be reflected to the side opposite to the semiconductor film 34.
It is possible to more reliably prevent light from entering the semiconductor film 34.

Next, regarding the method of manufacturing the semiconductor device according to the first embodiment, FIGS. 4 (a) to 4 (e) and FIG. 5 (a) to
Each step will be described with reference to (c).

First, a light shielding film is deposited on the transparent insulating substrate 31 such as glass or quartz by using the CVD method or the sputtering method, and then this light shielding film is formed into a predetermined shape by using photolithography and etching. 4A to form the lower light-shielding film 32 as shown in FIG.

As the lower light-shielding film 32, for example, tungsten (W), tantalum (Ta), titanium (Ti), molybdenum (Mo), chromium (Cr), nickel (Ni) is used.
A material having a light-shielding effect, which is a combination of a metal film such as the above and a silicon film such as polysilicon or a silicide film is used. If the lower light-shielding film 32 is formed of such a material, a sufficient light-shielding property can be obtained. Further, the melting point of the silicon film is about 1400 ° C., and the melting point of the silicide film is 13
Since the temperature is from 00 to 1500 ° C., by using the above-mentioned material as the lower light-shielding film 32, it is possible to obtain sufficient heat resistance not only with an ordinary backlight but also with a lamp that emits strong light such as a halide lamp for projection. In addition, in the manufacturing process described later, 900 to 1200
Even if a high temperature heat treatment is performed at a high process temperature of ℃, it has sufficient heat resistance.

Next, as shown in FIG. 4B, an insulating film 33 such as a SiO ₂ film is formed on the entire surface of the transparent insulating substrate 31 on which the lower light shielding film 32 is formed. The film thickness of the insulating film 33 reflects the lower light shielding film 32,
The film thickness is set so that the light passing through is canceled by the interference effect.

Next, as shown in FIG. 4C, the insulating film 3
A semiconductor film 34 to be an active layer of a thin film transistor is formed on the semiconductor layer 3. The semiconductor film 34 is an amorphous, polycrystalline, or single crystal Si film, a Ge film, a GaAs film, a GaP film, or the like. For example, when a polycrystalline silicon film is formed as the semiconductor film 34, an amorphous silicon film having a thickness of 50 to 150 μm is formed on the insulating film 33, and then heat treatment or laser light irradiation under high temperature conditions is performed. It is common to use the method of polycrystallizing by carrying out. Then, with respect to the semiconductor film 34 formed on the insulating film 33,
The semiconductor film is patterned into a predetermined island shape by performing photolithography and etching. In addition,
After forming such an island-shaped semiconductor film 34, a step of implanting impurity ions may be performed in order to control the threshold voltage.

Next, as shown in FIG. 4D, a gate oxide film 35 is formed on the entire surface of the insulating film 33 on which the semiconductor film 34 is formed. This gate oxide film 35 is CV
Method of newly depositing using D method, or semiconductor film 3
4 is formed by the method of oxidizing 4. Further, it may be formed by using both a new deposition method and a method of oxidizing the semiconductor film 34. Then, a gate electrode 36 is formed at a position corresponding to the gate oxide film 35 on the semiconductor film 34.

Next, as shown in FIG. 4E, impurity ions are implanted into the semiconductor film 34 using the gate electrode 36 as a mask. Impurity ions are implanted into regions of the semiconductor film 34 at positions corresponding to both sides of the gate electrode 36 to become source regions 34s and drain regions 34d. In the region of the semiconductor film 34 below the gate electrode 36 which serves as a mask, impurities are not implanted, so that the source regions 34s on both sides are
And a channel region 34c sandwiched between the drain region 34d
Becomes

Next, as shown in FIG. 5A, a portion corresponding to the lower semiconductor film 34 has a predetermined height over the entire surface of the gate insulating film 35 on which the gate electrode 36 is formed, as compared with other regions. The interlayer insulating film 37 is formed to have a high height.
The film thickness of the interlayer insulating film 37 is set to such a thickness that the lights passing through the interlayer insulating film 37 cancel each other due to the interference effect.

After the interlayer insulating film 37 is formed, the source region 34s and the drain region 34d of the lower semiconductor film 34 are successively formed on the interlayer insulating film 37 and the gate insulating film 35.
The source regions 3 corresponding to the positions where
A contact hole 37a reaching 4s and the drain region 34d is formed.

Subsequently, the entire surface of the interlayer insulating film 37 in which the contact holes 37a are formed is entirely covered with Al.
Etc. to deposit a metal layer. This metal layer of Al or the like is deposited on the interlayer insulating film 37, and each contact hole 3 is formed.
7a is filled. Then, after the metal layer is formed over the entire surface, etching is performed, so that the same direction as the direction (channel width direction) orthogonal to the direction in which the source region 34s, the channel region 34c, and the drain region 34d of the semiconductor film 34 are arranged. So that the metal layer extending to
Etching is performed. In addition, in this etching step, etching is performed so that each end portion in the width direction of each metal layer has an inverse tapered shape of 70 to 80 °. Through this etching process, the source electrode 38 and the drain electrode 39 made of metal wiring are formed. In the first embodiment, the source electrode 38 and the drain electrode 39 are formed by dry etching using CF ₄ gas or a mixed gas of CF ₄ and CHF ₃ .

Next, as shown in FIG. 5B, a nitride film 40 is formed over the entire surface of the interlayer insulating film 37 on which the source electrode 38 and the drain electrode 39 are respectively formed, and then an oxide film 41 is formed. Form. The nitride film 40 and the oxide film 41 are formed as a passivation film for protecting the source electrode 38 and the drain electrode 39 made of metal. After the oxide film 41 is formed, hydrogenation is performed, and subsequently, the semiconductor film 34 and the like are formed in the lower layer, so that the oxide film 4 in which unevenness is formed is formed.
Etchback or CMP (Ch
mechanicalMechanical Polish
g) etc. to flatten the surface.

Next, as shown in FIG. 5C, a light shielding film is formed on the flattened oxide film 41 by the CVD method, the sputtering method or the like, and then photolithography and etching are performed. Is patterned into a predetermined shape to form the upper light-shielding film 42. The etching of the upper light shielding film 42 is performed so that the peripheral portion has a forward tapered shape. The upper light-shielding film 42 can be formed of various light-shielding materials similarly to the lower light-shielding film 32 of the lower layer.

When the semiconductor device manufactured as described above is used as an active matrix substrate of a liquid crystal display device, the nitride film 40 and the oxide film 41 on the drain electrode 39 are formed.
Then, after forming a contact hole, on the oxide film 41,
A transparent metal film to be a pixel electrode is formed of ITO or the like,
Etching into a predetermined shape. The pixel electrode formed of this transparent metal film is connected to the drain electrode 39 through a contact hole formed on the drain electrode 39.

(Second Embodiment) The semiconductor device according to the second embodiment is used as an active matrix substrate in an active matrix type liquid crystal display device, for example.

FIGS. 6A and 6B respectively show a schematic structure of a semiconductor device according to the second embodiment. FIG. 6A shows a semiconductor film of the semiconductor device in which both sides are sandwiched by a source region and a drain region. It is a schematic sectional drawing which follows the channel direction of the existing channel region, and FIG.6 (b) is a schematic sectional drawing which follows the direction orthogonal to the channel direction.

This semiconductor device is formed on a transparent insulating substrate 51 such as a glass substrate. On the transparent insulating substrate 51, a lower light shielding film 52 that shields light emitted from below the transparent insulating substrate 51 is formed in a predetermined shape. An insulating film 53 having a predetermined thickness is formed on the transparent insulating substrate 51 on which the lower light-shielding film 52 is formed, and the upper surface thereof is flat over the entire surface.

An island-shaped semiconductor film 54 is formed on the insulating film 53 so as to correspond to the position where the lower light-shielding film 52 is formed. The island-shaped semiconductor film 54 is a region which will be an active layer of a thin film transistor (hereinafter referred to as a TFT) through a later process. A channel region 54c is formed in the center of the island-shaped semiconductor film 54, and the source region 54s and the drain region 54d are formed on both sides of the channel region 54c.
Are formed respectively. Around the island-shaped semiconductor film 54, a light-shielding layer 55 is formed to prevent light from entering the island-shaped semiconductor film 54, which will later become the active layer of the TFT.

The light shielding layer 55 is formed of the same semiconductor as the island-shaped semiconductor film 54. This light shielding layer 55
Is 0.05 μm between the light shielding layer 55 and the semiconductor film 54.
The range of m to 0.10 μm and the width w of the light shielding layer 55 are
When the length of the lower light shielding film 52 is b, w / b is 0 <w /
It is formed so that b <0.7.

The semiconductor film 54 and T serving as the active layer of the TFT.
A thin gate insulating film 56 is formed on the insulating film 53 on which the light shielding layer 55 that prevents light from entering the FT is formed. A gate electrode 57 is formed on the gate insulating film 56 so as to correspond to the channel region 54c formed in the semiconductor film 54. An interlayer insulating film 58 is formed on the gate insulating film 56 with the gate electrode 57 formed thereon so as to be thicker in a portion where the lower semiconductor film 54 is formed. Contact holes 58a for electrode extraction are formed in the interlayer insulating film 58 and the gate insulating film 56 at positions corresponding to the source regions 54s and the drain regions 54d of the lower semiconductor film 54, respectively.

A source electrode 59 and a drain electrode 60 are provided on the interlayer insulating film 58 so as to cover the contact holes 58a. The source electrode 59 and the drain electrode 60 have contact holes 58, respectively.
The source region 54s of the semiconductor film 54 and the drain electrode 54d are respectively connected by the metal filled in a. The source electrode 59 and the drain electrode 60 formed on the semiconductor film 54 are made of light-shielding metal and formed in a rectangular flat plate shape that is long along the channel direction.

A nitride film 61 and an oxide film 62 are stacked in this order on the interlayer insulating film 58 on which the source electrode 59 and the drain electrode 60 are formed, and the upper surface of the oxide film 62 has a constant height. There is. An upper light-shielding film 63 is formed on the oxide film 62 with a light-shielding material similar to that of the lower light-shielding film 52. The upper light-shielding film 63 is the lower light-shielding film 52.
It is formed in the same shape as.

Next, the inventors of the present application utilize the wave optical simulation to shield the light shielding layer 55 formed adjacent to the semiconductor film 54 with respect to the amount of incident light incident on the channel region 54c of the semiconductor film 54. Since the optimum conditions that are excellent in the above are obtained, the simulation results will be described below.

FIG. 7 shows the width w of the light-shielding layer 55, the distance d between the light-shielding layer 55 and the semiconductor film 54, and the upper light-shielding film 63 in the semiconductor device actually used in the wave optics simulation performed by the inventors. Width a and the width b of the lower light-shielding film 52
It is sectional drawing which defines.

FIG. 8 is a graph showing the results of obtaining the amount of light incident on the channel region when the distance d is variously changed for the distance d defined as shown in FIG.

As is clear from the graph shown in FIG. 8, the gap width d between the light shielding layer 55 and the semiconductor film 54 is 0.5.
It is observed that the amount of incident light is reduced with an increase in the distance d in the range of up to 0.7 μm, but as a whole,
The smaller the distance d, the smaller the amount of incident light.

The reason why the amount of incident light increases as the distance d increases is that the edge of the light shielding layer 55 approaches the edge of the upper light shielding film 63 as the distance d increases, so that the light shielding layer 55 must be provided. It is considered that this is because the light passing directly under the transparent insulating substrate 51 is reflected by the light shielding film 55 and the light incident on the semiconductor film 54 increases.

Further, the interval d = which is the limit value of the processing accuracy.
Comparing the light blocking effect between 0.05 μm and without the light blocking layer,
Even if it is minute, the light-shielding effect can be recognized because the interval d is formed.

From the above, it is preferable that the distance d between the light shielding layer 55 and the semiconductor film 54 is smaller, and the comparison of the light shielding effect with the case where the light shielding layer is not formed and the distance d.
In consideration of the machining accuracy and easiness of machining, the interval d is 0.0
It is shown that it is more preferable to form in the range of 5 μm to 0.10 μm.

Further, FIG. 9 shows a graph showing the result of obtaining the amount of light incident on the channel region when the width w is variously changed with respect to the width w defined as shown in FIG. There is. In the simulation of the width w, the optimum condition of the width w of the light shielding layer 55 is obtained by using the width a of the upper light shielding film 63 and the width b of the lower light shielding film 52 as a reference. The simulation is performed on the assumption that the lengths of the source electrode 59 and the drain electrode 60 in the longitudinal direction are substantially equal to the length a of the upper light-shielding film 63 in the width direction.

As is clear from the graph shown in FIG. 9, the ratio of the width w of the light shielding layer 55 to the length b of the lower light shielding film 52, w / b, is 0 <w / b <0.7. Over the range of
It is clear that the amount of incident light is reduced as compared with the case where the light shielding layer 55 is not formed.

The reason why the incident light amount increases as the width w increases in the range of w / b> 0.6 is considered to be the same as the reason why the incident light amount increases as the interval d increases. . That is, as the width w increases, if there is no light-shielding layer 54, the light passing directly under the transparent insulating substrate 51 is reflected by the light-shielding layer 54,
It is considered that this is because the amount of light incident on the semiconductor film 54 increases.

As described above, the width w of the light-shielding layer 55 is formed in the range of 0 <w / b <0.7 at which the light-shielding effect is recognized as compared with the case where the light-shielding layer 55 is not provided. Are shown to be preferred.

Further, if the width w of the light-shielding layer 55 becomes too large, the end portion of the light-shielding layer 55 will be located outside the end portion of the upper light-shielding film 63, and the area through which light is transmitted is reduced. Therefore, it is preferable that the end portion of the light shielding layer 55 is located inside the upper light shielding film 63. Therefore, when the length a of the upper light shielding film 63 is longer than the length b of the lower light shielding film 52 (a ≧ b), it is preferable that w <a / 2.

Next, with respect to the method of manufacturing the semiconductor device of the second embodiment, FIGS. 10 (a) to 10 (e) and 11 (a) will be described.
Each step will be described with reference to (c).

First, a light shielding film is deposited on the transparent insulating substrate 51 such as glass or quartz by the CVD method or the sputtering method, and then this light shielding film is formed into a predetermined shape by using photolithography and etching. Pattern it,
As shown in FIG. 10A, the lower light shielding film 52 is formed.

As the lower light-shielding film 52, for example, tungsten (W), tantalum (Ta), titanium (Ti), molybdenum (Mo), chromium (Cr), nickel (Ni) is used.
A material having a light-shielding effect, which is a combination of a metal film such as the above and a silicon film such as polysilicon or a silicide film is used. If the lower light-shielding film 52 is formed of such a material, sufficient light-shielding property can be obtained. Further, the melting point of the silicon film is about 1400 ° C., and the melting point of the silicide film is 13
Since the temperature is from 00 to 1500 ° C., by using the above-mentioned material as the lower light-shielding film 52, it is possible to obtain sufficient heat resistance not only with an ordinary backlight but also with a lamp that emits strong light such as a halide lamp for projection. In addition, in the manufacturing process described later, 900 to 1200
Even if a high temperature heat treatment is performed at a high process temperature of ℃, it has sufficient heat resistance.

Next, as shown in FIG. 10B, an insulating film 53 such as a SiO ₂ film is formed on the entire surface of the transparent insulating substrate 51 on which the lower light shielding film 52 is formed. The thickness of the insulating film 53 reflects the lower light-shielding film 52,
The film thickness is set so that the light passing through 3 is canceled by the interference effect.

Next, a semiconductor layer is formed on the insulating film 53. This semiconductor layer is an amorphous, polycrystalline, or single crystal Si film, a Ge film, a GaAs film, a GaP film, or the like.
For example, when a polycrystalline silicon film is formed as the semiconductor layer, an amorphous silicon film is formed on the insulating film 53 by 50 to 1
It is common to use a method of forming a film having a thickness of 50 μm and then polycrystallizing it by performing heat treatment or laser light irradiation under high temperature conditions. Then, the insulating film 53
By performing photolithography and etching on the semiconductor layer formed above, as shown in FIG. 10C, a predetermined island-shaped semiconductor film 54 and a light-shielding layer surrounding the semiconductor film 54 are provided. 55 is formed. Semiconductor film 5
4 and the light-shielding layer 55 are respectively formed, the semiconductor film 54
In order to control the threshold voltage, a step of implanting impurity ions may be added. In this case, the light shielding layer 55 is not activated. As described above, in the semiconductor device according to the second embodiment, the light shielding layer 55 can be formed at the same time when the semiconductor film 54 to be the channel region of the TFT is formed through the subsequent steps, and the light shielding layer 55 is formed. It is not necessary to separately perform a process for doing so, and the number of processes is not increased.

Next, as shown in FIG. 10D, a gate oxide film 56 is formed on the entire surface of the insulating film 53 on which the semiconductor film 54 and the light shielding layer 55 are formed. The gate oxide film 56 is formed by a new deposition method using the CVD method or a method of oxidizing the semiconductor film 54 and the light shielding layer 55. Further, it may be formed by using both a method of newly depositing an oxide film and a method of oxidizing the semiconductor film 54 and the light shielding layer 55. Then, a gate electrode 57 is formed at a position corresponding to the gate oxide film 56 on the semiconductor film 54.

Next, as shown in FIG. 10E, impurity ions are implanted into the semiconductor film 54 using the gate electrode 57 as a mask. Impurity ions are implanted into regions on both sides of the semiconductor film 54 where the gate electrode 57 is not formed to become a source region 54s and a drain region 54d, respectively. The region of the semiconductor film 54 immediately below the gate electrode 57, which serves as a mask, becomes a channel region 54c sandwiched by the source region 54s and the drain region 54d on both sides because no impurities are implanted.

Next, as shown in FIG. 11A, over the entire surface of the gate insulating film 56 on which the gate electrode 57 is formed, the portion corresponding to the lower semiconductor film 54 has a predetermined height higher than other regions. The interlayer insulating film 58 is formed to have a high height.

After forming the interlayer insulating film 58, the source region 54s and the drain region 54d of the underlying semiconductor film 54 are successively formed on the interlayer insulating film 58 and the gate insulating film 56.
Corresponding to the positions where the
A contact hole 58a reaching 4s and the drain region 54d is formed.

Subsequently, the entire surface of the interlayer insulating film 58 in which the contact holes 58a are formed is entirely covered with Al.
Etc. to deposit a metal layer. This metal layer of Al or the like is deposited on the interlayer insulating film 58, and the contact holes 5 are formed.
8a is filled. Then, after the metal layer is formed over the entire surface, etching is performed so that the metal layer remains in the shape of a long rectangular flat plate along the direction orthogonal to the channel direction. Through this etching process, the source electrode 59 and the drain electrode 60 made of metal wiring are formed. In the second embodiment, CF ₄ gas or CF ₄ and CH
The source electrode 59 and the drain electrode 60 were formed by dry etching using a mixed gas with F ₃ .

Next, as shown in FIG. 11B, a nitride film 61 is formed over the entire surface of the interlayer insulating film 58 on which the source electrode 59 and the drain electrode 60 are formed, and then,
An oxide film 62 is formed. The nitride film 61 and the oxide film 62
Is formed as a passivation film for protecting the source electrode 59 and the drain electrode 60 made of metal. After the oxide film 62 is formed, hydrogenation is performed, and subsequently, the semiconductor film 54 or the like is formed in the lower layer, so that the surface of the oxide film 62 in which unevenness is formed is etched back or CMP. (Chemic
The surface is flattened by performing al Mechanical Polishing).

Next, as shown in FIG. 11C, a light-shielding film is formed on the flattened oxide film 62 by the CVD method, the sputtering method or the like, and then photolithography and etching are performed. Then, the upper light-shielding film 63 is formed by patterning into a predetermined shape. The upper light-shielding film 63 can be formed of various light-shielding materials like the lower light-shielding film 52 of the lower layer.

When the semiconductor device of the second embodiment manufactured as described above is used as an active matrix substrate of a liquid crystal display device, the nitride film 61 on the drain electrode 60 is used.
After forming a contact hole in the oxide film 62, a transparent metal film to be a pixel electrode is formed of ITO or the like on the oxide film 61 and is etched into a predetermined shape. The pixel electrode formed of this transparent metal film is connected to the drain electrode through a contact hole formed on the drain electrode 60.

[0099]

According to the semiconductor device of the present invention, the source electrode and the drain electrode disposed between the semiconductor film and the upper light-shielding film are made of metal in the form of a rectangular flat plate long in the direction orthogonal to the channel direction. , Both ends thereof are formed to have a reverse taper shape. As a result, the light reflected from below has a shape suitable for being reflected to the outside, and since the upper surface is formed large, the light (diffracted light) that wraps around the upper light-shielding film is It is possible to reduce the irradiation of the semiconductor film and suppress the occurrence of light leakage due to the irradiation of light on the semiconductor layer that serves as the channel portion of the TFT. Further, since the upper light-shielding film is formed so that its peripheral portion has a forward tapered shape, it has a structure suitable for reflecting the light emitted from the upper portion toward the outside.

Further, since this semiconductor device can shield light without providing the light shielding film with an excessively large width, a small size and high definition liquid crystal display device having an improved aperture ratio can be used with this semiconductor device. Can be provided.

Further, in another semiconductor device of the present invention, a light-shielding layer electrically non-conductive by the same material as the semiconductor film surrounds the periphery of the semiconductor film on the insulating film in the same plane as the semiconductor film. Since it is formed as described above, it is possible to reduce the incidence of direct light, reflected light, light diffracted and incident from the end portions of the lower light shielding film and the metal layer, which have a large incident angle, on the semiconductor film. It is possible to suppress the occurrence of light leakage due to the irradiation of light on the semiconductor layer serving as the channel portion of the.

Further, since this semiconductor device can shield light without providing the light shielding film with an excessively large width, a small-sized and high-definition liquid crystal display device having an improved aperture ratio can be used with this semiconductor device. Can be provided.

Since this light shielding layer can be formed simultaneously with the existing step of forming the semiconductor film, the number of steps for forming the light shielding layer does not increase.

[Brief description of drawings]

1A and 1B are respectively a first embodiment.
3 is a cross-sectional view showing a schematic configuration of the semiconductor device of FIG.

FIG. 2 is a cross-sectional view for defining tilt angles θ1 and θ2 formed at the respective end portions of the metal layer and the upper light-shielding film in the semiconductor device used for the wave optics simulation of the first embodiment.

FIG. 3 is a graph showing a result of obtaining an amount of light incident on a channel region obtained by a wave optics simulation.

FIGS. 4A to 4E are cross-sectional views illustrating each step of the method for manufacturing the semiconductor device of the first embodiment. FIGS.

5A to 5C are cross-sectional views each illustrating a method for manufacturing the semiconductor device, step by step.

6 (a) and 6 (b) are each a second embodiment.
3 is a cross-sectional view showing a schematic configuration of the semiconductor device of FIG.

FIG. 7 defines a width w of a light-shielding layer and a distance d between the light-shielding layer and a semiconductor film, and a width a of an upper light-shielding film and a width b of a lower light-shielding film in a semiconductor device used for the wave optical simulation of the second embodiment. FIG.

FIG. 8 is a graph showing a result of finding the amount of light incident on the channel region when the distance d between the light shielding layer and the semiconductor film in the semiconductor device is changed by using a wave optical simulation.

FIG. 9 is a graph showing a result of obtaining the amount of light incident on the channel region when the width w of the light shielding layer in the semiconductor device is changed by using a wave optics simulation.

10 (a) to 10 (e) are respectively the second embodiment.
FIG. 6 is a cross-sectional view illustrating each step of the method for manufacturing the semiconductor device of FIG.

11A to 11C are cross-sectional views each illustrating a method for manufacturing the semiconductor device, step by step.

FIG. 12 is a cross-sectional view showing a schematic configuration of a conventional semiconductor device.

FIG. 13 is a cross-sectional view showing a schematic configuration of another conventional semiconductor device.

[Explanation of symbols]

31 Transparent insulating substrate 32 Lower light-shielding film 33 insulating film 34 Semiconductor film 35 Gate insulating film 36 gate electrode 37 Interlayer insulation film 38 Source electrode 39 drain electrode 40 Nitride film 41 oxide film 42 Upper light-shielding film 51 transparent insulating substrate 52 Lower light-shielding film 53 insulating film 54 Semiconductor film 55 Light-shielding layer 56 Gate insulation film 57 Gate electrode 58 Interlayer insulation film 59 Source electrode 60 drain electrode 61 Nitride film 62 oxide film 63 Upper light-shielding film

   ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 2H092 GA11 GA12 GA13 GA17 GA21                       GA60 JA24 JA27 JA29 JA30                       JA31 JA32 JA36 JA41 JA42                       JA43 JA44 NA01 NA21 NA25                       PA09 PA13 RA05                 4M104 AA01 AA02 AA04 AA05 AA09                       BB01 BB02 BB05 BB13 BB14                       BB16 BB17 BB18 BB19 BB24                       CC00 CC01 CC05 DD02 DD12                       DD63 DD91 EE03 EE06 EE16                       EE17 FF06 FF08 FF11 FF13                       GG09 HH19 HH20                 5F110 AA21 BB01 CC02 DD02 DD03                       DD13 FF09 FF22 FF29 GG02                       GG03 GG04 GG12 GG13 GG15                       GG25 GG52 HJ13 HL03 HM02                       NN03 NN05 NN44 NN46 NN47                       NN48 NN54 NN55 NN72 PP01                       PP03 QQ04 QQ11 QQ19 QQ21

Claims (12)

[Claims] 1. An island-shaped semiconductor film which is formed on an insulating film provided on a transparent insulating substrate and serves as a source region, a channel region and a drain region of a thin film transistor, and between the transparent insulating substrate and the insulating film. Through the lower light-shielding film formed on the semiconductor film, the interlayer insulating film formed on the semiconductor film, and the contact hole formed in the interlayer insulating film,
It is provided on the interlayer insulating film so as to be connected to the source region and the drain region of the semiconductor film, respectively.
A source electrode and a drain electrode each extending in a direction orthogonal to the channel direction of the channel region; an insulating layer formed on the source electrode and the drain electrode; and an upper light-shielding film provided on the insulating layer. The semiconductor device, wherein the source electrode and the drain electrode have an inversely tapered shape at an end in a direction orthogonal to a channel direction of the semiconductor film. 2. The upper light-shielding film is formed such that the lower surface thereof has a length substantially equal to the length of the source electrode and the drain electrode in the direction orthogonal to the channel direction, and the peripheral portion has a forward tapered shape. The semiconductor device according to claim 1, wherein 3. The semiconductor device according to claim 2, wherein the lower light shielding film is formed of a refractory metal material. 4. The semiconductor device according to claim 2, wherein the inverse taper inclination angle θ1 of the end portions formed in the source electrode and the drain electrode is formed in the range of θ1 = 70 to 80 °. 5. The method of manufacturing a semiconductor device according to claim 2, wherein a step of forming a lower light-shielding film on the transparent insulating substrate, and insulation on the transparent insulating substrate having the lower light-shielding film formed thereon. A step of forming a film, a step of forming an island-shaped semiconductor film to be a thin film transistor on the insulating film, a step of forming a gate insulating film on the insulating film on which the semiconductor film is formed, Forming a gate electrode on the insulating film at a position corresponding to the semiconductor film; and implanting an impurity into the semiconductor film by using the gate electrode as a mask to form a region in the semiconductor film immediately below the gate electrode. Forming a channel region and forming a source region and a drain region in which impurities are implanted in a region of the semiconductor film that is not masked by the gate electrode; and forming an interlayer insulating film on the gate insulating film on which the gate electrode is formed. A step of forming, a step of forming contact holes in the interlayer insulating film and the gate insulating film, each contact hole reaching a source region and a drain region of the semiconductor film, and a metal layer in each of the contact holes and on the interlayer insulating film. Forming a source electrode and a drain electrode by patterning the metal layer on the interlayer insulating film so as to leave a metal layer extending in a direction orthogonal to the channel direction of the semiconductor film, and the source electrode And a step of sequentially forming a nitride film and an oxide film on the interlayer insulating film on which the drain electrode is formed, and a step of forming an upper light-shielding film on the oxide film. Method. 6. The method of manufacturing a semiconductor device according to claim 5, wherein the maximum process temperature in each step is in the range of 900 to 1200 ° C. 7. An island-shaped semiconductor film which is formed on an insulating film provided on a transparent insulating substrate and serves as a source region, a channel region and a drain region of a thin film transistor, and between the transparent insulating substrate and the insulating film. Through the lower light-shielding film formed on the semiconductor film, the interlayer insulating film formed on the semiconductor film, and the contact hole formed in the interlayer insulating film,
It is provided on the interlayer insulating film so as to be connected to the source region and the drain region of the semiconductor film, respectively.
A source electrode and a drain electrode each extending in a direction orthogonal to the channel direction of the channel region; an insulating layer formed on the source electrode and the drain electrode; and an upper light-shielding film provided on the insulating layer. A light-shielding layer that is electrically non-conductive and is formed on the insulating film in the same plane as the semiconductor film by the same material as the semiconductor film so as to surround the semiconductor film. Semiconductor device. 8. The semiconductor device according to claim 7, wherein the lower light shielding film is formed of a refractory metal material. 9. The semiconductor device according to claim 7, wherein the light-shielding layer is formed so that the distance from the semiconductor film is in the range of 0.05 μm to 0.10 μm. 10. The light shielding layer is formed so that the width w of the light shielding layer and the length b of the lower light shielding film are in the range of 0 <w / b <0.7. The semiconductor device according to. 11. The light-shielding layer has a length a of an upper light-shielding film.
11. The semiconductor device according to claim 10, wherein when the length is longer than the length b of the lower light-shielding film (a ≧ b), the width w of the light-shielding layer is formed in a range satisfying w <a / 2. 12. The method of manufacturing a semiconductor device according to claim 7, wherein a step of forming a lower light-shielding film on the transparent insulating substrate, and insulation on the transparent insulating substrate having the lower light-shielding film formed thereon. A step of forming a film, a step of forming an island-shaped semiconductor film to be a thin film transistor on the insulating film, and a light-shielding layer formed of the same material as the semiconductor film, and the step of forming the semiconductor film and the light-shielding layer A step of forming a gate insulating film on the formed insulating film, a step of forming a gate electrode on the gate insulating film at a position corresponding to the semiconductor film, and the step of forming a gate electrode on the semiconductor film using the gate electrode as a mask. Impurity is implanted to form a channel region in the region of the semiconductor film immediately below the gate electrode, and a source region and a drain region are implanted in the region of the semiconductor film not masked by the gate electrode. A step of forming an interlayer insulating film on the gate insulating film on which the gate electrode is formed, and contact holes reaching the source region and the drain region of the semiconductor film, respectively, in the interlayer insulating film and the gate insulating film. Forming step, forming a metal layer in each of the contact holes and on the interlayer insulating film, leaving the metal layer on the interlayer insulating film to extend in a direction orthogonal to the channel direction of the semiconductor film. Patterning to form a source electrode and a drain electrode, a step of sequentially forming a nitride film and an oxide film on the interlayer insulating film on which the source electrode and the drain electrode are formed, and an upper light shield on the oxide film. A method of manufacturing a semiconductor device, comprising: a step of forming a film.