JP2003149681A - Liquid crystal panel substrate, liquid crystal panel, and projection display device - Google Patents

Abstract

(57) [Summary] Active matrix LC using TFT
In the case of D, it is desired that the pixel electrode is flat over as wide a range as possible in order to prevent poor alignment and increase the reflection efficiency in the reflection type. However, the conventional active matrix LCD has a cross-sectional structure in which only the portion where the TFT is formed is raised, so that the pixel electrode and a part of the surface of the alignment film formed thereon are inclined, corresponding to a slope. However, there is a problem in that poor alignment occurs in a portion where the light emission occurs and the transmittance and the reflectance decrease. SOLUTION: After forming a first pixel electrode (11) composed of a TFT and an ITO, a flat insulating film (13) is formed thereon by spin coating or the like to contact a part of the first pixel electrode. After opening the hole (10), a second pixel electrode (12) having the same pattern as the first pixel electrode is formed on the surface of the insulating film (13).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal element and a flattening technique for the liquid crystal element, and more particularly to an active matrix type LCD (liquid crystal display device) in which a pixel electrode is driven by a TET (thin film transistor) formed on an insulating substrate. The present invention relates to a technology suitable for use in.

[0002]

2. Description of the Related Art As a liquid crystal display device used for a liquid crystal television or the like, a pixel electrode and a TFT (thin film transistor) as a switch element for applying a voltage to the pixel electrode at each intersection of scanning lines and signal lines arranged in a grid pattern. An active matrix type LCD is used in which Also, a video projector using an active matrix type LCD as a light valve for light modulation has been put into practical use.

[0003]

In the active matrix LCD using the above TFT, it is desired to increase the capacity.

An object of the present invention is to solve the above problems.

[0005]

SUMMARY OF THE INVENTION The present invention is a liquid crystal panel substrate comprising a plurality of gate lines and signal lines intersecting each other, and a thin film transistor provided at a position corresponding to the intersection of the gate lines and the signal lines. The drain electrode of the thin film transistor is extended along the signal line and along the gate line of the preceding stage, and a capacitance is provided in a region where the drain region of the thin film transistor and the gate line of the preceding stage overlap. It is characterized by forming.

[0006]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings.

1 and 2 show a sectional view and a plane layout of a first embodiment of a liquid crystal panel substrate to which the present invention is applied. Note that FIG. 1 and FIG. 2 show a cross section and a layout of one pixel portion of the pixels arranged in a matrix. FIG. 1 is a cross section taken along line I-I in FIG.

In FIG. 1, 1 is a glass substrate, 2 is a polysilicon layer which is an island-shaped active layer formed on the surface of the glass substrate 1, and 3 is formed on the surface of the polysilicon layer 2 by thermal oxidation. It is a gate insulating film. First, the polysilicon layer 2 is formed to a thickness of 1000 angstroms by the CVD method or the like, and is thermally oxidized to finally have a thickness of 350 to 450 angstroms. At this time, the thickness of the gate oxide film 3 is about 1
It is 250 angstrom.

Reference numeral 4 denotes a gate electrode / scanning line (hereinafter, simply referred to as a gate electrode or a scanning line, if necessary) which is formed of a second polysilicon layer and is formed substantially at the center of the polysilicon layer 2 with a gate insulating film 3 interposed therebetween. It is called a line). The gate electrode 4 is formed of, for example, 3000 to 40 by the CVD method or the like.
It is formed to a thickness such as 00 angstrom. Reference numerals 5 and 6 are first oxides made of silicon oxide or the like formed so as to cover above the gate electrode 4 and the gate insulating film 3.
The second interlayer insulating film is made of an interlayer insulating film and BPSG (silicon oxide containing boron and phosphorus). First above
The inter-layer insulation film 5 is made of, for example, 80
It is formed to a thickness such as 00 angstrom. Second
The interlayer insulating film 6 is formed after the signal line 8 made of a conductive layer such as aluminum is formed on the first interlayer insulating film 5. The signal line 8 is formed into a contact hole 9 in the first interlayer insulating film 5 and the gate insulating film 3 and then deposited for about 3500 by vapor deposition or the like.
It is formed to a thickness such as angstrom and is in contact with the polysilicon layer 2. By forming the second interlayer insulating film 6 made of BPSG or the like on the first interlayer insulating film 5 made of silicon oxide or the like, the signal line 8 is not corroded even if an insulating film having low moisture resistance is formed later. It is possible to prevent the disconnection due to.

Reference numeral 11 denotes a first pixel electrode made of an ITO film,
Reference numeral 12 is a second pixel electrode also made of an ITO film, and the first pixel electrode 11 and the second pixel electrode are formed in the same pattern. The first pixel electrode 11 is formed by forming a contact hole 10 by dry etching on the gate insulating film 3, the first interlayer insulating film 5 and the second insulating film 6 above the drain region of the polysilicon layer 2, and then forming the ITO film. Is formed to a thickness of 1500 angstrom by sputtering, and is patterned by selective etching. The second pixel electrode 12 is formed by applying, for example, Tonen polysilazane (product name of Tonen Co., Ltd.) by spin coating over the first pixel electrode 11 and the second insulating film 6 and baking (baking). Form a contact hole on the flat SOG film 13 at the same position as the contact hole 10 by dry etching, then form an ITO film by sputtering to a thickness of 1500 angstroms and perform patterning by selective etching. Is formed by. In the above case,
Formation of contact holes in insulating films 3, 5, 6 and SOG
A common etching mask can be used for forming the contact hole in the film 13. Further, a common etching mask can be used for patterning the first pixel electrode 11 and the second pixel electrode 12.

Further, an alignment film of polyimide or the like is formed on the pixel electrode 12 and the SOG film 13 in an amount of about 20.
A substrate for a liquid crystal panel is obtained by forming it to a thickness of 00 to 3000 angstroms and performing rubbing (alignment treatment).

In the first embodiment, since the SOG film 13 is formed on the first pixel electrode 11, the alignment film can be flattened to reduce alignment defects.

Moreover, by forming the second pixel electrode 12 in the same pattern as the first pixel electrode 11 therebelow, two pixel electrodes can be formed without increasing the mask used for patterning. Since the contact holes of the insulating films 3, 5, 6 and the contact hole of the SOG film 13 are formed at the same position, a common etching mask can be used, and at the time of forming the contact hole in the SOG film 13, SOG compared to polysilicon
Since the first pixel electrode 11 made of an ITO film having a large selection ratio with the film functions as an etch stopper, the drain,
Dry etching for forming a contact hole can be performed on the SOG film 13 without damaging the polysilicon layer 2 as the source region.

FIG. 2 shows an example of a plane layout configuration of the first embodiment (FIG. 1). In FIG. 2, the intersection of the gate line 4 and the signal line 7 indicated by hatching A is the channel portion of the transistor.

Although not particularly limited, in this embodiment, in order to increase the capacity connected to the drain of the transistor (TFT), the first polysilicon layer 2 forming the active layer is formed as shown by 2a. The signal line 8 and the second polysilicon layer forming the scanning line 4 of the adjacent pixel (upper side in the drawing) are extended along the second polysilicon layer forming the scanning line 4. The portion is configured to extend along the signal line 7 like 4a. As a result, the capacitance between the first and second polysilicon layers formed below the signal line 7 (using the gate insulating film 3 as a dielectric) serves as a storage capacitance for applying a voltage to each pixel electrode. Will be connected to the drain (sometimes called the source).

3 and 4 are a sectional view and a plan layout of a second embodiment of a liquid crystal panel substrate to which the present invention is applied. FIG. 3 is a cross section taken along line III-III in FIG.

In the present invention, since the first pixel electrode and the second pixel electrode are formed in the same pattern, the first pixel electrode and the second pixel electrode can be connected at any place. Therefore, in the second embodiment, for example, as indicated by reference numeral B in FIG.
2 and a part of the first pixel electrode 11 is provided with a protrusion that intersects the signal line 8. Then, the contact hole 10 'for the two pixel electrodes 11 and 12 is provided in this protruding portion. As a result, compared to the LCD using the liquid crystal panel substrate of the first embodiment in which the contact hole is formed above the drain region, scattering in the contact hole can be reduced and the aperture ratio can be improved. However, the contact hole 10 'may be provided above the channel portion of the TFT or above the scanning line.

FIGS. 5 and 6 show the present invention in an inverted stagger type T.
L that uses FT as a switching element that applies a voltage to the pixel electrode
An example applied to a CD will be shown.

In FIGS. 5 and 6, 21 is a gate electrode made of a Ta (tantalum) layer having a thickness of about 1300 angstroms formed by sputtering on the glass substrate 1, and 22 is formed by thermally oxidizing the surface. 10
A gate oxide film (TaOx) having a thickness of about 00 to 2000 angstroms, 23 is a gate insulating film made of a silicon nitride film formed to a thickness of about 3000 angstroms by a plasma CVD method, and 24 is a non-doped channel region. Amorphous silicon layer, 25
Reference numerals a and 25b are N-type amorphous silicon layers which are formed so as to come into contact with the surface of the amorphous silicon layer 24 and serve as source and drain regions. These amorphous silicon layers 24 and 25a and 25b are made to have a thickness of 3000 angstroms and 500 angstroms, respectively, by plasma CVD, for example.

Further, in FIGS. 5 and 6, 26a,
26b is the N-type amorphous silicon layers 25a, 25
The source and drain electrodes 27 made of a titanium (Ti) layer formed so as to contact the surface of b serve as an etch stopper for separating the N-type amorphous silicon layers 25a and 25b and the source and drain electrodes 26a and 26b. Is a channel protection film made of silicon nitride or the like. The channel protection film 27 is formed to a thickness of 2000 angstrom by plasma CVD, for example.

In the embodiment shown in FIG. 5, the first pixel electrode 11 made of an ITO film is formed in contact with the surface of the drain electrode 26b, and a flattening film is formed on the first pixel electrode 11 as a flattening film. The SOG film 13 is formed, and the contact hole 10 is opened in the SOG film 13, and then the ITO film to be the second pixel electrode 12 is formed in the same pattern, so that the same effect as that of the embodiment of FIG. 1 can be obtained. Is configured.

On the other hand, in the embodiment shown in FIG.
The first pixel electrode 11 made of a TO film is formed before the amorphous silicon layer 24, the contact hole 10 is formed in the gate insulating film 23, and the drain electrode 26b is in contact with the surface of the first pixel electrode 11. Has been done.
Then, the SOG film 13 is formed on the drain electrode 26b, and the contact hole 10 'is formed in the SOG film 13.
The same effect as that of the embodiment of FIG. 1 can be obtained by forming the ITO film to be the second pixel electrode 12 in the same pattern after opening the. In the embodiment shown in FIG. 6, the contact holes 10 and 10 'are formed so as to be offset from each other, but they may be provided at the same position. In the embodiment of FIG. 6, TF is used to prevent the diffusion of impurities such as alkaline ions from the glass substrate 1 to the gate electrode 21.
The insulating film 20 is provided only below T. This insulating film 20 may be provided also in the embodiment of FIG.

The first pixel electrode 11, the second pixel electrode 12 and the SOG film 13 in the embodiments shown in FIGS.
The forming method and conditions such as thickness are the same as those in the first embodiment. Further, in any of the embodiments shown in FIGS. 5 and 6, the alignment film 28 made of, but not limited to, silicon nitride is formed from the second pixel electrode 12 to the surface of the SOG film 13.

The embodiment of the liquid crystal panel substrate of the transmissive LCD in which the second pixel electrode 12 is formed of the transparent ITO film has been described above. The second pixel electrode 12 is formed of a conductive film having a high reflectance such as aluminum. However, it can be applied to a substrate for a reflective LCD that uses this as a reflective electrode. In that case, the first pixel electrode 12 can also be formed of a conductive film such as aluminum. Second, if reflective
Since the pixel electrode is entirely flattened, the reflectance can be improved. When the first pixel electrode, the second pixel electrode, and the contact hole are formed above the gate electrode or the scanning line or the signal line, the contact hole 10 between the first pixel electrode 11 and the drain region is formed above the drain region. However, since the contact hole 10 is covered with the flat second pixel electrode 12 as shown in FIG. 3, it does not become a factor for lowering the aperture ratio.

The liquid crystal panel substrate of each of the above-mentioned embodiments has a transparent conductive film (I
A glass substrate on the incident side having a counter electrode made of TO) is arranged at an appropriate interval, and a TN (Twisted Nematic) type liquid crystal or SH is enclosed in a gap sealed by a sealing material.
(Super Homeotropic) type liquid crystal is filled and configured as a liquid crystal panel.

FIG. 7 shows a configuration example of a video projector as an example of a projection type display device to which the liquid crystal panel of the above embodiment is applied as a light valve.

In FIG. 7, 370 is a light source such as a halogen lamp, 371 is a parabolic mirror, 372 is a heat ray cut filter, 373, 375 and 376 are blue reflections, respectively.
Dichroic mirror with green reflection and red reflection, 374
Reference numeral 377 is a reflection mirror, 378, 379 and 380 are light valves comprising the liquid crystal panel of the above-mentioned embodiment, and 383 is a dichroic prism.

In the video projector of this embodiment, the white light emitted from the light source 370 is condensed by the parabolic mirror 371 and passes through the heat ray cut filter 372 to block the heat rays in the infrared region, so that only visible light is emitted. It is incident on the dichroic mirror system. Then, first, blue light (wavelength of about 50 nm or less) is reflected by the blue reflection dichroic mirror 373, and other light (yellow light) is transmitted. The reflected blue light changes its direction by the reflection mirror 374 and enters the blue modulation light valve 378.

On the other hand, the light transmitted through the blue reflective dichroic mirror 373 is the green reflective dichroic mirror 3.
75, the green light (wavelength of about 500 to 600 nm) is reflected, and the other light, red light (about 600).
(wavelengths above nm) are transmitted. Dichroic mirror 3
The green light reflected at 75 is the green modulation light valve 379.
Incident on. Further, the red light transmitted through the dichroic mirror 375 changes its direction by the reflection mirrors 376 and 377 and enters the red modulation light valve 380. The light valves 378, 379, and 380 are driven by blue, green, and red primary color signals supplied from a video signal processing circuit (not shown), and the light incident on each light valve is modulated by each light valve. They are combined by the dichroic prism 383. Dichroic prism 383
Are formed such that the red reflecting surface 381 and the blue reflecting surface 382 are orthogonal to each other. Then, the color image combined by the dichroic prism 383 is enlarged and projected on the screen by the projection lens 384 and displayed.

Since the liquid crystal panel substrate of the above-mentioned embodiment has high transmittance and aperture ratio, the above-mentioned video projector using the liquid crystal panel using this as a light valve is bright even if a small-diameter projection lens is used. A display with high contrast can be obtained.

[0031]

As described above, according to the present invention, the drain electrode of the thin film transistor is extended along the signal line and along the gate line of the previous stage. By forming the capacitance in the region where the gate lines of 1) overlap, the capacitance can be increased without reducing the aperture ratio.

[Brief description of drawings]

FIG. 1 is a sectional view showing a first embodiment of a liquid crystal panel substrate to which the present invention is applied.

FIG. 2 is a plan layout view of a first embodiment of a liquid crystal panel substrate to which the present invention is applied.

FIG. 3 is a sectional view showing a second embodiment of a liquid crystal panel substrate to which the present invention is applied.

FIG. 4 is a plan layout view of a second embodiment of a liquid crystal panel substrate to which the present invention is applied.

FIG. 5 is a sectional view showing a third embodiment of a liquid crystal panel substrate to which the present invention is applied.

FIG. 6 is a sectional view showing a fourth embodiment of a liquid crystal panel substrate to which the present invention is applied.

FIG. 7 is a schematic configuration diagram of a video projector as an example of a projection type display device to which an LCD using the liquid crystal panel substrate of the embodiment is applied as a light valve.

FIG. 8 is a sectional view showing an example of a conventional liquid crystal panel substrate.

[Explanation of symbols]

1 glass substrate 2 polysilicon layer 3 gate insulating film 4 gate electrode (scan line) 5 first interlayer insulating film 6 second interlayer insulating film 8 signal line 9, 10, 10 'contact hole 11 first pixel electrode (ITO film) ) 12 second pixel electrode (ITO) 13 flattening film (SOG film) 21 gate electrode 22 gate oxide film (TaOx) 24 amorphous silicon layers 25a, 25b N-type amorphous silicon layers (source and drain regions) 26a, 26b source , Drain electrode 27 channel protective film 28 alignment film 370 lamps 373, 375, 376 dichroic mirrors 374, 377 reflection mirrors 378, 379, 380 light valve 383 dichroic prism 384 projection lens

   ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 2H092 GA28 JA24 JA45 JB63 JB64                       RA05                 2K103 AA01 AA05 AA11 AA16 AB06                       BB02                 5F110 AA30 BB01 CC04 CC07 DD02                       EE04 EE09 EE45 FF01 FF02                       FF03 FF09 FF23 FF30 GG02                       GG13 GG25 GG44 GG45 HK04                       HK07 HK09 HK21 HK22 HK35                       HL03 HL07 HL11 HL22 HL23                       HM12 HM18 NN03 NN22 NN23                       NN35 NN36 NN72 QQ01

Claims (4)

[Claims] 1. A substrate for a liquid crystal panel, comprising a thin film transistor provided at a position where a plurality of gate lines intersect with a signal line and corresponding to a position where the gate line intersects with the signal line, wherein a drain electrode of the thin film transistor is provided. A liquid crystal, the liquid crystal being extended along the signal line and along the pre-stage gate line, wherein a capacitance is formed in a region where the drain region of the thin film transistor and the pre-stage gate line overlap. Substrate for panel. 2. The substrate for a liquid crystal panel according to claim 1, wherein the gate line at the preceding stage is extended along the signal line so as to overlap with the drain region. 3. The liquid crystal panel substrate according to claim 1 or 2, and the transparent substrate having a counter electrode are arranged at an appropriate interval, and the liquid crystal panel substrate and the transparent substrate. A liquid crystal panel characterized in that a liquid crystal is sealed in a space between the liquid crystal panel and the liquid crystal panel. 4. A light source, a liquid crystal panel having a structure according to claim 3, which modulates and transmits or reflects light from the light source, and projection for converging and projecting the light modulated by these liquid crystal panels. A projection-type display device comprising: an optical unit.