JP2003133471A - Wiring board for high frequency signals - Google Patents

Abstract

(57) [Problem] To reduce crosstalk between adjacent signal line systems even for signals in the quasi-millimeter wave band and the millimeter wave band. A signal line is provided on an upper surface of an upper dielectric layer.
La2, Lb1, and Lb2 are formed, and signal lines La3 and Lb3 are formed on the upper surface of the lower dielectric layer 2. The signal line La3 includes a conductive via V penetrating through the upper dielectric layer 1.
The signal lines La1 and La2 are electrically connected via Ha1 and VHa2, and the signal line Lb3 is connected to the upper dielectric layer 1
The signal lines Lb1 and Lb2 are electrically connected via conductive vias VHb1 and VHb2 penetrating through. On the upper surface of the upper and lower dielectric layers, and on the lower surface of the lower dielectric layer,
Ground electrodes G1, G2, and G are formed, and each signal line system is formed by a coplanar line. Since the signal lines on the input end side and the output end side are formed to have mutually different lengths in the adjacent signal line systems, they are less susceptible to mutual interference due to electromagnetic radiation and the like, and crosstalk is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency wiring board, and more particularly to a wiring board incorporating a plurality of signal lines for transmitting high frequency signals in the quasi-millimeter wave band and the millimeter wave band. Here, the wiring board includes not only the circuit board but also an IC housing package including a region for mounting an IC chip on the circuit board, a sealing ring, a lid, and the like.

[0002]

2. Description of the Related Art FIG. 7 shows an IC package for incorporating a conventional semiconductor device for high frequency signals, which is described in Japanese Patent Laid-Open No. 4-336702. The IC
The package includes a package substrate 1, a package side wall 2,
A cavity is formed by the sealing lid 3 and the sealing lid 3, and a die bonding region 4 for mounting an IC chip and an internal coplanar line 2 forming a high frequency transmission line are formed in the cavity.
And a dielectric substrate 6 on which 0 is formed. An external coplanar line 10 forming a lead terminal is provided on the bottom surface of the package substrate 1, and a ground metal thin film 8 for the external coplanar line 10 and the internal coplanar line 20 is provided.
18 and the signal line metal thin films 9 and 19 are electrically connected by a via hole 11. In this conventional example, since the signal line is formed by the coplanar line, that is, the coplanar wave guide structure, when the signal frequency is a relatively low frequency in the high frequency band, the isolation of the adjacent signal line is ensured. can do.

On the other hand, in ICs such as multiplexers, demultiplexers, and drivers in the field of optoelectronics, from several tens of kHz to the quasi-millimeter wave band (10 to 30 GHz).
z) or a signal line for flatly transmitting signals up to the millimeter wave band (30 to 300 GHz) has been required. Also, not limited to the optoelectronics field,
Similarly, in various ICs, a high frequency band has been achieved. When an IC for processing a signal of such a quasi-millimeter wave band to a millimeter wave band or a broadband or ultra wide band including these frequency bands is formed on a substrate and packaged, the conventional example shown in FIG. Even if the internal signal line and the external signal line are formed of coplanar lines like a package, sufficient isolation cannot be obtained between a plurality of adjacent signal lines, and crosstalk may occur. I will end up. This problem of crosstalk has become more urgent because the signal line spacing on the substrate has been set narrower due to the recent miniaturization and higher density of electronic devices. In particular,
The distance between substrate signal lines is less than or equal to λ / √ε _r (λ: wavelength of transmission signal in air, ε _r : relative permittivity of substrate), and adjacent distance is greater than or equal to λ / (2√ε _r ). In that case, the problem of crosstalk cannot be ignored, and when the signal line spacing is λ / (2√ε _r ) or less, the crosstalk becomes very significant.

Further, in the conventional IC package of FIG. 7, the ground line metal thin film 8 and the signal line metal thin film 9 which are external connection terminals formed on the back surface of the package substrate 1 are
It is connected to the IC chip mounted in the die bonding region 4 through a via hole 11 formed through the package substrate 1 and the dielectric substrate 6, and therefore the entire back surface of the package substrate 1 is used as a ground electrode. I can't. Therefore, when mounting the heat slug for cooling the IC chip on the back surface of the package substrate 1, it is necessary to mount the heat slug so as to prevent a short circuit between the ground metal thin film 8 and the signal line metal thin film 9. Inevitably, it is difficult to obtain a sufficient cooling effect. In some cases, it is difficult to attach the heat slug itself.

As another conventional example, in order to reduce crosstalk between a plurality of adjacent signal lines, the signal lines are formed of coplanar lines and the dielectric substrate is formed in multiple layers, and the ground electrode is also formed in the inner layer. A high-frequency wiring board formed with is also proposed. However, also in this conventional example, when the wiring board is used for signals in the quasi-millimeter wave band to the millimeter wave band, there is a possibility that crosstalk between signal lines may occur, and the problem of FIG. Similar to the IC package, it is difficult to attach the heat slug because the entire back surface of the substrate cannot be used as the ground electrode.

The present invention has been made in view of the problems of the conventional example as described above, and an object of the present invention is to provide a substrate on which an IC chip for processing a high frequency signal is mounted, the signal being in the quasi-millimeter wave band to millimeter range. This is to make it possible to reduce crosstalk between adjacent signal lines even for signals in the waveband. Another object of the present invention is to make it possible to easily attach a heat slug for heat dissipation on a substrate on which an IC chip for processing a high frequency signal is mounted.

[0007]

In order to achieve the above-mentioned object of the present invention, in a wiring board for a high frequency signal provided with a plurality of signal line systems according to the present invention, each signal line system is Between the input end and the output end is divided into a plurality of signal lines electrically connected by conductive vias, and the plurality of signal line systems includes an input side signal line extending from each input end and an output. At least one of the output side signal lines extending from the end is arranged on the surface of the wiring board, and in two adjacent signal line systems, the conductive vias for connecting the signal lines are the input ends of the signal line system. Are provided at different distances from each other, and at different distances from the output end of the signal line system.

In a preferred embodiment of the wiring board according to the present invention, the wiring board is composed of an upper dielectric layer and a lower dielectric layer which are laminated, and has an input side signal line and an output side signal of a plurality of signal line systems. A line is formed on the upper surface of the upper dielectric layer, which is the surface of the wiring board, and in each of the plurality of signal line systems, a signal line that connects the input side signal line and the output side signal line via a conductive via is provided. , The ground electrode is formed on the upper surface of the lower dielectric layer, the ground electrode is formed on the upper surface of the upper dielectric layer around the signal line with a gap, and the ground electrode is formed on the entire lower surface of the lower dielectric layer, which is the back surface of the wiring board. Is formed.

In another preferred embodiment of the wiring board according to the present invention, the wiring board is composed of an upper dielectric layer and a lower dielectric layer which are laminated, and includes an input side signal line and an output side of a plurality of signal line systems. One of the side signal lines is formed on the upper surface of the upper dielectric layer that is the front surface of the wiring board, and the other of the input and output signal lines of the plurality of signal line systems is the lower surface of the wiring board. Formed on the lower surface of the body layer, in each of the plurality of signal line system, a signal line connecting the input side signal line and the output side signal line through a conductive via, is formed on the upper surface of the lower dielectric layer, It is characterized in that a ground electrode is formed on the upper surface of the upper dielectric layer and the lower surface of the lower dielectric layer around the signal line via a gap.

In the two embodiments described above, a ground electrode is provided on the upper surface of the lower dielectric layer around the signal line via a gap, and the ground electrode is provided from the upper dielectric layer to the lower dielectric layer. It is preferably connected to the ground electrode on the lower surface of the lower dielectric layer by a plurality of conductive vias penetrating to the body layer.

In another preferred embodiment of the wiring board according to the present invention, one of an input side signal line and an output side signal line of a plurality of signal line systems is arranged on the surface of the wiring board,
The other is arranged on the back surface of the wiring board, and a ground electrode is formed on the front surface and the back surface of the wiring board around the signal line via a gap. Also in this embodiment, these ground electrodes are preferably connected to each other by a plurality of conductive vias penetrating from the upper dielectric layer to the lower dielectric layer.

The above wiring board according to the present invention further includes
A through hole for penetrating the wiring board to mount an IC chip, and a base board laminated on the back surface of the wiring board,
A base substrate on which an IC chip is arranged, a sealing ring provided on the surface of the wiring substrate for sealing the mounted IC chip, and a lid mounted on the sealing ring. And can be used to connect the IC chip to an external circuit. In this case, the base substrate is preferably made of a heat dissipation material for cooling the IC chip.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a first embodiment of a wiring board for high frequency signals in which a signal line for connecting an IC chip and an external connection terminal is formed according to the present invention. . As shown in the perspective view of FIG. 1A, the high frequency wiring substrate of the first embodiment is formed in a two-layer structure of an upper dielectric layer 1 and a lower dielectric layer 2. In FIG.
(B) is a perspective view for explaining the signal line formed on the surface of the lower dielectric layer, and (C) and (D) are
It is sectional drawing of CC line and DD line in (A).

As shown in FIG. 1A, the signal line La is formed on the surface of the wiring board, that is, the upper surface of the upper dielectric layer 1.
1, La2, Lb1, and Lb2 are formed, and the signal lines La1 and L1 with respect to the center line aa of the upper dielectric layer 1 are formed.
a2 is arranged substantially line-symmetrically, and the signal lines Lb1 and Lb2 are also arranged substantially line-symmetrically. Note that it is not necessary to make them line-symmetrical, but it is necessary to make the lengths of the signal lines La1 and Lb1 different by a predetermined length or more, and make the lengths of the signal lines La2 and Lb2 different by a predetermined length or more. Via holes filled with conductors (metals), that is, conductive vias VHa1, VHa2, V are provided at the inner ends (on the side of the center line aa) of these signal lines La1, La2, Lb1, and Lb2.
Hb1 and VHb2 are provided so as to penetrate the upper dielectric layer 1. A conductive film G1 is formed on a portion of the upper dielectric layer 1 other than the signal line via a gap having a predetermined width with the signal line, and the conductive film G1 is held at the ground potential, as will be described later. , Configure the ground electrode. Thereby, these four signal lines are configured in the form of coplanar lines and crosstalk is reduced. The signal lines La1 and Lb1 are used for connecting IC chip lead terminals, and the signal lines La2 and Lb2 are used for connecting external terminals, or vice versa.

On the other hand, on the inner surface of the wiring board, that is, the upper surface of the lower dielectric layer 2, as shown in FIG. 1B, signal lines La3 and Lb3 are formed at the center thereof. As shown in FIG. 1C, the signal line La3 electrically connects the signal lines La1 and La2 via the conductive vias VHa1 and VHa2 provided in the upper dielectric layer 1, and the signal line La3 is electrically connected. Configure system a. The signal line Lb3 has conductive vias VHb1 and VHb2, as shown in FIG.
The signal lines Lb1 and Lb2 are electrically connected to each other via the to form a signal line system b. A ground electrode G is formed on the entire lower surface of the lower dielectric layer 2. If there is a portion where the ground electrode is not formed on the lower surface such as the case where the signal line is formed on the lower surface, electromagnetic noise may be introduced from the printed circuit board to adversely affect the IC, or the ground electrode may be damaged. By the corresponding metal plate,
The impedance of the signal line in the package may change, impedance matching may not be achieved between the IC, the package, and the printed circuit board, which may cause a problem such as an increase in transmission loss. In the first embodiment of the present invention, since the entire surface is the ground electrode, there is no possibility of causing these problems.

In order to reduce mutual interference between the respective vias in the single transmission characteristic of each signal line system a, b,
The distance between VHa1 and VHa2 and the distance between VHb1 and VHb2 are preferably separated by at least twice the thickness of the substrate. Further, a conductive film G2 is formed on a portion other than the signal lines La3 and Lb3 on the upper surface of the lower dielectric layer 2 via a gap having a predetermined width, and the conductive film G2 is also held at the ground potential as described later. To form a ground electrode. As a result, the signal lines La3 and Lb3 are also formed by coplanar lines. The crosstalk is preferably formed by a coplanar line, but the impedance matching is preferably formed by a stripline. Therefore, the signal lines La3 and Lb3 may be configured in an appropriate line form in consideration of necessary transmission characteristics and the like.

As described above, the two signal line systems a and b are electrically connected in each signal line system through the conductive vias arranged at different distances from the center line aa of the substrate. Therefore, mutual interference due to electromagnetic radiation or the like in the vicinity of the conductive via which is the discontinuous portion of the signal line is less likely to occur. Therefore, crosstalk is reduced, and high isolation of the signal line system can be ensured.

As shown in FIGS. 1A and 1B, the wiring board of the first embodiment of the present invention further penetrates both the upper dielectric layer 1 and the lower dielectric layer 2, A plurality of ground vias GV filled with a conductor extending from the ground electrode G on the lower surface of the lower dielectric layer 2 are formed. Therefore, the conductive films G1 and G2 formed on the upper surfaces of the upper dielectric layer 1 and the lower dielectric layer 2 are electrically connected to the ground electrode G on the lower surface of the substrate via the ground via GV,
It has the same potential as the ground electrode, that is, the ground potential. The ground via GV is arranged on a row parallel to the longitudinal direction of the signal line system, with each signal line system interposed therebetween. The ground vias GV are arranged at least a predetermined distance w away from the center of the signal line, and the ground vias GV are arranged at a constant distance d in each row.

If the relative permittivity of the dielectric layers 1 and 2 constituting the substrate is ε _r and the wavelength of the highest high frequency signal propagating in the signal line system in air is λ, the distance d between the ground vias GV is , D <λ / (2 × ε _r ^1/2 ) is preferably set. With this setting, it is possible to prevent the high-frequency signal radiated from the signal line in the vertical direction from leaking out from the space between the ground vias GV, so that the transmission characteristic can be improved to a higher frequency. Further, it is preferable that the distance w between the signal line and the ground via GV is formed so as to satisfy w <λ / (4 × ε _r ^1/2 ). With this setting, it is possible to prevent the occurrence of resonance caused by the distance to the ground via GV due to the high frequency signal radiated in the vertical direction from the signal line. Therefore, resonance due to a wavelength of λ or more can be prevented, and a signal can be flatly transmitted from 0 Hz to the highest high frequency corresponding to the wavelength λ.

By using the wiring board formed according to the first embodiment shown in FIG. 1, the crosstalk characteristics of two signal line systems are measured by TLM (Transmission Line Modeling).
A three-dimensional electromagnetic field simulation using the method was performed. The structure of the wiring board adopted in this simulation is as follows. -Relative permittivity ε _{r of} substrate (upper dielectric layer 1 and lower dielectric layer 2): 9.5-Substrate thickness: 0.3 mm-Length of signal lines La1 and La2: 0.9 mm-Signal line La3 Length of the signal lines Lb1 and Lb2: 1.3 mm Length of the signal line Lb3: 2 mm Width of the signal lines La1, La2, Lb1, Lb2: 0.
14 mm-Width of signal lines La3 and Lb3: 0.1 mm-Depth from the surface of signal lines La3 and Lb3: 0.1 m
m-Gap between the signal line systems a and b: 0.8 mm-Gap between the signal lines La1, La2, Lb1, Lb2 and the conductive metal film G1: 0.13 mm-Signal lines La3, Lb3 and conductive metal film G2 Gap between and 0.22 mm ・ Ground via GV center interval (2w): 0.8 mm ・ Via shape: 0.13 mm square prism The result of this simulation is the cross shown by the thick line graph A in FIG. The talk characteristics were obtained.

In order to compare with the crosstalk characteristics of the above-described example of the present invention, a similar simulation by the TLM method is performed using a wiring board (comparative example) in which two signal line systems a and b have the same structure. I went. The wiring boards used in this simulation are signal lines La1, La2,
The total length of Lb1 and Lb2 was set to 0.9 mm, and the total length of signal lines La3 and Lb3 was set to 2.8 mm. Therefore, the conductive vias VHa1 and VHb1 have the same distance from the input end, and the conductive vias VHa2 and VHb are the same.
2 and 2 were formed at the same distance from the output end. Other configurations are
This is the same as the above example of the present invention. As a result of the simulation using this comparative example, the crosstalk characteristics shown by the thin line graph B in FIG. 2 were obtained.

As is clear from comparison between the graphs A and B of FIG. 2, in the embodiment of the present invention, high isolation of -30 dB or more was obtained up to around 80 GHz, but in the comparative example, 60-75 GHz. In the range of (2), crosstalk between the two signal line systems a and b occurs, and sufficient isolation is not obtained. Therefore, as a result of the simulation, when two or more signal line systems are provided in parallel with the wiring board, the connection point between the signal line on the upper dielectric layer 1 and the signal line on the lower dielectric layer 2 (the conductive via It is clear that it is possible to secure isolation with improved crosstalk by making the distance (position) from the center line of the wiring board different between adjacent signal line systems.

FIG. 3 shows a second embodiment of the wiring board according to the present invention. The second embodiment is different from the first embodiment in that the signal lines La1 and La2 on the upper dielectric layer 1 and the signal lines Lb1 and Lb2 are line-symmetric with respect to the center line aa of the wiring board. Is not placed. However, also in the second embodiment, the center line a−
The distances of the inner ends of these signal lines from a are different. Therefore, the arrangement position and the length of the signal lines La3 and Lb3 on the upper surface of the lower dielectric layer 2 are necessarily the first.
Of the embodiment of FIG. Other than that, it is similar to the first embodiment. The second embodiment also
It is possible to obtain the same operational effect as that of the first embodiment.

In the first and second embodiments shown in FIGS. 1 and 3, two signal line systems (that is, a set of the signal lines La1, La3 and La2 and the signal lines Lb1 and Lb) are used.
However, it is needless to say that the number of signal line systems may be three or more. However, in any case, the lengths of adjacent signal line systems formed on the surface of the upper dielectric layer 1 are made different,
That is, it goes without saying that it is necessary to shift the positions of the conductive vias VHa1 and VHb1 as viewed from the end portion or the center line of the wiring board and shift the positions of the conductive vias VHa2 and VHb2.

Further, the configuration shown in the first embodiment is I
By disposing the C chip on at least one of the four sides of the rectangular wiring board, the IC chip and the external connection terminal can be connected. The same applies to the second embodiment. Further, the configuration of the first embodiment and the configuration of the second embodiment may be arbitrarily selected and arranged on four sides or two sides of the rectangular wiring board. FIG. 4 shows a third embodiment of a wiring board according to the present invention, which corresponds to such an example. In FIG. 4, (A) is a top view of the upper dielectric layer 1 of the wiring board, (B) is a top view of the inner surface of the lower dielectric layer 2, and (C) and (D) are lines cc and d
It is a sectional view of a wiring board when it sees from -d. In addition,
(C) and (D) show a state in which the IC chip 3 is mounted on the central portion of the substrate and the lid 4 is mounted. Reference numeral 5 denotes a base substrate, which has a heat slug function for heat dissipation for cooling the IC chip.

In the third embodiment, as shown in FIGS. 4A to 4D, the structure of the first embodiment is arranged on four sides of a rectangular wiring board. And
The two left and right sides facing each other form two signal line systems, and the two upper and lower sides facing each other form four signal line systems. Further, the wiring board is (C) and (D)
As shown in FIG. 3, the upper dielectric layer 1, the lower dielectric layer 2, and the base substrate 5 are formed in a laminated structure, and I is formed at the center thereof.
A cavity 6 for mounting and housing the C chip 3 on the base substrate 5 is formed. Furthermore, the upper dielectric layer 1
A sealing ring 7 is formed on the top, and a lid 4 is mounted on the ring 7 to seal the cavity 6. The sealing ring 7 is formed between the inner signal line for connection to the IC chip 3 and the outer signal line for external connection.

As described above, in the third embodiment, the configurations of the signal lines of the first and second embodiments may be arbitrarily combined as the signal line pattern on each side. Similar to the first and second embodiments, the number of signal line systems is not limited to that shown in the figure. The third embodiment can also achieve the same operational effects as those of the first and second embodiments.

FIG. 5 shows a fourth embodiment of a wiring board according to the present invention. In the fourth embodiment, in the first embodiment shown in FIG. 1, the signal wirings La2 and Lb2 on the output end side are formed on the back surface of the wiring board, that is, the lower surface of the lower dielectric layer 2, and the signal line La2 is formed. And a conductive via VHa2 that connects La3 and La3, and signal lines Lb2 and Lb.
The conductive via VHb2 connecting to the lower dielectric layer 2
It has been modified so as to penetrate through. Also in the fourth embodiment, the length of the signal line from the input end and the length of the signal line from the output end may be different from each other in the adjacent signal line line systems. Is not limited to that shown in the figure, and may be modified, for example, in the second embodiment shown in FIG. 3 so that the signal lines La2 and Lb2 are arranged on the back surface of the wiring board.

FIG. 6 shows a fifth embodiment of the wiring board according to the present invention. In the fifth embodiment, the wiring substrate has only one dielectric layer, the signal lines La1 and Lb1 having different lengths are formed on the front surface, and the signal lines La2 and Lb2 having different lengths are formed on the back surface. There is. The signal lines La1 and La2 are electrically connected by the conductive via VHa1, and the signal lines Lb1 and Lb2 are electrically connected by the conductive via VHb1. Also,
On the front surface of the substrate, a conductive film G1 is formed in a portion other than the signal lines La1 and Lb1, and on the back surface of the substrate, the signal line La2 is formed.
, And the ground electrode G is formed in a portion other than Lb2, and the conductive film G1 and the ground electrode G are electrically connected by the ground via GV. The signal line on the input side may be formed on the back surface of the substrate, and the signal line on the output side may be formed on the front surface of the substrate.

The signal line configurations of the fourth and fifth embodiments may be arranged on arbitrary plural sides of the rectangular substrate as in the third embodiment. Further, in this case, it goes without saying that the number of signal line systems is not limited to those shown in FIGS. The fourth and fifth embodiments can also achieve the same effects as those of the first to third embodiments with respect to the reduction of crosstalk.

It will be apparent that various modifications and changes of the first to fifth embodiments other than those described above are possible.
For example, depending on the allowable value of the S / N ratio, the ground via line provided in parallel with the signal line system may be deleted. Further, the wiring board may have a structure of three or more dielectric layers, and the signal wirings on the inner surfaces of the plurality of signal wiring systems may be arranged on different inner surfaces. Further, although only the signal lines are shown in FIG. 4, for example, a part of these signal lines may be replaced with a bias line, or a line other than the signal line may be newly added.

The present invention is configured as described above, and in each signal line system, the distance from the substrate end portion of the connection point between the signal line and the signal line is made different between the adjacent signal line systems. High isolation can be ensured between the signal line systems. In addition, when the ground via lines are provided along the signal line systems between the adjacent signal line systems, higher isolation can be obtained and transmission up to a high frequency is possible. Further, when the signal lines on the surface of the substrate and the inner surface of the substrate are formed by coplanar lines and the conductive film on the inner surface is made to have the same potential as the ground electrode by the ground via, a higher degree of isolation of the adjacent signal line system is secured. be able to. Furthermore, when the entire back surface of the wiring board is used as the ground electrode, it becomes easy to dispose the heat slug for heat dissipation.

[Brief description of drawings]

FIG. 1 is a diagram for explaining a first embodiment of a wiring board according to the present invention.

FIG. 2 is a graph showing isolation characteristics when the first embodiment is simulated.

FIG. 3 is a diagram for explaining a second embodiment of the wiring board according to the present invention.

FIG. 4 is a diagram for explaining a third embodiment of a wiring board according to the present invention.

FIG. 5 is a diagram for explaining a fourth embodiment of a wiring board according to the present invention.

FIG. 6 is a diagram for explaining a fifth embodiment of a wiring board according to the present invention.

FIG. 7 is a diagram for explaining a conventional wiring board.

[Simple explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Upper dielectric layer 2 ... Lower dielectric layer 3 ... IC chip 4 ... Lid 5 ... Base substrate (heat slug) 6 ... Cavity
7 ... Sealing rings La1 to La3, Lb1 to Lb3 ... Signal line G ... Ground electrodes G1, G2 ... Conductive film (ground electrode) VHa1, VHa2, VHb1, VHb2 ... Conductive via GV ... Ground via

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H05K 1/11 H05K 3/46 N 3/46 QU H01L 23/12 J (72) Inventor Masato Shiobara Hyogo 1-8 Fuso-cho, Amagasaki-shi, Sumitomo Metal Industries, Ltd. Electronics Technology Research Institute (72) Inventor Toshifumi Yamamoto 1-8 Fuso-cho, Amagasaki-shi, Hyogo Sumitomo Metal Industries, Ltd. Electronics Technology Research Institute F-term (reference) ) 5E317 AA24 CD34 GG11 5E338 AA03 CC01 CC06 CD23 CD24 EE13 5E346 AA13 AA15 AA43 BB04 BB06 BB11 FF01 HH04 HH06

Claims (9)

[Claims] 1. A wiring board for high-frequency signals, comprising a plurality of signal line systems, wherein each signal line system has a plurality of signals electrically connected by a conductive via between its input end and output end. The plurality of signal line systems are arranged such that at least one of the input side signal line extending from each input end and the output side signal line extending from the output end is arranged on the surface of the wiring board. In two adjacent signal line systems, conductive vias for connecting the signal lines are located at different distances from the input end of the signal line system and at different distances from the output end of the signal line system. A wiring board provided on the. 2. The wiring board according to claim 1, wherein the wiring board includes an upper dielectric layer and a lower dielectric layer that are stacked, and an input side signal line and an output side signal line of a plurality of signal line systems are provided. , The signal line that is formed on the upper surface of the upper dielectric layer that is the surface of the wiring board and that connects the input-side signal line and the output-side signal line through the conductive via in each of the plurality of signal line systems It is formed on the upper surface of the dielectric layer, the ground electrode is formed on the upper surface of the upper dielectric layer with a gap around the signal line, and the ground electrode is formed on the entire lower surface of the lower dielectric layer, which is the back surface of the wiring board. A wiring board characterized by being provided. 3. The wiring board according to claim 1, wherein the wiring board is composed of an upper dielectric layer and a lower dielectric layer that are stacked, and includes an input side signal line and an output side signal line of a plurality of signal line systems. One is formed on the upper surface of the upper dielectric layer, which is the front surface of the wiring board, and the other of the input signal lines and output signal lines of the plurality of signal line systems is the lower surface of the lower dielectric layer, which is the back surface of the wiring board. And a signal line that connects the input-side signal line and the output-side signal line through conductive vias in each of the plurality of signal line systems is formed on the upper surface of the lower dielectric layer, and A wiring board, wherein ground electrodes are formed on the upper surface of and the lower surface of the lower dielectric layer around the signal line via a gap. 4. The wiring board according to claim 1, wherein one of an input side signal line and an output side signal line of a plurality of signal line systems is arranged on a front surface of the wiring board, and the other is arranged on a rear surface of the wiring board. The wiring board is characterized in that a ground electrode is formed on the front surface and the back surface of the wiring board around the signal line via a gap. 5. The wiring board according to claim 2 or 3, further comprising a ground electrode formed on the upper surface of the lower dielectric layer around the signal line via a gap. Characteristic wiring board. 6. The wiring board according to claim 2, wherein the wiring board further penetrates from the upper dielectric layer to the lower dielectric layer and is connected to a ground electrode on the lower surface of the lower dielectric layer. A wiring board having a plurality of conductive vias. 7. The wiring board according to claim 1, wherein the wiring board is for connecting an IC chip to an external circuit, and the wiring board further penetrates the wiring board to form an IC. The through hole for mounting the chip, the base substrate laminated on the back surface of the wiring board, the base substrate on which the IC chip is arranged, and the IC chip mounted on the front surface of the wiring board A wiring board comprising a sealing ring for sealing and a lid attached to the sealing ring. 8. The wiring board according to claim 7, wherein the base substrate is made of a heat radiation material for cooling the IC chip. 9. The wiring board according to claim 7, wherein the wiring board has a rectangular shape, and the wiring board has a rectangular shape around the through hole.
A wiring board having a plurality of signal line systems formed on at least one side.