JP2003123402A - Optical disk device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a stable operation for an optical disk device which conducts PRML (Partial Response and Maximum Likelihood) processing by holding an equalization process and a viterbi decoding process when the repeating data to the sections such as a VFO (Variable Frequency Oscillator) section or the like are detected. SOLUTION: The optical disk device is provided with an equalizer 16 which equalizes reproduced signals from an optical pickup 11 on the basis of given error signals, a viterbi decoder 17 which conducts a viterbi decoding of the reproduced signals, an ideal signal generating circuit 18 which generates ideal signals in accordance with the decoded reproduced signals, an error signal computer 19 which computes error signals from the data string of the reproduced signals and the data string of the ideal signals and outputs the error signals to the equalizer, and a repeating pattern detector 20 which supplies stopping signals to the equalizer and the viterbi decoder or the like to hold the processes when a repeated pattern is detected in the reproduced signals from the decoder 17. Stable operations are realized by holding the processes in the repeated data of the sections such as the VFO section or the like.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical disk device, and more particularly to an optical disk device using the PRML system.

[0002]

2. Description of the Related Art Recently, DVD (Digital Versatile Dis)
2. Description of the Related Art Optical disk devices that perform recording / playback processing on optical disks such as c) have become widespread, and have been developed and commercialized in various systems. For example, as a recording / reproducing processing method of an optical disk device, PRML (Partial Respon
se and Maximum Likelihood) system, and FIG. 19 shows a general configuration of an optical disk device using this system.

In FIG. 19, information recorded on the optical disk is PUH (Pick Up Head).
Is reproduced as a weak analog signal. After the analog signal is amplified by the preamplifier and reaches a sufficient signal level, analog AFC (Auto Offset Controller, Automatic Offset Controller, hereinafter AFC), analog AGC (Auto Gain Controller, Automatic Gain Controller, hereinafter AGC) And the offset and gain are adjusted, and then AD converter (Analog to Digital Converter)
Is converted into a digital signal by. The digitized reproduced signal is equalized by the adaptive equalizer so as to approach a predetermined PR characteristic according to the error signal, and then the adaptive Viterbi decoder obtains binary decoded data.

Further, FIG. 20 shows the configuration of an equalization coefficient controller used in an adaptive equalizer. Four unit delay elements connected in series so as to delay the reproduction signal whose phase has been adjusted by the delay unit, five multipliers for multiplying the input / output of these unit delay elements and the error signal, and multiplication Accumulator for accumulatively adding the outputs of the multipliers, a multiplier for multiplying the output of the accumulators by the control sensitivity α (0 <α <1), and the output of the multiplier and the current setting of the equalizer. It is composed of an adder for adding equalization coefficients and a memory for holding the current equalization coefficients.

An equalizer in which the equalization coefficient is controlled according to the change of the reproduced signal is called an adaptive equalizer. The adaptive equalizer is described in, for example, the Institute of Electronics, Information and Communication Engineers, Vol. 81,
No. 5, pp. 497-505 (May 1998).

Further, FIG. 21 shows the configuration of a reference level controller used in the adaptive Viterbi decoder. Thereby, the reference level is calculated from the equalized signal and the surviving path calculated from the path memory in the Viterbi decoder. The equalized signal is stored in a plurality of memories divided for each level using a survivor path, an average value of the values stored in the memory for each level is obtained, and this is used as a reference level.

Next, various PR characteristics will be described with reference to FIG. 22A to 22D show recording data, a recording waveform, a pit series, and a reproduction waveform, respectively. Figure 2
PR (1,1) is applied to the reproduced waveform of 2 (d) by the equalizer.
Characteristics, PR (1,2,1) Characteristics, PR (1,2,2)
1) Waveforms after equalization in the case of performing equalization based on characteristics are shown in (e), (f), and (g) of FIG. 22, respectively. PR
The (1,1) characteristic means a characteristic in which impulse responses appear at two consecutive identification points at a ratio of 1: 1. PR
The (1,2,1) characteristic is a characteristic in which impulse responses appear at three consecutive identification points at a ratio of 1: 2: 1.
The PR (1,2,2,1) characteristic means that the impulse response is
It is a characteristic that appears at a ratio of 1: 2: 2: 1 at four consecutive identification points. Although not shown, the same applies to other PR characteristics.

As shown in (e), (f) and (g) of FIG. 22, PR (1,1) characteristic → PR (1,2,1) characteristic →
It can be seen that the waveform after equalization has a dull characteristic in the order of the PR (1, 2, 2, 1) characteristic. In the PRML system,
By equalizing the waveform to the PR characteristic close to the characteristic of the reproduced waveform, it is possible to suppress the increase of the signal deterioration component in the equalizer.

In the PRML system reproduction signal processing system,
A Viterbi decoder, which is one of the typical maximum likelihood decoders, is generally used for the detector arranged after the equalizer. If the reproduced waveform is equalized to the PR (1,2,2,1) characteristic by the equalizer, the Viterbi decoder is PR (1,2,2,1).
A sequence having the smallest error from the sample sequence of the equalized signal is selected from all the sequences satisfying the characteristics, and the decoded data corresponding to the selected sequence is output. In the PRML system,
Since the decoding is performed not from one sample value but from a plurality of sample values, the resistance to the signal deterioration component having no correlation between sample values is strong.

In an optical disc handled by such an optical disc device, in addition to the data to be originally recorded, a PLL (Phase
VFO (Var) used for pulling in a Lock Loop circuit
A repetitive pattern called an iable Frequency Oscillator (VFO) is recorded. As a VFO pattern, 0000111100
The so-called 4T repeat pattern of 001111 ... Is used. If the recording density is high, as shown in FIG.
The reproduced signal envelope differs between the O section and the data section.

However, when the VFO section and the data section have different reproduction signal envelopes as shown in FIG. 25A, the automatic gain control circuit attempts to amplify the reproduction signal envelope of the VFO section to a predetermined amplitude. Therefore, the reproduction signal envelope immediately after the start of the data portion becomes larger than a predetermined value, and the identification performance is deteriorated as shown in FIG.

Since the VFO section and the data section have different reproduction signal characteristics, when adaptively controlling the equalization coefficient as shown in FIG. 25 (c), the RMS (Root Mean) of the error signal is
Square) value greatly differs between the VFO part and the data part. This leads to an increase in the convergence time of the equalization coefficient control and a divergence of the equalization coefficient. Further, the difference in the reproduction signal characteristics between the VFO section and the data section causes the reference level control to become unstable. There's a problem.

Furthermore, the actual reproduced signal includes vertical asymmetry called asymmetry as shown in the graph of FIG. In this case, in the conventional automatic gain control circuit, the level deviated from the level at which the discrimination performance is the best is set as the offset level.

[0014]

That is, in the conventional optical disk device, when the reproduction signal envelopes of the VFO section and the data section are different, the AGC attempts to amplify the reproduction signal envelope of the VFO section to a predetermined amplitude. The reproduction signal envelope immediately after the start of the data portion becomes larger than a predetermined value, which causes a problem that the identification performance is deteriorated.

Further, since the VFO section and the data section have different reproduction signal characteristics, when adaptively controlling the equalization coefficient, the RMS (Root Mean Square) value of the error signal is greatly different between the VFO section and the data section. There is a problem that the convergence time of the equalization coefficient control increases or the equalization coefficient diverges, and the difference in reproduction signal characteristics between the VFO section and the data section makes the reference level unstable even in the reference level control. .

Furthermore, the actual reproduction signal includes vertical asymmetry called asymmetry, and the conventional AGC has a problem that a level deviating from the level at which the discrimination performance is best is taken as an offset level.

Further, in the conventional optical disk device, since the offset control by the analog AFC and the gain control by the analog AGC are used, it is necessary to perform the DA conversion of the digital control value, and the high speed control is performed sufficiently. There is a problem that you can not.

According to the present invention, the repeated pattern of the reproduced signal is detected, the VFO section is identified, and each processing is held.
An object of the present invention is to provide an optical disk device that suppresses deterioration of identification performance and obtains operational stability.

[0019]

According to the present invention, in an optical disk device handling an optical disk having a concentric circular or spiral storage area, a laser beam is irradiated onto an optical disk rotated at a predetermined number of revolutions, and the reflected wave A reproduction signal detecting means for detecting a reproduction signal including a data string having a predetermined time width corresponding to the waveform pattern, and an equalization coefficient determined on the basis of a given error signal, and the reproduction signal detecting means outputs the equalization coefficient in response to the determination. A reproduction signal equalizing means for equalizing the reproduction signal, a maximum likelihood decoding means for decoding the reproduction signal equalized by the reproduction signal equalizing means by a maximum likelihood decoder and outputting the reproduction signal,
From the reproduced signal equalizing means, an ideal signal creating means for creating an ideal signal including a data string having the predetermined time width, which corresponds to the data string having the predetermined time width included in the reproduced signal output by the maximum likelihood decoding means, An error signal is calculated based on the comparison result by comparing the data string of the predetermined time width included in the output reproduction signal with the data string of the predetermined time width included in the ideal signal created by the ideal signal creating means. Then, the error signal calculation means for supplying the reproduced signal to the reproduced signal equalizing means and the reproduced signal output by the maximum likelihood decoding means are received, and a stop signal is generated when an iterative pattern is detected in the reproduced signal. At least one of the equalizing means, the maximum likelihood decoding means, and the processing means for receiving a reproduction signal from the reproduction signal detecting means and performing a predetermined process and supplying the reproduction signal to the reproduction signal equalizing means is supplied to at least one of the processing means. An optical disk apparatus characterized by stop signal comprises a repetitive pattern detecting means for holding the processing of the supplied device.

In the present invention, a repetitive pattern detector for detecting the VFO portion of the optical disk is provided, and when the VFO portion is detected, A
By holding processing such as GC, equalization coefficient control, and reference level control, it is possible to suppress deterioration of identification performance. Further, even for a reproduced signal including asymmetry, it is possible to calculate the optimum offset level and suppress the deterioration of the identification performance.

Further, according to the present invention, in an optical disk device handling an optical disk having a concentric or spiral storage area, a laser beam is irradiated onto an optical disk which is rotated at a predetermined number of revolutions, and the reflected wave waveform pattern is used. A reproduction signal detecting means for detecting a reproduction signal including a data string having a predetermined time width, and a reproduction signal received from the reproduction signal detecting means for AD converting the reproduction signal into a digital reproduction signal which is a digital signal.
The D conversion means and the A
With respect to the digital reproduction signal converted by the D conversion means, the offset amount for calculating the deviation amount of the center level from the ideal value and subtracting it from the digital reproduction signal, and the amplification factor of the amplifier for the digital reproduction signal are calculated. A digital processing unit that performs at least one of a gain control process that variably controls the amplitude variation to a constant range, and a reproduction that equalizes the digital reproduction signal output by the digital processing unit based on a predetermined equalization coefficient. A signal equalizer, a maximum likelihood decoder that decodes the digital reproduction signal equalized by the reproduction signal equalizer by a maximum likelihood decoder and outputs a digital reproduction signal, and the maximum likelihood decoder outputs An ideal signal creator for creating an ideal signal including a data string of the predetermined time width corresponding to the data string of the predetermined time width of the digital reproduction signal. When the data string of said predetermined time width reproduced signal outputted from the reproduced signal equalizing means comprises,
The error signal calculation means compares the data sequence of the predetermined time width included in the ideal signal created by the ideal signal creation means, calculates an error signal based on the comparison result, and supplies the error signal to at least the digital processing means. An optical disk device characterized by being provided.

According to the present invention, the reproduction signal given from the optical pickup is digitally subjected to the offset processing and the gain control processing, so that it is faster than the case where the analog offset processing and the gain control processing are performed as in the conventional case. Control can be performed. Further, since it is possible to use a conventional analog offset processing circuit and gain control processing circuit in the preceding stage of the AD converter, it is easy to apply to an existing product. Further, it is not necessary to provide DA conversion when the control value by the digital signal is given to the offset processing circuit and the gain control processing circuit.

[0023]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of an optical disk device using a PRML reproduction signal processing device according to the present invention will be described in detail below with reference to the drawings. FIG. 1 shows a PRML according to the present invention.
A block diagram showing a first embodiment of a reproduction signal processing device,
2 is a block diagram showing a pattern detector used in the PRML reproduction signal processing device, FIG. 3 is a block diagram showing an equalization coefficient controller, FIG. 4 is a block diagram showing a reference level controller,
FIG. 5 is a block diagram showing an offset controller, and FIG. 6 is a block diagram showing a gain controller.

<First Embodiment to Sixth Embodiment: Repetitive Pattern Identification> In the first embodiment, the VFO section in the optical disc is identified by detecting the repetitive pattern in the reproduction signal.
In response to this, the processing of the reproduction signal processing circuit is appropriately held to prevent deterioration of data identification performance.
This is an L reproduction signal processing device.

The PRML reproduction signal processing apparatus 1 according to the first embodiment of the present invention shown in FIG. 1 appropriately amplifies the optical pickup 11 provided in the vicinity of the optical disc D and the reproduction signal given from the optical pickup 11. Preamp 12 and
It has an AD converter 13 for converting a reproduced signal which is an analog signal from the preamplifier 12 into a digital signal. Further, an AFC 14 including a digital circuit that receives the digitized reproduction signal supplied from the AD converter 13 and performs offset processing, an AGC 15 that is also connected to the AFC 14 and performs gain control including a digital circuit, and is connected to this and reproduces. It has an adaptive equalizer 16 configured as a digital circuit that performs signal equalization processing, and an adaptive Viterbi decoder 17 provided as an example of a PRML system decoder as a subsequent stage thereof. Furthermore, an ideal signal creating circuit 18 for creating an ideal signal by receiving a reproduced signal from the adaptive Viterbi decoder 17, and an ideal signal received from the ideal signal creating circuit 8 and a reproduced signal from the adaptive equalizer 16. And an error signal calculator 19 for receiving the ideal signal and the error signal, respectively.
5, the adaptive equalizer 16 and the adaptive Viterbi decoder 17 are supplied, but even if not all are supplied, it is possible to stabilize each control within the supplied range and suppress deterioration of the identification performance. it can. Further, the stop signal is received from the iterative pattern detector 20 which receives the reproduction signal from the adaptive Viterbi decoder 17, and the stop signals are supplied to the AFC 14, the AGC 15, and the adaptive equalizer 1, respectively.
6. It is supplied to the adaptive Viterbi decoder 17, and similarly, each control is stabilized within the supplied range to suppress the deterioration of the identification performance.

Furthermore, the AFC 14 is an offset controller 2
2 and a comparator 21, and the AGC 15 has a gain controller 2
4 and an amplifier 23, the adaptive equalizer 16 has an equalization coefficient controller 26 and an equalizer 25, and the adaptive Viterbi decoder 17 has a reference level controller 28 and a Viterbi decoder 27. Have respectively.

The operation of the PRML reproduction signal processing device 1 having such a configuration will be described in detail below. That is, information is recorded on the optical disc by using the RLL code of d = 1. Also, a 4T repeating signal is recorded as VFO. Information recorded on the optical disc is PU
It is reproduced as a weak analog signal by using H11.
The analog signal is amplified by the preamplifier 12 to a sufficient signal level, and then converted into a digital signal by the AD converter 13. The AGC 14 controls the gain of the digital signal and the offset control of the first stage. Then, the second offset control described later is performed. The reproduced signal whose offset has been adjusted is P by the adaptive equalizer 16.
It is equalized so as to satisfy the R (1,2,2,1) characteristic.
The equalized signal is decoded by the Viterbi decoder 17 into binary decoded data.

Next, the ideal signal generating circuit 18 calculates the ideal signal based on the decoded data which is the reproduced signal, and the error signal calculator 19 calculates the error signal from the ideal signal and the equalized signal. Further, the equalization coefficient controller 26 receives the error signal and the reproduction signal and calculates the equalization coefficient. Further, the reference level controller 28 receives the error signal and the ideal signal and calculates the reference level. Similarly, the offset controller 22
Then, the offset amount is calculated by receiving the error signal and the ideal signal.

The decoded data from the Viterbi decoder 17 is also sent to the iterative pattern detector 20, and the iterative pattern detector 20 outputs a stop signal when the decoded data is the 4T iterative pattern. The equalization coefficient controller 26, the reference level controller 28, the offset controller 22, and the AG described above.
At C15, the adaptive control is stopped while the stop signal is being output from the repetitive pattern detector 20, and the previous value is held. By stopping various adaptive controls during 4T repetitive pattern reproduction, it is possible to avoid the phenomenon in which the gain shifts at the beginning of the data section as shown in FIG. 25, even when the reproduction signal envelope differs between the VFO section and the data section. You can
Further, even if the VFO section and the data section have different reproduction signal characteristics, it is possible to suppress an increase in the convergence time of the equalization coefficient, the reference level, the offset amount, and divergence.

FIG. 2 shows an example of the structure of the repetitive pattern detector. In FIG. 2, decoded data is sequentially delayed by 8 × n unit delay elements 31, and n pieces of data for every 8 bits are calculated by an AND circuit 32 and an OR circuit 33.
When the outputs of the NXOR circuits 34 and 35 are calculated for the AND result and the OR result, the NXOR result becomes 1 if all the n pieces of data match, and becomes 0 otherwise. 8
According to the calculation result of the AND circuit for each NXOR output,
The AND result is output as a stop signal.

The repetitive pattern detector 20 outputs "1" as a stop signal when n or more 8-bit patterns are continuously recorded, and otherwise "0".
Is output. When the value of n is small, it also reacts to the repeated pattern that happens to appear in the data part. On the other hand, if the value of n is large, when an error occurs in the VFO unit, the various adaptive controls restart their operations regardless of the VFO unit. Considering these, it can be said that 4 ≦ n ≦ 32 is an appropriate value.

Next, FIG. 3 shows an example of the configuration of the equalization coefficient controller. Although the basic function has a part in common with that of FIG. 20, it is different in that an error signal and “0” are switched by a stop signal. That is, the equalization coefficient controller 26
A switch element 36 for controlling the switching of the error signal by the stop signal and a plurality of delay devices 37 for delaying the reproduction signal.
And 38, a plurality of operators 39 and a cumulative adder 40, and a plurality of comparators 41 and a storage element 42.

In such a configuration, when the stop signal is "0", the switch element 36 is connected to the error signal side and operates as a normal adaptive equalizer. On the other hand, when the stop signal is "1", the switch element 36 is connected to the ground side, the equalization coefficient is held, and the operation stability is obtained even in the VFO section, for example.

Next, FIG. 4 shows an example of the configuration of the reference level controller. The reference level controller 28 includes a switch element 45 that switches an error signal with a stop signal and switch elements 46 and 4 that switch a power supply potential with an ideal signal.
7, a plurality of counters 48 and a cumulative adder 49 respectively connected thereto, a plurality of switch elements 50 respectively connected thereto, a plurality of amplifiers 51 connected thereto, and a plurality of amplifiers connected thereto. Comparator 52 and a plurality of storage elements 53 connected in parallel to each of them.

Reference level controller 2 having such a configuration
8 operates as follows. First, the operation when the stop signal is 0 will be described. The error signal is distributed by the switch in accordance with the level of the ideal signal and is input to the cumulative adder 49. At this time, the number of occurrences of each level is counter 4
Counted at 8. The cumulative addition result is divided by the number of occurrences for each level at predetermined time intervals, and the control sensitivity β (0 <0
The updated value is obtained by multiplying β ≦ 1). A new reference level is calculated by adding the updated value to the previous reference level. However, the initial value of the reference level is 0,
1, 2, 3, 4, 5, 6 and these values are stored in the memory 53 when the power is turned on. When updating the reference level, the counter 48 and the cumulative adder 49 are reset. When the stop signal is "1", the switch element 45
Thus, "0" is selected instead of the error signal. As a result, the value of the cumulative adder becomes "0", and the reference level is held, so that operational stability can be obtained even in the VFO section, for example.

Next, FIG. 5 shows an example of the configuration of the offset controller. The offset controller 22 is connected to a switch element 57 that switches an error signal by a stop signal, a switch element 58 whose switching is controlled by an output of a center level detector 55 that receives an ideal signal, and an output thereof. And a cumulative adder 59. Further, a counter 56 that receives the output of the center level detector 55, a switch element 60 that switches the output of the cumulative adder 59 with the output of the counter 56, and an amplifier 6 that amplifies this output.
1, and a comparator 62 connected in parallel to the memory 63.

Offset controller 2 having such a configuration
The operation of No. 2 will be described. First, the operation when the stop signal is 0 will be described. The error signal is at the center level of the ideal signal, that is,
Only when the level is 3, the cumulative adder 59 is sent. At this time, the number of occurrences of the central level is counted 56 at the same time.
The updated value is obtained by dividing the cumulative addition value by the number of occurrences and multiplying the division result by the control sensitivity γ (0 <γ ≦ 1) every predetermined time. A new offset value is calculated by adding the updated value to the previous offset value. However, the initial value of the offset value is "0", and when the power is turned on,
"0" is stored in the memory. When updating the offset value, the values of the counter 56 and the cumulative adder 59 are reset. When the stop signal is "1", the switch element 57 selects "0" instead of the error signal.
As a result, the cumulative addition value becomes “0”, and the offset value is held, so that operational stability can be obtained even in the VFO unit, for example.

Thus, by using the offset controller of FIG. 5, even when the reproduced signal includes asymmetry, the optimum offset amount can be calculated, and as a result, the deterioration of the discrimination performance can be suppressed. .

As is clear from the comparison of FIGS. 4 and 5, the offset controller 22 of FIG. 5 is set to the level 3 of the reference level controller 28 of FIG. 4 except for the update cycle, update sensitivity and initial value. It is the same as the corresponding part. When the update cycle of the offset controller 22 and the reference level controller 28 is the same, a part of the reference level controller 28 can be shared as the offset controller 22.

Further, FIG. 6 shows an example of the configuration of the AGC circuit. That is, the AGC circuit 24 of FIG. 6 has a switch element 74 for switching an error signal with a stop signal, a switch element 75 for switching with an output of a minimum level detector 72 which receives an ideal signal, and a cumulative addition which receives this output. And a container 76. Further minimum level detector 7
The counter 73 that receives the output of 2 and the switch element 77 that switches the cumulative adder 76 by the output of the counter
And have.

Similarly, a switch element 68 for switching the error signal by the stop signal, a switch element 69 for switching by the output of the maximum level detector 66 receiving the ideal signal, and a cumulative adder 70 receiving this output. Have Further, it has a counter 67 for receiving the output of the maximum level detector 66 and a switch element 71 for switching the cumulative adder 70 by the output of the counter.

A comparator 78 for comparing the outputs of these two switch elements 71 and 77, an amplifier 79 for amplifying this output, and a comparator 81 for comparing the output thereof with the output of the amplifier 80 via the memory 82. It has, and this output is supplied as a gain.

AGC circuit 24 having such a configuration
Operates as follows. That is, when the stop signal is "0", the offset value and the signal amplitude are calculated from the reproduction signal, and the offset adjustment and the gain adjustment are performed using these values. When the stop signal is "1", the offset value and the signal amplitude are held, and the offset value and the gain adjustment are performed with the held values. This allows
For example, operational stability can be obtained even in the VFO section.

As described above, the PRM according to the present invention
In the L reproduction signal processing device, an iterative pattern is detected from the decoded data, and during the iterative pattern reproduction, the equalization coefficient, the reference level,
By holding the offset level and the gain level, it is possible to stabilize each control and suppress the deterioration of the identification performance.

Further, in the PRML reproduction signal processing apparatus according to the present invention, the offset amount of the center level is calculated using the decoded data and the equalized signal, and the offset adjustment of the reproduction signal is performed using the calculated offset amount. By doing so, it is possible to suppress deterioration of the identification performance.

In the above-mentioned embodiment, the cycle of the repeating pattern is 8 bits, but it can be applied to other repeating cycles.

Further, although the equalization coefficient control, the reference level control, the offset control and the gain control are performed in the above-mentioned embodiment, it is not necessary to perform all of them at the same time, and only some of them are used as described above. It is also possible.

In the above embodiment, PR (1,
Although an example of RLL code with 2, 2, 1) characteristics and d = 1 is shown, the present invention can be applied even when other PR characteristics and RLL codes are used, and the same action and effect are exhibited. You can

The second embodiment is a PRML reproduction signal processing apparatus characterized in that a stop signal from an iterative pattern detector is supplied only to an adaptive equalizer. FIG. 7 is a block diagram showing a second embodiment of the PRML reproduction signal processing device according to the present invention. In FIG. 7, unlike the PRML reproduction signal processing device of FIG. 1, instead of the adaptive Viterbi decoder,
A fixed Viterbi decoder 102 that does not receive an ideal signal, an error signal, or a stop signal from the iterative pattern detector 20 from the outside is used, and the decoding process is performed by a given constant. Further, the AFC and AGC provided as digital circuits in the case of FIG. 1 are provided as the analog AFC 106 and the analog AGC 107, and the other configurations are common.

In such a configuration, the adaptive equalizer 1
No. 6 receives the stop signal from the repetitive pattern detector 20 in the processing in the VFO section, so that the stop signal is "0".
At this time, the switch element 36 of FIG. 3 is connected to the error signal side and operates as a normal adaptive equalizer. On the other hand, when the stop signal is "1", the switch element 36 is connected to the ground side and the equalization coefficient is held, so that it is possible to obtain operational stability even in the VFO section, for example. As described above, the functions of the iterative pattern detector and the stop signal according to the present invention do not necessarily have to be supplied to a plurality of processing units, and even if only the adaptive equalizer 16 is operated, the operation within that range is performed. It has an effect.

The third embodiment is a PRML reproduction signal processing apparatus characterized in that a stop signal from an iterative pattern detector is supplied to an adaptive equalizer and an adaptive Viterbi decoder. FIG. 8 is a block diagram showing a third embodiment of the PRML reproduction signal processing device according to the present invention. PR shown in FIG.
The ML reproduction signal processing device is different from that shown in FIG.
AFC and AGC provided as digital circuits in Japan
Are provided as the analog AFC 106 and the analog AGC 107, and the other configurations are common.

Even in such a configuration, the stop signal is "1" for the adaptive equalizer and the adaptive Viterbi decoder according to the stop signal from the iterative pattern detector according to the present invention.
At the time of, the equalization coefficient and the reference level are respectively held, so that it is possible to obtain operational stability even in the VFO unit, for example.

The fourth embodiment is a PRML reproduction signal processing apparatus characterized in that the stop signal from the iterative pattern detector is supplied only to the AFC 14 and AGC 15, and the equalizer and the Viterbi decoder are fixed types. is there. FIG. 9 is a block diagram showing a fourth embodiment of the PRML reproduction signal processing device according to the present invention. The PRML reproduction signal processing device shown in FIG. 9 differs from that of FIG. 1 in that instead of the equalizer and the Viterbi decoder which are given as adaptive type in FIG. 1, the fixed type equalizer 101 and the fixed type Viterbi decoding are used. The container 102 is provided, and other configurations are common.

Even in such a configuration, when the stop signal is "0", the offset value and the signal amplitude are calculated from the reproduced signal according to the stop signal from the repetitive pattern detector according to the present invention, and these values are calculated. Offset adjustment and gain adjustment are performed using the value. When the stop signal is "1", the offset value and the signal amplitude are held, and the held value is used for offset adjustment and gain adjustment. As a result, it becomes possible to obtain operational stability even in the VFO section, for example.

The fifth embodiment is characterized in that the stop signal from the iterative pattern detector is supplied to the AFC 14, AGC 15 and adaptive equalizer, and the Viterbi decoder is fixed.
This is an RML reproduction signal processing device. FIG. 10 is a block diagram showing a fifth embodiment of the PRML reproduction signal processing device according to the present invention. The PRML reproduction signal processing device shown in FIG. 10 is different from that of FIG. 1 in that a fixed type Viterbi decoder is provided instead of the Viterbi decoder given as an adaptive type in FIG. Are common.

Also in such a configuration, in common with the first embodiment, the processing circuit to which the stop signal is applied,
The control value is appropriately held, and offset adjustment, gain adjustment, and equalization processing are performed with the held value. As a result, it becomes possible to obtain operational stability even in the VFO section, for example.

In the sixth embodiment, the stop signal from the repetitive pattern detector is sent to the AFC14 and AGC1 similarly to the first embodiment.
5, adaptive equalizer, P supplied to adaptive Viterbi decoder
The RML reproduction signal processing device is characterized in that an analog AFC and an analog AGC are provided in the preceding stage of the digital circuit area.

FIG. 11 is a block diagram showing a sixth embodiment of the PRML reproduction signal processing device according to the present invention. Figure 1
The PRML reproduction signal processing device shown by 1 is different from that shown in FIG. 1 in a digital circuit area composed of an LSI or the like of a digital circuit, in this case, in a front stage of an area where digital circuits after AFC14 are integrally formed. An analog AFC 106 and an analog AGC 107 are usually provided in an analog circuit area provided as a circuit such as an LSI of an analog circuit.
Is provided. That is, even if an analog LSI designed as a conventional product and a digital LSI having the new features of the present invention are combined and configured, there is no problem in operation, and thus such a configuration is likely to appear.

Even in such a configuration, the present invention is the first
It is possible to provide the PRML reproduction signal processing device that exhibits the same operation effects as those of the embodiment, and can obtain operational stability even in the VFO portion of the optical disc, for example.

The configuration of FIG. 11 in which the conventional offset controller / gain controller in this case and the offset controller / gain controller of the present invention are combined, and FIG.
It is preferable that the configurations shown in FIGS. 5, 16 and 17 have the following specifications.

That is, control of the offset controller which is the conventional analog circuit and the offset controller which is the digital circuit of the present invention, and the control of the gain controller which is the conventional analog circuit and the gain controller which is the digital circuit of the present invention. The reliability of the identification data is improved by changing the band.
Specifically, the control bands of the conventional offset controller and gain controller are BWafc1 and BWagc1, respectively, and the control bands of the offset controller and gain controller of the present invention are BWafc2 and BWafc2, respectively.
When agc2 is set, the control band is determined so that 2 <BWafc2 / BWafc1 <1000 2 <BWagc2 / BWagc1 <1000. This makes it possible to improve the reliability of the identification data.

<Seventh to Twelfth Embodiments: Digital AFC / AGC> The seventh embodiment is a PR using AFC and AGC composed of digital circuits according to the present invention.
This is an ML reproduction signal processing device. The seventh and subsequent embodiments do not use the repetitive pattern detector that is essential in the first embodiment.

FIG. 12 is a block diagram showing a seventh embodiment of the PRML reproduction signal processing apparatus using the digital AFC and AGC according to the present invention. In FIG. 12, the basic configuration is common to FIG. 9 showing the fourth embodiment,
The difference is that the repetitive pattern detector 20 is not provided.

By providing the digital AFC and AGC according to the present invention with such a configuration, the following operational effects are exhibited. That is, the ideal signal from the ideal signal generating circuit 18 and the error signal calculator 19
Since the error signal from 1 is given as a control signal of a digital signal, it is not necessary to perform DA conversion, which is necessary in the conventional AFC and AGC as analog circuits. Furthermore, by using AFC and AGC by a digital circuit, high-speed processing is possible as compared with AFC and AGC by an analog circuit. Furthermore, when the digital AFC and AGC of the present invention are newly introduced into the conventional system,
AFC and AGC as analog circuits in front of D converter
It can be applied to the types that exist.

As a result, the AFC 14 variably controls the offset amount so that the center component of the reproduction signal from the optical disk is followed and the DC component of the output signal becomes zero. Further, the AGC 15 variably controls the amplification factor so that the amplitude of the output signal is kept constant by following the amplitude fluctuation of the reproduction signal from the optical disk which varies from moment to moment.

The eighth embodiment is a PRML reproduction signal processing device using AFC and AGC which are also composed of digital circuits, and the error signal from the error signal calculator is AFC.
And AGC, the adaptive equalizer 16 is also supplied. FIG. 13 shows this, and shows a structure in which the adaptive equalizer 16 is also supplied with the error signal from the error signal calculator. Also in this configuration, the same operational effects as those of the seventh embodiment are exhibited.

The ninth embodiment is a PRML reproduction signal processing device using AFC and AGC which are also composed of digital circuits, and the error signal from the error signal calculator is AFC.
And AGC, the adaptive equalizer 16 and the adaptive Viterbi decoder 17 are also supplied. FIG. 14 shows this, and shows a structure in which the error signal from the error signal calculator is also supplied to the adaptive equalizer 16 and the adaptive Viterbi decoder 17, and the seventh embodiment is also used in this configuration. Similar to the embodiment and the eighth embodiment, the analog circuit AFC
In comparison with AGC and AGC, a DA converter is unnecessary and high-speed processing is possible.

In addition to the seventh embodiment, the tenth embodiment shows a form in which the digital AFC and AGC of the present invention are applied to a conventional product using the conventional analog AFC and analog AGC. Also in this configuration shown in FIG. 15, the AFC of the analog circuit is the same as in the seventh embodiment and the like.
In comparison with AGC and AGC, a DA converter is unnecessary and high-speed processing is possible.

The eleventh embodiment shows a form in which the digital AFC and AGC of the present invention are applied to a conventional product using the conventional analog AFC and analog AGC in addition to the eighth embodiment. Also in this configuration shown in FIG. 16, the AFC of the analog circuit is the same as in the seventh embodiment and the like.
In comparison with AGC and AGC, a DA converter is unnecessary and high-speed processing is possible.

The twelfth embodiment shows a form in which the digital AFC and AGC of the present invention are applied to a conventional product using the conventional analog AFC and analog AGC in addition to the ninth embodiment. Also in this configuration shown in FIG. 17, the analog circuit AFC is the same as in the seventh embodiment.
In comparison with AGC and AGC, a DA converter is unnecessary and high-speed processing is possible.

As described above, regarding the seventh to twelfth embodiments, the AFC composed of the digital circuit according to the present invention is used.
And AGC are used, A of the conventional analog circuit
A PRML reproduction signal processing device that realizes high-speed processing while facilitating the application of FC and AGC to LSIs and the like and supplying a digital control signal to each processing circuit without using a DA converter, and the same were used. An optical disk device can be provided.

<Optical Disk Device to which PRML Playback Signal Processing Device of the Present Invention is Applied> (Basic Structure) FIG. 18 is a diagram showing the entire structure of an optical disk device to which the PRML playback signal processing device of the present invention is applied. is there. In this figure, an optical disk device A is for performing data recording or data reproduction on an optical disk D. The optical disk device A includes a tray 132 for carrying an optical disk D housed in a disk cartridge.
And a motor 33 for driving this tray and an optical disc D
And a spindle motor 135 for rotating the optical disc D held by the clamper 134 at a predetermined rotation speed. Further, a CPU 146 that controls the overall operation as a control unit, a ROM 147 that stores a basic program of this control operation, and an R that rewritably stores each control program, application data, and the like.
The AM 148 is connected via the control bus. Further, the feed motor 136 is connected to the control units such as the CPU 146 and carries the pickup PU.
And a focus / tracking actuator driver / that controls the focus and tracking of the pickup.
Feed motor driver 140, further spindle motor 13
5, a spindle motor driver 141 for driving 5 and a tray motor driver 142 for driving a tray motor are provided.

Furthermore, the preamplifier 12 connected to the pickup PU for amplifying the detection signal, the pickup PU and the preamplifier 12, the data processing unit 3 for processing the detection signal and the recording signal, and the data used for these various processes are stored. A RAM 143 is provided for this purpose. In order to transmit / receive a signal from the data processing unit 3 to / from an external device, the interface control unit 145 causes the RAM 1 to operate.
It is provided with 44.

In such an optical disk device, according to the present invention, the data processing unit 3 as shown in FIG.
The above-described AFC 14, AGC 15, adaptive equalizer 16, adaptive Viterbi decoder 17, ideal signal generation circuit 1 shown in FIG.
8, the error signal calculator 19, the repetitive pattern detector 20 and the like are included to configure the first embodiment to the twelfth embodiment described above.
The present invention enables an optical disk device that realizes each of the embodiments.

(Processing Operation) The optical disc apparatus having the above-mentioned structure and provided for the practice of the present invention performs the reproduction process and the recording process of the optical disc as follows. That is,
When the optical disc D is loaded into the optical disc device A, the control information of the optical disc D recorded in the control data zone in the embossed data zone of the lead-in area of the optical disc D is read using the pickup PU and the data processing unit 3. And is supplied to the CPU 146.

In the optical disc apparatus A of the present invention, the figure is shown under the control of the CPU 146 based on the operation information by the user, the control information of the optical disc D recorded in the control data zone in the optical disc, the current status and the like. Not activated by the laser control unit to generate a laser beam.

The generated laser beam is used for the objective lens 13
It is converged by 1 and is irradiated onto the recording area of the disc. As a result, data is recorded in the storage area of the optical disc D (generation of mark string: data is recorded on the optical disc D by the marks of variable length and the interval between marks and the length of each variable length mark), or The reflected wave corresponding to the stored data is reflected and detected, and this data is reproduced.

Further, the optical disc D is directly or housed in a disc cartridge and conveyed by a tray 132 into the apparatus so that the optical disc D is arranged to face the objective lens 131. A tray motor 133 for driving the tray 132 is provided in the device. In addition, the loaded optical disc D has a clamper 134.
It is rotatably held on the spindle motor 135 by the spindle motor 135, and is rotated at a predetermined rotation speed by the spindle motor 135.

The pickup PU has a photodetector (not shown) for detecting the laser beam therein. This photodetector is reflected by the optical disc D and is reflected by the objective lens 13
The laser beam returned via 1 is detected. The detection signal (current signal) from the photodetector is the current / voltage converter (I
/ V) and converted into a voltage signal, and this signal is supplied to the preamplifier 12 and the servo amplifier 134. From the preamplifier 12, signals for reproducing the data in the header portion and reproducing the data in the recording area are output to the data processing unit 3.

Here, as a method of optically detecting the focus shift amount, for example, there are the following astigmatism method and knife edge method. Astigmatism method, that is, an optical element (not shown) that generates astigmatism is arranged in the detection optical path of the laser light reflected by the light reflection film layer or the light reflective recording film of the optical disc D, and the photodetector is arranged. This is a method of detecting a change in the shape of the laser beam irradiated on the top. The light detection area is divided into four diagonal lines. A focus error detection signal (focus signal) is obtained by calculating a difference between diagonal sums in a servo seek control unit (not shown) with respect to a detection signal obtained from each detection area. Further, it is a knife edge method, that is, a method of disposing a knife edge that asymmetrically shields a part of the laser light reflected by the optical disc D. The light detection region is divided into two, and the difference between the detection signals obtained from each detection region is taken to obtain the focus error detection signal. Usually, either the astigmatism method or the knife edge method is adopted.

The optical disc D has spiral or concentric tracks, and information is recorded on the tracks.
Information is reproduced or recorded / erased by tracing a focused spot along this track. In order to stably trace the focused spot along the track, it is necessary to optically detect the relative displacement between the track and the focused spot.

Generally, the following methods of detecting the track deviation include the following phase difference detecting method, push-pull method, and twin spot method. Differential Phase Detection
Method, that is, a change in the intensity distribution on the photodetector of the laser light reflected by the light reflecting film layer or the light reflecting recording film of the optical disc D is detected. The light detection area is divided into four diagonally. The servo seek control unit 39 obtains a phase difference between the diagonal sums of the detection signals obtained from the respective detection areas to obtain a track error detection signal (tracking signal). Further, in the push-pull method, that is, in this method, a change in intensity distribution of the laser light reflected by the optical disc D on the photodetector is detected. The light detection area is divided into two, and the difference between the detection signals obtained from each detection area is taken to obtain the track error detection signal. In addition, a twin-spot method, that is, ± 1st-order diffracted light that is irradiated onto the optical disc D by dividing the light into a plurality of wavefronts by disposing a diffraction element or the like in the light transmission system between the semiconductor laser element and the optical disc D The change in the reflected light amount of is detected. Separately from the light detection area for reproducing signal detection, a light detection area for individually detecting the reflected light quantity of the + 1st order diffracted light and the reflected light quantity of the −1st order diffracted light is arranged, and the difference between the respective detected signals is taken to detect the track error detection signal. To get

By such focus control and track control, a focus signal, a tracking signal, and a feed signal are sent from a servo seek control unit (not shown) to the focus and tracking actuator driver and the feed motor driver 140, and this driver 140
The objective lens 131 is subject to focus servo control and tracking servo control. Further, an energizing signal is supplied from the driver 140 to the feed motor 136 according to the access signal, and the pickup PU is conveyed and controlled.

The spindle motor driver 141 and the tray motor driver 142 are controlled by the control signal from the data processing unit 3, the spindle motor 135 and the tray motor 133 are energized, and the spindle motor 13
5 is rotated at a predetermined rotation speed, and the tray motor 133 appropriately controls the tray.

The reproduction signal S corresponding to the data of the header portion supplied to the data processing unit 3 is supplied to the CPU 146. This causes the CPU 146 to reproduce the reproduction signal S.
Thus, the sector number as the address of the header portion is determined and compared with the sector number as the address of accessing (recording data or reproducing recorded data).

As the reproduction signal S corresponding to the data in the recording area supplied to the data processing unit 3, the necessary data is stored in the RAM 148, and the reproduction signal S is processed by the data processing unit 3 and is sent to the interface controller 145. The reproduction processing signal is supplied to an external device such as a personal computer.

In such an optical disc apparatus A, the characteristic parts of the PRML reproduction signal processing apparatus according to the first to twelfth embodiments of the present invention described above are mainly given as the configuration of the data processing unit 3 and described above. It exerts a working effect.

That is, in the first to sixth embodiments, the repeated pattern detector 20 is mainly used to detect the VFO portion of the optical disk, and the control value of each control portion is held only during this period. It is possible to suppress deterioration of identification performance. Furthermore, the seventh to twelfth embodiments provide an optical disk device that realizes high-speed control processing while eliminating the need for a DA converter and the like, mainly by providing AFC and AGC as digital circuits.

Those skilled in the art can implement the present invention by each of the embodiments described in detail above. However, various modifications of these embodiments will be readily apparent to those skilled in the art, and the disclosed principle in a broad sense can be applied to various embodiments without inventive ability. is there. As described above, needless to say, the present invention covers a wide range that does not contradict the disclosed principle and novel features, and is not limited to the above-described embodiments.

[0090]

As described in detail above, according to the present invention, a repetitive pattern detector for detecting the VFO portion of an optical disk is provided, and when the VFO portion is detected, processing such as AGC, equalization coefficient control, and reference level control is performed. It is possible to provide an optical disk device capable of suppressing the deterioration of the identification performance by holding.

Further, according to the present invention, the reproduction signal provided from the optical pickup is digitally subjected to the offset processing and the gain control processing, so that compared with the conventional case where the offset processing and the gain control processing of the analog circuit are performed. The present invention provides an optical disk device capable of performing high-speed control without requiring DA conversion or the like.

[Brief description of drawings]

FIG. 1 is a first PRML reproduction signal processing apparatus according to the present invention.
3 is a block diagram showing an embodiment of FIG.

FIG. 2 is a block diagram showing an iterative pattern detector of the PRML reproduction signal processing apparatus according to the present invention.

FIG. 3 is a block diagram showing an equalization coefficient controller of the PRML reproduction signal processing device according to the present invention.

FIG. 4 is a block diagram showing a reference level controller of the PRML reproduction signal processing device according to the present invention.

FIG. 5 is a block diagram showing an offset controller of the PRML reproduction signal processing device according to the present invention.

FIG. 6 is a block diagram showing a gain controller of the PRML reproduction signal processing device according to the present invention.

FIG. 7 shows a second PRML reproduction signal processing device according to the present invention.
3 is a block diagram showing an embodiment of FIG.

FIG. 8 is a third PRML reproduction signal processing device according to the present invention.
3 is a block diagram showing an embodiment of FIG.

FIG. 9 is a fourth PRML reproduction signal processing device according to the present invention.
3 is a block diagram showing an embodiment of FIG.

FIG. 10 is a block diagram showing a fifth embodiment of a PRML reproduction signal processing device according to the present invention.

FIG. 11 is a block diagram showing a sixth embodiment of a PRML reproduction signal processing device according to the present invention.

FIG. 12 is a block diagram showing a seventh embodiment of a PRML reproduction signal processing device using digital AFC and AGC according to the present invention.

FIG. 13 is a block diagram showing an eighth embodiment of a PRML reproduction signal processing device using digital AFC and AGC according to the present invention.

FIG. 14 is a block diagram showing a ninth embodiment of a PRML reproduction signal processing device using digital AFC and AGC according to the present invention.

FIG. 15 is a block diagram showing a tenth embodiment of a PRML reproduction signal processing device using digital AFC and AGC according to the present invention.

FIG. 16 is a block diagram showing an eleventh embodiment of a PRML reproduction signal processing device using digital AFC and AGC according to the present invention.

FIG. 17 is a block diagram showing a twelfth embodiment of a PRML reproduction signal processing device using digital AFC and AGC according to the present invention.

FIG. 18 is a block diagram showing an embodiment of an optical disk device using PRML reproduction signal processing according to the present invention.

FIG. 19 is a block diagram showing a conventional PRML reproduction signal processing device.

FIG. 20 is a block diagram showing a conventional adaptive equalizer.

FIG. 21 is a block diagram showing a reference level controller of a conventional adaptive Viterbi decoder.

FIG. 22 is a graph showing operation waveforms of the PRML reproduction signal processing device.

FIG. 23 is a graph showing an equalized signal, an ideal signal, and an error signal related to PRML reproduction signal processing.

FIG. 24 is a graph showing a reproduced signal envelope including a repeating pattern and random data.

FIG. 25 is a graph showing a reproduction signal envelope and an error signal RMS value after conventional offset control and gain control.

FIG. 26 is a graph showing a reproduced signal including asymmetry after performing conventional offset control and gain control.

[Explanation of symbols]

14 ... AFC, 15 ... AGC, 16 ...
Adaptive equalizer 17 ... Adaptive Viterbi decoder, 18 ... Ideal signal creation unit 19 ... Error signal calculator, 20 ... Iterative pattern detector 101 ... Fixed equalizer, 102 ... Fixed Viterbi decoder 106 ... Analog AFC, 107 ... Analog AGC

   ─────────────────────────────────────────────────── ─── Continued front page    F term (reference) 5D044 BC02 CC06 FG01 FG02 FG05                       GL02 GL32                 5D090 AA01 BB02 BB03 BB04 BB10                       CC04 DD03 EE14 FF42                 5J100 JA01 KA05 LA08 LA09 LA10                       LA12 LA13 QA01 SA00

Claims (11)

[Claims] 1. An optical disk device handling an optical disk having a concentric or spiral storage area, wherein a laser beam is irradiated onto an optical disk rotated at a predetermined rotation speed and a predetermined time width corresponding to a waveform pattern of the reflected wave. And a reproduction signal detecting means for detecting a reproduction signal including the data string, and an equalization coefficient determined on the basis of a given error signal, and a reproduction signal for equalizing the reproduction signal outputted by the reproduction signal detecting means in accordance therewith. An equalization means, a maximum likelihood decoding means for decoding the reproduction signal equalized by the reproduction signal equalization means by a maximum likelihood decoder to output a reproduction signal, and a reproduction signal output by the maximum likelihood decoding means An ideal signal creating means for creating an ideal signal including a data string of the predetermined time width corresponding to a data string of the predetermined time width, and a reproduction signal output from the reproduction signal equalizing means. The data sequence having the predetermined time width is compared with the data sequence having the predetermined time width included in the ideal signal created by the ideal signal creating means, and an error signal is calculated based on the comparison result to obtain the reproduction signal or the like. An error signal calculation means to be supplied to the equalizing means, a reproduction signal output from the maximum likelihood decoding means, and a stop signal is generated when an iterative pattern is detected therein, and the stop signal is generated from the reproduction signal equalizing means and the At least one of maximum likelihood decoding means and processing means for receiving a reproduction signal from the reproduction signal detecting means, performing a predetermined process and supplying the reproduction signal to the reproduction signal equalizing means, whereby the stop signal is supplied. An optical disc apparatus comprising: a repeated pattern detecting means for holding the processing performed by the supplied means. 2. The offset control means, wherein the processing means calculates a deviation amount of a center level from an ideal value of the reproduction signal equalized by the reproduction signal equalizing means and subtracts the deviation amount from the reproduction signal. With respect to the reproduction signal equalized by the reproduction signal equalizing means, there is provided a gain control means for varying the amplification factor of the amplifier of the reproduction signal to keep the amplitude fluctuation within a certain range, and the repetitive pattern detecting means, A stop signal is generated when a repetitive pattern is detected in the reproduction signal, and this is supplied to all of the offset control means, the gain control means, the reproduction signal equalization means, and the maximum likelihood decoding means, The optical disk device according to claim 1, wherein each of the processes is held. 3. The iterative pattern detector receives the reproduction signal output from the maximum likelihood decoding means, generates a stop signal when detecting an iterative pattern therein, and supplies it to the reproduction signal equalizing means only. 2. The optical disk device according to claim 1, wherein the processing of the reproduction signal equalizing means is held. 4. The iterative pattern detector receives a reproduction signal output from the maximum likelihood decoding means, generates a stop signal when detecting a repetition pattern in the reproduction signal, and outputs a stop signal to the reproduction signal equalizing means and the error. 2. The optical disc apparatus according to claim 1, wherein the optical disc device is supplied only to the signal calculating means, and holds the processing of the reproduction signal equalizing means and the processing of the error signal calculating means. 5. The offset control means for calculating the deviation amount of the center level from the ideal value of the reproduction signal equalized by the reproduction signal equalizing means, and subtracting the deviation amount from the reproduction signal, The reproduction signal equalized by the reproduction signal equalizing means has gain control means (15) for varying the amplification factor of the amplifier of the reproduction signal to keep the fluctuation of the amplitude within a fixed range. The means generates a stop signal when a repetitive pattern is detected in the reproduced signal and supplies the stop signal to the offset control means and the gain control means to hold each of the processes. Item 1
The optical disk device described. 6. The offset control means, wherein the processing means calculates a deviation amount of a center level from an ideal value of the reproduction signal equalized by the reproduction signal equalizing means, and subtracts the deviation amount from the reproduction signal. With respect to the reproduction signal equalized by the reproduction signal equalizing means, there is provided a gain control means for varying the amplification factor of the amplifier of the reproduction signal to keep the amplitude fluctuation within a certain range, and the repetitive pattern detecting means, A stop signal is generated when a repetitive pattern is detected in the reproduction signal and is supplied to the offset control means, the gain control means, and the reproduction signal equalization means to hold each processing. The optical disk device according to claim 1, which is characterized in that. 7. An analog offset control means for calculating a deviation amount of a center level from an ideal value by analog processing for the reproduction signal as an analog signal output from the reproduction signal detecting means and subtracting the deviation amount from the reproduction signal. And an analog signal for reproducing a reproduced signal as an analog signal whose shift amount is subtracted by the analog offset controller by varying the amplification factor of the amplifier of the reproduced signal by analog processing and outputting the reproduced signal in which the fluctuation of the amplitude is within a certain range. 3. The method further comprising: a gain control means; and an AD converter means for receiving a reproduction signal as an analog signal from the analog gain control means, converting it into a digital signal and supplying the reproduction signal equalizing means. The optical disk device described. 8. An optical disk device handling an optical disk having concentric or spiral storage areas, irradiating a laser beam on an optical disk rotated at a predetermined number of revolutions, and a predetermined time width corresponding to the waveform pattern of this reflected wave. Reproduction signal detecting means for detecting a reproduction signal including the data string, AD conversion means for receiving a reproduction signal from the reproduction signal detecting means and AD converting the reproduction signal into a digital reproduction signal, which corresponds to a given error signal. Then, with respect to the digital reproduction signal converted by the AD conversion means, an offset process for calculating a deviation amount of the center level from an ideal value and subtracting the deviation amount from the digital reproduction signal, and an amplifier for the digital reproduction signal are added. The digital processing that performs at least one of the gain control processing that changes the amplification factor of the Processing means, a reproduction signal equalization means for equalizing the digital reproduction signal output by the digital processing means based on a predetermined equalization coefficient, and a digital reproduction signal equalized by the reproduction signal equalization means. A maximum-likelihood decoding unit that outputs a digital reproduction signal by decoding with a maximum-likelihood decoder, and a predetermined time width corresponding to a data sequence of a predetermined time width included in the digital reproduction signal output by the maximum likelihood decoding unit. An ideal signal creating means for creating an ideal signal including a data string, a data string of the predetermined time width included in the reproduction signal output from the reproduction signal equalizing means, and an ideal signal created by the ideal signal creating means are included. An error signal calculating means for comparing the data sequence of the predetermined time width, calculating an error signal based on the comparison result, and supplying the error signal to at least the digital processing means. Optical disc apparatus according to claim. 9. The error signal calculation means supplies the error signal not only to the digital processing means but also to the reproduction signal equalization means, whereby the reproduction signal equalization means
9. The optical disk device according to claim 8, wherein the digital reproduction signal is equalized based on the error signal. 10. The error signal calculation means supplies the error signal not only to the digital processing means but also to the reproduction signal equalization means and the maximum likelihood decoding means, whereby the reproduction signal equalization means is provided. 9. The optical disk device according to claim 8, wherein the maximum likelihood decoding means performs the decoding process of the digital reproduction signal based on the error signal, based on the error signal. 11. An analog offset control means for calculating the deviation amount of a center level from an ideal value by analog processing with respect to the reproduction signal as an analog signal output from the reproduction signal detecting means, and subtracting the deviation amount from the reproduction signal. And, regarding the reproduction signal as an analog signal, at least one of analog gain control means for outputting a reproduction signal in which the amplification factor of the amplifier of the reproduction signal is changed by analog processing and the fluctuation of the amplitude is within a fixed range. 11. The optical disk device according to claim 8, wherein the reproduction signal processed thereby is supplied to the AD conversion means.