JP2003110397A - Surface-mounting type electronic component - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a surface-mounting type electronic component which can cope with three-dimensional, high-density mounting, can make thin and reduce variation in thickness, and can provide superior reliability to an electrical connection between inner and outer electrodes. SOLUTION: A chip type piezoelectric oscillator 1 includes a laminate 10, having a piezoelectric resonator 2 and first and second sealing substrates 6 and 7 laminated on upper and lower sides of the resonator 2 as package substrates. First recesses 6c and 6d are formed in the upper surface of the laminate 10, and second recesses 7c and 7d are formed in the lower surface of the laminate. Outer electrodes 21 and 22 are formed to be extended as far as the first and second recesses 6c, 6d, 7c and 7d of the laminate 10. Inner electrodes 15 and 16 are exposed within the second recesses 7c and 7d and are electrically connected to the outer electrodes 21 and 22 in surface contacting relation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surface mount type electronic component which is surface mounted on a printed circuit board or the like. For example, a package board made of a laminated body in which sealing substrates are laminated above and below a piezoelectric element is used. The present invention relates to surface mount electronic components.

[0002]

2. Description of the Related Art Japanese Unexamined Patent Publication (Kokai) No. 2-33908 discloses a method of forming an external electrode by transferring a conductive paste onto the side surface of an electronic component chip when manufacturing a surface mount electronic component. In this method, the external electrodes formed by transfer extend not only to the side surface of the electronic component chip but also to the upper surface and the lower surface.

However, since the external electrodes are formed so as to reach the upper surface and the lower surface, the thickness of the electronic component tends to increase or the thickness tends to vary. In recent years, electronic components have been strongly required to be thin, but electronic components having the external electrodes have not been able to meet such demands.

Further, in the electronic component having the above-mentioned external electrode, the stress during mounting tends to concentrate on the tip side of the portion reaching the upper surface and the lower surface of the external electrode. Therefore, when the thinning is advanced, the cracking of the electronic component occurs. There was also a problem that could occur.

Further, since electronic parts have been highly densely packaged, it has been required that the upper surface of the electronic parts does not have external electrodes. However, in the electronic parts having the external electrodes described in the above-mentioned prior art. It was also difficult to meet such demands.

On the other hand, Japanese Utility Model Laid-Open No. 3-44334 discloses that
The chip type piezoelectric component shown in FIG. 10 is shown. In the chip-type piezoelectric oscillator 101, sealing substrates 103 and 104 are laminated above and below a plate-shaped energy trap type piezoelectric resonator 102 with adhesive layers 105 and 106 interposed therebetween. The external electrodes 10 are formed on both end surfaces of the laminated body configured as described above.
7, 108 are formed.

In the center of the laminated body, the external electrode 109 is wound so that the bottom surface, both side surfaces and the upper surface of the laminated body are wound.
Are formed. The external electrodes 107 to 109 are each a baked electrode layer 1 formed by baking a conductive paste.
07a, 108a, 109a and plated layers 107b, 108b, 109b formed on the outer surface thereof. Further, the recesses 111 to 113 are formed on the upper surface, the lower surface and both side surfaces of the laminated body, and the external electrodes 107 to 1 are formed.
09 are formed in the recesses 111 to 113.

In this prior art, the plated layers 107b-1
When the 09b is formed by barrel plating, the external electrodes 107 to 109 are provided with recesses 111 to 113 in order to prevent disconnection at the ridges of the baking electrode films 107a to 109a.
Is formed in.

Therefore, as shown in FIG. 10, as a result, the external electrodes 107 to 109 are located below the top surface of the chip type piezoelectric oscillator 101, that is, the upper surface of the sealing substrate 103. The thickness can be reduced and high-density mounting can be supported. Further, it is possible to reduce variations in the thickness of the chip type piezoelectric oscillator 101.

[0010]

However, in the chip type piezoelectric oscillator 101, the built-in capacitance is taken out between the external electrodes 107 and 108 and the external electrode 109, and
Therefore, it is difficult to incorporate a large capacity.

In the chip type piezoelectric oscillator 101, it is also conceivable to form an internal electrode in the sealing substrate 103 or 104 and thereby form a multilayer capacitor in the sealing substrate 103 or 104. However, in such a configuration, since the internal electrodes are connected to the external electrodes 107 or 108 in line contact with the end surfaces of the sealing substrates 103 and 104, it is difficult to sufficiently secure the electrical connection. Is.

In view of the above-mentioned conventional state of the art, an object of the present invention is that an external electrode is not formed on the upper surface, it is suitable for high-density mounting, and it is possible to reduce the thickness and reduce the variation in thickness. Another object of the present invention is to provide a surface mount electronic component that has a package substrate on which internal electrodes are formed and that has excellent reliability of electrical connection between internal electrodes and external electrodes.

Another object of the present invention is a surface mount type electronic component in which first and second sealing substrates are laminated on and under a plate-shaped piezoelectric element, and a capacitor is built in. An object of the present invention is to provide a surface-mounted electronic component that has excellent reliability of electrical connection between the internal electrode and the external electrode that configures, can be further thinned, and has a small thickness variation.

[0014]

According to a broad aspect of the present invention, there is provided a first opening which has an upper surface, a lower surface, and a plurality of side surfaces connecting the upper surface and the lower surface, and which is open toward an outer peripheral edge of the upper surface. A package substrate having a concave portion formed on the upper surface and a second concave portion opened toward the outer peripheral edge of the lower surface, and a package substrate formed inside the package substrate. An exposed internal electrode and a plurality of external electrodes formed so as not to reach the upper surface portion of the package substrate other than the first recessed portion, at least one external electrode of the plurality of external electrodes, There is provided a surface mount electronic component formed so as to extend from the side surface of the package substrate into the first recess and the second recess.

In a particular aspect of the present invention, the plurality of external electrodes do not reach the first external electrodes reaching the first recess and the second recess and the upper surface of the package substrate. And a second external electrode formed on.

In another specific aspect of the present invention, the package substrate is composed of a ceramic multilayer substrate obtained by laminating a plurality of ceramic layers and firing them integrally. In still another specific aspect of the present invention, the package substrate is laminated on and below the piezoelectric element while securing a plate-shaped piezoelectric element and a space that does not hinder vibration of a piezoelectric vibrating portion of the piezoelectric element. , A second sealing substrate.

In a more specific, limiting aspect of the invention:
A capacitor is built in the first and / or second sealing substrate by utilizing internal electrodes. Further, according to still another specific aspect of the present invention, the first and second sealing substrates are composed of non-shrinkable substrates containing glass or glass ceramics having a lower shrinkage in the surface direction than ceramics.

[0018]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be clarified by describing specific embodiments of the present invention with reference to the drawings.

1A and 1B are a longitudinal sectional view and a perspective view showing a chip type piezoelectric oscillator as a surface mount type electronic component according to an embodiment of the present invention. The chip-type piezoelectric oscillator 1 has a plate-shaped energy trap type piezoelectric resonator 2. As shown in FIG. 3, in the piezoelectric resonator 2, the first vibrating electrode 4 is formed in the center of the upper surface of the rectangular plate-shaped piezoelectric substrate 3, and the first vibrating electrode 4 and the piezoelectric substrate are interposed between the front and back surfaces. The second vibrating electrodes 5 are formed on the lower surface of the piezoelectric substrate 3 so as to face each other. Lead-out electrodes 4 a and 5 a connected to the vibrating electrodes 4 and 5 are formed on the upper surface and the lower surface of the piezoelectric substrate 3, respectively. The extraction electrode 4a is formed so as to reach the one end surface 3a of the piezoelectric substrate 3, and the extraction electrode 5a is formed so as to reach the other end surface 3b side. In the present embodiment, the piezoelectric resonator 2 is an energy trap type piezoelectric resonator utilizing thickness longitudinal vibration.

First and second sealing substrates 6 and 7 are laminated above and below the piezoelectric resonator 2 with adhesive layers 8 and 9 interposed therebetween. That is, the laminated body 10 is configured by laminating the sealing substrates 6 and 7 on the piezoelectric resonator 2.

This laminated body 10 constitutes the package substrate of the present invention. The lower surface of the sealing substrate 6 has a recess 6
a is formed, and a recess 7 a is also formed on the upper surface of the sealing substrate 7. The recesses 6 a and 7 a are provided to form a space that does not hinder the vibration of the vibrating portion of the piezoelectric resonator 2.

On the other hand, on the upper surface of the sealing substrate 6, the recesses 6 whose heights at both ends in the length direction are lower than the upper surface 6b of the sealing substrate 6 are formed.
c and 6d are formed. The sealing substrate 7 has a structure in which the layers shown in FIG. 4 are laminated. The sealing substrate 7 has a structure in which a frame-shaped insulating layer 11 and dielectric layers 12 to 14 are laminated. The internal electrode 15 is laminated between the dielectric layers 12 and 13, and the internal electrodes 16 and 17 are laminated between the dielectric layer 13 and the dielectric layer 14. Internal electrode 1
6 and the internal electrode 17 are opposed to each other with a predetermined gap. In addition, the internal electrodes 16 and 17 are the dielectric layers 13
It is arranged so as to overlap with the internal electrode 15 via. Therefore, a capacitor is formed between the internal electrode 15 and the internal electrodes 16 and 17, respectively. Dielectric layer 13
Since the internal electrode 15 and the internal electrodes 16 and 17 are opposed to each other through the capacitor to form a capacitor, respectively, in the present embodiment, a capacitor having a large capacitance can be incorporated.

The internal electrode 15 has a lead portion 15a exposed on the side surface of the sealing substrate 7. On the other hand, the internal electrode 16,
Reference numeral 17 denotes end faces 13a, 1 on the lower surface of the dielectric layer 13.
3b is formed.

In the dielectric layer 14, the end faces 14a, 1
Cutouts 14c and 14d are formed in the center of 4b so as to penetrate from the upper surface to the lower surface of the dielectric layer 14, respectively. Insulating layer 11, dielectric layers 12-14, and internal electrodes 15-1
In the sealing substrate 7 formed by laminating the internal electrodes 16 and 1
The lower surface of 7 is exposed in the notches 14c and 14d.

As shown in FIG. 2, the side surface 7c of the sealing substrate 7
An external electrode 18 is formed at the center of the. External electrode 1
8 is electrically connected to the lead-out portion 15 a of the internal electrode 15. Although not clear in FIG. 2, an external electrode is similarly formed in the center of the other side surface of the sealing substrate 7, and an electrical connection is provided to the lead portion provided on the opposite side of the lead portion 15a of the internal electrode 15. It is connected to the.

On the other hand, external electrodes 18 are formed on the corners of the sealing substrate 7. The external electrode 18 is the internal electrode 1
Although electrically connected to 6 and 17, in the present embodiment,
The internal electrodes 16 and 17 are connected to the external electrodes mainly by using the cutouts 14c and 14d described above.

That is, as shown in FIG. 1B, the external electrodes 21, 2 are formed on both end faces 10a, 10b of the laminate 10.
2 is formed. The external electrodes 21 and 22 have end faces 10
It is formed so as to extend vertically in the center of a, 10b, and so as to reach the recesses 6c, 6d of the sealing substrate 6 and further reach the above-mentioned notches 14c, 14d.

As is apparent from FIG. 1A, the laminated body 1
On the lower surface side of 0, the external electrodes 21 and 22 are joined to the internal electrodes 16 and 17 in the above-mentioned notches 14c and 14d so as to overlap, that is, in surface contact. Therefore, the reliability of the electrical connection between the external electrodes 21 and 22 and the internal electrodes 16 and 17 is improved.

On the other hand, as shown in FIG. 3, the piezoelectric resonator 2
Has extraction electrodes 4a, 5a connected to the vibrating electrodes 4, 5, but the extraction electrodes 4a, 5a are connected to the external electrodes 21, 22 respectively at the end faces 10a, 10b.

In the chip-type piezoelectric oscillator 1 of this embodiment, as described above, the external electrodes 21 are formed in the recesses 6c and 6d provided in the first sealing substrate 6 on the upper surface of the laminated body 10.
No electrodes are present on the upper surface of the laminated body 10 because the electrodes 22 are formed so as to extend therethrough. Therefore, the chip-type piezoelectric oscillator 1
Can support three-dimensional high-density mounting.

Further, as described above, the external electrodes 21 and 22 do not reach the upper surface of the laminated body 10, that is, the upper surface 6b of the sealing substrate 6, and the lower portions of the external electrodes 21 and 22 serve as second concave portions. Since it reaches the notches 14c and 14d,
In the chip-type piezoelectric oscillator 1, the thickness of the entire electronic component can be made constant without being affected by the thickness variation of the external electrodes 21 and 22, and further reduction in thickness can be promoted.

In addition, the inner electrodes 16 and 17 are the outer electrodes 2
Since they are connected in surface contact with 1 and 22, the reliability of electrical connection is also improved. In the above-mentioned embodiment, after the laminated body 10 shown in FIG. 5 is obtained, the external electrodes 21 and 22 are formed by applying and baking a conductive paste. A plating layer may be further formed on the outer surfaces of the external electrodes 21 and 22.

Further, as shown in FIG. 6, after the laminated body 10 shown in FIG. 5 is obtained, the external electrodes 21A and 22A reaching the full width of the laminated body 10 are formed by a thin film forming method such as vapor deposition, sputtering or plating. You may form. Also in this case, the external electrodes 21A and 22A have the notches 14c and 14A.
In d, since the internal electrodes 16 and 17 are connected in a surface contact manner, the internal electrodes 16 and 17 and the external electrodes 21A and 22
The reliability of the electrical connection with A can be improved. The external electrodes 21A and 22A are the upper surface 6b of the sealing substrate 6.
Is formed so as not to reach the bottom surface of the sealing substrate 7. Therefore, similarly to the above-described embodiment, it is possible to reduce the thickness of the chip-type piezoelectric oscillator 1 and reduce the thickness variation, and it is possible to cope with high-density mounting.

FIG. 7 is a perspective view showing a chip type piezoelectric oscillator as a surface mount type electronic component according to another embodiment of the present invention. In the chip-type piezoelectric oscillator 31, the sealing substrate 33, and
34 are stacked.

As shown in the exploded perspective view of FIG. 8, the piezoelectric resonator 32 has a piezoelectric substrate 35. The piezoelectric substrate 35 is polarized in its length direction and has a resonance electrode 36 on its upper surface.
Are formed. A resonance electrode (not shown) is formed on the lower surface of the piezoelectric substrate 35 so as to face the resonance electrode 36 at the center. The piezoelectric resonator 32 is an energy trap type piezoelectric resonator utilizing a sliding mode.

As shown in FIG. 8, the sealing substrate 33
Recesses 33c to 33e and 33f to 33h opened toward the outer peripheral edge are formed on the upper surface of the side surfaces 33a and 33b.

On the other hand, the sealing substrate 34 has a structure shown in an exploded perspective view in FIG. That is, in the sealing substrate 34, the insulating layer 41 and the dielectric layers 42, 43, 44 are laminated. The insulator layer 41 has a rectangular frame shape. An internal electrode 45 is laminated between the dielectric layer 42 and the dielectric layer 43. The internal electrode 45 is the sealing substrate 34.
45a exposed to the side surface 34a of the
And a drawer portion (not shown) provided on the opposite side.

The dielectric layer 43 is formed with a notch 43a facing the lead-out portion 45a. On the other hand, internal electrodes 46 and 47 are formed between the dielectric layer 43 and the dielectric layer 44. The side surface 44a of the dielectric layer 44 has a cutout 44c.
.About.44e are formed. Similarly, three notches are also formed on the side surface 44b side, and in FIG. 9, the notch 44h is formed.
Only shown.

The cutout 44d is formed at a position overlapping the cutout 43a. Further, the internal electrodes 46 and 47 are
It has lead-out portions 46 a and 47 a that extend to the entire width of the sealing substrate 34. The lead-out portions 46a and 47a are formed so as to face the notches 44c and 44e. The lead-out portions 46a and 47a of the internal electrodes 46 and 47 are formed so as to face the notches 44h and the like also on the side surface 44b side of the dielectric layer 44.

As shown in FIG. 7, the external electrodes 52a to 5 are formed on the outer surface of the laminated body 51 in which the piezoelectric resonator 32 and the sealing substrates 33 and 34 configured as described above are laminated.
2f is formed. The external electrodes 52a to 52f are formed by applying / baking a conductive paste.
It may be formed by a thin film forming method such as vapor deposition or sputtering.

Also in this embodiment, the external electrodes 52a to 5a are formed.
2f not only extends vertically on the side surface of the laminated body 51, but also the cutout 33c provided in the sealing substrate 33.
To 33e, 33f to 33h and notches 34c to 34h provided in the sealing substrate 34. For example, taking the external electrode 52c as an example, the external electrode 52c
Are formed so as to reach the notch 33e and the notch 34e. Since the internal electrodes 45 to 47 are exposed in the cutouts 43a or the cutouts 44c, 44e, and 44h, respectively, the internal electrodes 45 to 47 and the external electrodes 52a to 5h are exposed.
The electrical connection with the 2f is performed by surface contact. Therefore, the reliability of the electrical connection between the internal electrodes 45 to 47 and the external electrodes 52a to 52f is improved.

Further, the chip type piezoelectric oscillator 31 of the present embodiment.
In the above, since the external electrodes 52a to 52f are not exposed on the upper surface and the lower surface of the laminated body 51 and are located in the notches on the upper surface and the lower surface, the chip-type piezoelectric oscillator 31 is thinned and the variation in thickness is reduced. It is possible to achieve the above, and since there is no external electrode on the top surface, it is possible to cope with three-dimensional high-density mounting.

In the chip type piezoelectric oscillators 1 and 31 shown in FIGS. 1 and 7, the internal electrodes are formed in the lower sealing substrates 7 and 34 to form the capacitors, but the upper sealings are formed. Internal electrodes may be formed in the stop substrates 6 and 33 to form a capacitor. Further, the method of forming the internal electrodes, that is, the method of taking out the electrostatic capacitance is not particularly limited to the above-mentioned embodiment. Furthermore, the sealing substrates 7, 34
Can be configured with the internal electrodes by a ceramic integral firing technique.

Further, preferably, the above-mentioned sealing substrates 7, 34
Is composed of a substrate interposed in an unsintered ceramic by liquid-phase sintering of non-shrinkable glass or glass ceramics having a lower shrinkage in the surface direction than that of ceramics. In this case, the presence of the sealing substrates 7 and 34 makes it possible to suppress distortion and deformation of the chip-type piezoelectric oscillators 1 and 31 due to temperature changes.
The accuracy of 31 can be improved.

Although the chip-type piezoelectric oscillators 1 and 31 have been described as an example, the surface-mounted electronic component according to the present invention is
The piezoelectric component is not limited to such a piezoelectric component, and various surface mount components having a structure in which the internal electrode and the external electrode are electrically connected and the external electrode is configured in the package substrate, for example, a ceramic multilayer substrate. It can also be applied to.

[0046]

According to the surface mount type electronic component of the present invention,
A first concave portion that opens toward the outer peripheral edge of the package substrate is formed on the upper surface, and a second concave portion that opens toward the outer peripheral edge of the lower surface is formed on the lower surface. Is formed so as not to reach the upper surface portion excluding the first concave portion, and at least one external electrode of the plurality of external electrodes is formed in the first concave portion and the second concave portion from the side surface of the package substrate. Is formed to reach. Therefore, since there is no external electrode on the top surface of the surface-mounted electronic component, it is possible to cope with three-dimensional high-density mounting, and it is possible to reduce the thickness of the electronic component and the variation in the thickness. .

In addition, the internal electrode is formed in the package substrate, the internal electrode is exposed in the second recess, and is connected to the external electrode in surface contact with the second recess. Therefore, the reliability of the electrical connection between the internal electrode and the external electrode can be improved.

When the package substrate has a ceramic multilayer substrate obtained by laminating a plurality of ceramic layers and integrally firing it, a ceramic multilayer substrate having internal electrodes can be easily obtained by using the ceramic integral firing technique.

The package substrate includes a plate-shaped piezoelectric element and first and second sealing substrates stacked above and below the piezoelectric element while ensuring a space that does not hinder the vibration of the piezoelectric vibrating portion of the piezoelectric element. When it is provided, according to the present invention, it is possible to provide a piezoelectric resonance component that can be used for high-density mounting, can be thinned, and can reduce thickness variation.

In this case, when a capacitor is built in the first and / or second sealing substrate by utilizing the internal electrodes, a load capacity built-in type piezoelectric oscillator or the like can be provided. .

When the first and second sealing substrates are made of non-shrinkable substrates having a shrinkage in the surface direction lower than that of a normal sintered ceramic, the surface of the surface mount type electronic component is It is possible to provide a surface-mounted electronic component that can suppress deformation and distortion in the direction and that has excellent dimensional accuracy.

[Brief description of drawings]

1A and 1B are a longitudinal sectional view and a perspective view showing a chip type piezoelectric oscillator as an example of a surface mount electronic component of the present invention.

FIG. 2 is an exploded perspective view of the chip type piezoelectric oscillator of the embodiment shown in FIG.

FIG. 3 is a perspective view showing an energy trap type piezoelectric resonator used in the chip type piezoelectric oscillator of the embodiment shown in FIG.

4 is an exploded perspective view of a second sealing substrate used in the embodiment shown in FIG.

5 is a perspective view showing an appearance of a laminated body as a package substrate used in the embodiment of FIG.

FIG. 6 is a perspective view showing a chip type piezoelectric oscillator as a surface mount type electronic component of a modification of the embodiment shown in FIG.

FIG. 7 is a view showing the outer appearance of a surface mount electronic component according to another embodiment of the present invention.

8 is an exploded perspective view of a chip-type piezoelectric oscillator as a surface-mounted electronic component of the embodiment shown in FIG.

9 is an exploded perspective view of the sealing substrate shown in FIG.

FIG. 10 is a vertical cross-sectional view of a piezoelectric oscillator as an example of a conventional surface mount electronic component.

[Explanation of symbols]

1. Chip-type piezoelectric oscillator 2 Piezoelectric resonator 3 ... Piezoelectric substrate 4, 5 ... Vibration electrodes 6, 7 ... First and second sealing substrates 6c, 6d ... 1st recessed part 8, 9 ... Adhesive layer 10 ... Laminate as package substrate 14c, 14d ... Notches as second recesses 15 to 17 ... Internal electrodes 21, 22 ... External electrodes 31 ... Chip type piezoelectric oscillator 32 ... Piezoelectric resonator 33, 34 ... First and second sealing substrates 33c to 33g ... Notches as first recesses 34c to 34e, 34h ... Notches as second recesses 44c to 44e, 44h ... Notches as second recesses 45-47 ... internal electrodes

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 23/08 H01L 23/08 C (72) Inventor Kenichi Sakai 2 26-10 Tenjin, Nagaokakyo, Kyoto Prefecture Murata Manufacturing F-term (reference) 5J108 CC04 DD01 DD06 DD07 EE03 EE04 EE07 FF11 GG16 GG17 JJ02

Claims (6)

[Claims] 1. A first opening, which has an upper surface, a lower surface, and a plurality of side surfaces connecting the upper surface and the lower surface, and which opens toward an outer peripheral edge of the upper surface.
Is formed on the upper surface, and a second recess is formed on the lower surface, the second concave portion opening toward the outer peripheral edge of the lower surface, and the package substrate is formed inside the package substrate.
Internal electrodes exposed in the recesses of the package substrate and a plurality of external electrodes formed so as not to reach the upper surface portion of the package substrate except the first recesses, and at least one of the external electrodes is external. A surface mount electronic component, wherein electrodes are formed so as to extend from the side surface of the package substrate into the first recess and the second recess. 2. The plurality of external electrodes are formed so as not to reach the first external electrodes reaching the inside of the first recess and the second recess and the upper surface of the package substrate. The surface mount electronic component according to claim 1, further comprising an external electrode. 3. The surface mount electronic component according to claim 1, wherein the package substrate is a ceramic multilayer substrate obtained by laminating a plurality of ceramic layers and integrally firing the layers. 4. The first and second sealings in which the package substrate is stacked above and below the piezoelectric element while ensuring a plate-shaped piezoelectric element and a space that does not hinder the vibration of the piezoelectric vibrating portion of the piezoelectric element. The surface mount type electronic component according to claim 1, comprising a substrate. 5. A capacitor is built in the first and / or second sealing substrate using the internal electrodes.
The surface mount electronic component according to claim 4. 6. The non-shrinkable substrate according to claim 4, wherein the first and second sealing substrates include glass or glass ceramics having a lower shrinkage in the surface direction than ceramics.
The surface mount electronic component described in.