JP2003059045A - Information recording and device, integrated circuit, and method for light source driving - Google Patents

Abstract

PROBLEM TO BE SOLVED: To meet demands for faster, high-density recording, etc., without sacrificing cost, performance, etc., by suppressing deviation of a light modulated waveform from a desired value due to distortion, skew, etc., of a light modulation control signal waveform. SOLUTION: A state machine 150 has a plurality of states corresponding to a multi-valued irradiation level when an LD is driven to emit light with the multi-valued irradiation level so as to record and reproduce information to and from a recording medium; and a modulation signal indicating transition of states is generated according to variation in the multi-valued irradiation level of the LD and the driving current of the LD is modulated corresponding to the states.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CD-ROM drive device, a CD-R drive device, and a CD-RW drive device for performing required signal processing on a light reception signal obtained by receiving reflected light from an information recording medium. , DVD-ROM drive device, DVD-R drive device, DVD-RW drive device, DVD-RAM drive device, MD drive device, MO drive device, and other information recording / reproducing devices, and multi-leveled and multi-pulse light The present invention relates to a light source driving device such as a laser driving / controlling device for driving and controlling a modulation waveform and a light source driving method thereof.

[0002]

2. Description of the Related Art Conventionally, in an optical disk device for recording by optical modulation, the optical modulation waveform is made multi-pulse and multi-level by the one-beam overwrite technique and the recording mark shape control for high density. (For example, FIG.
A technique for controlling by controlling the optical modulation waveform of (e) of (e) is indispensable, and accordingly, a light source drive unit (hereinafter, referred to as “LD
It is necessary to switch a plurality of currents in the driver), and the number of input signal lines is increasing. Further, for high-speed recording and high-density recording, it is required to further increase the data transfer rate, further divide the pulse division width, and increase the number of power levels in the future.

Since the pickup of the optical disk device is movable in the radial direction of the information medium (this operation is called "seek operation"), the pickup and the circuit board on which the signal processing unit and the like are mounted are flexible printed circuits (Fle).
Generally, a flexible board called a flexible print circuit (FPC) board is used for connection, and the LD driver is arranged in the vicinity of a light source (LD) mounted on the pickup, and from the signal control unit to the LD driver. Wiring is performed using this FPC board. But,
Since it is inevitable that the FPC board that supplies the optical modulation control signal has a certain length, LD drive due to distortion of the optical modulation control signal waveform, delay (in particular, delay difference (skew) between a plurality of control signals), etc. The switch timing of the current deviates, and it becomes impossible to emit laser light with a desired optical waveform. As a result, the accuracy of the mark shape and the position of the mark is impaired, causing a data error. Furthermore, FP
The problem of unwanted radiation from the C substrate also causes noise.

In order to solve such a problem, a first laser drive integrated circuit stores one or more pieces of drive waveform information for driving a laser diode corresponding to a binary recording signal to be recorded on a recording medium. Drive waveform information storage means, drive waveform restoration means for restoring the drive waveform based on the storage information of the first drive waveform information storage means, and controlling the switch means, and a binary recording signal to be recorded on a recording medium. Based on the first
An optical disk device provided with an address generating means for selecting drive waveform information in the drive waveform information storage means, and a control means for storing drive waveform information supplied from the outside in the first drive waveform information storage means (for example, Japanese Laid-Open Patent Publication 11-283249) is proposed.

In such an optical disk device, LD drive means for supplying the currents of a plurality of current sources to the LD through the switch means, and drive for driving the LD in response to the binary recording signal to be recorded on the recording medium. The above problem is solved by providing the same laser drive integrated circuit with the drive waveform restoring means for restoring the waveform (light modulation waveform) and controlling the switch means.

[0006]

However, when higher speed and higher density recording is required in the future, the optical modulation control signal generator (driving waveform restoring means) is required to operate at higher speed and higher integration. A fine CMOS process is suitable. On the other hand, since an LD having an operating voltage of about 1 to several V is connected to the LD drive unit, a high breakdown voltage process (for example, 5 V or 3.3 V) is required.

However, it is usually difficult to achieve a high breakdown voltage in a fine CMOS process (for example, 0.18).
Since the μm CMOS process has a withstand voltage of only about 1.8 V), it is difficult to realize high speed with the above-mentioned conventional optical disk device, or the cost is significantly increased, the power consumption is increased, and the integrated circuit size is increased. There was such a problem. Also, when a mark is formed on some recording media, the edge length of the mark may be thermally affected on the medium by the adjacent space length, and the edge of the mark may change variously depending on the adjacent space length. In order to avoid this, in the conventional optical disk device, each pulse width of the optical modulation waveform is changed in consideration of the adjacent space length. However, when high-speed recording and high-density recording are required, further subdivision of the pulse width control resolution is required, and there is a problem that it is difficult to realize.

The present invention has been made to solve the above problems, and suppresses the deviation of the optical modulation waveform from the desired value due to distortion, skew, etc. of the optical modulation control signal waveform, and sacrifices cost, performance and the like. The objective is to meet the demands for higher speed, higher density recording, etc.

[0009]

In order to achieve the above object, the present invention provides the following information recording / reproducing apparatus (1) to (7). (1) In an information recording / reproducing apparatus that drives a light source that emits light at a multilevel irradiation level to record and reproduce information on a recording medium, a state management unit that manages a state corresponding to the multilevel irradiation level, and the light source. A drive control signal generating means for generating a modulation signal for indicating a transition timing of the multilevel irradiation level indicating the transition of the state, and a state transition signal for designating a transition condition of the state, and corresponding to the state. An information recording / reproducing apparatus provided with a modulation means for modulating the drive current of the light source. (2) In an information recording / reproducing apparatus that drives a light source that emits light at a multilevel irradiation level to record and reproduce information on a recording medium, a state management unit that manages a state corresponding to the multilevel irradiation level, and the light source. Of the irradiation level of the modulation signal for indicating the transition of the state, the state transition signal for designating the transition destination of the state, the transition destination of the state according to the recording signal to be recorded on the recording medium Drive control signal generation means for generating the designated mode information,
An information recording / reproducing apparatus provided with a modulation means for modulating the drive current of the light source in accordance with the above state.

(3) The information recording / reproducing apparatus as described in (2) above, wherein the mode information is changed by a transition to a predetermined state. (4) The information recording / reproducing apparatus according to (2) or (3), wherein the mode information is supplied based on the pulse number of the modulation signal in a predetermined state. (5) In the information recording / reproducing apparatus according to any one of (2) to (4), the mode information is determined according to a space length adjacent to the recording mark. . (6) In the information recording / reproducing apparatus according to any one of (1) to (5), the transition condition of each state in the state managing means can be changed. (7) In the information recording / reproducing device according to any one of (1) to (6), information in which the state managing means, the modulating means, and the drive control signal generating means are provided in different integrated circuits, respectively. Recording / playback device.

Further, the following light source driving devices (8) to (14) are also provided. (8) In a light source drive device for driving a light source to emit light at a multi-valued irradiation level for recording and reproducing information on a recording medium, a state management means for managing a state corresponding to the multi-valued irradiation level and a plurality of the light sources. Drive control signal generating means for generating a modulation signal for indicating the transition of the state by indicating the change timing of the value irradiation level, and a state transition signal for designating the transition condition of the state, and the light source corresponding to the state A light source drive device provided with a modulation means for modulating the drive current of the. (9) In a light source drive device for driving a light source to emit light at a multi-valued irradiation level for recording and reproducing information on a recording medium, a state management means for managing a state corresponding to the multi-valued irradiation level, and irradiation of the light source. A modulation signal that indicates the transition timing of the level by indicating the level change timing, a state transition signal that designates the transition destination of the state, and a transition destination of the state according to the recording signal to be recorded on the recording medium. A light source driving device provided with drive control signal generation means for generating mode information and modulation means for modulating the drive current of the light source in accordance with the above state.

(10) The light source driving device as described in (9) above, wherein the mode information is changed by a transition to a predetermined state. (11) The light source drive device according to (9) or (10), wherein the mode information is supplied based on the number of pulses of the modulation signal in a predetermined state. (12) The light source driving device according to any one of (9) to (11), wherein the mode information is determined according to the space length adjacent to the recording mark. (13) The light source drive device according to any one of (8) to (12), wherein the transition condition of each state in the state management means can be changed. (14) In the light source drive device according to any one of (8) to (13), the state management means, the modulation means, and the drive control signal generation means are provided in different integrated circuits, respectively. apparatus.

Further, the following light source driving integrated circuit (15) and (16) is also provided. (15) In a light source drive integrated circuit that drives a light source to emit light at a multilevel irradiation level in order to record and reproduce information on a recording medium, a state management circuit that manages a state corresponding to the multilevel irradiation level; A modulation signal that indicates the change timing of the multilevel irradiation level and indicates the transition of the above state,
A light source drive integrated circuit provided with a drive control signal generation circuit that generates a state transition signal that specifies a transition condition of the state, and a modulation circuit that modulates the drive current of the light source corresponding to the state. (16) In a light source drive integrated circuit that drives a light source to emit light at a multi-value irradiation level for recording and reproducing information on a recording medium, a state management circuit that manages a state corresponding to the multi-value irradiation level, and Correspondingly, a modulation circuit that modulates the drive current of the light source is provided, a modulation signal that indicates the change timing of the multi-valued irradiation level of the light source and indicates the transition of the state, and a state that specifies the transition condition of the state A light source driving integrated circuit adapted to supply a transition signal and manage the above state.

Furthermore, the following light source driving methods (17) and (18) are also provided. (17) In a light source driving method for driving a light source to emit light at a multilevel irradiation level in order to record and reproduce information on a recording medium, the multilevel irradiation level of the light source has a plurality of states corresponding to the multilevel irradiation level. A light source driving method of generating a modulation signal for instructing the transition of the above state according to the change of, and modulating the drive current of the light source in accordance with the above state. (18) In a light source driving method for driving a light source to emit light at a multilevel irradiation level in order to record and reproduce information on a recording medium, recording in the recording medium having a plurality of states corresponding to the multilevel irradiation level The destination of the state transition is specified according to the signal, and a modulation signal that directs the transition of the state according to the change of the multi-level irradiation level of the light source is generated, and the drive current of the light source corresponding to the state is generated. Light source driving method for modulation.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be specifically described below with reference to the drawings. First, the overall configuration and operation outline of an information recording / reproducing apparatus to which the present invention is applied will be described. FIG. 1 is a block diagram showing a schematic configuration of an information recording / reproducing apparatus which is an embodiment of the present invention. The information recording / reproducing apparatus is an apparatus for recording and reproducing information (data) on the information recording medium 100. This information recording medium 100 is, for example, a CD-ROM, a DVD-RO.
M, CD-R, CD-RW, DVD-R, DVD-RA
It is a recording medium on which information to be reproduced such as an optical disk such as M, MD, MO is recorded or on which information is recorded.

The optical pickup 101 irradiates a recording surface of the information recording medium 100 with laser light (emitted light, irradiation light) emitted from a light source 102 of a semiconductor laser (LD), for recording information, or for information recording. The light source 102 receives the reflected light from the information recording medium 100 with respect to the irradiation light at the time of reproducing the information, converts it into a light reception signal, and outputs the light reception signal.
Further, a light source driving unit that drives the light source 102 (which is a publicly known technique and therefore not shown and described in detail), a light receiving unit 103 that receives reflected light and converts it into a light receiving signal, and the like are arranged. Further, the optical pickup 101 is also provided with a monitor light receiving portion (a similar publicly known technique, illustration and detailed description thereof are omitted) for monitoring a part of light emitted from the light source 102, and a monitor signal output from the monitor light receiving portion is provided. Light source 102 based
The fluctuation of the light amount of the emitted light (the amount of emitted light) is controlled.

Further, a tilt detection light receiving portion (which is also known in the art and therefore not shown and described in detail) for detecting the inclination (referred to as “tilt”) of the information recording medium 100 with respect to the irradiation light may be arranged. Furthermore, when the information recording / reproducing apparatus is an information recording / reproducing apparatus capable of recording and reproducing information on a plurality of types of information recording media in which different medium formats are defined (for example, DVD and C
D compatible device, etc.), each information recording medium has a light source having a suitable wavelength, and a light receiving unit and a monitor light receiving unit for receiving reflected light from the information recording medium at the time of emission of each light source are separately provided. Good.

The signal processing unit 104 includes an optical pickup 10
Light receiving signals from various light receiving units arranged in No. 1 are input, and various signal processing is performed based on the light receiving signals. For example,
Focus servo control and track servo control are performed so that information is reproduced from the received light signal and light is always irradiated within a predetermined error with respect to fluctuations such as surface wobbling and wobbling in the radial direction of the track due to rotation of the information recording medium 100. For control, a servo error signal is generated from the received light signal, and the optical pickup 101 is controlled according to the servo error signal. In addition, the information to be recorded is modulated according to a predetermined rule and output as a recording signal to the light source 102 (or the light source driving unit), or the output light amount control when the laser light of the light source 102 is emitted is performed.

The rotation drive unit 105 is used for the information recording medium 100.
The signal processing unit 10 is a spindle motor that rotates the
The rotation speed is controlled by 4 (spindle servo control). When performing CLV rotation control, a rotation control signal embedded in the information recording medium 100 for more accurate rotation control is detected via the optical pickup 101, and rotation control is performed based on the rotation control signal. . The rotation control signal includes, for example, a sync signal arranged at a predetermined interval in the recorded information in a read-only information recording medium, and a wobble in which a recording track meanders at a predetermined frequency in a recordable information recording medium. To use. Controller 106
Performs transfer of recording / reproducing information and command communication with a host computer (not shown), and controls the entire information recording / reproducing apparatus.

Since the optical pickup 101 is movable in the radial direction of the information recording medium 100 (direction of arrow 107 in the figure) (this operation is called "seek operation"), the optical pickup 101 itself and the signal processing unit 104 are provided. The circuit board on which the flexible printed circuit (Fle
It is generally connected by a board (or a cable) called a `` Printable Print Circuit (FPC) board (or a cable) ''. Often implemented.

Next, an ordinary signal processing unit which is a premise of the present invention in the above information recording / reproducing apparatus will be described.
FIG. 2 is a block diagram showing an internal configuration of a normal signal processing unit which is a premise of the present invention. This signal processing unit 104
Is equipped with two light sources LD1 and LD2 for accommodating information recording media of different formats.
And PD5 monitor a part of the irradiation light from each of the light sources LD1 and LD2.

The light receiving portion PD1 receives the reflected light from the information recording medium when the laser light is emitted from the light source LD1, and the light receiving portion PD4 receives the reflected light from the information recording medium when the laser light is emitted from the light source LD2. The light receiving unit PD3 is a light receiving unit for detecting the tilt amount. The light receiving section PD1
PD3 and PD4 are composed of a plurality of divided light receiving elements, and the respective light receiving elements receive the reflected light. Some optical pickups are configured to monitor the light emitted from the light sources LD1 and LD2 by the same light receiving section. Similarly, there is a configuration in which the light receiving section for receiving the reflected light from the information recording medium is also the same.

The input selection unit 1 inputs each light receiving signal output from the light receiving units PD1 to PD5, and inputs one of them to the control unit 11
The signals are sequentially selected and output according to the selection signal from. The adjustment unit 2 performs offset adjustment and gain adjustment of the received light signal output from the input selection unit 1. The A / D converter 3 digitally converts (A / D converts) the light receiving signal output from the adjusting unit 2 from an analog signal into a digital signal. The received light signal processed by the path of each of the above-mentioned parts is a signal of a relatively low band as will be described later, and processes a plurality of signals in time series. The input selection unit 1, the adjustment unit 2 and the A / D converter 3 constitute a light reception signal conversion unit 21 '.

The servo signal arithmetic processing section 13 performs digital arithmetic processing for generating a servo error signal based on each light receiving signal converted into a digital signal by the A / D converter 3. At the same time, offset adjustment and gain adjustment are performed and the generated servo error signal is supplied to the servo processor 14. The RF selection unit 4 receives the light reception signals output from the light reception units PD1 and PD4, selects a signal required for a circuit in the subsequent stage or performs calculation such as partial addition / subtraction, and the high speed analog signal processing unit 5 in the subsequent stage. The wobble signal generator 6 and the RF signal preprocessor 8 are supplied to the circuits.

The high speed analog signal processing section 5 performs high speed analog signal processing such as DPD signal generation and RF envelope signal generation. The details of each generation process will be described later,
Since the generated signal does not require a wide band, it is input to the input selection unit 1 and subjected to time series processing like other signals.
The wobble signal generation unit 6 detects a wobble preformatted on a recordable information recording medium.
The A / D converter 7 digitally converts (A / D converts) the wobble signal generated by the wobble signal generation unit 6 from an analog signal to a digital signal.

The wobble signal processing unit 15 extracts a binarized wobble signal from the wobble signal digitally converted by the A / D converter 7, and supplies it to the WCK generation unit 17 and the rotation control unit 18. Also, from the wobble signal, the address information modulated by a predetermined rule for each information recording medium is demodulated,
Supply to the controller 19. The RF signal preprocessing unit 8 is
RF signal post-processing unit / phase-locked loop (PL)
L) Playback R input from the RF selector 4 together with the circuit 16
A binarized RF signal is generated based on the F signal, and demodulation is performed according to the modulation method rule of the information recording medium being reproduced. Further, the PLL circuit extracts a reproduction clock from the binarized RF signal. The demodulated data is the controller 19
Supply to. Further, the rotation control signal is extracted by the synchronization signal inserted into the binarized RF signal at a predetermined interval and supplied to the rotation control unit 18.

The rotation control unit 18 includes the wobble signal processing unit 1
5 or a spindle error signal for performing rotation control is generated from the binarized wobble signal or rotation control signal input from the RF signal post-processing unit / PLL circuit 16 and is supplied to the servo processor 14. When the information recording medium is rotated at a constant angular velocity (CAV), a spindle error signal is generated by a signal (not shown) indicating a disc rotation output from a rotation control drive unit (not shown). The servo processor 14 generates a servo control signal from various servo error signals that are input based on a command from the controller 19, and outputs the servo control signal to the servo driver 20.

The servo driver 20 generates a servo drive signal based on the servo control signal input from the servo processor 14 and supplies it to each drive unit. Servo control operation is performed in each of the driving units by the supplied servo drive signal. Here, the servo control operations are focus control, track control, seek control, spindle control and tilt control. The WCK generation unit 17 generates the recording clock signal WCK based on the binarized wobble signal supplied from the wobble signal processing unit 15, and supplies the recording clock signal WCK to each unit of the LD modulation signal generation unit 10 and the controller 19. At the time of recording, generation of recording data is performed with reference to the recording clock signal WCK. Also, during recording, the controller 1
The recording data signal Wdata is supplied from 9 to the LD modulation signal generation unit 10 in synchronization with the recording clock signal WCK.
The recording data signal Wdata has information to be recorded modulated according to a predetermined rule.

The LD modulation signal generator 10 is an LD for modulating the light source LD1 or the light source LD2 from the recording clock signal WCK input from the WCK generator 17 and the recording data signal Wdata input from the controller 19.
A modulated signal is generated and supplied to the LD driver 12. LD
The control unit 9 inputs the monitor light receiving signal from the light receiving unit PD2 or the light receiving unit PD5 via the input selecting unit 1 and the adjusting unit 2, and based on the monitor light receiving signal, the light sources LD1 and LD
LD driver 12 so that the amount of emitted light of 2 becomes a desired value.
To the LD control signal. So-called APC (Auto
control is performed. The LD driver 12 current-drives the light source LD1 or LD2 based on the LD control signal input from the LD control unit 9 and the LD modulation signal input from the LD modulation signal generation unit 10 to emit laser light.

The block enclosed by the one-dot chain line in the figure is an integrated circuit 22. The integrated circuit 22 is mounted on the optical pickup 101 in FIG.
A control signal is supplied to each part in 2 for control. At that time, a control command sent from the controller 19 issues a control command for each unit.

Next, the circuit blocks of the main part relating to the present invention will be described in detail. The configuration and operation of the received light signal conversion unit 21 according to the present invention, which is provided in place of the above received light reception signal conversion unit 21 ', will be described. FIG. 3 is a block diagram showing a detailed configuration of a main part according to the present invention. Further, FIG. 4 is a signal waveform diagram for explaining the operation of the main part according to the present invention shown in FIG. FIG. 5 shows FIG.
3 is a block diagram showing the configuration of each light receiving unit shown in FIG.

As shown in FIG. 3, in this main part, the first to nth light receiving parts PD1 to PDn respectively output one to a plurality of light receiving signals. The input selector 1 has N switches SW.
1 to SWN, and one end of each switch is connected to the light receiving signals Sin1 to SinN from the corresponding light receiving section. Any one of these switches SW1 to SWN is turned on according to the selection signals Ssel1 to SselN, and the light receiving signal corresponding to the turned on switch is selected and output. The received light signal output is Sselo. The adjustment unit 2 includes an offset adjustment unit 30 and a gain adjustment unit 31, and performs the offset adjustment and the gain adjustment of the received light signal Sselo according to the offset signal Sofs and the gain signal Sgain, respectively. The light receiving signal output after the adjustment is ADin.

The A / D converter 3 converts the offset-adjusted and gain-adjusted received-light signal ADin from an analog value (analog signal) to an n-bit digital value (digital signal).
Convert to. The A / D converted data is sent to the first interface (I / F) unit 32 and the second interface (I / F).
The data is transferred to the data holding unit 34 via the unit 33, and the control unit 1
The write signals Wr1 to WrM from 1 are sequentially stored in the registers Reg1 to RegM of the data holding unit 34. The servo signal arithmetic processing unit 13 performs arithmetic processing for generating a servo error signal from the data of the light reception signal stored in the registers Reg1 to RegM of the data holding unit 34.
In addition, gain adjustment and offset adjustment for adjusting gain variations due to variations among individual information recording media and optical pickups are also performed.

The number and types of light receiving portions and the number of light receiving signal lines provided in this embodiment are examples, and if the total number of light receiving signals is within the input fraction N of the input selecting portion 1, other numbers and types It can also be realized with the number of light receiving signal lines. In the following description, these light receiving parts will be referred to as the light receiving part PD1 as in FIG.
The information recording / reproducing apparatus including the five light receiving portions of PD5 to PD5 will be described.

In order to explain more specifically, the first light receiving portion P
D1 receives the reflected light from the information recording medium by the four-division light receiving element 35 as shown in FIG. 5 (light receiving spot 36).
Then, each divided light receiving element (a, b,
c, d) outputs the received light currents output by the current-voltage converters 37a to 37d according to the amount of received light, respectively.
Converted to VB, VC, VD and output. Here, since the amount of received light greatly varies depending on the amount of light emitted from the light source, the reflectance of the information recording medium, etc., the current-voltage converters 37a to 37d.
The gain, that is, the current-voltage conversion rate can be switched according to the gain switching signal. In this case, normally, the feedback resistance can be switched by switching the resistance value. This may be such that it is switched between recording and reproducing.

The light reception signal VA is output to the terminal of the switch SW1, the light reception signal VB is output to the terminal of the switch SW2, the light reception signal VC is output to the terminal of the switch SW4, and the light reception signal VD is output to the terminal of the switch SW3. At this time, the focus servo system is the astigmatism method, the track servo system is the push-pull method, and the focus error signal FE and the track error signal TE are calculated by the following mathematical formulas 1 and 2, respectively. can get. Since the astigmatism method and the push-pull method are well known methods, detailed description thereof will be omitted.

[0037]

[Equation 1] FE = (VA + VD)-(VB + VC)

[0038]

[Equation 2] TE = (VA + VC)-(VB + VD)

The control section 11 of FIG. 3 sequentially changes the signals for turning on the selection signals Ssel1 to SselN according to time based on a predetermined rule, and repeats it in the cycle Tsmp. The cycle Tsmp is divided into M periods, the switch that is turned on in the input selection unit 1 changes in each of the divided periods, and the light receiving signal that flows to the terminal of the turned-on switch is the adjustment unit of the next stage. 2 is selected and output.

As shown in FIG. 4, when the selection signal Ssel1 in the period T1 and the selection signal Ssel2 in the period T2 are changed in the order of the selection signals Ssel4, Ssel3, ... VA, VB, VC, V
Output as Sselo in the order of D, ... In the A / D converter 3, the signal ADin obtained by adjusting the gain / offset of the received light signal Sselo is A / D converted once in the period Ti (i = 1 to M). If the A / D-converted value is the value converted into the period Ti, the register Reg of the data holding unit 34
Store in i. That is, the value of the received light signal VA is the value of the register R.
The value of VB is stored in the register Reg2 in the register eg1.

That is, each received light signal can be A / D converted at the sampling rate fsmp (= 1 / Tsmp), and a servo error signal can be generated by digitally calculating it. Here, the servo error signal and each light receiving signal for generating it do not require a wide band (for example, several kHz), and servo control can be performed if sampling is performed at a sampling rate fsmp sufficiently higher than the required band. Are using. Similarly, the output light amount control and the tilt control of the light source do not usually need to be controlled at high speed. Similarly, the received light signal can be obtained.

By the way, in the control section 11, the selection signal S
The switching order of sel is programmable.
For example, when the light receiving signals VA, VB, VC, VD are connected to a switch different from the one described above, the light receiving signals VA, V
If the switching order of the selection signal Ssel is programmed so that the switches to which B, VC and VD are respectively connected are turned on in sequence, the value of the light receiving signal VA is stored in the register Reg1 and the value of the light receiving signal VB is stored in the same manner as described above. Register Reg
2 can be stored, and the processing unit in the subsequent stage does not need to be changed. For example, when the light reception signal VA is connected to the terminal of the switch SW5, the light reception signal VB is connected to the terminal of the switch SW6, the light reception signal VC is connected to the terminal of the switch SW3, and the light reception signal VD is output to the terminal of the switch SW2, respectively,
The selection signal Ssel5 is supplied to the control unit 11 in the period T1.
Programming is performed so that the selection signal Ssel6 is turned on in the period T2, the selection signal Ssel3 is turned on in the period T3, and the selection signal Ssel2 is turned on in the period T4.

When using a plurality of light sources, the switch connected as the output destination of the light receiving signal output from the light receiving section corresponding to the unused light source is not selected. Further, when the reflected light from the information recording medium is received by another light receiving section (PD4), if the input selection section 1 is programmed so that the light receiving signals output from the PD4 are sequentially selected, subsequent signals can be obtained. The processing can be performed in the same circuit system, and the circuit can be made smaller.

In this way, even if there are a plurality of light receiving portions and the light receiving signals thereof are input to any input terminal, it is possible to deal with them by programming in the control portion 11, so that the arrangement of these light receiving portions is arranged. The degree of freedom in arranging the terminals, the terminals, and the parts forming the optical pickup, including the light source and the LD driver, is improved. Further, even when the light receiving section is a light receiving element having a different divided shape and the servo error signal generating method is different, each light receiving signal output from the light receiving section is sequentially selected by programming in the control section 11 after A / A. Since it is possible to perform D conversion and arithmetically generate the servo error signal, it is possible to deal with various processings without changing existing circuits.

FIG. 6 is a block diagram showing the configuration of a programmable selection signal generator provided in the controller 11 shown in FIG. The selection signal generator is configured to synchronize with the synchronization signal Ss.
An M-ary counter 38 that starts counting by y, and a period information signal Sti output from the M-ary counter 38
A rewritable conversion table (LU) that converts the address of the data storage destination of the data holding unit 34 into one of the selection signals Ssel1 to SselN that is specified based on the
T) 39.

The LUT 39 stores a pre-programmed switching order of the selection signals Ssel1 to SselN, and determines the output of any of the selection signals Ssel1 to SselN based on the period information signal Sti in that order. For example, the period information signal Sti = 3, that is, the period T
When 3, the selection signal Ssel4 = 1, other selection signals S
sel1 to Ssel3 and Ssel5 to SselN output 0. Programming of the selection signal switching order is performed by rewriting the contents of the LUT 39. Further, even if the switching order of the selection signals Ssel1 to SselN is fixed, each register R of the data holding unit 34
If the order of writing to eg1 to RegM is programmable, the same effect as described above can be obtained.

That is, the selection signals are set to Ssel1 and Sse.
If the light-receiving signals are output in the order of VA, VB, VD, VC, ... It is sufficient to write the A / D-converted values to the register Reg1 in T1, the register Reg2 in the period T2, the register Reg4 in the period T3, and the register Reg3 in the period T4. This can be realized by controlling the write signals Wr1 to WrM to the registers Reg1 to RegM. Also, FIG.
The programmable write signal generation unit provided in the control unit 11 shown in FIG. 6 may have the same configuration as the selection signal generation unit shown in FIG.

Furthermore, the selection signals Ssel1 to SselN
Alternatively, programming may be performed by combining the switching order of 1) and the writing order to the registers Reg1 to RegM. Further, only the inputs required for programming the selection signal are sequentially selected (for example, the switches whose input terminals are not connected are not selected), and the registers Reg1 to R are registered.
The data may be exchanged in the order of writing to the egM. Furthermore, the time division number M may be programmed according to the number of data series (the number of registers) required in the processing unit in the subsequent stage, and the period Ti is sufficient A / even if the delay time of each circuit is taken into consideration. The sampling cycle Tsmp may be changed within a range in which the D conversion time can be secured.

When the selection signal generator or the write signal generator shown in FIG. 6 generates a selection signal, the time division number M can be changed by changing the advance number of the M-adic counter 38. Further, the offset adjustment unit 30 and the gain adjustment unit 31 are provided in order to effectively utilize the input range of the A / D converter 3, and by placing them in the subsequent stage of the input selection unit 1 as shown in FIG. The circuit can be shared.

Further, if the offset signal Sofs and the gain signal Sgain are changed in association with the switching of the selection signals Ssel1 to SselN, it becomes possible to individually adjust the gain / offset of each light receiving signal in the same circuit. Even if there is a difference in the level of the light reception signal output from each light receiving unit, the respective signals can be A / D converted with high accuracy. For example, since the amount of received light normally changes for each light receiving unit, the gain may be changed for each light receiving unit.

The offset adjustment value and the gain adjustment value are stored in the control unit 11 in advance. The gain adjustment value may be calculated, for example, as follows. The amount of received light varies depending on the amount of light radiated to the information recording medium, the reflectance of the information recording medium, the characteristic variations among the individual optical pickups, and the like. Therefore, if the monitor light receiving signal of the light source is detected and the gain adjustment value is calculated based on the detected monitor light receiving signal, it is possible to absorb the change in the irradiation light amount. Further, when the reflected light from the information recording medium is received by the divided light receiving elements, the amount of received light can be detected by calculating the sum of the respective light receiving signals output from the respective divided light receiving elements.
The gain may be calculated based on the resulting sum signal.

Similarly, the peak envelope signal of the RF signal (the bottom envelope signal when the polarity of the RF signal is negative) is also a signal that depends on the amount of received light, and thus may be used. According to this embodiment, those detected values can be detected by the A / D converter 3. Further, the data converted by A / D conversion by a data conversion unit (not shown) is converted so that the number of bits is increased according to the offset adjustment value and the gain adjustment value of the offset adjustment unit 30 and the gain adjustment unit 31. By processing the data conversion value in the servo signal calculation processing unit 13, it becomes possible to perform a more accurate calculation without increasing the number of bits of the A / D converter 3.

FIG. 7 is a block diagram showing the arrangement of a gain control section for automatically controlling the gain of the gain adjusting section 31 in accordance with the amount of received light in the information recording / reproducing apparatus of this embodiment. The gain controller 80 is provided in the controller 11,
An adder 81 that adds predetermined data among the A / D-converted received light signals, an averaging unit 82 that averages the output from the adder 81, and a predetermined target value and an output from the averaging unit 82. And a gain calculation unit 83 that calculates a gain from The adder 81 adds a multiplier 87 that multiplies the output from the A / D converter 3 by a coefficient of “1” or “0”, and an output from the multiplier 87 and an output from the delay register 89. 1 from the output from the adder 88 and the adder 88
The delay register 89 delays the clock, and the output from the adder 88 becomes the output from the adder 81.

According to the above-mentioned example, the light reception signals are A / D converted and output from the A / D converter 3 in the order of Dva, Dvb, Dvc, Dvd, and other light receiving unit outputs. Dva ~
If the coefficient up to Dvd is set to 1 and the other is set to 0, the addition output of Dva to Dvd, that is, the sum signal of the first light receiving unit PD1 is obtained in one cycle (Tsmp). The DC component of the sum signal is detected by averaging the sum signal by the averaging unit 82. The gain calculation unit 83 compares a predetermined target value with the output from the averaging unit 82 by the comparison unit 90, and based on the comparison result, increases or decreases the current value of the gain and resets it. That is, if the sum signal is smaller than the target value, the gain is increased, if it is larger, the gain is decreased, and if it is within the predetermined value, the current value is held. Adder 91
Is the gain increase / decrease signal output from the comparison unit 90 and the holding unit 92.
The current value of the gain which is the output of is added, and the gain is updated.

By doing so, the sum signal (that is, each received light signal) can be automatically controlled so as to have a substantially predetermined value, and the emitted light amount of the light source and the reflectance of the information recording medium change. Stable and accurate A / even when the amount of received light changes
D conversion can be performed, and thereby stable servo operation can be performed. Further, the signal to be controlled does not have to be the above sum signal as long as it is a signal that varies in proportion to the amount of received light. For example, there is a peak hold signal (or bottom hold signal) of the RF signal described later. If the signal is used, it is not necessary to perform calculation in the adder in the gain controller, so that the circuit can be simplified.

The averaging unit 82 and the comparing unit 90 can obtain the same effect even if the connection order is changed. Further, if a gain control unit 86 having the same configuration as the gain control unit 80 is provided in parallel with the gain control unit 80, automatic gain control can be performed for each light receiving unit. The gain selection unit 84 switches the gain calculated by the gain control units 80 and 86 or the gain adjustment value stored in the gain register 85 in association with the selection signal Ssel. For example, the adjustment value stored in the gain register 85 may be used in a signal or situation where automatic gain control is not required, such as when the reflectance of the information recording medium is detected by the monitor light receiving signal or the sum signal. . Further, if the gain calculated by the gain control unit 80 is read, the above-described conversion of increasing the number of bits of the A / D conversion data can be performed.

The received light signal conversion unit 21 shown in FIG. 3 has an input selection unit 1, an offset adjustment unit 30, and a gain adjustment unit 3.
1, A / D converter 3 and first interface (I / F)
The optical pickup 1 is composed of a unit 32 and is separated from the signal processing unit 104 in the subsequent stage together with the control unit 11 that controls them.
Installed in 01.

In this way, the signal lines transferred by the FPC board are the first I / F section 32 and the second I / F section 33.
Since it becomes a digital signal between and, and these circuits can be placed in the immediate vicinity of each light receiving part, it is not necessary to transfer the light receiving signal, which is often a minute analog signal, over a long distance, and the influence of noise It becomes difficult to receive. Also,
By performing data transfer between the interfaces by serial transfer, the number of signal lines to be transferred can be significantly reduced.

Furthermore, in this embodiment, in order to connect the light receiving signal from each light receiving portion on the FPC board (or the optical pickup board) to a specific input terminal, the signal line becomes long or the signal line does not intersect. If the number increases, there is a disadvantage that the wiring itself becomes impossible. Therefore, in this embodiment, the liberalization of the connection input terminal by programming described above works particularly effectively. Furthermore, since each received light signal before the servo calculation by the servo signal calculation processing unit 13 is converted into a digital signal and transferred, a programmable servo signal calculation processing unit of a calculation method described later can be realized with a simple process and configuration.

Next, the operation of the interface section and the data communication method will be described. FIG. 8 is a block diagram showing a configuration of a main part relating to data communication in the main part shown in FIG. FIG. 9 is a signal waveform diagram for explaining the data communication method by the main part relating to the data communication shown in FIG. As shown in FIG. 8, the main part related to data communication is
Signal AD that the A / D converter 3 has adjusted the offset / gain
in is converted from analog to digital (A / D) according to the conversion start signal CNV. The latch unit 40 receives the A / D converted n-bit data from the control unit 11 as a latch signal L.
Hold according to EN.

The parallel / serial converter (P / S converter) 41 has a data communication clock Sck (with a cycle of Tsc).
The latch output of n bits is parallel / serial converted in synchronism with (k) and serial data Dout is output. A shift register (SR) 42 that temporarily performs serial / parallel conversion on the data output from the P / S converter 41.
In accordance with the register write signals Wr1 to M, the registers Reg1 to M of the data holding unit 34 are sequentially stored. The control unit 11 and the control unit 43 that performs communication control on the second I / F unit 33 side output control signals to the respective units based on the synchronization signal Ssy output from the controller (not shown). The control unit 11 starts output of the selection signals Ssel1 to SselN in synchronization with the synchronization signal Ssy.

The selection signals Ssel1 to SselN are output according to the preprogrammed sequence as described above. At this time, time Tc to turn on per channel
h is Tch = n · Tsck (n is the number of A / D conversion bits). If necessary, the offset signal Sofs and the gain signal Sgain are simultaneously changed in synchronization with them. Further, the conversion start signal CNV is sent to the A / D converter 3.
Is output for each time Tch.

In FIG. 9, the output timing of the conversion start signal CNV is assumed to be so short that the switching time of the input selector and the delay time of each circuit are negligible. It may be made to be.
Further, the latch signal LEN is output for each time Tch in order to hold the converted data. These operations are performed for M channels (hereinafter, this is referred to as one frame). Naturally, the cycle Tsmp of the synchronization signal Ssy is Tsmp ≧ M ·
It is assumed that the Tch relationship holds.

On the other hand, the controller 43 outputs the register write signal Wr based on the synchronization signal Ssy. In the case of the example of the signal waveform shown in FIG. 9, 2 · Tch of the synchronization signal Ssy
After (= 2n · Tsck), the first write signal Wr1 is output, and the write signal Wr is sequentially output for each time Tch in which each channel is turned on. As described above, the write signal Wr
The output sequence of 1 to WrM may be programmable. Further, the synchronization signal Ssy may not be synchronized for each frame, but may be synchronized once for k frames (k: natural number), or for every one to several channels.

Next, time division multiplexing of command communication and data transfer to the control unit 11 will be described. According to the following embodiment, the signal line from the controller 19 to the control unit 11 can be shared for command communication and data transfer. That is, the signal line is transferred from the controller 19 to the control unit 11
It is used by dividing it into a command communication phase for command communication to and a data transfer phase for data transfer. By doing so, the number of signal lines can be reduced. Note that normally, there is little need for frequent command communication, and data transfer is not hindered.

An embodiment of the communication method will be shown below. A signal line C / D (Hi: command communication phase, Low: data transfer phase) for identifying the command communication phase and the data transfer phase is provided, and the control unit 11 identifies the phase according to the signal. In addition, the signal line C /
If the data transfer is synchronized with the falling edge of D, the synchronization signal Ssy can also be used.

In the signal waveform shown in FIG. 9, after the period TM, the time for one channel is assigned as the command communication phase. When command communication is time-division multiplexed, the definition of the above frame is extended to the interval from the period T1 to the next period T1. That is, it is assumed that the period for the command communication phase to be inserted is added to the period for the M channels.

Further, command communication to the control unit 11 is performed by accessing a command register (not shown) in the control unit 11, and one command is the address (7 bits) of the command register and read / write. It consists of a bit indicating write access and write / read data (8 bits). The period of the command communication phase to be inserted in one frame may be the time when one to several commands can be transferred, or the time when one command can be transferred in a plurality of frames (that is, for example, the command communication in the first frame). The address and the read / write access bit may be transferred to the phase, and the data may be transferred to the command communication phase in the next frame). In this way, if the method for inserting the command communication phase is determined in advance, the signal line C for identifying the phase
/ D becomes unnecessary and the number of signal lines can be reduced.

The synchronization signal Ssy may be sent by command communication to the control unit 11 without providing a dedicated signal line. That is, when a predetermined command register is accessed, each control unit may generate the synchronization signal at the same timing after the access is completed.
By doing so, the number of signal lines can be further reduced.
Further, when information is not reproduced / recorded at the time of start-up or during standby, that is, when the optical pickup 101 does not operate, it is not necessary to transfer A / D converted data, and during this period, the command communication phase is always available. For example, initialization of the command register, which requires a large amount of command communication, can be performed quickly. Then, when the pickup operation is performed, the mode shifts to the multiplexing mode.

FIG. 10 is a block diagram showing the configuration of another embodiment of the light receiving signal input section including the above light receiving section and the light receiving signal converting section. The N light receiving units PD1 to PDn and the input selection unit 1 are the same as those in FIG.
Output signal Ssel by programming SselN
For o, each light reception signal is sequentially output. Similarly to the above, the offset adjustment unit 30 and the gain adjustment unit 31 perform the offset / gain adjustment of the output signal Sselo, and the sample hold (S / H) circuit 44 includes the first sample hold (S / H) circuits SH1 to SH1. M sample hold (SH
M) consists of M circuits SHM, and each S / H circuit SH
1-SHM samples and holds each received light signal. The signal calculation unit 45 generates a servo error signal from the output (or a part thereof) of each S / H circuit SH1 to SHM.

Next, this light receiving portion is the light receiving portion shown in FIG. 5 and the servo error signal (FE and T
Generation of E) will be described based on Equation 1 and Equation 2 described above. The input selection unit 1 has the same configuration and operation as described above, and sequentially outputs the light reception signals VA, VB, VC, VD as the output signal Sselo (corresponding to the periods T1, T2, ...). S / H circuit S
The H1 performs the sampling operation in the period T1 according to the sampling signal Ssmp1, and the holding operation in the other periods. That is, the light receiving signal VA selected in the period T1 is sampled at the cycle Tsmp. Similarly S / H
The circuit SH2 is in the period T2, and the S / H circuit SH3 is in the period T3.
In addition, the S / H circuit SH4 performs the sampling operation in the period T4.

In this way, no matter where the light receiving signals are input, the first S / H can be selected by programming the selection order.
The light receiving signal VA is output to the output of the circuit SH1, the light receiving signal VB is output to the output of the second S / H circuit SH2, and the third S / H circuit SH is output.
The light receiving signal VC is output to the output of 3 and the light receiving signal VD is output to the output of the fourth S / H circuit SH4. It can be generated by the arithmetic circuit 46 that performs the arithmetic processing based on the equation 1, and the track error signal can be generated by the arithmetic circuit 47 that performs the arithmetic processing based on the equation 2. Even if the switching order of the selection signal Ssel is fixed, the first S / H circuits SH1 to MS
/ Sampling timing Ssm of H circuit SHM
If p1 to M can be programmed, the same operation as described above can be performed.

Next, another embodiment of the input selection unit 1 will be described. 11 shows the input selection unit 1 shown in FIG.
It is a block diagram which shows the other structural example. In the input selector 1, each of the switches SW1 to SWN has a low pass filter (LPF) 48 and a sample hold (S / H).
A circuit 49 is provided (in the figure, switches SW1 and SW2
, And the others are omitted.), The low-pass filters LPF1 to LPF1 to
Unnecessary high frequency components are cut by the LPFN and input to the respective switches SW1 to SWN. Further, by sample-holding each input signal at the same timing SMPin by each sample-hold circuit SH1 to SHN, an A / D conversion value at the same time can be obtained even if a delay difference of maximum Tsmp may occur. As a result, when the servo error signal is generated in the subsequent stage, it is possible to cancel out common-mode noise components that cannot be removed by the LPF,
More accurate signal generation is possible.

Further, as a conventional method for stabilizing the servo operation during recording, the received light signal of the reflected light from the optical disk is held for a period in synchronization with the writing period in which the amount of light is large, and the other period is sampled to obtain a signal for the writing period. Is not used for servo signal generation, and the change in the servo gain due to the change in the light amount during recording is eliminated to stabilize the servo operation. Therefore, at the time of recording, the sampling operation of the sample hold circuit is performed at the sampling timing S
If MPin is performed at the Hi level and in a period other than the writing period, in addition to the above-mentioned effect, the change in the servo gain due to the change in the light amount during recording can be eliminated and the servo operation can be stabilized.

As the above-mentioned light receiving portion, a light receiving element alone (PD: Photo Detect) is provided without incorporating a current-voltage converter.
For example, the light reception signal in that case is output as a current. In such a case, it is desirable to integrate the current-voltage converter in the signal processing unit from the viewpoint of installation space and cost. Therefore, an embodiment in that case will be described next.

Next, still another embodiment of the input selection section 1 will be described. FIG. 12 is a block diagram showing still another configuration example of the input selection unit 1 shown in FIG.
In the input selection unit 1, a current-voltage converter 50, a voltage buffer 51 (can be omitted), and selectors for selectively outputting their outputs are provided at (or at a part of) the input terminals of the switches SW1 to SWN. 52 is connected (only the switch SWN is shown in the figure, and other illustrations are omitted), and the selector 52 can set which output is selected.

By doing so, whether the light receiving signal output from the light receiving portion is a current signal or a voltage signal,
Also, which input terminal is connected can be made compatible by programming. Further, the received light signal voltage-converted by the current-voltage converter may be a signal on the positive side with respect to a predetermined reference voltage (the voltage increases as the amount of received light increases) or a signal on the negative side. is there. In order to effectively utilize the A / D converter in the latter stage, it is desirable to unify them into one. Therefore, an embodiment in that case will be described next.

Next, still another embodiment of the input selection section 1 will be described. FIG. 13 is a block diagram showing still another configuration example of the input selection unit 1 shown in FIG. In the input selection unit 1, the switches SW1 to S
The polarity selection unit 53 is connected to the input terminal of WN (or part of it) (only the switch SWN is shown in the figure, and other illustrations are omitted), and the polarity of the input signal is changed by the polarity selection signal. Inversion can be set. The polarity selection unit 53 includes an inverting amplifier 55, a non-inverting amplifier 54, and a selector 56 that selectively outputs these outputs.

Further, a predetermined offset may be applied to the offset adjusting section 30 without using the polarity selecting section 53. For example, the received light signal input is a signal on the negative side of the reference voltage Vref, and the input dynamic range is 0 to Vre.
If it is f (see (a) of FIG. 14), if only the voltage of the reference voltage Vref is applied to the offset, A
Since a signal on the positive side of the reference voltage is input to the / D converter (see FIG. 14B), it is not necessary to unnecessarily widen the input range of the A / D converter. Also, A / D
After the conversion (for example, in the servo signal calculation processing unit 13), the applied offset voltage may be corrected.

FIG. 15 shows the input selecting section 1 and the adjusting section 2.
It is a block diagram which shows the structure of other embodiment of this. The input light receiving signals Sin1 to SinN are N switches SW1 to SW1.
Each switch SW1 of the switch 140 composed of SWN
To SWN input terminals. The other terminals of the switches SW1 to SWN are connected in series via a resistor to the negative input terminal of the operational amplifier 142. Also, switch 1
41 also has N switches SW (N + 1) to SW (2
N) and each switch SW (N + 1) to SW (2
The input terminal of N) is connected to the received light receiving signals Sin1 to N, and the other terminal is connected to the positive input terminal of the operational amplifier 142 through the series resistor.

The resistance values connected to the above switches are all the same. Also, each switch has a selection signal Ssel1 to
On / off control is performed according to Ssel (2N). The variable resistor 145 is a feedback resistor of the operational amplifier 142, the variable resistor 146 is connected between the positive input terminal of the operational amplifier 142 and the reference voltage, and the resistance value is set by the gain control signal. Further, the D / A converter (DAC) 143 D / A converts the offset adjustment value Sofs, and is connected to the negative input terminal of the operational amplifier 142 via the variable resistor 144. The offset adjustment range can be changed by changing the variable resistor 144.

If the selection signal Ssel is applied so that the switches SW1, SW3, SW (N + 2) and SW (N + 4) are turned on during the input selection period Ti, the output from the operational amplifier 142 is The value becomes the value obtained from the calculation based on the equation 3 shown below, and the addition / subtraction calculation of the input light receiving signal can be performed. Here, G: gain and Ofs: offset.

[0083]

[Equation 3] G-(-Sin1 + Sin2-Sin3 + Si
n4-Ofs)

Therefore, if configured as shown in FIG.
The operational amplifier 142 can add / subtract arbitrary signals of the light receiving signals Sin1 to SinN input by setting by the selection signal Ssel and adjust gain / offset, and if the output is input to the A / D converter 3, the operational signal is a digital value. Can be converted to. If only one switch is selected, the light receiving signal can be selected in the same circuit, and the polarity can be selected by selecting the switches 140 and 141. Although not shown in the figure, if a switch for short-circuiting the resistor connected to the switch 140 is provided in parallel, the operational amplifier 142 is used as a current-voltage converter when the input signal is a received light current. It is also possible.

In this way, if the signals subjected to the addition / subtraction calculation are converted to digital values and transferred, the first I / F section 32 and the second I / F section 32 are transferred rather than transferring each received light signal data before calculation and performing digital calculations. The number of data to be transferred between the / F units 33 may decrease, and the transfer rate can be reduced, so that unnecessary radiation can be reduced. Further, the calculating means such as the adding unit 81 shown in FIG. 7 can be omitted.

Next, the A / D conversion of the wideband signal processing output will be described. By the way, a tracking method called a phase difference detection method is used in DVD-ROM and the like.
This phase difference detection method (hereinafter referred to as DPD method) compares the phases of two signals obtained from the diagonal sum of the four-division light receiving element, The phase shift amount between the beam spot and the track is detected from the phase lead amount or the delay amount, and the tracking operation is performed.

Since each received light signal and its signal processing unit require an RF band, a high-speed A / D converter must be used when performing A / D conversion and digital signal processing. However, if the A / D converter speed is insufficient, it may not be possible to accurately generate a signal. In addition, since it is not necessary to perform wideband signal processing for the other servo error signal generation as described above, it is useless when the circuit is shared. On the other hand, the DPD signal generated after the signal processing becomes a signal in the same band as other servo error signals.

16 and 17 are block diagrams showing the configuration of the preferred embodiment in such a case. The first light receiving unit PD1 is a light receiving unit that receives the reflected light from the information recording medium when tracking is performed by the DPD method, and has a configuration as shown in FIG. 5, for example. The DPD signal generation unit 71 may use a well-known signal processing circuit, and thus detailed illustration and description thereof will be omitted. DPD signal generator 71
The DPD signal Sdpd generated in (1) is connected to one end of the input selection section 1 (switch SW5 in FIG. 16).
Since the signal processing band required for the generated DPD signal Sdpd may be the same as other servo error signals or the light receiving signal before generation, the subsequent processing is performed in the same manner as described above, and A /
The D-converted value is stored in a predetermined register.

In this way, since the high-speed analog signal processing circuit is used in the portion where the signal processing in the RF band is required, the signal can be accurately generated, and the A / D conversion is performed when the required band is narrowed to digital. Since transfer is performed, signal deterioration due to noise during transfer can be prevented without using a high-speed A / D converter. Further, since it can be processed in the same circuit as other signals before servo error generation and the transfer signal line can be shared, the circuit scale can be reduced and the transfer signal line can be reduced.

Further, before each input to the DPD signal generation section 71, an RF selection section 4 (having the same configuration as the input selection section 1 shown in FIG. 3) is provided to receive the light reception signals Sin1 to SinN.
If one of them is selected (the selection of the switch is specific to the pickup and is not switched during operation), the effect of improving the degree of freedom in the arrangement of the parts constituting the optical pickup can be similarly obtained.

Further, the envelope signal of the RF signal (generated by the peak hold (P / H) circuit 74 or the bottom hold (B / H) circuit 75) and the change in the amount of reflected light caused by the recording mark formed during recording. Running OPC (Optimum)
Recording RF used for Power Control)
The output from the sample hold (S / H) circuit 76 for sampling a predetermined level of the signal also requires the high-bandwidth processing by the signal generation processing unit as with the DPD signal, but the generated signal itself requires a wideband. No, so you can do the same.

The adder amplifier 72 adds the received light signals of the main spots to generate an RF signal. Depending on the light-receiving unit, there is one that incorporates the addition amplifier 72 and outputs an RF signal. In that case, the addition amplifier 72 is used.
May be omitted, and although illustration and detailed description thereof are omitted,
You may make it possible to select these signals. Further, the variable gain amplifier 73 amplifies the RF signal according to the RF gain signal instructed by the control unit, and the detection accuracy can be improved by increasing the input level to the circuit in the subsequent stage.

Next, generation of a servo error signal by digital signal processing will be described. FIG. 18 is a block diagram showing an internal configuration of the servo signal calculation processing section 13. FIG. 19 shows the servo signal arithmetic processing unit 1 shown in FIG.
3 is a waveform diagram for explaining the operation of FIG. According to the servo signal calculation processing unit 13 having the configuration shown in FIG. 18, it is possible to deal with various calculation methods for generating a servo error signal by changing the coefficient described later. As one example, the focus error signal FE is generated by the astigmatism method and the track error signal TE is generated by the differential push-pull method, and the following equations 4 and 5 are generated.
The case of generation by arithmetic processing based on will be described. Since the astigmatism method and the differential push-pull method are well known methods, detailed description thereof will be omitted.

[0094]

[Equation 4] FE = (VA + VD)-(VB + VC)

[0095]

[Equation 5] TE = (VA + VC)-(VB + VD) -K1
・ ((VE + VG)-(VF + VH))

Here, K1 in the above equation 5 is a constant determined from the light quantity ratio between the main beam and the sub-beam,
By setting this appropriately, it is possible to correct the offset component caused by the optical axis shift. Data holding unit 34
Registers Reg1 to RegM of the light receiving signals VA to V
This is a register in which the A / D converted values Dva to Dvh of H are stored, respectively stored in the registers Reg1 to Reg8, and updated at intervals of the cycle Tsmp. Each register outputs the value of the register selected by the output enable signals OE1 to OEM. The output enable signal OE is sequentially switched from OE1 to OEM according to the clock MCK. That is, the output Dx is Dva, Dvb, ...
.., Dvh, ... are output in this order. The subsequent circuits also operate according to the clock MCK.

The adder 60 adds the signal Dv and the pre-computation offset Dofs, and the multiplier 62 multiplies the output from the adder 60 by the coefficient Kv. As for the offset value Dofs and the coefficient Kv, one of the pre-computation offset registers OFS1 to OFSM of the pre-computation offset register group 61 corresponds to the calculation coefficient registers Kv1 to KvM of the computation coefficient register group 63 according to the output enable signals OE1 to OEM.
One of them is selectively output. While the output enable signal OE1 is on, the output from the multiplier 62 is Kv1 · (Dva + OFS1).

The pre-computation offset registers OFS1 to OFSM of the pre-computation offset register group 61 store the offset adjustment values of the light reception signals VA to VH, respectively. The arithmetic coefficient register group 63 is provided with a plurality of banks, and each bank is a group of M arithmetic coefficient registers Kv1 to KvM, and the banks are switched by the arithmetic phase signal Sph.
The operation phase signal Sph is a signal indicating each servo error signal operation generation phase such as the FE operation phase and the TE operation phase. When FE and TE are generated by the arithmetic processing based on the equations 4 and 5, the arithmetic coefficient register group 6
3 stores the coefficients shown in Table 1 below.

[0099]

[Table 1]

The adder 64 adds the output from the multiplier 62 and the output from the register RegTmp65. The register RegTmp65 holds the output from the adder 64 one clock before, and outputs the output enable signal OE.
It is reset while 1 is on. The adder 66 is
Output from adder 64 and servo signal offset SVOf
Then, the multiplier 68 multiplies the output from the adder 66 by the coefficient Kg times. Servo signal offset SVOf
s and the coefficient Kg are the offset adjustment value and the gain of each servo error signal, and the output is switched by the operation phase signal Sph. Servo error signal register Reg
The SV 70 is a holding unit that stores each calculated servo error signal. Here, if it is the FE operation phase, the output of the register RegTmp is in the periods t1, t2, ...
The values become as shown in the following formulas 6 to 9, respectively, and the output of the adder 64 is FE calculated and generated in the period tm.

[0101]

[Equation 6] t1: 0

[0102]

[Formula 7] t2: Dva + OFS1

[0103]

## EQU00008 ## t3: (Dva + OFS1) + (-1. (Dv
b + OFS2))

[0104]

T4: (Dva + OFS1) + (− 1 · (Dv
b + OFS2)) + (-1 · (Dvc + OFS3))

That is, the value shown in the following equation 10 (offset adjustment value is omitted) is obtained.

[0106]

[Equation 10] Dva-Dvb-Dvc + Dvd + 0 · (D
ve + ...)

At this time, the output from the adder 64 is multiplied by the addition of the FE offset value FEOOfs and the FE gain to generate the FE signal, which is stored in the register RegFE. Similarly, when the TE calculation phase is entered, the period t
In m, the output from the adder 64 becomes a value (offset adjustment value is omitted) shown in the following Expression 11, and the output from the adder 64 is multiplied by the TE offset value TEOfs and TE gain to obtain TE. Signal is generated, register Reg
Stored in TE.

[0108]

[Equation 11] Dva-Dvb + Dvc-Dvd-K1D
ve + K1 ・ Dvf-K1 ・ Dvg + K1 ・ Dvh

Further, other servo error signals (for example, lens position signal, track cross signal, sum signal, tilt servo error signal, etc.) necessary for control are generated in the subsequent calculation phases.

By doing so, a plurality of servo error signals can be generated in the same circuit, and the circuit scale can be reduced. Further, by changing the calculation coefficient Kv, it is possible to generate servo error signals by various calculation methods, and it is possible to correspond to various optical pickups. further,
A medium format discriminating unit (not shown) for discriminating the type of medium format of the information recording medium is provided, and the servo signal arithmetic processing unit 13 changes the arithmetic processing contents based on the discrimination result of the medium format type. For example, even if the servo error signal generation method is different in the device corresponding to the information recording medium of different formats,
The type of the information recording medium can be identified, and the calculation coefficient Kv can be changed according to the identification result, so that it is not necessary to separately provide each servo error signal generating unit, and the circuit scale can be reduced. . Furthermore, when high-speed arithmetic processing is required, a similar arithmetic unit may be provided for parallel processing.

Since each A / D conversion data needs to be fixed (not updated) during this operation phase,
By allocating the command communication phase described above to this operation phase, data and command communication can be performed without waste. Further, the output of the servo error signal register RegSV70 for storing the calculation result is converted into a D / A converter (D / A converter).
If the signal is converted into an analog signal by the A conversion means), it is possible to use an existing servo processor assuming the input of a servo error signal which is an analog signal.
Further, a plurality of sample hold circuits for sampling and holding the output from the D / A converter are provided, and the servo error signals generated in each operation phase are respectively held, thereby sharing the D / A converter. You can

Next, the wobble signal generator 6 will be described in detail. FIG. 20 is a block diagram showing the internal configuration of the wobble signal generation unit 6 shown in FIG. 2 together with other related units. This wobble signal generator 110 is shown in FIG.
Assuming that the light receiving unit shown in FIG. 2 is used, a so-called push-pull signal PP is generated by the arithmetic processing based on the following equation 12, and the recording track (which is referred to as a groove) meanders at a predetermined frequency from the push-pull signal PP. The wobble signal component is extracted and the wobble signal WBL is generated.

[0113]

[Equation 12] PP = (VA + VC)-(VB + VD)

The summing amplifiers 111 and 112 respectively have V
The light receiving signals of A + VC and VB + VD are added to output VAC and VBD. The DC component removing units 113 and 114 are
The DC components of the respective received light signals VAC and VBD are removed, and the DC component extraction unit 11
The DC removal signal generated by 9 is subtracted to obtain the signal VA
It outputs C'and VBD '.

The DC component extraction section 119 is used by the A / D converter 3
The digital values of the received light signals VA to VD converted by the above are added by an adder 120 to obtain signals VA + VC and VB, respectively.
+ VD is obtained, and the DC removal signal is calculated by the averaging unit 121. At that time, since the digitally added value has increased or decreased by the gain adjusted by the gain adjustment unit 31, the value is corrected so as to match the gains of the addition amplifiers 111 and 112.
The DC component removing units 113 and 114 are high-pass filters (H
However, an HPF with a low cutoff frequency that removes a DC component usually requires a large-capacity capacitor, which increases the chip size of the integrated circuit and external terminals for the capacitor. The problem that it becomes necessary arises.

However, according to this embodiment, the above problem does not occur. Further, the band of the DC removal signal generated by changing the averaging unit 121 can be changed. AGC (Automatic Gain Cont)
circuits 115 and 116 are connected to the signals VAC 'and VB.
This is a circuit that automatically adjusts the gain so that the amplitude of D'has a predetermined value. The subtraction amplifier 117 subtracts the outputs of the AGC circuits 115 and 116 to generate the wobble signal WBL. The generated wobble signal WBL is A / D converted by the A / D converter 118 and transferred via the first I / F unit 32 and the second I / F unit 33. The data communication method and interface part are shown in FIG. 9 by the main part shown in FIG.
The same operation as the signal waveform shown in FIG.

The wobble signal processing section 122 carries out digital signal processing such as generation of a binary wobble signal and demodulation of address information according to a predetermined information recording medium format.
When tracking the already recorded area, the recorded RF signals are superimposed on the signals VAC and VBD in the same phase and detected. The amplitude of the RF signal component to be superimposed depends on the amount of received light, and the same amount of light can be removed by subtraction. However, if the center of the light receiving spot deviates from the dividing line due to the deviation of the optical axis or the initial adjustment of the light receiving element, the amount of light received becomes uneven among the light receiving elements, and the RF signal component cannot be sufficiently removed. Similarly, the removal of the modulation component of the light source becomes insufficient even during recording. If signal processing is performed by A / D conversion with such noise superimposed, accurate detection cannot be performed. Further, in order to remove this noise component in the subsequent digital signal processing, an extremely high-speed A / D converter and digital processing circuit capable of sampling at several times these noise component bands are required, which is not realistic. .

However, according to this embodiment, by keeping the amplitude of each signal constant by the AGC circuits 115 and 116, the RF signal component and the light source modulation component can be removed even if there is a deviation in the amount of received light. , S / N ratio can be improved. This allows accurate detection. As in this embodiment, if a wobble signal from which the RF signal component and the light source modulation component are removed is generated by an analog circuit and this is A / D converted and the wobble signal processing is digital signal processing, high speed A / D conversion is performed. It is possible to detect accurately even without a vessel. Further, since the digital value is transferred, signal deterioration due to the transfer does not occur.

FIG. 21 is a signal waveform diagram for explaining a communication method in the case where the transfer of the converted data of the wobble signal is shared with the transfer line for the pre-servo operation signal described above. The wobble frequency requires a higher frequency than the servo error signal band. Therefore, in this embodiment, one wobble signal conversion data ADw is inserted and transferred for each channel of the pre-servo calculation signal ADch which is the output data of the A / D converter 3.

When the conversion bit number of the A / D converter 3 is m bits, the sampling period Tws of the wobble signal is T
ws = (n + m) · Tck (Tck is a transfer clock cycle). The sampling period (frame period) Tsmp of each pre-servo calculation signal is Tsmp = (M +
α) · Tws. Where M is the number of channels to be transferred,
α is a number equivalent to the channel transfer time Tch when the command communication phase is inserted. In FIG. 21, α = 2. By doing so, the number of signal lines to be transferred can be reduced.

Next, the LD control and LD modulation will be described. 22 is a block diagram showing the internal configuration of the LD driver 12 shown in FIG. 2 together with the LD control unit 9, the LD modulation signal generation unit 10, and other related units. FIG. 23 is a signal waveform diagram for explaining the operation of the LD control unit 9, the LD modulation signal generation unit 10, and the LD driver 12 shown in FIG. The information recording medium assumed in this embodiment is a phase-change recording medium (for example, CD-RW), and the LD is caused to emit light with an optical modulation waveform as shown in (e) of FIG. f)) is formed. That is, L
D power level is write power Pw, erase power P
e and the bottom power Pb, which are three values, and a recording mark is formed by a multi-pulse as shown in the figure. At this time, accurate recording is performed by accurately controlling the recording power level and the pulse width / pulse interval of each pulse.

During reproduction, light is emitted with a constant reproduction power Pr. Although not shown, a high frequency signal may be superimposed in order to suppress noise due to the return light from the information recording medium. As shown in FIG. 22, the LD modulation signal generation unit 10 uses the recording clock signal WCK as a reference to determine the LD modulation signal MOD and the state signal ST from the recording data signal Wdata as shown in (d) and (c) of FIG. 23, respectively. To generate. In FIGS. 23D and 23C, the delays of the signals MOD and ST with respect to the recording data Wdata are neglected and shown for the sake of simplicity (usually, a predetermined clock delay is provided for convenience of the generation circuit). At this time, it is assumed that the LD modulation signal MOD has been subjected to optimum pulse width control for a required information recording medium.

The current source 137 outputs a drive current to the light source LD, and the current values Iw and Ie of the respective current sources.
(= Ie0 = Ie1) and Ib are set by the current setting unit 131. The switch 132 selects the selection signals St0 and St.
1 and one of the current sources are selected according to the LD modulation signal MOD, and the modulation current value Imod is output. The switch 133 selects either the modulation current value Imod or the reproduction current value Ir according to the signal R / W indicating recording / reproduction. And
The LD drive current value I is calculated by adding the output current value of the switch 133 and the LD control current value Iapc output from the LD control unit 9.
Generate an LD and drive the LD. This drive current value ILD
The amount of light emitted from the LD is determined by this.

That is, the drive current value ILD = Iapc +
When Iw, the output power P = Pw and the drive current value ILD =
The emission power P = Pe when Iapc + Ie, and the emission power P = Pb when the drive current value ILD = Iapc + Ib. The state machine 130 selects the selection signal St according to the LD modulation signal MOD and the state signal ST.
0 and St1 are output.

FIG. 24 is a state transition diagram of the state machine 130 shown in FIG. 22, and the selection signals St0 and St1 are determined according to each state of S0 to S3. The state transition condition is as shown in FIG. 24, and (b) of FIG. 23 shows the transition state. Table 2 below shows the modulation current value Imod selected by the selection signals St0 and St1 and the modulation signal MOD.
Shows the current value of.

[0126]

[Table 2]

The light receiving section PD2 receives a part of the light emitted from the light source LD and outputs a monitor light receiving current. The monitor light-receiving current is supplied to the LD control unit 9 via the current-voltage converter 134, the S / H circuit 135, the input selection unit 1, the adjustment unit 2, and the S / H circuit 136. The S / H circuit 135 samples the monitor light receiving level during irradiation of the light source LD with a predetermined power (for example, in the case of an optical waveform signal as shown in (e) of FIG. 23, it may be sampled with the erase power Pe. ).

The S / H circuit 136 samples the period during which the input selection unit 1 is selecting the monitor light receiving signal. Others are the same as the above-mentioned operation. The LD control unit 9
The LD control current value Iapc is controlled so that the input monitor light receiving signal has a predetermined target value. Further, the LD control unit 9 may be one that inputs the monitor light reception signal A / D converted by the A / D converter 3 and performs digital signal control. The timing signal generation unit 138 generates a timing signal of a circuit that performs sample hold in synchronization with the optical waveform of the S / H circuit 135, and the optical waveform from the LD modulation signal generation unit 10 that generates an LD modulation signal. A sync signal is provided.

As can be seen from the above, the pulse width of the light modulation waveform of the light source LD is determined only by the modulation signal MOD,
Even if there is a skew between the two signals output from the LD modulation signal generator 10, the optical waveform is not affected and an accurate recording mark can be formed. Therefore, the LD modulation signal generation unit 10 may be configured by an integrated circuit different from the LD driver 12, and it becomes possible to select a semiconductor process suitable for the required circuit characteristics, and a device suitable for cost and performance. Can be configured. That is, since the LD modulation signal generation unit 10 is required to operate at high speed and be highly integrated, a fine CMOS process is suitable.

On the other hand, since the light source LD having an operating voltage of about 1 to several V is connected to the LD driver 12, a high breakdown voltage process (for example, 5 V or 3.3 V) is required.
Normally, it is difficult to make a high breakdown voltage in a fine CMOS process (for example, a breakdown voltage of about 1.8 V is only in a 0.18 μm CMOS process), but according to this embodiment, each can be configured by a suitable process. become. Further, by providing the LD modulation signal generation unit 10 in the integrated circuit mounted in the optical pickup, the wiring length of the modulation signal to the LD driver 12 can be shortened,
It is possible to prevent deterioration of the modulation signal, that is, deterioration of the optical modulation waveform. Further, since it can be provided in the same integrated circuit as the circuit required to be synchronized with the optical waveform, the delay of each timing signal and the number of integrated circuit terminals can be reduced.

Next, the case where the information recording / reproducing apparatus of the above embodiment is applied to different light modulation waveforms will be described.
Usually, the optimum optical modulation waveform differs depending on the type of information recording medium. However, according to the configuration of each unit shown in FIG.
By changing the set current value of the current source 137 and the generation means of the D modulation signal MOD and the state signal ST, the optimum optical waveform for each recording medium can be driven. For example, in the case of an information recording medium that requires an optical modulation waveform as shown in (e) of FIG. 25, the LD modulation signal generation unit 10 has waveforms as shown in (d) and (c) of FIG. 25, respectively. A signal may be generated and each current value of the current source 137 may be set according to Table 3.

The current values Ib, Iw, and It are added to the LD control current value Iapc, respectively, and the light source LD is caused to emit light with the respective emission powers Pb, Pw, and Pt. Even in this case, the above-described effects can be obtained similarly. In the above description, the case where the irradiation level has three values has been described,
Even when the number of levels is increased, it can be applied in the same manner as described above. First, each state managed by the state machine 130 is set as a binary combination state of irradiation levels. The selection signals St0 and St1 select the current source 137 corresponding to the current values of these states. And the modulation signal MOD
The modulation between these two values is performed by. Further, the state transition is changed only on the non-selected side by the modulation signal MOD. By doing so, various optical modulation waveforms can be driven depending on how the state machine is assembled. Furthermore, if the state transition condition can be changed, optimal optical modulation can be performed according to the information recording medium. Further, it can be easily applied to binary level modulation.

[0133]

[Table 3]

Next, a configuration example of the light source driving integrated circuit in the information recording / reproducing apparatus of the above embodiment will be described. In the above embodiment, the integrated circuit 22 is the same as that shown in FIG.
Although the case where the block enclosed by the one-dot chain line shown in FIG. 3 is integrated into an integrated circuit has been described, the configuration of the integrated circuit 22 may be variously modified as described below. A
The / D converter 3 is arranged in the latter stage, that is, the integrated circuit 22 is provided with the input selection unit 1 and the adjustment unit 2, and the signal ADin
You may make it transfer on a PC board. By doing so, the circuit scale of the integrated circuit 22 mounted on the optical pickup, which is desired to be downsized, can be reduced.

Although the signal line to be transferred becomes an analog signal, it is possible to obtain a signal level with a sufficient S / N ratio by adjusting the gain for each received light signal as described above, and thus the influence of noise. Is hard to receive. Further, the effects of reducing the number of transfer signal lines and improving the degree of freedom in arranging the optical pickup parts by programming the connection input terminals can be similarly obtained.
Further, the servo signal calculation processing section 13 may be provided in the integrated circuit 22. In this way, the data to be transferred is only the servo error signal after calculation, the number of transfer data may be smaller than that of transferring each received light signal data before calculation, and the transfer rate can be lowered, which is unnecessary. Radiation can be reduced.

Further, the A / D converter 7 is arranged in the rear stage,
The (analog) wobble signal WBL may be transferred. Depending on the format of the information recording medium, the wobble frequency may be relatively high (for example, about a fraction of the RF signal band). In such a case, if digitally converted data is serially transferred, a high transfer rate is inevitable. In order to reduce the noise caused by unnecessary radiation that occurs in this case, the wobble signal WBL may be transferred. Moreover, if the wobble signal is adjusted in gain to a sufficient amplitude level, signal deterioration due to noise can be reduced,
The above-described effect can be obtained without increasing the number of signal lines. The operation / effect of using the LD driver 12 as another integrated circuit has been described above.

Next, the LD driver (LD driver) 12
Another embodiment will be described. FIG. 26 is a block diagram showing another configuration example of the LD modulation signal generation unit 10 and the LD driver 12 shown in FIG. 22, and shows each unit corresponding to the function of each claim of the present invention. 27 is the same as FIG.
LD modulation signal generator 10 and LD driver 1 shown in FIG.
FIG. 6 is a signal waveform diagram for explaining the operation according to 2. In addition,
Those having the same configurations and operations as those in FIG. 22 and FIG. 23 are not shown and their explanations are omitted. FIG. 28 is a state transition diagram of the state machine 150 shown in FIG.

Here, as shown in FIG. 27 (e),
A case will be described in which an optical modulation waveform that emits light at six-valued (P1 to P6) power levels is driven. In FIG. 26,
The current sources 152 are a plurality of current sources that supply drive currents corresponding to the respective light emission levels (P1 to P6 and reproduction level P0) of the LD, and the respective current values (Ip1 to Ip6, Ip0).
Is set by the current setting unit 151. Switch (S
W) 153 switches each current based on the selection signal Ss, adds the current output from the SW 153 by the current adder 154 and the LD control current Iapc, and outputs the LD
Drive current ILD is supplied to. State machine 150
(Corresponding to the state management means of the present invention) manages the light emitting state of the LD, and one state indicates one light emitting state.

That is, the states Sp0 to Sp shown in FIG.
6 corresponds to the light emission levels P0 to P6, respectively.
Further, the state machine 150 outputs the selection signal Ss corresponding to the state and switches the corresponding current source.
During the recording operation (inside the one-dot chain line frame shown in FIG. 28),
A state transition is performed by switching the modulation signal MOD. That is, the change timing of the light emission power level is determined by the modulation signal MOD, and even if there is a skew between the two signals output from the LD modulation signal generation unit 10 (corresponding to the drive control signal generation means of the present invention), the optical waveform is generated. A precise recording mark can be formed without affecting the. The transition conditions are shown below.

{State Sp0: Transition to state Sp3 by R / W = Write} {State Sp3: Transition to the next state at ST = L, MOD = ↑ (↑ indicates a rising edge). } However, the transition destination differs depending on the mode Mode, and the Mod
When e = 0, go to Sp4, when Mode = 1, go to Sp5,
When Mode = 2, transition to Sp6. Also, ST = H
At this time, the value of the mode Mode is changed according to the number of MOD pulses. First of all, by the transition to the state Sp3, Mod
Reset e to 0. And, while ST = H, MOD
The Mode is incremented (+1) at each rising edge of. For example, Mode = 2 in the period (A) shown in FIG.
become. {State Sp4: transition to state Sp1 at ST = L, MOD = ↓ (↓ indicates a fall). Also, ST
= H, MOD = ↓, the state changes to Sp2. } {State Sp5, Sp6: The same as the state Sp4. } However, in this embodiment, Mo
Decrement (-1) de (as is when Mode = 0).

If the operation is changed to the mode Mode (for example, Mode is reset to 0 with a state transition), an optical waveform different from that shown in FIG. 27 can be generated. {State Sp1: transition to the next state when ST = L and MOD = ↑. } However, the transition destination differs depending on the mode Mode, and the Mod
When e = 0, go to Sp4, when Mode = 1, go to Sp5,
When Mode = 2, transition to Sp6. Also, ST =
When H and MOD = ↑, the state transits to Sp3. {State Sp
2: Transition to state Sp3 when MOD = ↑. } Note that the transition condition of the state Sp1 may be the same. Also, the state Sp
The return to 0 (reproduction mode) may be made after the first return to the state Sp3 after R / W = Raed, or may be made compulsorily by R / W = Read.

By the way, when a mark is formed on some recording media, the adjacent space length may be thermally affected on the recording medium, and the edge of the mark may change variously depending on the adjacent space length. In order to avoid this, conventionally, each pulse width of the optical modulation waveform is changed in consideration of the adjacent space length. In this embodiment, the power can be changed in consideration of the length of the adjacent space. That is, the mode (Mod
By changing e), the power of the head pulse (and the subsequent pulses) can be changed. Also, the power of the final bottom power pulse (referred to as a cooling pulse) can be set by the rising timing of the state signal ST.

In this way, the pulse width is corrected in accordance with the length of the adjacent space, so that it is possible to reduce the subdivision of the pulse width control resolution, which is suitable for high-speed recording. be able to. Further, when the number of power levels is increased or a complicated optical waveform is required, the number of states may be increased and the transition destination branch condition depending on the mode and the mode changing operation in each state may be changed. Furthermore, if the transition condition including the transition destination branch condition depending on the mode is programmable, an optimum optical modulation waveform according to the recording medium can be generated. Since the control of the mode is performed by the modulation signal MOD and the state signal ST, it is not necessary to increase the number of signal lines. Conversely, a mode control signal may be added to handle more complicated mode settings.

Next, the servo signal calculation process (servo error signal calculation process) will be described. 29 and 30
FIG. 19 is a flowchart showing a processing operation in the servo signal calculation processing section (servo error signal calculation processing section) 13 described with reference to FIG. 18. First, as shown in FIG. 29, in step (indicated by “S” in the figure) 1, the type of the information medium 100 to be the target of the recording / reproducing operation is determined. As the information medium discriminating means and method, conventional publicly known techniques may be used, and detailed description thereof will be omitted. In step 2, the multiplication coefficient Kv is changed to a value suitable for various servo error signals according to the type of information medium determined in step S1. It is assumed that this value is stored in advance in a storage means such as a controller. Also, when the calculation processing method is different between recording and reproduction, the value is changed to a value suitable for the operation. Then, a servo error signal calculation process is performed.

In the servo error signal calculation process, as shown in FIG. 30, in step 11, each received light signal (1 to M) is received.
Are respectively A / D converted, substituted into variables Dvi (i = 1 to M), and held in Dv. In this embodiment, various servo error signals are processed in time series, and the process of calculating each servo error signal is called a calculation phase. The operation phase is represented by a variable sv, for example, the FE operation phase when sv = 1, the TE operation phase when sv = 2, ...
The required servo error signal calculation processing is performed in each calculation phase. The number of calculation phases is SVmax. In step 12, the calculation phase is initialized. That is, sv = 1. In step 13, the multiplication coefficient Kv is a value Kv (sv) adapted to the operation phase sv.
Switch to.

In the configuration shown in FIG. 18, bank switching of the arithmetic coefficient register group 63 is performed.
In step 14, each variable is initialized. That is,
Let i = 1 and X = 0. In step 15, an offset is added to the received light signal i (Dvi) (offset adjustment of each received light signal) and multiplication is performed by the coefficient Kvi. That is, the calculation process of Y = Kvi * (Dvi + Ofsi) is performed. In step 16, the calculation result in step 15 is added to the current value of the variable X. That is, X = X +
Ask for Y. In step 17, it is determined whether or not i ≧ M. If i ≧ M, the process proceeds to step 18, and if i ≧ M, the process returns to step 15 with i = i + 1 in step 22. That is, for i = 1 to M, step 15
And the processing of step 16 is repeated. Note that step 14
The processing by ˜17 and step 22 is equivalent to the arithmetic processing of the following Expression 13. However, i = 1 to M.

[0147]

[Equation 13]

Therefore, the arithmetic expression of the above equation 13 may be processed in parallel. In step 18, the offset Ofs (s
v) addition (offset adjustment of each servo error signal)
And gain Kg (sv) are multiplied (gain adjustment of each servo error signal). That is, Z = Kg (sv) *
The arithmetic processing of (X + Ofs (sv)) is performed. Step 1
In 9, the calculation result in step 18 is Reg.
Substitute for (sv). That is, Reg (sv) = Z. In step 20, it is judged whether or not a series of processing has been completed in all operation phases, that is, sv
It is determined whether or not ≧ SVmax, and if sv ≧ SVmax, the process proceeds to step 21, and if not sv ≧ SVmax, a transition process (sv = sv + 1) to the next operation phase is performed in step 23, and the process returns to step 13. .

At step 21, it is judged whether or not the servo operation is finished. If it is finished, it is finished.
If the process is not completed, the process returns to step 11 to repeat the process of generating various servo error signals. By repeating these operations at a predetermined cycle Tsmp, various servo errors having the sampling frequency fsmp (= 1 / Tsmp) can be generated. In the above-mentioned processing, the generation processing of each servo error signal (steps 13 to 19 and step 22) is performed in time series, but each calculation processing may be performed in parallel.

FIG. 31 is a flow chart showing another processing operation in the servo signal calculation processing section 13 described with reference to FIG. This servo error calculation process is similar to the process shown in the flowchart of FIG. 30 in each step, but the processing order of each step is different. First, in step 31, i = 1, X (sv)
= 0 (however, sv = 1 to SVmax) is initialized.
Next, in step 32, the received light signal (i) is A / D
It is converted and assigned to the variable Dvi. Then, this variable Dv
The following series of processing is performed on i. Kv for switching the multiplication coefficient Kv to a value Kv (sv) suitable for the operation phase sv
= Kv (sv) (step 34) and Y = Kvi *
The calculation (Dvi + Ofsi) is performed (step 3
5), X (sv) = added to the current value of variable X (sv) =
X (sv) + Y is performed (step 36).

Then, Z = Kg (sv) *, which is the addition of the offset Ofs (sv) and the multiplication of the gain Kg (sv).
The process of (X (sv) + Ofs (sv)) is performed (step 37), and is substituted into Reg (sv) Reg (sv) =
Perform Z (step 38). In this way, after completing the series of processes for each operation phase, the variable i is incremented (+1) (step 43), and step 3 is performed until i = M.
2 to 40 and steps 42 and 43 are repeated to generate various servo error signals. Finally, in step 41, it is determined whether or not the servo calculation operation is ended. If it is ended, the operation is ended, and if not ended, the process returns to step 31 to repeat the generation processing of various servo error signals.

With this configuration, even if the arithmetic processing is not performed after all the A / D conversions of the received light signals are completed, the respective received light signals are sequentially A / D converted, and the arithmetic processing is performed on each of the received light signals. Since the servo error signals are sequentially added, the processing time can be improved. In order to realize this arithmetic processing operation, in FIG. 18, SVmax registers RegTmp65 are provided in parallel, and each register may be provided with the function of the variable X (sv). It should be noted that this register operates by selecting one according to the signal Sph.

According to the information recording / reproducing apparatus of this embodiment, the change timing of the light modulation waveform is determined only by the modulation signal, and even if there is a skew between the drive control signals, the light waveform is not affected and accurate recording is performed. Marks can be formed. Further, the light modulation waveform control according to the recording signal recorded on the recording medium can be performed, and more accurate recording marks can be formed. Further, it is possible to reduce the fragmentation of the pulse width control resolution even during high speed recording. Further, it is possible to modulate a multi-pulse waveform in which the irradiation power of each pulse is different. Furthermore, the same effect as described above can be obtained without increasing the number of signal lines.

Further, the same effect as described above can be obtained even in a recording medium which is thermally affected on the medium by the adjacent space length and whose mark edge is changed by the adjacent space length. Further, even if the optimum light modulation waveform differs depending on the recording medium, it can be made compatible by programming. In addition, it becomes possible to select a semiconductor process that suits the circuit characteristics respectively required, and it is possible to configure a device that is suitable for cost and performance.

[0155]

As described above, according to the information recording / reproducing apparatus, the light source driving apparatus, the light source driving integrated circuit, and the light source driving method of the present invention, the optical modulation waveform due to the distortion or skew of the optical modulation control signal waveform is generated. The deviation from the desired value of
It is possible to realize demands for higher speed and higher density recording without sacrificing cost and performance.

[Brief description of drawings]

FIG. 1 is a block diagram showing a schematic configuration of an information recording / reproducing apparatus to which the present invention is applied.

FIG. 2 is a block diagram showing an internal configuration of a normal signal processing unit which is a premise of the present invention.

FIG. 3 is a block diagram showing a detailed configuration of a main part according to the present invention.

FIG. 4 is a signal waveform diagram for explaining the operation of the main part according to the present invention shown in FIG.

5 is a block diagram showing a configuration of each light receiving section shown in FIG.

6 is a block diagram showing the configuration of a programmable selection signal generation unit provided in the control unit shown in FIG.

FIG. 7 is a block diagram showing the configuration of a gain control unit that automatically controls the gain of the gain adjustment unit according to the amount of received light in the information recording / reproducing apparatus of this embodiment.

8 is a block diagram showing a configuration of a main part related to data communication in the main part shown in FIG.

9 is a signal waveform diagram for explaining a data communication method by a main part relating to the data communication shown in FIG.

FIG. 10 is a block diagram showing a configuration of another embodiment of a light reception signal input unit including the light reception unit and a light reception signal conversion unit.

11 is a block diagram showing another configuration example of the input selection unit shown in FIG.

12 is a block diagram showing still another configuration example of the input selection unit shown in FIG.

13 is a block diagram showing still another configuration example of the input selection unit shown in FIG.

FIG. 14 is a waveform diagram for explaining applying a predetermined offset to the offset adjustment unit of this embodiment.

FIG. 15 is a block diagram showing a configuration of another embodiment of the input selection unit and the adjustment unit.

FIG. 16 is a block diagram showing a configuration example of another embodiment of a main part according to the present invention.

FIG. 17 is a block diagram showing a configuration example of another embodiment of a main part according to the present invention.

FIG. 18 is a block diagram showing an internal configuration of the servo signal calculation processing section.

FIG. 19 is a waveform diagram for explaining the operation of the servo signal calculation processing section shown in FIG. 18.

20 is a block diagram showing an internal configuration of the wobble signal generation unit shown in FIG. 2 together with other related units.

FIG. 21 is a signal waveform diagram for explaining a communication method in the case where the transfer of the conversion data of the wobble signal in this embodiment is used in common with the transfer line of the signal before servo calculation.

FIG. 22 is a diagram showing the internal configuration of the LD driver shown in FIG.
It is a block diagram shown with a control part, an LD modulation signal generation part, and other related parts.

FIG. 23 is a signal waveform diagram for explaining the operation of the LD control unit, the LD modulation signal generation unit, and the LD driver shown in FIG. 22.

24 is a state transition diagram of the state machine shown in FIG.

FIG. 25 is a signal waveform diagram for explaining a case where this embodiment is applied to different optical modulation waveforms.

26 is a block diagram showing another configuration example of the LD modulation signal generation unit 10 and the LD driver 12 shown in FIG.

FIG. 27 is a signal waveform diagram for explaining the operation of the LD modulation signal generation unit 10 and the LD driver 12 shown in FIG. 26.

28 is a state transition diagram of the state machine 150 shown in FIG.

29 is a flowchart showing the processing operation in the servo signal calculation processing section 13 described with reference to FIG.

30 is a flow chart diagram showing a continuation of the process shown in FIG. 29. FIG.

31 is a flowchart showing another processing operation in the servo signal calculation processing section 13 described with reference to FIG.

[Explanation of symbols]

1: Input selection unit 2: Adjustment units 3, 7, 118: A / D converter 4: RF selection unit 5: High speed analog signal processing unit 6: Wobble signal generation unit 8: RF signal preprocessing unit 9: LD control unit 10: LD modulation signal generation unit 11, 43: control unit 12: LD driver 13: servo signal calculation processing unit 14: servo processor 15, 122: wobble signal processing unit 16: RF signal post-processing unit / PLL circuit 17: WCK generation Part 18: Rotation control parts 19, 106: Controller 20: Servo drivers 21, 21 ': Light reception signal conversion part 22: Integrated circuit 30: Offset adjustment part 31: Gain adjustment part 32: First I / F (part) 33: No. 2 I / F (part) 34: data holding part 35: four-division light receiving element 36: light receiving spots 37a to 37d: current-voltage converter 38: M-ary counter 39: conversion table 40: Switch unit 41: parallel / serial converter (P / S converter) 42: shift register (SR) 45: signal calculation unit 46, 47: calculation circuit 48: low pass filter (LPF) 49, 76, 136: sample hold (S / H) circuit 50: current-voltage converter 51: voltage buffers 52, 56: selector 53: polarity selection unit 54: non-inverting amplifier 55: inverting amplifiers 60, 64, 66, 88, 91: adder 61: operation Previous offset register group 62, 68, 87: Multiplier 63: Calculation coefficient register group 65: Register RegTmp 70: Servo error signal register RegSV 71: DPD signal generator 72, 111, 112: Addition amplifier 73: Variable gain amplifier 74: Peak hold (P / H) circuit 75: Bottom hold (B / H) circuit 80: Gain control unit 81,1 0: Addition unit 82, 121: Averaging unit 83: Gain calculation unit 84: Gain selection unit 85: Gain register 86: Gain control unit 89: Delay register 90: Comparison unit 92: Holding unit 100: Information recording medium 101: Optical Pickup 102, LD1, LD2: Light source 103, PD1 to PDn: Light receiving unit 104: Signal processing unit 105: Rotation drive unit 107: Optical pickup drive direction 110: Wobble signal generation unit 113, 114: DC component removal unit 115, 116 : AGC circuit 117: Subtraction amplifier 119: DC component extraction unit 130: State machine 131: Current setting units 132, 133, 140, 141, SW1 to SW (2
N): Switch 134: Current-voltage converter 137: Current source 138: Timing signal generator 142: Operational amplifier 143: D / A converters 144 to 146: Variable resistance

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Claims (18)

[Claims] 1. An information recording / reproducing apparatus that drives a light source that emits light at a multilevel irradiation level to record and reproduce information on a recording medium, and a state management unit that manages a state corresponding to the multilevel irradiation level. Drive control signal generation means for generating a modulation signal that indicates a change timing of the multi-valued irradiation level of the light source and that instructs a transition of the state, and a state transition signal that specifies a transition condition of the state, and corresponding to the state Then, the information recording / reproducing apparatus is provided with a modulating means for modulating the drive current of the light source. 2. An information recording / reproducing apparatus that drives a light source that emits light at a multilevel irradiation level to record and reproduce information on a recording medium, and a state management unit that manages a state corresponding to the multilevel irradiation level. A modulation signal that indicates the transition timing of the irradiation level of the light source to instruct the transition of the state, a state transition signal that specifies the transition destination of the state, and a transition of the state according to a recording signal to be recorded on the recording medium. An information recording / reproducing apparatus comprising: a drive control signal generating means for generating mode information designating a destination; and a modulating means for modulating a drive current of the light source corresponding to the state. 3. The information recording / reproducing apparatus according to claim 2, wherein the mode information is changed by a transition to a predetermined state. 4. The information recording / reproducing apparatus according to claim 2 or 3, wherein the mode information is supplied based on the number of pulses of the modulation signal in a predetermined state. . 5. The information recording / reproducing apparatus according to any one of claims 2 to 4, wherein the mode information is determined according to a space length adjacent to the recording mark. Information recording / reproducing apparatus. 6. The information recording / reproducing apparatus according to claim 1, wherein a transition condition of each state in the state managing means can be changed. 7. The information recording / reproducing apparatus according to claim 1, wherein the state managing means, the modulating means, and the drive control signal generating means are provided in different integrated circuits. Characteristic information recording / reproducing apparatus. 8. A light source driving device for driving a light source to emit light at a multilevel irradiation level in order to record and reproduce information on a recording medium, a state management means for managing a state corresponding to the multilevel irradiation level, and the light source. A modulation signal that indicates the change timing of the multi-valued irradiation level and indicates a transition of the state, and a drive control signal generation unit that generates a state transition signal that specifies the transition condition of the state, and corresponding to the state. A light source drive device, comprising: a modulation unit that modulates a drive current of the light source. 9. A light source driving device for driving a light source to emit light at a multilevel irradiation level for recording and reproducing information on a recording medium, and a state management means for managing a state corresponding to the multilevel irradiation level; The modulation signal that indicates the change timing of the irradiation level of the state transition instruction, the state transition signal that specifies the transition destination of the state, the transition destination of the state according to the recording signal to be recorded on the recording medium A light source driving device comprising: a drive control signal generating unit that generates designated mode information; and a modulating unit that modulates a drive current of the light source in accordance with the state. 10. The light source driving device according to claim 9, wherein the mode information is changed by a transition to a predetermined state. 11. The light source drive device according to claim 9 or 10, wherein the mode information is supplied based on the number of pulses of the modulation signal in a predetermined state. 12. The light source driving device according to claim 9, wherein the mode information is determined according to a space length adjacent to the recording mark. Drive. 13. The light source drive device according to claim 8, wherein a transition condition of each state in the state management means is changeable. 14. The light source drive device according to claim 8, wherein the state management unit and the modulation unit, and the drive control signal generation unit are provided in different integrated circuits. And a light source drive device. 15. A light source driving integrated circuit for driving a light source to emit light at a multilevel irradiation level for recording and reproducing information on a recording medium, a state management circuit for managing a state corresponding to the multilevel irradiation level, A drive control signal generation circuit that generates a modulation signal that indicates the change timing of the multi-valued irradiation level of the light source and that instructs the transition of the state, and a state transition signal that specifies the transition condition of the state, and that corresponds to the state. And a modulation circuit that modulates the drive current of the light source. 16. A light source drive integrated circuit for driving a light source to emit light at a multilevel irradiation level for recording and reproducing information on a recording medium, and a state management circuit for managing a state corresponding to the multilevel irradiation level, A modulation circuit that modulates the drive current of the light source corresponding to the state is provided, and a modulation signal that indicates the change timing of the multi-value irradiation level of the light source to instruct the transition of the state and the transition condition of the state are specified. And a state transition signal for controlling the state to control the state. 17. A light source driving method for driving a light source to emit light at a multi-valued irradiation level for recording and reproducing information on a recording medium, the multi-valued light source having a plurality of states corresponding to the multi-valued irradiation level. A light source driving method, wherein a modulation signal for instructing a transition of the state is generated in accordance with a change in irradiation level, and a drive current of the light source is modulated according to the state. 18. A light source driving method for driving a light source to emit light at a multi-valued irradiation level for recording and reproducing information on a recording medium, the method comprising a plurality of states corresponding to the multi-valued irradiation level, and recording on the recording medium. The destination of the state transition is designated according to the recording signal to be generated, a modulation signal for instructing the transition of the state is generated according to the change of the multi-valued irradiation level of the light source, and the light source is driven corresponding to the state. A method for driving a light source, which comprises modulating an electric current.