JP2003028901A - Current-detecting circuit using multi-source mos - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a current-detecting circuit, that accurately detects a wide current range of load current using a multi-source MOS for the current detecting current, especially in the fuel injection control of an engine. SOLUTION: The current-detecting circuit comprises the multi-source MOS in which the load current flows, the current-detecting circuit detecting a sense current output from the multi-source MOS corresponding to the load current, and a MOS resistance varying means varying the on-resistance of the multi- source MOS corresponding to the load current. The MOS resistance varying means varies the on-resistance of the multi-source MOS, in the direction of reducing the influence of the input offset of the current-detecting circuit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current detection circuit, and more particularly to a current detection circuit that accurately detects a load current of several amperes by using a multi-source MOS in fuel injection control of an engine.

[0002]

2. Description of the Related Art FIG. 1 shows a configuration example of a current control circuit for detecting a load current using a conventional multi-source MOS. In FIG. 1, the output MOS control circuit 1 applies a constant bias voltage to the multi-source MOS 2 so as to obtain a predetermined load resistance value and controls the gate voltage of the current switch 5 to control the current flowing in the load inductance 4. To control. The current detection circuit 3 indirectly detects the load current flowing in the load inductance 4 by using the sense current from the multi-source MOS 2 as described later.

Conventionally, the load current is detected by measuring the voltage drop across the load current caused by the load current using a current detection resistor of several ohms.
In OS2, a current of several A class flowing in the load is shunted by the current detection MOS, and the load current is detected by monitoring the current. As shown in FIG. 1, the multi-source MOS 2 is a MOS (hereinafter, referred to as a MOS) through which a load current flows.
A "load MOS") and a MOS in which a minute current of a predetermined ratio (for example, 1/1000) of the load current flows.
(Hereinafter, referred to as “detection MOS”).

In this case, as the multi-source MOS 2, the load MOS and the detection MOS having an area ratio of 1000: 1 are formed on the same chip. As a result, load MOS and detection M
The resistance ratio with the OS is 1: 1000, which is the reciprocal of that,
For example, if a large current of 1 ampere flows to the load MOS side under the same conditions, a minute current of 1 milliampere flows to the detection MOS side. The current detection circuit 3 monitors the minute current on the detection MOS side and sets 1000 times the detected current as the load current. When a current detection resistor is used as in the conventional case, a large power loss generated there is unavoidable, so a multi-source MO that can also be used for such a switching MOS.
S is used.

FIG. 2 shows an example of the configuration of the current detection circuit 3 shown in FIG. In FIG. 2, the OP amplifier 6 detects the voltage drop on the load MOS side, and controls the voltage drop on the detection MOS side, that is, the detection current on the detection MOS side so that the potential becomes the same as that. As a simple example, if the on-resistance on the load MOS side is 1 ohm and the load current is 1 amp, the voltage drop is 1 volt. On the other hand, since the ON resistance on the detection MOS side is 1000 ohms in the above example, the detection current for making the voltage drop on the detection MOS side 1 volt is 1 milliamperes. By supplying this current to the detection resistor 8, the load current is accurately detected.

[0006]

Generally, the accuracy of the shunt ratio of a multi-source MOS increases as the load current increases, and the accuracy decreases as the load current decreases. One of the causes is that the input offset of the OP amplifier 6 used in the current detection circuit 3 is increased, and the value of this offset cannot be ignored with respect to the voltage drop value on the load MOS side generated by the load current. The accuracy decreases.

FIG. 3 shows an example of the effect of the offset. 3A shows the load current and the load MOS when the offset value of the OP amplifier 6 is ± 5 millivolts and the ON resistance of the load MOS side is 40 milliohms.
The table shows the voltage drop on the side and the ratio of the voltage drop value and the offset value of the OP amplifier 6. 3B is a graph showing the detection accuracy (ratio between the voltage drop value on the load MOS side and the offset value of the OP amplifier 6) for each load current in FIG. 3A. is there.

As is clear from FIG. 3, when the load current becomes smaller, the value of the voltage drop on the load MOS side also becomes smaller. As a result, there is a problem that the voltage drop value approaches the offset value of the OP amplifier 6 and the load current detection error of the current detection circuit 6 increases. For example, at a load current of 0.5 milliamps, the ratio increases to ± 25 percent.
In the future, the power MOS will continue to have a lower ON resistance for the purpose of reducing loss, and this tendency will be further strengthened. On the other hand, it is necessary to deal with the demand for more precise and wide-ranging control of the load current value and the generation of a large current due to a fault such as a ground fault.

In view of the above-mentioned problems, the object of the present invention is to make the on-resistance of the multi-source MOS variable according to the load current value, so that a high accuracy can be achieved in a wider current range independent of the load current value. It is to provide a current detection circuit capable of detecting a current.

[0010]

According to the present invention, a multi-source MOS through which a load current flows, a current detection circuit for detecting a sense current output from the multi-source MOS according to the load current, and the load current MOS resistance varying means for varying the on-resistance of the multi-source MOS according to
The MOS resistance variable means is provided with a current detection circuit for changing the ON resistance of the multi-source MOS in a direction to reduce the influence of the input offset of the current detection circuit. The MOS resistance variable means increases the on-resistance of the multi-source MOS when the load current decreases, and increases the multi-source MO when the load current increases.
The on-resistance of S is reduced.

According to the invention, the multi-source M
The OS comprises a plurality of MOS resistance changing means, and the MOS resistance changing means changes the number of parallel connection of the plurality of multi-source MOSs in the direction of reducing the influence of the input offset of the current detection circuit. The MOS resistance changing means increases the number of parallel connections of the multi-source MOSs when the load current decreases, and decreases the number of parallel connections of the multi-source MOSs when the load current increases.

Further, according to the present invention, a multi-source MOS having a binary ON resistance through which a load current flows, a current detection circuit for detecting a sense current output from the multi-source MOS according to the load current, and Load current calculation means for calculating the load current by performing a predetermined calculation based on the two current detection values detected by the current detection circuit for each of the multi-source MOSs having binary binary on-resistances. A current detection circuit is provided. The predetermined calculation consists of taking the difference between the two current detection values to cancel the influence of the input offset of the current detection circuit, and the ratio of the two ON resistances is 1: 2.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 4 shows an example of a current control circuit using the basic configuration of a current detection circuit according to the present invention. In FIG. 4, MOS resistance varying means 9 is added to the conventional example of FIG. Other components 1 to 5
Is similar to the conventional example and will not be described further here. MOS
Load current information and / or an ON resistance variable request indicated by a dotted line in the figure is given to the resistance variable means 9, and the MOS resistance variable means 9 is operated by the multi-source M according to the information and the request.
The on-resistance of OS2 is appropriately changed.

That is, even when the load current is small, the MOS resistance changing means 9 appropriately controls the gate bias voltage of the multi-source MOS (the ON resistance of the MOS is appropriately changed), so that the voltage drop generated there is detected by the current detection circuit. Can be made sufficiently larger than the input offset value of. As a result, the load current detection accuracy using the multi-source MOS can be maintained at a constant high level in a wide current range from a small load current to a large load current.

FIG. 5 shows a first embodiment of the present invention. In this example, the MOS resistance variable means 9 is composed of an OP amplifier 11, a reference voltage 12, and a selector 10. The switch 10 selects and outputs one of a predetermined gate voltage from the output MOS control circuit 1 and an output voltage of the OP amplifier 11. In this example, it is assumed that the output voltage of the OP amplifier 11 is selected.

The reference voltage 12 is, for example, a power supply voltage (+
B), a potential (+ B-0.1) lower by 0.1 V.
[V]) is set. Here, when the voltage drop value α [V] of the load MOS is within 0.1 volt due to a small load current, the OP amplifier 11 causes the voltage α and the reference voltage 12 to rise.
And a multi-source MO via switch 10.
The gate potential of S2 is lowered. As a result, the load MOS
The on-resistance of is increased and the potential of the voltage drop value α becomes equal to the potential of the reference voltage + B−0.1 [V].

Further, even in the case of a large load current, the ON resistance of the load MOS is reduced by the same control, so that the potential of the voltage drop value α becomes the potential of the reference voltage + B-0.1.
It becomes equal to [V]. As described above, according to this example, it is possible to make the voltage drop in the multi-source MOS 2 a constant value that does not depend on the load current by utilizing the fact that the on-resistance of the MOS depends on the gate voltage. As a result, the influence of the input offset of the current detection circuit 3 is sufficiently reduced, and the load current in a wide range can be detected with a predetermined accuracy.

FIG. 6 shows an example of the influence of offset in the embodiment of FIG. The condition here is that the input offset value of the OP amplifier 6 in the current detection circuit 3 is ± 5 millivolts as in the case of FIG.
FIG. 6A corresponds to FIG. 3A of the conventional example,
Since the voltage drop is controlled to be constant (0.1 [V]) in the embodiment of FIG. 5, it does not depend on the magnitude of the load current.

Therefore, the ratio between the voltage drop value and the offset value of the OP amplifier 6 is also constant (± 5%). In addition, FIG.
3B is a graph showing the detection accuracy (the ratio between the voltage drop value on the load MOS side and the offset value of the OP amplifier 6), and corresponds to FIG. 3B of the conventional example. There is.

FIG. 7 shows a second embodiment of the present invention. In this example, a plurality of multi-source MOS2 _1-
2 ₃ is provided, and the MOS resistance variable means 9 is a multi-source MOS 2 ₁ connected in parallel by a control signal from the outside.
Select to 2 ₃ to connect. In this example, a 2-bit control signal turns on / off two switches in the MOS resistance variable means 9.

The operation of this example will be described. In the normal operation with a small load current, the number of multi-source MOSs 2 ₁ to 2 ₃ connected in parallel is reduced to improve the current detection accuracy.
Increase the on resistance of S. On the other hand, when an overcurrent is detected due to the occurrence of a fault such as a ground fault, the number of parallel connections of the multi-source MOSs 2 ₁ to 2 ₃ is increased to reduce the on-resistance of the MOS in order to disperse the heat generated by the overcurrent. The number of switching stages and the selection of the MOS on-resistance value can be set according to the usage conditions.

FIG. 8 shows a third embodiment of the present invention. This example corresponds to another example of the mode of FIG. 7, and is composed of two multi-source MOSs 2 ₁ and 2 ₂ and a control unit that automatically switches the number of parallel connections of them. The control unit includes a comparator 13, a reference voltage 12, and a switch 10.

The operation of this example is basically the same as that described with reference to FIG. However, when the comparator 13 detects the overcurrent by comparing the reference voltage 12 (for example, the power supply voltage + B to −0.1 [V] potential) with the voltage drop value of the load MOS, the switch in the switch 10 is turned on. By controlling (opening), the multi-source MOSs _{2 1} and 2 ₂ are connected in parallel to reduce the ON resistance of the MOS.

FIG. 9 shows a fourth embodiment of the present invention. This example corresponds to another embodiment example of FIG. 8, comprised of n number of multi-source MOS2 ₁ to 2 _n, and a control unit for their parallel connections switched digitally multiple steps. The control unit includes a comparator 13, a reference voltage 12, a switch 10, a delay circuit 14 for giving a hysteresis to prevent chattering, and an up / down counter 15.

The operation of this example is similar to that of FIG.
Continued multi-source MOS2₁~ 2_nNumber of digital
Switch to multiple steps. That is, the comparator 13
Reference voltage 12 (for example, from power supply voltage + B to -0.1 [V]
Potential) and the voltage drop value of the load MOS output connected in parallel with
When an overcurrent is detected by comparing
During the period, the level of the up / down counter 15 will change.
The und value increases with a clock having a predetermined cycle. That
As a result, multi-source MOS2 connected in parallel ₁~ 2_nNumber of
Gradually increase in binary steps to lower the MOS on-resistance
It

On the other hand, when the comparator 13 detects a normal small load current, the output of the comparator 13 becomes low level and the count value of the up / down counter 15 decreases during that time. As a result, multi-source MOS2 ₁ connected in parallel
The number of ˜2 _n is sequentially decreased in binary steps to increase the on-resistance of the MOS.

According to this example, the ON resistance of the MOS can be increased or decreased in stages, and more accurate current detection that meets various conditions can be achieved. In addition, each multi-source M
By setting the gate voltage between OS2 _{1 to} 2 _n to be a non-linear step interval, it is possible to detect a current in a wider range and with high accuracy by the same effect as compression / expansion.

10 and 11 show a fifth embodiment of the present invention. While the present invention has been realized by hardware in the above-described embodiments, the configuration of FIGS. 1 and 2 (reprinted in FIG. 10) of the conventional example is not changed in this example.
The influence of the offset voltage of the OP amplifier is removed by software processing. In this example, the effect of offset is eliminated by calculation from two current detection results having different on-resistances.

As shown in FIG. 10, O of the current detection circuit 2
The input offset voltage of the P amplifier is Voff, the on resistance of the multi-source MOS2 (the on resistance of the load MOS) is Ro.
n, the sense ratio between the detection MOS and the load MOS is 1: n. Here, as an example, two values of the ON resistance of the multi-source MOS of 1: 0.5 are used. This can be done by selectively setting the gate voltage applied from the output MOS control circuit 1 to the multi-source MOS 2.

FIG. 11 shows the operating principle of this example. First, the detection current Iout1 when the ON resistance of the multi-source MOS2 is 1 and the detection current Iout2 when the ON resistance of the multi-source MOS2 is 0.5 are obtained by the current detection circuit 3. The latter may be one in which two multi-source MOS2 having an ON resistance of 1 are connected in parallel.

Further, each detection current Iout1 and Iout
2 can also be obtained by the following equations (1) and (2). lout1 = (l × Ron + Voff) / (n × Ron) = (l / n) + (Voff / n ・ Ron)… (1) lout2 = (l × 0.5Ron + Voff) / (n × 0.5Ron) = (l / n) + (2Voff / n · Ron) (2) From these two equations, the load current 1 is calculated as shown below. l = (2lout1-lout2) / n (3)

As a result, two detection current values (Iout1 and Iout) of the multi-source MOS2 having different on-resistances are obtained.
2) By using the calculation of (3) above, the offset voltage of the current detection circuit 3 is completely canceled. In FIG. 11, the influence of the offset voltage (Voff / n.Ron and 2Voff / n.Ron) on each detected current value is erased by the subtraction of the equation (3), and the final detected current I
Is the shaded area in FIG.

[0033]

As described above, according to the present invention, the on-resistance of the multi-source MOS is appropriately changed according to the load current value, so that the multi-source MOS has a wide current range independent of the load current value and high accuracy. A current detection circuit capable of detecting a current is provided.

[Brief description of drawings]

FIG. 1 is a diagram showing one configuration example of a current control circuit for detecting a load current using a conventional multi-source MOS.

FIG. 2 is a diagram showing a configuration example of a current detection circuit of FIG.

FIG. 3 is a diagram showing an example of an influence of an offset by a current detection circuit.

FIG. 4 is a diagram showing an example of a current control circuit using a basic configuration of a current detection circuit according to the present invention.

FIG. 5 is a diagram showing a first embodiment of the present invention.

FIG. 6 is a diagram showing an example of the influence of the offset of the current detection circuit in the embodiment of FIG.

FIG. 7 is a diagram showing a second embodiment of the present invention.

FIG. 8 is a diagram showing a third exemplary embodiment of the present invention.

FIG. 9 is a diagram showing a fourth exemplary embodiment of the present invention.

FIG. 10 is a diagram showing a fifth embodiment of the present invention.

FIG. 11 is a diagram showing the operating principle of FIG. 10;

[Explanation of symbols]

1 ... Output MOS control circuit 2 ... Multi-source MOS 3 ... Current detection circuit 4 ... Load inductance 5… Current switch 6, 11 ... OP amplifier 9 ... MOS resistance changing means 10 ... switch 12 ... Reference voltage 13 ... Comparator 14 ... Delay circuit 15 ... Up-down counter

   ─────────────────────────────────────────────────── ─── Continued front page    F term (reference) 2G035 AA05 AA17 AA20 AB02 AC17                       AC19 AD02 AD03 AD10 AD23                 3G084 BA13 EC08                 5H740 BA12 BA15 BB02 BB07 BB10                       MM11                 5J055 AX53 AX65 BX16 CX13 CX28                       DX22 EX07 EY00 EY01 EY05                       EY21 EZ09 FX04 FX07 FX09                       FX12 FX19 FX32 GX01

Claims (7)

[Claims] 1. A multi-source MOS through which a load current flows
A current detection circuit that detects a sense current output from a multi-source MOS according to the load current, and a MOS resistance changing unit that changes an on-resistance of the multi-source MOS according to the load current. The MOS resistance variable means is arranged to reduce the influence of the input offset of the current detection circuit by the multi-source MO.
A current detection circuit characterized by varying the on-resistance of S. 2. The MOS resistance variable means changes the ON resistance of the multi-source MOS so that the voltage drop, which is the product of the load current and the ON resistance of the multi-source MOS, becomes a constant value. The described current detection circuit. 3. The MOS resistance variable means increases the on-resistance of the multi-source MOS when the load current decreases, and decreases the on-resistance of the multi-source MOS when the load current increases. Current detection circuit. 4. The multi-source MOS comprises a plurality, and the MOS resistance varying means varies the number of parallel connections of the plurality of multi-source MOSs in a direction to reduce the influence of the input offset of the current detection circuit. The current detection circuit according to claim 1. 5. The MOS resistance variable means comprises a plurality of multi-source MOSs formed when the load current decreases.
5. The current detection circuit according to claim 4, wherein the number of parallel connections of the plurality of multi-source MOSs is decreased when the load current increases. 6. A multi-source MOS having a binary ON resistance through which a load current flows, a current detection circuit for detecting a sense current output from the multi-source MOS according to the load current, and each of the binary ONs. Load current calculating means for obtaining a load current by performing a predetermined calculation on the basis of two current detection values detected by the current detection circuit for each of the multi-source MOSs having a resistance, and the predetermined calculation, A current detection circuit, wherein a difference between the two current detection values is taken to cancel the influence of an input offset of the current detection circuit. 7. The current detection circuit according to claim 6, wherein a ratio of the binary ON resistances is 1: 2.