JP2002343931A - Wiring board and its manufacturing method, multi-chip module and its manufacturing method, and multi-chip module mounting structure - Google Patents

Abstract

(57) [Summary] Wiring board having high-density wiring with excellent electrical characteristics
It is an object of the present invention to provide a multi-chip module in which electronic components are soldered and mounted on a (module substrate) and molded with a mold resin. According to the present invention, in order to achieve the above object, a wiring composed of Cr (barrier film) / Cu (conductor film) / Cr (barrier film) formed by sputtering on a portion serving as a ground is provided. Forming wiring consisting of an electric copper plating film and an electric nickel plating film on Cr / Cu on which a signal is passed and a wiring to be joined with the solder is formed by sputtering to form wiring with excellent electrical characteristics. Becomes possible.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board for mounting a plurality of electronic components such as LSI chips using solder, a method for manufacturing the same, a multi-chip module, a method for manufacturing the same, and a multi-chip module mounting structure. Things.

[0002]

2. Description of the Related Art In a method of forming a wiring board, a method of selectively using a wiring layer and a power supply line (ground) between layers has been generally proposed. As an example of this, an example of the configuration is described on page 21 of Multi-chip mounting technology published by Trikeps. The example described here is introduced as a copper / polyimide multilayer wiring. On page 293, the MCM
Is described. Here, too, the copper wiring layer and the copper ground layer are described. However, they do not mention the detailed structure. In order to form a copper / polyimide multilayer wiring, it is necessary to form a metal for securing the adhesive strength because the bonding strength between copper and polyimide is low. For this reason, as a forming method, a method is generally used in which a conductor sandwiched between bonding metals is formed by sputtering, a pattern is formed by a resist, and the pattern is formed by etching (subtract method). In this case, since the sputtered film is expensive, the maximum film thickness is about 5 micrometers.

In order to increase the film thickness, a power supply film is formed by sputtering, a portion other than the wiring is covered with a resist, and the wiring is formed by electroplating. A method of forming a wiring by removing a resist and removing a power supply film is used (semi-additive method).

[0004] However, although individual technologies have been established,
There is no example in which two techniques are used in one substrate.

[0005]

In the prior art, as a method of forming a wiring layer, either a subtractive method or a semi-additive method is used for all the wiring layers. This is because, by using the same process for forming the wiring, the processes can be unified, and the cost can be reduced. However, in recent years, with the improvement in performance of electronic devices, it has become necessary to give each wiring layer a unique role. That is,
The ground layer, the wiring layer, and the wiring layer to which the solder is connected,
Different performance is required for each. For this reason, when each layer is formed in the same process as in the related art, it has become difficult to bring out the performance of the device.

[0006] An object of the present invention is to solve the above problems.
Wiring with excellent electrical properties for mounting a plurality of electronic components such as LSI chips using solder, and having a ground layer, a high-density wiring layer, and a wiring layer to which the solder is connected, which require different performance. Substrate (module substrate)
It is an object of the present invention to provide a wiring board realizing the above at low cost, a method of manufacturing the same, a multi-chip module mounting a plurality of electronic components, a method of manufacturing the same, and a multi-chip module structure.

Another object of the present invention is to reduce the thickness of a wiring board having excellent electrical properties, which includes a ground layer, a high-density wiring layer, and a wiring layer to which solder is required, which require different performances. It is an object of the present invention to provide a wiring substrate (module substrate) and a method for manufacturing the same, a multi-chip module having a plurality of electronic components mounted thereon, a method for manufacturing the same, and a multi-chip module structure.

[0008]

SUMMARY OF THE INVENTION To achieve the above object, the present invention provides a first soldering prevention pad having a first opening group connected to each of a first solder diffusion prevention pad group provided on a back surface.
And a sputtered film provided on the surface side of the first insulating layer and connected to the first solder diffusion preventing pad through the first opening group and mainly constituting a ground wiring. A first conductor layer sandwiched between barrier layers, provided on a surface side of the first insulating layer and the first barrier layer, and interposed between each of the first openings and the first conductor layer; A second insulating layer having a second group of openings connected to each other, and a second insulating layer formed of a sputtered film on the surface side of the second insulating layer.
A second conductor layer made of an electroplating film mainly constituting a signal wiring and connected to the solder diffusion preventing pad through the second and first groups of openings. And a second solder diffusion prevention pad group connected to the second conductor layer.

Further, the present invention provides the wiring board,
Furthermore, a protective film is provided that covers the uppermost layer so as to expose the second solder diffusion preventing pad group.

[0010] The present invention also provides the wiring board,
The first and second barrier layers are formed of a chromium film, a titanium film, a titanium / platinum film, a tungsten film, or an alloy film containing them.

Further, the present invention provides the above-mentioned wiring board,
The first and second conductor layers are formed of a copper film or an alloy film containing copper. Further, according to the present invention, in the wiring board, the first and second solder diffusion preventing pad groups are formed of a nickel film or an alloy film containing nickel. Further, the present invention is characterized in that, for the plurality of electronic components, an electrode group of each electronic component is mounted on the second solder diffusion preventing pad group on the wiring board via solder. It is a multi-chip module. Further, the present invention is characterized in that in the multi-chip module, a plurality of electronic components are further coated on a wiring board with a mold resin.

Further, the present invention provides a multi-chip module mounting structure, wherein the first group of solder diffusion preventing pads of the wiring board in the multi-chip module is mounted on a mounting board via solder. Electronic device.

Further, the present invention has a first step of forming a solder diffusion preventing film on a support substrate, and a first group of openings on the solder diffusion preventing film formed in the first step. A second step of forming a first insulating layer, and a first conductor layer sandwiched between first barrier layers by the first insulating layer having the first group of openings formed in the second step. A third step of forming a film by sputtering and patterning mainly so as to constitute a ground wiring, and corresponding to the first group of openings on the first conductor layer patterned in the third step. A fourth step of forming a second insulating layer having a second group of openings, and a second barrier layer interposed between the second insulating layer having the second group of openings formed in the fourth step; A power supply layer is formed by sputtering, and a reverse resist pattern of a wiring corresponding to the second opening group is formed. Step 5, and performing electroplating on the reverse resist pattern of the wiring formed in the fifth step using the power supply film to form a conductor in the second group of openings and in the reverse resist pattern of the wiring. Embed the second
Forming a conductor layer, removing the reverse resist pattern of the wiring, and removing unnecessary portions of the power supply film to form a signal wiring mainly; and a sixth step of forming a signal wiring mainly in the sixth step. 2 conductor layer, and the second layer
A seventh step of forming a solder diffusion preventing pad group of the above, and an eighth step of covering with a protective film so as to expose the second solder diffusion preventing pad group formed in the seventh step. This is a method for manufacturing a wiring board characterized by the following. Further, the present invention is characterized in that, in the method of manufacturing a wiring board, the method further includes a step of mounting a plurality of electronic components on the second solder diffusion prevention pad group exposed in the eighth step via solder. Is a method for manufacturing a multi-chip module.

Further, the present invention provides the method of manufacturing a wiring board, further comprising: mounting a plurality of electronic components on the second solder diffusion prevention pad group exposed in the eighth step via solder; A step of coating the electronic component with a mold resin on a wiring board. Further, in the method for manufacturing a wiring substrate according to the present invention, the support substrate may be further separated from the solder diffusion preventing film formed in the first step, and the peeled solder diffusion preventing film may be patterned by the first method.
Forming a solder diffusion prevention pad group.

Further, the present invention provides the method of manufacturing a wiring board, further comprising: mounting a plurality of electronic components on the second solder diffusion prevention pad group exposed in the eighth step via solder. Removing the supporting substrate from the solder diffusion preventing film formed in the first step, and patterning the peeled solder diffusion preventing film to form a first solder diffusion preventing pad group. Is a method for manufacturing a multi-chip module. Further, according to the present invention, in the method for manufacturing a wiring substrate, the support substrate used in the first step is formed of a stainless steel substrate.

[0016]

Embodiments of the present invention will be described below with reference to the drawings. In all of the drawings, the same reference numerals indicate the same parts, and thus duplicate description may be omitted. In addition, the dimensional ratio of each part is changed from the actual one in order to facilitate the description.

First, an embodiment of a method of manufacturing a wiring board according to the present invention will be described with reference to FIGS.

The step shown in FIG. 1A will be described.
That is, FIG. 1A shows a SUS with an electric nickel plating.
A process of manufacturing the substrates 1 and 2 and forming the first insulating layer 3 on the SUS plates 1 and 2 will be described. The stainless substrate 1 is used as a substrate serving as a base for manufacturing the wiring substrate according to the present invention. The reason why the stainless steel substrate 1 is used is that the stainless steel substrate 1 is appropriately adhered to the electro-nickel plating film 2 and is easily peeled off appropriately. Next, an electric nickel plating film 2 is formed thereon. This electric nickel plating film 2
Is finally used as a terminal for connection to an external substrate (not shown) and as a solder diffusion preventing layer. As shown in FIG. 6, as the thickness increases, the warpage of the stainless steel substrate 1 tends to increase. Therefore, it is preferable that the thickness is as thin as about 15 μm or less. However, if the thickness is as thin as about 2 μm or less, the layer does not function as a solder diffusion preventing layer. It plays the role of a solder diffusion prevention layer, and
In the step shown in (a), the stainless steel substrate 1 is easily removed from the electro-nickel plating film 2 so as to be compatible with each other.
A minimum film thickness of the order is required.

Next, the insulating layer 3 is formed thereon using a photosensitive polyimide, and the portions other than the terminal portions are exposed to light using a mask or the like and cured to form the terminal portions 31 and 32. Is removed and opened. Regarding the opening method, in addition to the method using photosensitive polyimide, there is no problem if a method such as laser processing or dry etching is used by applying polyimide on the entire surface and using laser processing. Although polyimide is used as the material of the insulating layer 3, a resin such as epoxy may be used without any problem. In some cases, an inorganic insulating layer may be used.

As described above, SU with electric nickel plating
As shown in FIG. 1D, openings 31 and 32 for connecting a ground conductor layer 41 and a signal line (including a power line) conductor 42 to the electric nickel plating film 2 are formed on the S plates 1 and 2. This means that the formed first insulating layer 3 is formed.

Next, the step shown in FIG. 1B will be described. That is, FIG. 1B shows a step of forming a conductive film 4 by sputtering on the first insulating layer 3 in which the openings 31 and 32 are formed. That is, the conductor film 4 was formed on the insulating film 3 including the openings 31 and 32 by using sputtering. Here, vapor deposition, electroless copper plating, CVD, or the like can also be used, but sputtering is used because the adhesive strength to polyimide as a material of the insulating layer 3 is strong. As a pretreatment for the sputter, sputter etching was performed to ensure conduction between the conductors 41 and 42 with the electric nickel plating 2. The conductor film 4 serving as a sputter film mainly for forming a ground layer corresponding to a high-frequency signal, which is a feature of the present invention, is a chromium film (about 75 nm) / a copper film (1 to
It was formed of a multilayer film of about 3 micrometers) / chromium film (about 50 nanometers). The function of the chromium film (barrier layer) 4a here is to ensure adhesion between the copper film (conductor layer) 4b and the insulating layers 3 and 6 as wiring conductors located above and below the chromium film (barrier layer). The minimum required to maintain the adhesion is sufficient. The required film thickness also varies depending on sputter etching and sputtering conditions, chromium film quality, and the like. Note that, in place of the chromium film used as the barrier layer 4a in this embodiment, a titanium film, a titanium / platinum film, tungsten, or the like can be used instead.

Next, using the resist 5, a wiring pattern of the conductor film 4 in which a portion 51 to be etched is opened is formed. The resist 5 needs to have resistance to an etchant in the next etching step. As the chromium etching solution used here, an etching solution containing potassium permanganate and metasilicic acid as main components was used. However, since this etching solution is alkali (pH 13) and oxidizing, a resist having high chemical resistance is used. Is required. Here, a rubber-based or novolak-based resist containing a rubber component is preferable.

Next, the step shown in FIG. 1C will be described. That is, FIG. 1C shows an etching step for the conductor film 4 using the resist pattern as a mask. That is, by this etching step, the conductor film 4 is separated into a ground portion and a signal line (including a power supply line) portion. Note that the conductor film 4 is mainly used as a ground for high-frequency signals. As shown in FIG. 10, the conductor film 4 formed in the step shown in FIG. 1B is, for example, a chromium film (barrier layer) 4a, a copper film (conductor layer) 4b.
In a three-layer structure. Therefore, the etching is performed on the chromium film (barrier layer) 4a, the copper film (conductor layer) 4b,
It is necessary to perform the chromium film (barrier layer) 4a in this order. The etchant for the chromium film 4a includes a ferricyan type,
Although there are types such as a hydrochloric acid type, in this example, an etching solution containing potassium permanganate and metasilicic acid as main components was used.

There are various types of etching solutions for the copper film 4b, such as iron chloride and an alkaline etching solution. In this embodiment, an etching solution containing sulfuric acid / hydrogen peroxide as a main component was used. If the etching time is short, control becomes difficult and it is disadvantageous from a practical viewpoint.However, if the etching is performed for an excessively long time, a problem that side etching becomes large or tact becomes long occurs. It is better to determine the value by appropriate experiment. The subsequent etching of the chromium portion 4a was performed in the same manner as the etching of the chromium 4a.

Next, the step shown in FIG. 1D will be described. That is, FIG. 1D shows a step of removing the resist 5 used mainly for forming the wiring of the ground layer. There are various types of peeling of the resist 5 such as an organic alkali type and an organic solvent type. The first insulating layer 3 and the ground wiring 41 are separated.
It does not matter which stripping solution is used as long as it does not damage the signal wiring 42.

As described above, SU with electric nickel plating
On the first insulating layer 3 formed on the S substrates 1 and 2, it is possible to form the wirings 41 and 42 having a three-layer structure mainly as a ground layer for high-frequency signals by sputtering. As described above, since the conductor film 4 is mainly used as a ground layer, the thickness of the copper (conductor layer) 4a is not so required, and therefore, it is possible to sufficiently cope with the sputtering film formation.

Next, the step shown in FIG. 2A will be described. That is, in FIG. 2A, on the wirings 41 and 42,
As in the step shown in FIG. 1A, a second insulating layer 6 is formed using photosensitive polyimide,
1 and 62 are shown. Regarding the opening method, in addition to using photosensitive polyimide, there is no problem if a method such as laser processing or dry etching is used by applying polyimide to the entire surface and using laser processing or dry etching. Although polyimide is used as the material of the second insulating layer 6, a resin such as epoxy may be used without any problem. In some cases, an inorganic insulating layer may be used.

Next, the step shown in FIG. 2B will be described. That is, in FIG. 2B, a power supply film 7 for performing electroplating is formed on the entire surface, wiring patterns 81 and 82 are formed by a resist 8 thereon, and furthermore, wirings (electrocopper plating or the like) 9 are formed. , 10 and the like are shown. Here, as the power supply film 7 composed of the barrier layer / power supply layer, vapor deposition, electroless copper plating, CVD, or the like can be used. However, the adhesive strength with the polyimide as the material of the second insulating layer 6 can be used. Therefore, sputtering was used. As a pretreatment for the sputtering, sputter etching was performed to ensure electrical continuity between the wirings 41 and 42.

The power supply film 7 was formed of a multilayer film of a chromium film (about 75 nanometers) as a barrier layer / a copper film (about 0.5 micrometer) as a power supply layer. The function of the chromium film (barrier layer) is that the copper film (power supply layer)
In order to secure the adhesion with the insulating layer 6, the film thickness may be a minimum to maintain the adhesion. The required film thickness varies depending on sputter etching and sputtering conditions, chromium film quality, and the like. Note that a titanium film, a titanium / platinum film, tungsten, or the like can be used instead of the chromium film used as the barrier layer in this embodiment.

On the other hand, the thickness of the copper is preferably a minimum thickness that does not cause a film thickness distribution when the electro-copper plating films 9 and 10 and the electro-nickel plating films 11 and 12 are formed in a later step. The film thickness that does not induce the film thickness distribution is determined in consideration of the amount of film reduction caused by pickling or the like performed as a pretreatment for plating. When the thickness of the copper film is made unnecessarily large, for example, when the copper thickness exceeds 1 micrometer, in addition to the problem that the sputtering time becomes long and the production efficiency is reduced,
When the power supply film 7 is removed by etching in a later step, etching is unavoidable for a long time.
10 side etching becomes large.

Next, using photolithography technology, reverse patterns 81 and 82 of the wiring having openings only in the portions where the wirings 9 and 10 are to be formed are formed using the resist 8. The ground wiring 9 formed by embedding the electrolytic copper plating film is connected to a ground layer (ground wiring) 41 via a solder ball 101 to a ground electrode (not shown) provided on an electronic component 100 such as an LSI chip. An upright ground conductor 9a for connection and a ground bump 9b connected to the ground conductor 9a are formed. And
An electric nickel plating film 11 is formed on the ground bump 9b as a diffusion preventing film.

A signal wiring 10 including a power wiring formed by embedding an electrolytic copper plating film is connected to a signal line electrode (not shown) provided on an electronic component 100 such as an LSI chip via a solder ball 101. It is formed of an upright signal conductor portion 10a for connection with the signal conductor portion 42 and a high-density signal wiring portion 10b connected to the signal conductor portion 10a. And
A part of the high-density signal wiring portion 10b becomes a signal bump, and an electric nickel plating film 12 as a diffusion prevention film is formed thereon. As described above, one end (part) of the high-density signal wiring 10 may also be used as a bump pad for connecting to a solder ball 101 described later. In any case, it is necessary to connect the signal wiring 10 to the electric nickel plating film 2 and perform wiring at a high density.

By repeating the formation of the electrolytic copper plating film as necessary, the wirings 9 and 10 can be made to have a multilayer structure as shown in FIG. 7 so as to correspond to high-density wiring. FIG. 7 shows the signal wiring 10. In particular, in realizing high-density signal wiring, it is meaningful to have a multilayer structure.
Here, the signal wiring 19 of the second layer is shown, but it is also possible to form the signal wiring 19 in three or more layers.

In the case of a multi-layer wiring, the electro-nickel plating films 11 and 12 may be formed only on the outermost layer, that is, the wirings 9 and 10 which are in contact with the solder ball 101. An electric nickel plating film may be formed on three or more layers of individual wiring. In the embodiment shown in FIG. 7, the wiring on which the electric nickel plating film is formed is shown as a single layer.

After washing with a surfactant, washing with water, washing with dilute sulfuric acid, and washing with water, the power supply film 7 is connected to the cathode, the copper plate containing phosphorus is connected to the anode, and a sulfuric acid / copper sulfate plating solution is used. Then, copper is plated in the openings 61 and 62 and the wiring patterns 81 and 82 of the resist to embed (grow) the copper plating film, thereby forming the wirings 9 and 1.
0 is formed.

Next, the power supply film 5 is connected to the cathode, the nickel plate is connected to the anode, and at least a portion of the wiring on which the solder ball 101 is mounted is subjected to electric nickel plating to form an electric nickel plating film 11 serving as a solder diffusion preventing film. , 12 are formed. Note that, before forming the electric nickel plating films 11 and 12, if washing with a surfactant, washing with water, washing with dilute sulfuric acid, and washing with water are performed, an electric nickel plating film with good film quality may be obtained. By the way, a region where the wirings 9 and 10 are formed (particularly, a region where the signal wiring 10 runs) is
If the regions where the electric nickel plating films 11 and 12 as the solder diffusion preventing films are formed on the wirings 9 and 10 are different, the step of forming the resist film 8 needs to be repeated twice.

Although a method of forming a conductor using electroplating for both copper and nickel has been described, electroless plating can also be used. Further, the wirings 9 and 10 may include gold or silver in addition to copper, and the electric nickel plating films 11 and 12 as the solder diffusion preventing films are
It may be a nickel alloy.

Next, the step shown in FIG. 2C will be described. That is, the photoresist 8 having the wiring reverse patterns 81 and 82 is removed, and then the power supply film 5 for electroplating is removed by etching. Electrolytic copper plating film 9, 1
After the 0 and the electro-nickel plating films 11 and 12 are formed, the photoresist 8 having the wiring reverse patterns 81 and 82 is removed, and then the power supply film 7 formed in advance by etching is removed. For copper etching,
There are various types such as ferric chloride and an alkaline etching solution. In this embodiment, an etching solution containing sulfuric acid / hydrogen peroxide as a main component was used. If the etching time is not longer than 10 seconds, the control becomes difficult, which is disadvantageous from a practical viewpoint.
If the etching is performed for an excessively long time, problems such as an increase in side etching and an increase in tact time occur. Therefore, the etching solution and the etching conditions may be appropriately determined by experiments. Subsequent etching of the chromium portion of the power supply film 7 was performed in the same manner as in the step shown in FIG.

Next, the step shown in FIG. 2D will be described. That is, a cover coat (protective film) 13 is formed using photosensitive polyimide, and a portion to be a terminal is opened. Although the photosensitive polyimide is used for the opening method, there is no problem if a polyimide is applied to the entire surface and a method such as laser processing or dry etching is used. Here, photosensitive polyimide was used as the cover coat 13,
It is also possible to form the cover coat 13 using a material such as a solder resist or a polyimide for printing in addition to the photosensitive polyimide. And, although not specifically shown,
Utilizing this pattern, the outermost surfaces of the pads 11 and 12 were subjected to electroless Au plating to form Au plating for preventing oxidation.

Next, the step shown in FIG. 3A will be described. That is, the electronic component 100 such as an LSI chip is mounted on the substrate 15 formed in the steps shown in FIGS. The method for mounting the electronic component 100 is generally such that the solder ball 101 is formed on the electronic component side,
The solder ball 101 is mounted together with the flux on a bump pad (electrode pad) (not shown) of the electronic component 100 and heated to heat the solder ball 101 on the bump pad.
Connect. However, it is also possible to first form the solder ball 101 on the substrate 15 formed in the steps shown in FIGS. 1 and 2 and then connect the solder ball 101 to the bump pad of the electronic component 100.

That is, the bump pads 11 and 12 on the substrate 15
A predetermined amount of flux and a solder ball 101 connected to the electronic component 100 are mounted thereon. At this time, the solder balls 101 are temporarily fixed on the bump pads 11 and 12 of the substrate 15 by the adhesive force of the flux. Solder ball 10
The solder ball 101 is once melted by putting the substrate 15 or the electronic component 100 on which
After that, the electronic component 100 is solidified again on the bump pads 11 and 12 of the substrate 15 so that the solder balls 101
And mounted electrically.

Other than supplying the solder with the solder ball 101, for example, a method of forming a solder bump by printing and applying a solder paste on the electronic component 100 or the bump pad of the substrate 15 using a printing machine and reflowing the solder paste. There is also. In either method, various solder materials can be selected, and many of the solder materials currently available on the market can be used.
In addition, although the solder material is limited, there is also a method of forming a solder bump by using a plating technique. Alternatively, a bump using a ball having gold or copper as a nucleus or a bump formed using a resin containing a conductive material may be used.

As described above in the step shown in FIG. 2B, in this embodiment, the required film thickness of the electro-nickel plating films 11 and 12 is determined as the thickness of the diffusion layer formed by solder diffusion. The conditions for the solder diffusion vary depending on the type of solder and the reflow conditions. The reflow conditions at the time of mounting the solder balls were as follows: a reflow furnace of a belt type was used, and the reflow was performed at a maximum temperature of 245 ° C. and a temperature of 230 ° C. or more for 30 seconds. The used solder ball 101 has Sn and Cu as main components, and as a third component,
A Pb-free material to which Bi and Ag were added was used. In this case, assuming that the number of reflows is eight in consideration of the repair process, the minimum required thickness of the electro-nickel plating films 11 and 12 is 2 micrometers.

Next, the step shown in FIG. 3B will be described. That is, the substrate 15 formed in the process shown in FIGS. 1 and 2 and the electronic component 100 mounted in the process shown in FIG.
During this, an underfill 102 for reinforcement is injected. After the injection, heat curing is performed. Here, an underfill 102 made of an epoxy resin is used.
It was cured by heating for 0 minutes. When the parts are small, the underfill is not necessarily required.

Next, the step shown in FIG. 3C will be described. That is, after filling the underfill 102, the substrate 15 formed in the process shown in FIGS. 1 and 2 with the mold resin 103 and the electronic component 100 into which the underfill 102 was injected were coated and cured. This coating mold used a transfer molding method. As the mold resin 103, a mold resin made of an epoxy resin was used, and as a transfer mold, molding was performed at 200 ° C. for 3 minutes after injection, and then secondary curing was performed at 170 ° C. for 8 hours. As the molding method, transfer molding is used, but another molding method (for example, printing mold) may be used.

Next, the step shown in FIG. 4A will be described. That is, the stainless substrate 1 was peeled off from the state where the electronic component 100 was mounted on the substrate 15 and the electronic component 100 was covered and molded. Another advantage of the present invention is that the multi-chip module can be made thinner by removing the stainless steel substrate 1 as a support substrate.

For this purpose, it is necessary to prevent the stainless steel substrate 1 from being peeled off from the electroplated nickel film 2 in the steps shown in FIGS. 1 and 2. Thus, the stainless steel substrate 1, the electric nickel plating film 2, and the insulating layer 3 are arranged, the lower surface of the insulating layer 3 is adhered to the stainless steel substrate 1, and the insulating film 3 is formed so as to cover the electric nickel plating film 2. Is preferred. By doing so, the stainless substrate 1 is prevented from peeling off from the electro-nickel plating film 2 during the step shown in FIG. 1A to the step shown in FIG. 2D, thereby serving as a support substrate. It becomes possible. As shown in FIG. 8, the periphery of the stainless steel substrate 1 and the periphery of the insulating film 3 may be adhered to each other. As the insulating film 3, a step may be formed on the upper surface as shown by a solid line. The upper surface may be flat as shown by.

In any case, if the stainless steel substrate 1 can be prevented from peeling off from the electro-nickel plating film 2 during the process shown in FIG. 1A to the process shown in FIG. 3 need not be adhered.

Next, the step shown in FIG. 4B will be described. That is, a resist pattern 16 for etching the electric nickel plating film 2 using a resist is formed on the surface of the electric nickel plating film 2 from which the stainless steel substrate 1 has been peeled off.
Was formed.

Next, the step shown in FIG. 4C will be described. That is, the electric nickel plating film 2 on which the resist pattern 16 is formed is etched by using an etching solution containing ferric chloride as a main component to form the wiring 9,
Then, electric nickel plating pads 21 and 22 corresponding to No. 10 are formed. The ground pad 21 is connected to the upright ground conductor 9 a connected to the ground layer 41 laid on the first insulating film 3 and separated from the upright signal conductor 10 a, and is connected to the signal pad 22. Is connected to the upright signal conductor 10a connected to the signal wiring portion 10b wired on the second insulating layer 6.

The resist pattern 16 needs to have resistance to an etching solution for etching the electro-nickel plating film 2. The etching solution for the electro-nickel plating film 2 used in this step is a chloride solution. Since a liquid containing iron as a main component is used, it is not necessary to provide high etching resistance as in the resist used in the etching of chromium 4a in the step of FIG.

Next, the step shown in FIG. 5A will be described. In this step, the resist pattern 16 used for etching the electric nickel plating film 2 was removed.
There are various types of peeling of the resist pattern 16 such as an organic alkali type and an organic solvent type, and any type can be used as long as it does not damage the mold resin 103, the insulating layer 3, and the electric nickel plating pads 21 and 22. It does not matter if a stripper is used. And, although not specifically shown,
Electroless Au plating was performed on the outermost surfaces of the pads 21 and 22 to form an Au plating film for preventing oxidation.

In the substrate 15, the stainless steel substrate 1 as a support substrate is peeled off, and the pad 21 and 22 formed on the electroplated nickel film 2 is designated as 15a.

The ground pad 21 is connected to the upright ground conductor 9a connected to the ground layer 41, and the signal pad 22 is connected to the upright signal conductor 10a connected to the signal wiring section 10b. Will be. The position of the signal conductor 10a embedded in the first insulating layer 3 connected to the signal pad 22 and the position of the signal conductor 10a embedded in the second insulating layer 6 are slightly shifted from each other, and a gap between the signal conductor 10a and the ground layer is provided. May be connected. That is, if the signal conductor portion 10a embedded in the first insulating layer 3 connected to the signal pad 22 and the signal conductor portion 10a embedded in the second insulating layer 6 are adjacent to each other, the space between them is thin. Even if they are connected by the wiring of the ground layer made of a conductor, there is almost no problem in resistance.

Next, the step shown in FIG. 5B will be described. That is, solder balls 110 for connection to a printed board or the like are mounted on the nickel pads 21 and 22. This method will be described. The solder balls 110 are mounted on the nickel pads 21 and 22 together with the flux and heated to connect the solder balls 110. The solder balls 110 can be formed on the nickel pads 21 and 22 or on a mounting board such as a printed board. In this case, a predetermined amount of flux and solder balls 110 are mounted on the mounting substrate.

The solder balls 110 are temporarily fixed on the bump pads by the adhesive force of the flux. The mounting board on which the solder balls 110 are mounted or FIG.
By putting the solder balls 110 mounted on the pads 21 and 22 shown in (1) into a reflow furnace, the solder balls are once melted and then solidified again, so that the solder balls 110 are mounted. Become. In addition to supplying the solder by solder balls, there is a method of forming a solder bump by printing and applying a solder paste using a printing machine and reflowing the solder paste. In either method, various solder materials can be selected, and many of the solder materials currently available on the market can be used. In addition, although a solder material is limited, there is a method of forming a solder bump by using a plating technique. Alternatively, a bump using a ball having gold or copper as a nucleus or a bump formed using a resin containing a conductive material may be used.

As described above with reference to the step shown in FIG. 1A, in this embodiment, it is necessary to determine the required film thickness of the electro-nickel plating film 2 as the thickness of the diffusion layer formed by solder diffusion. The condition of the solder diffusion depends on the type of solder and the reflow condition. As for the reflow conditions at the time of mounting the solder balls 110, the reflow was performed using a belt-type reflow furnace at a maximum temperature of 245 ° C. and a temperature of 230 ° C. or more for 30 seconds. The solder balls 110 used were Pb-free with Sn and Cu as main components and Bi and Ag added as third components. In this case, assuming that the number of reflows is eight in consideration of the repair process, the required thickness of the electro-nickel plating film 2 was 2 micrometers as the minimum value.

Thus, as shown in FIG. 9, a multi-chip module that can be mounted on a mounting board such as a printed board is completed. In FIG. 9, the inside of the mold resin 103 is shown as being transparent. That is, the multi-chip module is a support substrate from a substrate 15 in which a large number of electronic components 100 such as an LSI chip are electrically connected and arranged by solder balls 101 and the like, and the surface of which is covered and molded with the molding resin 103. The stainless steel substrate 1 is peeled off, and the pad 2
1 and 22 are formed, and the solder balls 110 are mounted on these pads 21 and 22.

In particular, the first feature is that, by using the stainless steel substrate 1 as the support substrate, it is connected and mounted using a solder ball 110 or the like with a mounting substrate such as a printed substrate, as compared with the case where a glass substrate or the like is used. The reason is that the solder paste appropriately adheres to the electro-nickel plating film 2 as the solder diffusion preventing film that becomes the bumps 21 and 22 when the film is formed, and that the solder is easily peeled off appropriately.

The second feature is that a ground layer corresponding to a high-frequency signal is formed on the first insulating layer 3 by sputtering with a conductor film sandwiched between barrier layers. The power supply film 7 formed on the insulating film 6 is also formed by sputtering from a conductor film sandwiched between barrier layers. Further, using the feeding film 7, the upright ground conductor 9a, the ground bump 9b connected to the ground conductor 9a, the upright signal conductor 10a, and the signal wiring connected to the signal conductor 10a. The part 10b
It is to form a film by electrolytic copper plating. Further, a portion to be connected to the electronic component 100 using the solder ball 101 or the like is to form a solder diffusion preventing film.

[0061]

According to the present invention, a plurality of electronic components such as an LSI chip are mounted using solder, and a ground layer, a high-density wiring layer, and a wiring to which the solder is connected, which require different performances. There is an effect that a wiring substrate (module substrate) having a layer can be formed at low cost.

Further, according to the present invention, the substrate (here, a stainless steel substrate) serving as a support substrate is peeled off, so that L
A thin wiring board (module board) that mounts multiple electronic components such as SI chips using solder and has a ground layer, high-density wiring layer, and a wiring layer to which the solder is connected, which require different performance. This has the effect of making it possible to achieve

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a first example of a process of manufacturing a wiring board according to the present invention.
It is a figure which shows the 4th process.

FIG. 2 is a view showing a fifth step in the process of manufacturing a wiring board according to the present invention;
It is sectional drawing which shows the process of-8th.

FIG. 3 shows a ninth step of the process of manufacturing a wiring board according to the present invention;
It is sectional drawing which shows the process of-11th.

FIG. 4 is a diagram illustrating a first example of a process of manufacturing a wiring board according to the present invention;
It is sectional drawing which shows the 2nd-14th process.

FIG. 5 is a diagram showing a first example of the manufacturing process of the wiring board according to the present invention.
It is sectional drawing which shows the 5th-16th process.

FIG. 6 is a diagram showing the result of an experiment that determined the relationship between the thickness of the electro-nickel plating and the warpage of the substrate.

FIG. 7 is a partial cross-sectional view showing one embodiment of a multi-chip module in a case where signal wiring has two layers.

FIG. 8 is a cross-sectional view showing a state in which the periphery of an insulating layer is adhered to the periphery of a stainless steel substrate with an electric nickel plating film interposed therebetween.

FIG. 9 is a perspective view showing one embodiment of a multi-chip module using a substrate according to the present invention.

FIG. 10 is a cross-sectional view showing a structure of a ground layer formed on a first insulating layer in a substrate according to the present invention.

[Explanation of symbols]

1: Stainless steel substrate, 2: Electric nickel plating film, 2:
1, 22: nickel pad, 3: first insulating layer, 4: conductor film (for example, Cr / Cu / Cr film), 4a: chromium film (barrier layer), 4b: copper film (conductor layer), 41: ground Layers, 4
2 ... signal wiring, 5 ... resist, 6 ... second insulating layer, 7 ...
Power feeding film, 8: resist pattern, 9: ground wiring, 9
a: ground conductor, 9b: ground pad, 10 ...
Signal wiring, 10a: signal conductor portion, 10b: signal wiring portion,
11, 12: electric nickel plating film (nickel pad), 13: cover coat (protective film), 15: substrate, 1
9 ... second layer signal wiring, 20 ... third insulating layer, 21 ... pad (ground pad), 22 ... pad (signal pad), 61, 62 ... opening, 81, 82 ... wiring pattern,
Reference numeral 100 denotes an electronic component, 101 denotes a solder ball, 102 denotes an underfill, 103 denotes a mold resin, and 110 denotes a solder ball.

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 25/18 (72) Inventor Kinhide 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Hitachi, Ltd. Inside the Research Institute of Industrial Science (72) Inventor Shigeharu Tsunoda 292, Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside the Hitachi, Ltd. Inside Hitachi, Ltd. Production Technology Research Laboratory (72) Inventor Masafumi Okubo 292, Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside Hitachi, Ltd. Production Technology Laboratory Co., Ltd. Hitachi Maxell Co., Ltd. (72) Inventor Yuji Yamashita 1-88 Ushitora, Ibaraki-shi, Osaka Hitachi Maxell Inside (72) Inventor Ryuzo Fukao 1-1-88 Ushitora, Ibaraki-shi, Osaka Prefecture Within Hitachi Maxell Co., Ltd. (72) Inventor Yuichi Sukekawa 1-1-88 Ushitora, Ibaraki-shi, Osaka Hitachi Maxell Co., Ltd.

Claims (14)

[Claims] A first insulating layer having a first group of openings connected to each of a first group of solder diffusion preventing pads provided on a back surface; and a first insulating layer provided on a front surface side of the first insulating layer. A sputtered film mainly comprising a ground wiring connected to the first solder diffusion preventing pad through the first opening group.
A first conductor layer sandwiched between the first barrier layers; a first conductor layer provided on the surface side of the first insulating layer and the first barrier layer, each of the first group of openings and the first conductor layer A second insulating layer having a second group of openings connected through a second barrier layer made of a sputtered film on the surface side of the second insulating layer; A second conductor layer made of an electroplating film mainly constituting a signal wiring connected to the solder diffusion preventing pad through one opening group; and a second conductor layer provided on the uppermost layer and connected to the second conductor layer.
And a solder diffusion preventing pad group. 2. The wiring board according to claim 1, further comprising:
A wiring board, comprising: a protective film covering an uppermost layer so as to expose a second solder diffusion preventing pad group. 3. The method according to claim 1, wherein the first and second barrier layers are formed of a chromium film, a titanium film, a titanium / platinum film, a tungsten film, or an alloy film containing them. Wiring board. 4. The semiconductor device according to claim 1, wherein said first and second conductor layers are formed of a copper film or an alloy film containing copper.
Or the wiring board according to 2 or 3. 5. The wiring board according to claim 1, wherein the first and second solder diffusion preventing pad groups are formed of a nickel film or an alloy film containing nickel. 6. The second solder diffusion prevention pad group on the wiring board according to any one of claims 1 to 5, further comprising, for a plurality of electronic components, an electrode group of each electronic component.
A multi-chip module characterized by being mounted via solder. 7. The multi-chip module according to claim 6, further comprising a plurality of electronic components covered with a mold resin on the wiring board. 8. A multi-chip module mounting method according to claim 6, wherein the first solder diffusion prevention pad group of the wiring board in the multi-chip module according to claim 6 is mounted on a mounting board via solder. Structure. 9. A first step of forming a solder diffusion preventing film on a supporting substrate, and a first insulating film having a first group of openings on the solder diffusion preventing film formed in the first step. A second step of forming a layer, and a first conductor layer sandwiched between first barrier layers by a first insulating layer having a first group of openings formed in the second step, which is formed by sputtering. A third step of patterning mainly so as to constitute a ground wiring; and a second opening corresponding to the first opening group on the first conductor layer patterned in the third step. A fourth step of forming a second insulating layer having a group, and sputtering a power supply layer on the second insulating layer having a second opening group formed in the fourth step via a second barrier layer. A fifth step of forming a reverse resist pattern of wiring corresponding to the second opening group; The reverse resist pattern of the wiring formed in the fifth step is subjected to electroplating using the power supply film to form the second resist.
A conductor is buried in the group of openings and in the reverse resist pattern of the wiring to form a second conductor layer, the reverse resist pattern of the wiring is removed, and unnecessary portions of the power supply film are removed to mainly remove the signal wiring. A sixth step of forming, a seventh step of connecting to the second conductor layer formed in the sixth step, and forming a second solder diffusion prevention pad group on the uppermost layer; An eighth step of covering with a protective film such that the second solder diffusion preventing pad group formed in the seventh step is exposed. 10. The method of manufacturing a wiring board according to claim 9, further comprising the step of mounting a plurality of electronic components on the second solder diffusion prevention pad group exposed in the eighth step via solder. A method for manufacturing a multi-chip module, comprising: 11. The method for manufacturing a wiring board according to claim 9, further comprising: mounting a plurality of electronic components on the second solder diffusion prevention pad group exposed in the eighth step via solder. A step of coating the electronic component with a mold resin on a wiring board. 12. The method for manufacturing a wiring board according to claim 9, further comprising peeling the support substrate from the solder diffusion preventing film formed in the first step, and patterning the peeled solder diffusion preventing film. Forming a first solder diffusion prevention pad group by using the method. 13. The method for manufacturing a wiring board according to claim 9, further comprising: mounting a plurality of electronic components on the second solder diffusion prevention pad group exposed in the eighth step via solder. Removing the supporting substrate from the solder diffusion preventing film formed in the first step, and patterning the peeled solder diffusion preventing film to form a first solder diffusion preventing pad group. Of manufacturing a multi-chip module. 14. The method of manufacturing a wiring board according to claim 9, wherein the support substrate used in the first step is formed of a stainless steel substrate.