JP2002335230A - Method and device for decoding audio encoded signal - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an audio encoded signal decoder with which an acoustic signal bit stream encoded by an MPEG2-AAC system can be decoded and reproduced by simple arithmetic processing. SOLUTION: The audio encoded signal decoder is configured by using a synchronizing detecting means 13 for detecting a synchronizing code when starting decoding processing of a bit stream and when decoding operation is abnormal, an output control means 12 for supplying a bit stream signal when the synchronizing signal can be acquired by that synchronizing detecting means, a decoding means 14 for decoding the supplied bit stream signal and an output data interpolating means 15 for correcting decoded data by interrupting the decoding operation when abnormality occurs in the decoding operation of that decoding means.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the decoding of coded audio data, and more particularly to a coded audio signal capable of recording, transmitting or decoding an encoded audio signal with a simple configuration. The present invention relates to a signal decoding method and a speech coded signal decoding device.

[0002]

2. Description of the Related Art A technique for encoding a speech signal with high efficiency is an international standard, MPEG (moving picture experts group).
p) defines a number of international standards, which are based on the ISO / IEC (International Organization for Sta
ndardization / International Electrotechnical Comm
ission).

One of the international standards is MPEG2-A.
There is an AC (Advanced-Audio-Coding) standard, and a time-frequency conversion encoding method is used as an encoding method defined in this standard.

The adoption of the MPEG2-AAC system has been defined mainly for digital broadcasting in Japan. Currently, the MPEG2-AAC system is also used as an audio coding system for satellite digital broadcasting and also in a terrestrial digital broadcasting system started in 2003. Is being done.

[0005] Thus, in the digital broadcasting system to be started now and in the future, the digital video signal is MPEG-
According to the two systems, the digital audio signal is MPEG2-AAC
Broadcasting is performed according to the standard, and video and audio signals encoded using these encoding systems are viewed at home.

Conventionally, viewing of the encoded video and audio signals has generally been performed using a television receiver. However, recently, the data processing speed of a personal computer has been increased. It has become possible to decode broadcast waves received using a personal computer.

The video signal receiving apparatus using the personal computer has a built-in MPEG-2 video signal decoding unit substrate,
A video signal decoded by the substrate can be obtained,
The audio signal also has a built-in MPEG2-AAC decoder, and the audio signal is obtained by the decoder.

FIG. 6 shows a configuration of a decoder for decoding a general compression-coded audio signal. The coded audio signal decoder 30 in FIG.
1, error flag processing / CRC processing circuit 32, frame memory 33, audio decoder 35, control bit processing circuit 36, header error detection circuit 37, and D /
An A converter 38 is provided.

Next, the operation of the coded audio signal decoder 30 configured as described above will be described. First, the bit stream of the compressed and coded audio signal to be decoded is supplied to the synchronization detection and correction circuit 31, where the synchronization signal portion is detected from the supplied bit stream.

When an error signal is included in the sync signal header portion of the bit stream, the sync signal is not detected because the bit pattern of the sync signal has a different value from the sync signal.

However, in such a case, the synchronization signal should arrive after a predetermined time, for example, by counting the number of bits of the supplied bit stream. After the predetermined time, the signal of the synchronization signal pattern arrives. If not, the signal is corrected to a signal to which an error flag indicating that there is no synchronization signal is added.

The bit stream in which the synchronization signal is detected or corrected by adding an error flag or the like is supplied to an error flag processing / CRC processing circuit 32 where the bit stream of the added error flag portion is added. Signal processing for correction, etc., and CRC (Cyclic Redundancy Check) added to the bit stream
An error signal is detected using the code.

The bit stream in which the error signal is detected by the bit stream correction processing of the error flag portion and the CRC is supplied to a header error detection circuit 37, where the error signal is included in a part of the header signal. The header position is specified by detecting the signal of that part, and the corrected header signal which is the signal whose header position is specified is supplied to the error flag processing / CRC processing circuit 32 again.

Thus, error flag processing / CR
In the C processing circuit 32, the error signal portion included in the header signal portion is corrected, supplied to the frame memory 33 as a bit stream having a regular header signal, and temporarily stored therein.

The signal temporarily stored in the frame memory 33 is supplied to an audio decoder 35 as needed, where the signal is decoded. The decoded audio signals of a plurality of channels are supplied to a D / A converter 38.

The audio signals of a plurality of channels supplied to the D / A converter 38 are output to a listener from a speaker arranged at a predetermined position, and the channel information relating to the speaker position is included in a header signal. Has been inserted.

The information signal relating to the speaker arrangement and the like inserted into the header signal is generated based on the header information not including the error signal supplied from the header error detection circuit 37 to the control bit processing circuit 36.

In other words, among the header signals supplied to the control bit processing circuit 36, channel decode information such as channel arrangement information of an audio signal is obtained by a signal without a write inhibit flag based on a data error, and the obtained signal is obtained. The channel decode information is supplied to a D / A converter 38 via a header error detection circuit 37.

When an error signal is detected by the header error detection circuit 37 and a corrected header cannot be generated in the channel decoder information,
The mute signal information is supplied to the D / A converter 38,
The output audio signal supplied from the A converter is muted.

In this manner, the bit stream supplied to the coded audio signal decoding device 30 is decoded into a synchronizing signal. When the synchronizing signal contains an error signal, the synchronizing signal section is detected and the synchronizing signal is detected. The corrected signal is supplied to an audio decoder to decode the coded compressed audio signal, and when the synchronization signal cannot be decoded, the decoded output signal is muted to generate noise. Is to be suppressed.

[0021]

By the way, it is possible to incorporate such an MPEG2-AAC decoder and an MPEG-2 video signal decoding unit into a personal computer to watch digital broadcast signals. It is conceivable that a PC equipped with a PC will be commercialized as a PC compatible with digital broadcast reception. However, a PC in a normal product form will increase the speed and capacity of conventional PC functions rather than being used for digital broadcast reception. In many cases, it is used as a personal computer, and the current product form of the personal computer is expected to continue in the future.

The conventional personal computer does not have such a built-in decoding unit or decoder for receiving a digital broadcast, and generally employs a method in which such a card is built into the PC as an option. It is thought that there are many cases where the price of the personal computer itself is lowered to make the market more competitive.

In the case of a portable personal computer, there are few cases in which such a card is built in in order to reduce the size and weight, and these cards are, for example, PCMCIA (Personal
Computer Memory Card International Association)
This is not convenient for broadcast reception, for example, it is common to connect via a card socket.

Therefore, a built-in CPU (Central Processing Uniform) without connecting a card to a computer.
If it is possible to decode the received signal by adding a compressed audio decoding function to t), the personal computer realized in this way is a small and lightweight personal computer equipped with an audio decoder function, but has a digital broadcast receiving function. And is also preferable from the product form.

The decoding performance of the digital video and audio signals using the CPU may be inferior to that using a dedicated board and a decoder unit. For example, a small and lightweight digital broadcasting receiving software is installed. If it is possible to receive digital broadcast audio by using a personal computer at a destination, there is a great advantage as a personal computer.

In view of the above-mentioned conventional problems, the present invention performs simpler and more effective error processing especially on an input bit stream coded and supplied according to the MPEG2-AAC method, so that the original audio data can be processed. It is an object of the present invention to provide a method of decoding a coded audio signal and a configuration of a coded audio signal decoding device that can easily perform decoding and reproduction of a digital audio signal as close as possible by computer software.

[0027]

The present invention comprises the following means 1) and 2) to solve the above-mentioned problems. That is,

1) A bit stream signal in which a compression-encoded audio signal is arranged following a predetermined header signal is supplied, the header signal is detected from the bit stream signal, and the detected header signal is used as a basis. A first step (13) of generating a synchronization signal for decoding the bit stream signal supplied to the bit stream signal, and using the synchronization signal generated in the first step to convert the supplied bit stream signal to A second step (142) of decoding the audio signal to obtain the audio signal, monitoring the decoding operation of the audio signal, and generating an abnormal decoding signal when an abnormality is detected; When a signal is generated, a third step (15, 1) of restoring the audio signal obtained by decoding is performed.
6), wherein when the abnormal decoding signal is generated in the second step, the first to third steps are repeatedly performed.

2) A bit stream signal in which a compression-encoded audio signal is arranged is supplied following a predetermined header signal, and the header signal is detected from the bit stream signal. Synchronizing signal generating means (13) for generating a synchronizing signal for decoding the bit stream signal supplied to the decoder, and decoding the supplied bit stream signal based on the synchronizing signal generated by the synchronizing signal generating means And a decoding operation monitoring means (142) for monitoring the decoding operation of the bit stream and generating an abnormal decoding signal when an abnormality is detected in the decoding operation, and a decoding operation monitoring means for obtaining the audio signal. Audio signal restoration means for restoring an audio signal obtained by decoding when an abnormal decoding signal is generated (15, 16), wherein the synchronizing signal generating means is configured to regenerate the synchronizing signal when a decoding error signal is generated by the decoding operation monitoring means. Signal decoding device.

[0030]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of a method for decoding a speech coded signal and a speech coded signal decoding apparatus according to the present invention will be described below with reference to preferred embodiments. FIG. 1 shows the configuration of a speech coded signal decoding apparatus equipped with the speech coded signal decoding method, which will be described below with reference to the drawings.

The voice coded signal decoding device 10 shown in FIG.
Is a bit stream input terminal 11, an output control circuit 1
2. Sync detection circuit 13, AAC audio decoding circuit 1
4, output data interpolation circuit 15, changeover switch 16,
It comprises a D / A converter 17 and an audio signal output terminal 19.

Next, the operation of the speech coded signal decoding device 10 thus configured will be outlined. First, a bit stream of an audio signal that has been compression-encoded is supplied to the output control circuit 12 and the synchronization detection circuit 13 via the bit stream input terminal.

Then, the synchronization detection circuit 13 detects a header signal arranged in the bit stream, and when the synchronization detection circuit 13 enters a synchronization state, the synchronization state signal is supplied to the output control circuit 12.

In the output control circuit 12, the input bit stream signal supplied from the input terminal 11 after the supply of the synchronization state signal is supplied to the AAC audio decoding circuit 14, and the AAC audio decoding circuit 14 decodes the bit stream. Is started and the synchronization detection circuit 1
3 is supplied with a signal for stopping the operation of the synchronization detection.

As described above, the decoding of the bit stream is continued in the AAC audio decoding circuit 14, and the audio signal obtained by the decoding is supplied to the switch 16 via the switch 16.
The audio output signal supplied to the / A converter 17 and converted into an analog signal there is supplied to an audio signal output terminal 19.

The audio signal is supplied until the AAC audio decoding circuit 14 cannot decode a normal audio signal due to an error signal included in the bit stream. To be continued.

When the operation of the AAC audio decoding circuit 14 cannot be performed normally for some reason, the decoding operation is terminated and the AAC audio decoding circuit 14 cannot perform a normal decoding operation. An operation signal is generated, and based on the generated abnormal operation signal, restoration of an audio signal decoded by a method described later is performed.

After the setting for restoring the audio signal is completed, the decoding operation of the audio coded signal decoding device 10 is reset, that is, decoding is performed again based on the synchronization signal obtained by the synchronization signal obtaining operation. The decoding operation of the bit stream is continued such that the operation is restarted.

In this way, the speech coded signal decoding device 1
In the decoding of the bit stream performed by 0, the operation of detecting the synchronization signal is performed first, the operation of detecting the synchronization signal is terminated, the decoding of the bit stream is performed, and the bit stream with many errors is supplied. When the normal decoding operation cannot be performed, the bit stream decoding operation is terminated, and the error signal is restored based on the synchronization signal obtained by starting the bit stream synchronization operation again. Is completed, the bit stream decoding operation is performed while the synchronization, decoding, and restoration operations are sequentially performed.

Therefore, the speech coded signal decoding device 10
For example, when the decryption function is realized by a portable personal computer or the like, the operations of synchronization, decryption, and restoration are performed in order, so that the load on the CPU performing the operation is uniformly maintained. In particular, during a decoding operation, another interrupt operation is performed, for example, for synchronization supplementation, and the decoding operation is not performed normally on an error-free bit stream due to a shortage of operation time due to the interrupt operation. The likelihood that such a problem will occur is reduced, and a stable speech decoding operation is performed at least on a bit stream with a small error signal.

Next, the format of the coded bit stream supplied to the coded audio signal decoding device 10 for performing such operations of synchronization, decoding and restoration will be described.

The supplied bit stream is MPE
It is a bit stream generated based on the G2-AAC standard, and the signal format of the bit stream is Mai.
n, LC (Low Complexity), and SSR (Scalable S)
ampling Rate).

Then, the LC profile in the bit stream according to those profiles is BS (broadcas).
This is a profile adopted for a broadcasting system using a ting satellite (broadcasting satellite), and will be described below focusing on the LC profile.

FIG. 2 shows the structure of a bit stream based on the LC profile of MPEG2-AAC. In FIG. 1, a bit stream based on an MPEG2-AAC LC profile (hereinafter sometimes abbreviated as AAC) includes two parts, a header part for specifying a transfer format and an audio block for describing audio information.

In the header part, information such as a synchronization code and a frame length is described. Data of an audio block is transferred following the header part, and the audio block is composed of a plurality of data units called elements. Be composed.

That is, the data unit is, for example, when the audio channel configuration is 5.1 channel audio.
The channel signal is a left front signal L, a center signal C,
Right signal R, surround signal left SL, right S
R, and a bass signal LFE.

The transmission method of these signals is as follows. First, the channel information is a PCE (Program Config El
ement), C of the front center signal is then SCE (Single
Channel Element) mode, and L of the front left signal,
R of the right signal, SL on the left side of the surround signal, and SR on the right side are transmitted in the CPE (Channel Pair Element) mode, and LFE of the heavy bass signal is transmitted in the SCE mode.

If an empty space occurs in the audio block when these signals are transmitted, a bit padding signal FIL (FIL (FIL)
illElement) is inserted and transmitted, and at the end of the block, END (Term Elemen) indicating the end of the frame
t) is transmitted.

In this way, the transfer format header and the audio block data following the transfer format header are transmitted. The data in the transfer format header and the data of a predetermined portion of the audio block are subjected to error data error detection protection. CRC (Cyclic Redundancy Check)
The code is attached.

FIG. 3 shows a data portion to which the CRC code is added. In the figure, the part indicated by the arrow at the bottom of the figure indicates the part where data error detection is performed by the CRC code.

That is, the location where the error data is detected by the CRC code is set in the transfer format header 72.
Bit, all information of PCE for channel information, SC
E, the first 192 bits of the CPE and the 128-bit data from the head of the second and subsequent ICSs (Individual-Channel-Streams) in the CPE are to be protected.

In this manner, the bit stream having a high error sensitivity in the bit stream, that is, the bit stream in which noise is generated due to a decoding error or a data section having a large influence such as a decoding operation being broken is protected. Is supplied, and the decoding operation of the bit stream is performed.

Next, the decoding of the bit stream will be described using a PAD (Problem Analysis Diagram), and its operation will be described in order.
FIG. 4 shows the processing flow of the bit stream decoding operation as PA
D.

In the figure, the processing for the decoding operation is started from the Begin shown in the upper ellipse, and the signal processing shown in the square below it is performed in order downward.
A series of processes ends at End shown in the lower ellipse.

A rectangle whose right side is a double line is a post-judgment repetitive connection, and the processing shown on the right side of the rectangle is repeated until the condition shown in the rectangle becomes true. Is shown.

A pentagon in which the right side of the rectangular box is a “U” character indicates a two-branch selection. When the condition described in the pentagonal box is true, a box guided by a line from the upper side of the box Is executed, and when the condition in the pentagonal box is not true, the process guided by the lower line is executed.

The signal processing of the speech coded signal decoding apparatus 1 shown above is started from the Begin of p1 first, and then the synchronization detection circuit 13 performs the detection processing of the initial synchronization signal of p2. Then, when the initial synchronization signal is obtained, in the next p3, for example, the processing of p4 or less is performed until a decoding error signal is detected by the error signal detection processing of the signal to which the CRC error detection code is added.

At p4, the output control gate of the output control circuit 12 is opened, the bit stream signal supplied from the input terminal 11 is supplied to the AAC audio decoding circuit 14, and p6 unless an abnormal decoding operation is detected at p5. If the decoding synchronization state of the digital audio signal is checked and the decoding is successful, the decoded digital audio signal is supplied to a D / A converter 17 via a switch 16, where the D / A conversion of p7 is performed, and the signal is converted into an analog signal. The audio signal is supplied to an audio output terminal 19.

Then, for example, when an error signal is included in the supplied bit stream, the circuit operation timing of the AAC audio decoding circuit 14 becomes abnormal,
For example, when an error signal is continuously detected with a plurality of CRC error detection codes, the synchronization detection success of p6 is not true, and the EXIT L1 of p8 sets p9 to p9.
The operation of closing the output control gate is performed.

The operation of closing the output control gate of p9 is also performed when an abnormality is detected in the operation of the decoding circuit in the detection of abnormality of the decoding operation of p5. The output control gate circuit in the output control circuit 12 is closed, and the supply of the bit stream from the output control circuit 12 to the AAC audio decoding circuit 14 is stopped.

After the supply of the bit stream is stopped, the synchronization detection circuit 1 is instructed by the synchronization detection success of p10.
Reference numeral 3 denotes a circuit operation for supplementing the synchronization again, and when the synchronization detection operation is successful within a predetermined time, the decoding processing is not performed by the AAC audio decoding circuit 14 by the interpolation processing of p11, and the decoded signal containing the noise signal is included. Is interpolated.

The digital audio signal restored by the output data interpolation circuit 15 thus removing the noise signal and generating the interpolation signal for the decoded signal so that the signal portions from which the noise signal has been removed are connected. Is converted into an analog signal by the D / A converter 17 by p12.

As described above, when the synchronization signal is successfully detected at p10, the output control gate of p4 is opened after A / D conversion, and the decoded audio signal is supplied as an audio signal output. When the synchronization detection is not successful, the process is guided to the end of p14 by EXIT L2, and a series of decoding operations is completed.

The operation of the speech coded signal decoding apparatus 10 has been described above by the PAD technique. The operation is such that the respective operations of synchronization, decoding and restoration are performed in order. In the case of configuring a decoding device, for example, the bit stream decoding operation is normally performed without biasing the load on the CPU, and a stable decoded audio signal output is supplied.

The operation of the audio coded signal decoding device 10 has been outlined above, and the signal format of the MPEG2-AAC and the operation of the decoding device 10 have been described by PAD. It will be described further together with.

FIG. 5 shows the configuration of the speech coded signal decoding device. In the figure, circuit blocks having the same functions as those in FIG. 1 are denoted by the same reference numerals, and the configuration and operation of the circuit will be described.

The audio coded signal decoding apparatus 10a includes a bit stream input terminal 11, an output control circuit 12 including a gate circuit 121, a synchronization detection circuit 13, an AA
AAC including C decoding circuit 141 and decoding monitoring circuit 142
Audio decoding circuit 14 and output data interpolation circuit 15
, A changeover switch 16, a D / A converter 17, and an audio signal output terminal 19.

Next, the operation of the coded audio signal decoding apparatus 10a thus configured will be described. First, the MPE
G (moving picture experts group), for example, MPEG2-AAC (Advanced Audio Codin
g) The bit stream of the audio signal compressed and encoded by the standard is supplied to the gate circuit 121 of the output control circuit 12 and the synchronization detection circuit 13 via the bit stream input terminal 11.

The synchronization signal detection circuit 13 obtains a header portion of the bit stream from the supplied bit stream, and compares the obtained header portion with a synchronization bit pattern defined by the format, thereby obtaining a synchronization signal portion. Is detected.

Then, the position of the decoding start point of the input bit stream is provisionally determined first, and whether or not the provisionally determined decoding start point is the correct synchronization start point is determined by a plurality of synchronization bits. If the position is detected by the pattern matching and the tentatively determined position is correct, it is fixed as the determined position.

Further, upon determining the synchronous position, frame length information is detected from the positions of a plurality of supplied frame headers, an average frame length is detected from the plurality of frame length information, and a synchronous detection signal obtained by the detection is obtained. The synchronization detection signal and the obtained frame length information are supplied to the gate circuit 121 and the AAC decoding circuit 141.

In this way, the AAC decoding circuit 141 makes preparations for decoding the supplied bit stream, and the prepared AAC decoding circuit 141
The synchronization detection signal is supplied, the gate of the gate circuit 121 is opened, and the supply of the input bit stream signal to the AAC decoding circuit 141 is started.

In the AAC decoding circuit 141 to which the bit stream is supplied in this way, the decoding timing of the decoding circuit is determined based on the supplied synchronization signal setting condition, and the bit stream supplied in accordance with the determined decoding timing is determined. Is started.

The decoding is started in this way, and the audio signal obtained by the decoding is supplied to the terminal a of the switch 16. The decoding operation is monitored by the decoding monitor circuit 142, and the decoding is normally performed. At this time, an operation information signal indicating that the decoding operation is normal is supplied from the decoding monitoring circuit 142 to the synchronization detection circuit 13, and the synchronization detection circuit 13 supplied with the normal operation signal performs processing operations for detecting the synchronization signal. Is terminated.

The decoding operation in the AAC audio decoding circuit 14 is continued until the decoding operation of the audio signal is broken due to the error signal being continuously detected by the CRC in the supplied bit stream as described above. During the period in which the decoding operation is continued, the detection operation of the synchronization signal by the synchronization detection circuit 13 is stopped.

As described above, the decoding operation of the supplied bit stream is continued in the AAC audio decoding circuit 14, but when an error occurs during the decoding operation, the decoding monitoring circuit 142 causes the decoding circuit to operate abnormally. The operation is detected, and the detected abnormal signal is supplied to the gate circuit 121.

Output control circuit 1 supplied with the abnormal signal
In 2, the gate circuit for supplying the input bit stream signal to the AAC audio decoding circuit is closed, and in the synchronization detection circuit 13, the signal processing for detecting the synchronization signal is restarted because the supply of the normal signal is stopped. .

In the synchronization detection circuit 13 in which the synchronization signal detection operation has been resumed, the data amount of the bit stream supplied from the error occurrence position to the synchronization detection position in the input bit stream is counted in units of bytes. .

Then, AAC is added to the counted number of bytes.
The data of the number of bytes for correcting the decoded error signal is obtained by adding the number of bytes from the frame header having the error obtained by the decoding circuit 141 to the time of occurrence of the error, and obtaining the obtained data. The data of the number of bytes is supplied to the output data interpolation circuit 15.

In the output data interpolation circuit 15 to which the byte number data for the interpolation signal processing is supplied, the error frame length is estimated from this value and the above average frame length. The output interpolation circuit 15 generates an interpolation signal, which is used for interpolation from previous audio code data or interpolation processing such as mute, and supplies the signal to the terminal b of the switch 16.

In the operation of the switch 16, a switch control signal relating to the insertion time of the interpolation data calculated by the output data interpolation circuit is generated, and the switching operation of the switch 16 is performed based on the control signal.

The digital audio data obtained by switching in this manner is supplied to a D / A converter 17 and converted into an analog signal. The converted analog audio signal is supplied from an output terminal 19 as an analog audio signal. You.

The configuration and operation of the audio coded signal decoding device 10a have been described above. The operation of the audio coded signal decoding device 10a includes synchronization detection, bit stream decoding,
And signal processing relating to interpolation of output data is performed in series, and the configuration of the audio coded signal decoding device 10a is changed using, for example, a personal computer with a not so large CPU capability or using a portable small personal computer. Even if it is performed, the decoding operation of the bit stream can be performed.

That is, the audio coded signal decoding device 10a exemplified here detects the synchronization code from the bit stream supplied only when the decoding operation is abnormal at the start of the processing and when decoding the audio signal. Detection means, bit stream output control means for supplying a bit stream signal supplied based on the synchronization code detected by the synchronization detection means to an audio decoding circuit, and a state independent of the header signal of the supplied bit stream In I
Decoding is performed based on the coding standard defined by SO / IEC13818-7, and when the decoding operation is abnormal, the decoding operation of the audio signal is interrupted to perform synchronization detection for restoring the decoded data. Output data interpolating means for obtaining the data length of the signal to be interpolated based on the data length and generating interpolation data based on the data length, and a D / A for converting the digital signal generated by the decoding and interpolating means into an analog signal. Conversion means.

According to such a configuration, by performing the decoding processing while ignoring the header signal in the audio decoding processing, the detection processing of the synchronous code does not always need to be performed. Even if the decoding is performed, the bit stream can be decoded without being affected by the error signal.

Further, since signal processing such as storing a bit stream signal supplied in frame units and synchronization processing relating to frame length are not performed, even when an error signal is included in frame unit information, Since this information is ignored, normal decoding processing of the bit stream can be performed as long as no error signal is included in the audio block of the encoded bit stream.

In the above-described embodiment, the encoding method of the bit stream to be decoded has been mainly described with reference to MPEG2-AAC. However, the encoding method is not limited to MPEG-2 and may be, for example, MPEG-1 or MPEG-AAC. 4, MPEG
-7 or audio signal data encoded according to the MPEG-21 system or a predetermined portion of header information, and an audio signal encoded together with the predetermined header signal is supplied in the same manner as MPEG2-AAC. The present invention is also applicable when decoding a bit stream signal having such a data structure.

[0088]

According to the first aspect of the present invention, a synchronization signal for decoding a bit stream signal is detected by a header signal arranged in the bit stream, and after the detection of the synchronization signal, the synchronization signal is used. In order to perform the bit stream decoding process, sufficient calculation processing time is ensured for decoding the bit stream even when the synchronization signal is detected and the bit stream is decoded using the same CPU. Therefore, there is an effect that it is possible to provide a bit stream decoding method capable of stably performing a bit stream decoding operation.

According to the second aspect of the present invention, a synchronization signal for decoding a bit stream signal is detected by a header signal arranged in the bit stream, and after the detection of the synchronization signal, the synchronization signal is used. In order to perform the bit stream decoding process, sufficient calculation processing time is ensured for decoding the bit stream even when the synchronization signal is detected and the bit stream is decoded using the same CPU. Therefore, there is an effect that it is possible to provide a configuration of a bit stream decoding device that can stably perform a bit stream decoding operation.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a schematic block of a speech coded signal decoding apparatus according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating a configuration of a bit stream based on an MPEG2-AAC LC profile.

FIG. 3 shows a CR of a bit stream according to an embodiment of the present invention.
FIG. 3 is a diagram showing a data portion to which a C code is added.

FIG. 4 is a diagram showing, by PAD, a processing flow of a bit stream decoding operation according to the embodiment of the present invention.

FIG. 5 is a diagram illustrating a configuration of a speech coded signal decoding device according to an embodiment of the present invention.

FIG. 6 is a diagram illustrating a configuration of a decoder that decodes a general compression-encoded audio signal.

[Explanation of symbols]

 Reference Signs List 10, 10a audio encoded signal decoding device 11 bit stream input terminal 12 output control circuit 13 synchronization detection circuit 14 AAC audio decoding circuit 15 output data interpolation circuit 16 changeover switch 17 D / A converter 19 audio signal output terminal 30 encoded audio Signal decoder 31 Synchronization detection / correction circuit 32 Error flag processing / CRC processing circuit 33 Frame memory 35 Audio decoder 36 Control bit processing circuit 37 Header error detection circuit 38 D / A converter 121 Gate circuit 141 AAC decoding circuit 142 Decoding monitoring circuit

Claims (2)

[Claims] 1. A bit stream signal comprising a sequence of compression-encoded audio signals is supplied following a predetermined header signal. The header signal is detected from the bit stream signal, and the header signal is detected based on the detected header signal. A first step of generating a synchronization signal for decoding the bit stream signal supplied to the first step, and decoding the supplied bit stream signal using the synchronization signal generated in the first step. A second step of obtaining the audio signal, monitoring a decoding operation of the audio signal, and generating an abnormal decoding signal when an abnormality is detected; and generating an abnormal decoding signal by the second step. A third step of restoring the audio signal obtained by decoding, and decoding the abnormal signal by the second step. Decoding method for speech coding signal and performs repeating the third step from the first when but generated. 2. A method according to claim 1, further comprising the step of: supplying a bit stream signal in which a compression-encoded audio signal is arranged following the predetermined header signal; detecting the header signal from the bit stream signal; A synchronizing signal generating means for generating a synchronizing signal for decoding the bit stream signal supplied to, and decoding the supplied bit stream signal based on a synchronizing signal generated by the synchronizing signal generating means, A decoding operation monitoring unit that obtains an audio signal, monitors a decoding operation of the bit stream, and generates an abnormal decoding signal when an abnormality is detected in the decoding operation, and a decoding abnormal signal is generated by the decoding operation monitoring unit. And audio signal restoration means for restoring the audio signal obtained by decoding. Signal generating means speech coded signal decoding apparatus characterized by configured to perform re-generation of the synchronization signal when the decoded error signal is generated by the decoding operation monitoring means.