JP2002312087A - Bus systems, printed wiring boards and electronic devices - Google Patents

Abstract

(57) [Abstract] [PROBLEMS] To increase the wiring density of a bus system using crosstalk. A main line is connected to a stub line via a coupler (directional coupler). The main line 2 b and the stub line 22 are connected via a coupler 42. The main lines 1a and 2b and the stub lines 11 and 22 are
And are alternately arranged as shown in FIG. Further, the signal directions of the main line 1 and the main line 2 are set to be opposite to each other. The main lines 1a and 2b are both folded from the A layer to the B layer, but may be folded on the same layer.
Thus, the signal from the main line 1a propagates to the stub line 11, but does not propagate to the stub line 22. Noise propagating from the main line 1a to the stub line 22 is transmitted to the module 7
Since it propagates in the opposite direction to 2 and is absorbed by the terminating resistor,
It does not affect the adjacent bus slave module 72. [Effect] The wiring density of the bus system using the crosstalk can be increased, and the speed of the bus system can be increased.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bus system utilizing crosstalk, a printed circuit board provided with the bus system, and an electronic device.

[0002]

2. Description of the Related Art As a technique for transferring data between a plurality of modules mounted on a printed circuit board, a bus system used for data transfer in a computer system is known. In a bus system, a plurality of modules are connected to a common bus, and data is transferred between the modules in a time-division manner using the bus as a data transmission path. The bus includes an address signal line, a data signal line, a control signal line, and the like.

In a bus system, a module and a bus are connected to each other either directly or via a resistor, or each module is contactlessly connected to the bus using crosstalk. Forms and the like are known. Regarding the former form, SSTL (Stub SeriesTer) established by the Japan Electronic Machinery Association in 1996
The specification is also available at the following homepage address: mination logic (EIAJ-ED5512) http: // ww
w.jeita.or.jp/japanese/public/standard/device/dev_
01.htm). The latter form is disclosed in JP-A-2000-132290.

FIG. 9 is a diagram showing a configuration of a bus system using crosstalk and a cross section of a printed wiring board.

The signal output from the driver 911 causes crosstalk in the directional coupler (coupler) 910. In the signal due to the crosstalk, in one of the two parallel signal lines, the backward crosstalk that occurs in the direction opposite to the signal transmission direction in the other signal line, and in one of the two parallel signal lines, There is forward crosstalk that occurs in the same direction as the signal transmission direction on the other signal line.

In FIG. 9, a coupler 910 has a rear cross in a direction opposite to a transmission direction of a signal output from a driver 911 on a main signal line (hereinafter, “main line”) 901 constituting a parallel bus. Talk occurs. In the coupler 910, forward crosstalk occurs in the same direction as the transmission direction of the signal output from the driver 901 on the main line 901.

Therefore, in the configuration shown in FIG.
Rear crosstalk due to the signal output from the signal 11 is sent to the receiver 912 via a stub signal line (hereinafter, “stub line”) 902 that constitutes a bus and connects the module and the main line.

[0008] Forward crosstalk is absorbed by the terminating resistor 914. The signal from the driver 911 is absorbed by the terminating resistor 913 connected to the main line 901.

As shown in the sectional view of FIG. 1, the coupler 910 is configured such that a main line 901 and a stub line 902 are arranged side by side and substantially parallel. The main line 901 and the stub line 902 are sandwiched between power supply wiring layers 920. Such a configuration is called a strip line. If the coupler is formed of a stripline, theoretically, almost no forward crosstalk occurs.

FIG. 10 is a diagram showing a timing chart of signals in the coupler 910.

The signal waveform from the driver 911 is represented by d, and the crosstalk occurring on the stub line 902 is represented by
The signal going to 2 is b and the signal going to the terminating resistor 914 is f.

When a signal output from the driver 911 enters the coupler 910, a backward crosstalk b having a pulse width tw is generated.
Occurs. The pulse width tw is proportional to the length of the parallel wiring of the coupler 910. The signal f that causes forward crosstalk hardly occurs.

In a bus system using crosstalk, rearward crosstalk is mainly used.

FIG. 11 is a diagram showing a configuration of a bus system to which the prior art is applied.

The bus master module 70 includes a transmitting circuit (driver) 61 for exchanging signals with the bus and a receiving circuit (receiver) 62. Other data terminals, bus slave modules 71, etc.
And a receiver 62.

The bus system shown in FIG. 1 has two wiring layers (A
(B layer, B layer). In this drawing, the wiring arranged on the A layer of the printed wiring board is shown in the upper part, and the wiring arranged on the B layer is shown in the lower part.

The bus master module 70 is provided with two main lines 1a, 2a for constituting a bus system. The signal transmitted on the main lines 1a and 1b is called a signal D1, and the signal transmitted on the main lines 2a and 2b is called a signal D2.

The main line 1a connected to the bus master module 70 is provided in the A layer. Main line 1a
Are connected to the main line of the layer B by the folded line 91.
The main line of the layer B is referred to as a main line 1b to distinguish it from the main line 1a. The main line 1a and the main line 1b are the same one signal line. The main line 1b is connected to the terminating resistor 51
Connected to.

The bus slave modules 71 to 76 include:
Each is provided with a stub line. The bus slave modules 71 to 76 are connected in a non-contact manner by a coupler.

The stub line 11 and the main line 1a and the stub line 21 and the main line 1b are connected by couplers 31 and 41.

The coupler 31 connects the stub line 11 to the main line 1
It is configured by arranging in parallel with a. The wiring direction of the stub line 11 is arranged in the same direction as the main line 1a, that is, the direction of the signal from the module to the terminating resistor is the same. The coupler 41 is configured by arranging the stub line 21 in parallel with the main line 1b. Stub wire 2
The wiring direction of 1 is also arranged in the same direction as the main line 1b, that is, the direction of the signal from the module to the terminating resistor is the same.

The main line 2a connected to the bus master module 70 is also provided on the A layer similarly to the main line 1a. The main line 2a is connected to the main line of the layer B by a folded line 92. The main line of the layer B is referred to as a main line 2b to be distinguished from the main line 2a. The main line 2a and the main line 2b are one signal line. Main line 2b
Are connected to the terminating resistor 52.

The bus slave module 71 is connected to the main line 2a by the stub line 12. The bus slave module 72 is connected to the main line 2b by the stub line 22.
Connected to The stub line 12 and the main line 2a and the stub line 22 and the main line 2b are connected by couplers 32 and 42.

The coupler 32 connects the stub line 12 to the main line 1
It is constituted by arranging in parallel with a. The wiring direction of the stub line 12 is arranged in the same direction as the main line 2a, that is, the direction of the signal from the module to the terminating resistor is the same.

The main lines 2a and 2b are arranged in parallel with the main lines 1a and 1b. In addition, main line 1
The stub line 12 is disposed between the main line 1a and the main line 1b, and the stub line 22 is disposed between the main line 2a and the main line 2b. Regarding the places where other stub lines and main lines are wired in parallel, between the main lines 1a and 1b,
A stub line is arranged between the main line 2a and the main line 2b.

FIG. 12 is a diagram showing a wiring structure between the module 71 and the module 72. In the printed wiring board of this figure, the upper part shows the A layer of the wiring layer, and the lower part shows the B layer of the wiring layer. The printed wiring board includes a power supply wiring layer 201,
202 and 203 are provided. The main line and the stub line are sandwiched between the power supply wiring layers 201 to 203 to form a strip line.

The couplers 31 and 32 are formed in the A layer. The coupler 41 and the coupler 42 are configured in the B layer.

[0028]

In the prior art, the bus master module 70 to the bus slave module 71
The following problems occur when data is transferred to a server.

From the bus master module 70 to the main line 1
When a signal is output to “a”, backward crosstalk occurs not only in the stub line 11 constituting the coupler 31 but also in the adjacent stub line 12. The transmission direction of the signal output from the bus slave module 71 on the adjacent stub line 12 matches the transmission direction of the signal output from the bus master module 70 on the main line 1a.
The signal of the rear crosstalk occurring in 2 goes to the bus slave module 71. Therefore, the backward crosstalk generated in the stub line 12 propagates to the receiver provided in the bus slave module 71. This also occurs for the signal lines arranged in the B layer.

In the prior art, the following problem also occurs when data is transferred from the bus slave module 71 to the bus master module 70.

When a signal is output from the bus slave module 71 to the stub line 12, crosstalk occurs not only in the main line 2a constituting the coupler 32 but also in the adjacent main line 1a. Also in this case, the transmission direction of the signal output from the bus slave module 71 on the stub line 12 matches the transmission direction of the signal output from the bus master module 70 on the adjacent main line 1a. Therefore, the rear crosstalk generated on the main line 1a is caused by the receiver 6 provided in the bus master module 70.
Propagation to 2. This can also occur in a signal line arranged in the B layer.

When unnecessary crosstalk occurs in adjacent signal lines, the operation of the bus system is hindered, and further, a reduction in noise margin hinders an increase in the speed of the bus system. Therefore, in the prior art,
It is necessary to provide sufficient distance between the main line 1a and the stub line 12 and between the main line 1b and the stub line 22 to suppress noise from adjacent signals.

FIG. 13 is a diagram showing one configuration for reducing the above-mentioned problem, that is, the effect of noise due to adjacent signal lines. The configuration shown in FIG.
And the stub line 12 is replaced. FIG. 14 is a diagram showing a cross section of the printed wiring board shown in FIG. In the coupler 32 composed of the main line 2a and the stub line 12, the arrangement of the signal lines is reversed. As a result, the signal line 1 is connected between the main line 1a and the stub line 12.
Since a space for arranging books can be secured, the lines for transmitting the signals D1 and D2 can be arranged close to each other.

FIG. 15 is a diagram showing a simplified model of the configuration shown in FIGS. Signal lines 901, 90
2 and 903 are wired signal lines. Signal line 901
Represents the main line 1a, the signal line 902 corresponds to the main line 2a, and the signal line 903 corresponds to the stub line 12, respectively.

A driver 911 is provided at one end of the signal line 901, and a terminating resistor 913 is provided at the other end. At both ends of the signal lines 902 and 903, termination resistors 914, 915, 916, and 917 are provided.

FIG. 16 shows the observation point A in the configuration of FIG.
FIG. 3 is a diagram showing signal waveforms at 1, A4, B1, B4, C1, and C4. Backward crosstalk occurs at the observation point B1 of the signal line 902. This backward crosstalk is used for data transmission. Since this model is composed of strip lines, almost no forward crosstalk occurs at the observation point B4. On the other hand, in the signal line 903 which is separated by one wiring, the observation points C1 and C
4 has noise due to crosstalk. This corresponds to the main line 1a in the configuration of FIGS.
The crosstalk by the signal of FIG.

From this, even in the configuration of the main line and the stub line as shown in FIGS. 15 and 16, since noise is generated in the signal transmitted on the adjacent signal line, the adjacent signal line It was necessary to provide a sufficient distance from the camera.

An object of the present invention is to provide a bus system having a higher wiring density while suppressing noise in adjacent signal lines.

[0039]

In the present invention, in order to solve the above-mentioned problems, the main lines and the stub lines constituting the coupler are arranged alternately. Furthermore, the couplers are arranged such that the directions of the adjacent couplers are opposite to each other. Here, the direction of the coupler is defined as a direction in which a signal output from a driver such as a bus master module flows in the coupler. Therefore, that the directions of the couplers are opposite to each other indicates that the signal output from the driver flows in the opposite direction between the couplers.

Thus, even if a rear crosstalk occurs in a stub line adjacent to the main line due to a signal flowing through the main line, the rear crosstalk propagating through the stub line is absorbed by the terminating resistor and transmitted through the stub line. No noise is transmitted to the receiver that receives the signal.

As a result, it is not necessary to provide a large distance between adjacent signal lines, so that the wiring density can be increased. Further, since noise due to crosstalk is suppressed, a further noise margin can be secured, and as a result, the speed of the bus system can be increased.

[0042]

FIG. 1 is a diagram showing a configuration of a first embodiment of a bus system to which the present invention is applied.

This embodiment is an example of the configuration of a bus system that performs data transfer between one module serving as a bus master and six modules serving as bus slaves.

Reference numeral 70 denotes a bus master module. 7
1, 72, 73, 74, 75, and 76 are bus slave modules. The bus master module 70 is, for example, an integrated circuit such as a bus controller. On the other hand, the bus slave module 71 and the like are, for example, integrated circuits such as memory chips.

The bus master module 70 includes a driver 61 and a receiver 6 for exchanging signals with the bus.
2 Other data terminals of the bus master module 70, the bus slave module 71, and the like also include the driver 61 and the receiver 62. If the bus system is not completely bidirectional, either the driver 61 or the receiver 62 may be omitted.

The bus system of this embodiment is composed of a printed wiring board having two wiring layers (A layer and B layer). In FIG. 1, the signal lines arranged on the layer A of the printed wiring board are shown in the upper part, and the signal lines arranged on the layer B are shown in the lower part.

The bus master module 70 is connected to two main lines 1a, 2a. In this embodiment,
The bus has two signal lines. For example, in a bus system having a data width of 64 bits, 64 main lines are provided. Further, the main lines 1a and 2a may be signal lines for transmitting address signals and control signals in addition to data signals. In the present embodiment, a signal transmitted on the main lines 1a and 1b is referred to as a signal D1, and a signal transmitted on the main lines 2a and 2b is referred to as a signal D2.

Bus master module 70 of main line 1a
Is connected to the A layer. Main line 1
“a” is arranged in the A layer below the bus slave modules 71 to 76 and is connected to the main line in the B layer by a folded line 91. The main line of the layer B is referred to as a main line 1b to distinguish it from the main line 1a. The main line 1a and the main line 1b are the same one signal line. The main line 1 b is arranged in the B layer below the bus slave modules 71 to 76, and is connected to the terminating resistor 51.

The bus slave modules 71 to 76 include:
Each stub line is connected. The bus slave modules 71 to 76 are connected to the main line 1a in a non-contact manner by a coupler.
And so on.

The bus slave module 71 is connected to the main line 1a by the stub line 11. The bus slave module 72 is connected to the main line 1b by the stub line 21.
Connected to The stub line 11 and the main line 1a are connected by a coupler 31. The stub line 21 and the main line 1b are connected by a coupler 41.

The coupler 31 connects the stub line 11 to the main line 1
It is configured by arranging in parallel so as to be parallel to a. The stub line 11 corresponds to the driver 6 in the stub line 11.
1 (hereinafter, the signals output from the driver 61 of each module to the main line and the stub line are referred to as “driver signals”). The transmission direction of the signal is the same as the transmission direction of the driver signal of the main line 1a. They are arranged so that the same direction, that is, the direction of the signal from the driver 61 of each module to the terminating resistor is the same. This is to utilize backward crosstalk generated in the main line 1a or the stub line 11. Coupler 41
Is configured by arranging the stub lines 21 in parallel so as to be parallel to the main lines 1b. The stub line 21 is also arranged so that the transmission direction of the driver signal on the stub line 21 is the same as the transmission direction of the driver signal on the main line 1b, that is, the direction of the signal from the module to the terminating resistor is the same. .

Bus master module 70 for main line 2a
Is connected to the B layer. Main line 1
“a” is arranged in the B layer below the bus slave modules 71 to 76 and is connected to the main line in the A layer by the folded line 92. The main line of the layer A is referred to as a main line 2b to be distinguished from the main line 2a. Main line 2a and main line 2b
Are the same one signal line. The main line 2b is arranged in the A layer below the bus slave modules 71 to 76,
It is connected to the terminating resistor 52.

The bus slave module 71 is connected to the main line 2a by the stub line 12. The bus slave module 72 is connected to the main line 2b by the stub line 22.
Connected to The stub line 12 is connected to the main line 2a by a coupler 32. The stub wire 22 is a coupler 4
2 is connected to the main line 2b.

The coupler 32 connects the stub line 12 to the main line 1.
It is configured by arranging in parallel so as to be parallel to a. The stub line 12 is arranged such that the transmission direction of the driver signal on the stub line 12 is the same as the transmission direction of the driver signal on the main line 2a, that is, the direction of the signal from the module to the terminating resistor is the same. . This is to utilize backward crosstalk generated in the main line 2a or the stub line 12.

The difference between the arrangement of the main lines 1a and 2a is as follows.
The main line 1a is wired on the layer A starting from the bus master module 70 and connected to the main line 1b on the layer B, whereas the main line 2a is wired on the layer B starting from the bus master module 70 and the main line 2b on the layer A Is connected to

The driver signal output from the bus master module 70 is transmitted to the bus slave modules 71 and 73,
75, 76, 74, and 72 are propagated in this order. This is the same order for both the signal D1 and the signal D2.

The main line 2a is wired in parallel with the main line 1b. The main line 2b is arranged in parallel with the main line 1a. Further, a stub line 22 is arranged between the main line 1a and the main line 2b, and a stub line 12 is arranged between the main line 1b and the main line 2a. For other places where stub lines and main lines are wired side by side,
Stub lines are arranged between the main lines 1a and 2b and between the main lines 1b and 2a.

The case where data is transferred from the bus master module 70 to the bus slave module 71 will be described.

The main line 1 from the bus master module 70
When the driver signal is output to “a”, crosstalk occurs not only in the stub line 11 constituting the coupler 31 but also in the adjacent stub line 22.

However, the transmission direction of the driver signal on the stub line 22 is opposite to the transmission direction of the driver signal on the main line 1a.

Therefore, the backward crosstalk generated in the stub line 22 goes to the terminating resistor 522. Therefore,
The backward crosstalk does not propagate to the receiver 62 provided in the bus slave module 72, and the reverse termination resistor 52
2 and is absorbed by the terminating resistor 522.

Further, since the coupler 31 is constituted by a strip line, almost no forward crosstalk occurs. Therefore, noise from the main line 1a hardly occurs in the bus slave module 72 to which the stub line 22 is connected. That is, the signal D1 does not affect the signal D2 with respect to the adjacent signals D1 and D2.

A case where data is transferred from the bus slave module 72 to the bus master module 70 will be described.

When a driver signal is output from the bus slave module 72 to the stub line 22, crosstalk occurs not only in the main line 2b forming the coupler 42 but also in the adjacent main line 1a.

The transmission direction of the driver signal on the main line 1a is opposite to the transmission direction of the driver signal on the main line 2b. Therefore, the rear crosstalk generated on the main line 1b by the driver signal flowing on the stub line 22 goes to the bus master module 70,
The rear crosstalk generated in the main line 1a goes to the terminating resistor 51. Therefore, the backward crosstalk does not propagate to the receiver 62 provided in the bus master module 71 but is absorbed by the terminating resistor 51 in the opposite direction.

Further, since the coupler 42 is constituted by a strip line, almost no forward crosstalk occurs. That is, the noise from the stub line 22 hardly occurs in the bus master module 70 to which the main line 1a is connected.

That is, with respect to the adjacent signals D1 and D2, the signal D2 does not affect the signal D1.

Therefore, the adjacent signals D1 and D2
Will not affect each other.

The order of arrangement of the main lines and the stub lines may be switched between signal lines or within a coupler. For example, the arrangement order in the A layer may be the stub line 22, the main line 2b, the stub line 11, the main line 1a, or the main line 1a, the stub line 11, the main line 2b, and the stub line 22. Similarly, in the B layer, the stub line 12, the main line 2a, the stub line 21, and the main line 1b may be used, or the main line 1b, the stub line 21, the main line 2a, and the stub line 12 may be used. Regardless of the arrangement order, the effects of the present invention can be obtained.

When a signal line for transmitting a data signal different from the signals D1 and D2 is provided, the order of the main line and the stub line is the same as the order of the main line and the stub line for transmitting the signal D1 and the like. For example, when a signal line for transmitting the signal D3 and a signal line for transmitting the signal D4 are newly provided, the wiring configuration of each signal line is made the same as the signal line for transmitting the signals D1, D2, and the signals D1, D2, D3, D
4. Arrange them in the order of 4. Thereby, the signals D2 and D
Since the influence of crosstalk does not occur between the three, the effect of the present invention can be obtained.

In other words, the main lines having the same driver signal transmission direction need not be arranged side by side with the stub line interposed therebetween. Conversely, the main lines having different driver signal transmission directions may be arranged side by side with the stub line interposed therebetween. In the above example, the signals D1 and D3, and the signals D2 and D
4 have the same transmission direction, the signals D1 and D3 must not be adjacent to each other, and the signals D2 and D4 must not be adjacent to each other.

FIG. 2 shows modules 71 and 7
FIG. 4 is a diagram showing a cross section of the printed circuit board between the two. In this figure, the upper stage is the wiring layer A layer, and the lower stage is the wiring layer B layer.

In this drawing, the printed wiring board has power supply wiring layers 201, 202, and 203. The main line and the stub line are sandwiched by the power supply wiring layer 201 and the like to form a strip line.

A coupler 31 is constituted by the main line 1a and the stub line 11. The main line 2b and the stub line 22 constitute a coupler 42. The coupler 31 and the coupler 42 are configured in the A layer. A coupler 32 is constituted by the main line 1b and the stub line 21. The main line 2a and the stub line 21 constitute a coupler 41. The coupler 32 and the coupler 41 are configured in the B layer.

In the layer A, the main lines and the stub lines are alternately arranged in the order of the stub line 11, the main line 1a, the stub line 22, and the main line 2b. Also in the layer B, the stub lines 21, the main lines 1b, the stub lines 12, and the main lines 2a are arranged alternately in the order of the main lines and the stub lines.

The main line 1 a and the stub line 22 arranged on the layer A are arranged at the same interval as the couplers 31 and 42. Similarly, the main line 1b and the stub line 12 arranged in the layer B are arranged at the same interval as the coupler. In addition,
The interval between the main lines 1a and the stub lines 22 may be wider than the interval between the coupler wires. The arrangement interval between the main line 1a and the stub line 22 may be wider than the interconnection interval of the coupler.

In the main lines 1a and 2b, the transmission directions of the driver signals are opposite to each other. Further, since the stub lines are also arranged in accordance with the transmission direction of the driver signal of the main line, the transmission directions of the driver signals of the stub line 11 and the stub line 22 are also opposite to each other.

FIG. 3 is a diagram showing a side cross section of a memory bus system to which the present embodiment is applied.

The memory bus system includes the motherboard 30
0, memory modules 301, 302, 303, 30
4, 305 and 306. Motherboard 300
Both the memory module 301 and the like are formed of a printed wiring board.

The motherboard 300 has a bus master module 70. The bus master module 70 is, for example, a memory controller configured by a semiconductor integrated circuit. Memory modules 301, 302, 303, 3
Bus slave modules 71, 72, 73, 74, 75, and 76 are provided in 04, 305, and 306, respectively. The bus slave module is, for example, a semiconductor memory chip.

The memory modules 301, 302, 30
3, 304, 305, and 306 are sockets 311,
312, 313, 314, 315, and 316 are used to connect to the motherboard 300.

The main line, the stub line, and the coupler having the features described above are formed inside the motherboard 300. The terminating resistors 51, 511, 521 are installed on the back side (solder surface) of the motherboard. Socket 3
11, 312, 313, 314, 315, 316 and the bus master module 70 are installed on the surface (component side) of the motherboard. The socket 311, the bus master module 70, the terminating resistor 51, and the like may be mounted on either the back surface or the front surface of the motherboard 700.

The motherboard 300 includes the power supply wiring layer 20
1, 202, and 203. The signal lines are arranged on two layers (A between the power supply wiring layers 201 and 202).
Layer and B layer sandwiched between power supply wiring layers 202 and 203)
Is provided.

The main line 1a connected to the bus master module 70 is arranged on the A layer of the motherboard 300. The main line 1a arranged in the layer A is a folded line 811
Is connected to the main line 1b of the B layer. The return line 811 corresponds to the return line 91 in FIG. Although not shown in FIG. 3, the main line 2a is arranged on the B layer and the main line 2b is arranged on the A layer.

FIG. 4 is a diagram showing an example of the layout of the printed wiring board of the memory bus system as viewed from above in FIG. The upper part of the drawing shows the wiring layout of the A layer, and the lower part of the drawing shows the wiring layout of the B layer. Further, the positional relationship between the bus master module 70, the socket 311 and the socket 312 is shown transparently.

In the A layer, a main line 1a for transmitting the signal D1 is provided starting from the bus master module 70. The main line 1a includes sockets 311 and 312,
Sockets 313, 314, 315, 31 not shown
6 and is connected to the main line 1b of the B layer by a via hole 811. The main line 1b is wired so that the driver signal transmission direction is opposite to that of the main line 1a in the B layer, and is connected to the terminating resistor 51 via a via hole.

In the layer B, a main line 2a for transmitting the signal D2 starting from the bus master module 70 is arranged. Like the main line 1a, the main line 2a includes sockets 311, 312, and sockets 313, 3 (not shown).
14, 315, and 316, and are connected to the main line 2 b of the A layer by a via hole 812. The main line 2b is wired in the A layer so that the transmission of the driver signal is in the opposite direction to the main line 2a, and is connected to the terminating resistor 52 via the via hole.

In the layer A, the stub line 11 is arranged so as to be parallel to the main line 1a, and the coupler 31 is formed. One end of the stub wire 11 is connected to the socket 311, and the other end is connected to the terminating resistor 511. The other main line and stub line also constitute a coupler, and one end of the stub line is connected to a terminating resistor, and the other end is connected to a socket.

In the layer A, the stub line 22 and the main line 1a are close to each other. In the layer B, the stub wire 21
And the main line 1b are close to each other. However, the transmission directions of the driver signals of the main line 1a and the main line 2b are opposite. For this reason, no noise is generated due to crosstalk between adjacent signals even if the layout is performed in this manner for the reason described above.

By configuring the wiring in this way,
The memory bus system according to the present invention can be realized.

FIG. 17 shows a part of a wiring configuration when the wiring layout of the present invention is performed using a design support tool for designing a printed wiring board.

The main lines 1b and 2a are arranged on the substrate. Also, a stub line 12 is provided in parallel with each main line.
And 21 are arranged.

Reference numeral 991 denotes a via hole for connecting to a terminating resistor 511 provided on the main line substrate surface. Reference numeral 992 denotes a via hole for connecting to the terminating resistor 521 provided on the substrate surface. Although not indicated by reference numerals, signal lines having the same wiring configuration as the above-mentioned signal lines are arranged in a downward direction in FIG.

By adopting such a wiring layout,
The bus system according to the present invention can be realized.

According to the present embodiment, even if the bus lines for transmitting the data signals are brought close to each other, noise due to crosstalk can be suppressed. Therefore, in a bus system using crosstalk, the wiring density can be improved. This makes it possible to reduce the size of the bus system and increase the throughput by increasing the bus width. Further, since the crosstalk noise can be suppressed, the signal-to-noise ratio can be improved, and as a result, the speed of the bus system can be increased.

FIG. 5 is a diagram showing a second embodiment of the bus system to which the present invention is applied.

Reference numeral 70 denotes a bus master module. In the following, the components denoted by the same reference numerals as those in FIG. 1 indicate the same components. The difference between this embodiment and the first embodiment is that
This is how the main lines and stub lines are arranged. Hereinafter, only differences from the first embodiment will be described.

Bus master module 70 of main line 1a
Is connected to the A layer. Main line 1
a is disposed in the A layer below the bus slave modules 71 to 76, and is connected to the main line 1b in the same A layer by a folded line 821. The main line 1b is arranged in the lower layer A of the bus slave module,
Connected to.

Bus master module 70 of main line 2a
Are connected to the B layer. Main line 2
a is disposed in the B layer below the bus slave modules 71 to 76 and is connected to the main line 2b in the same B layer by a return line 822. The main line 2 b is arranged in the B layer below the bus slave modules 71 to 76 and is connected to the terminating resistor 52.

The difference between the main line 1a and the main line 2a is that the main line 1a is wired in the A layer starting from the bus master module 70 and is connected to the same main layer 1b in the A layer. Reference numeral 2a denotes a point where wiring is performed in the B layer starting from the bus master module 70 and connected to the main line 2b in the same B layer.

The main line 1a is arranged in parallel with the main line 1b. The main line 2a is arranged in parallel with the main line 2b. A stub line 21 is arranged between the main line 1a and the main line 1b. A stub line 22 is arranged between the main line 2a and the main line 2b. The places where the other stub lines and the main line are arranged side by side are also located between the main lines 1a and 1b and between the main line 2a and the main line 2b.
And a stub line is arranged between them.

FIG. 6 is a view showing a cross section of the printed circuit board between the module 71 and the module 72 in the second embodiment.

In the A layer, the stub line 11, the main line 1a,
The main line and the stub line are alternately arranged in the order of the stub line 21 and the main line 1b. In the B layer, the stub line 12,
The main lines and the stub lines are alternately arranged in the order of the main line 1a, the stub line 22, and the main line 2b.

The main line 1a and the stub line 21 arranged on the layer A are arranged at the same intervals as the couplers 31 and 41. The main line 2a and the stub line 22 arranged in the B layer are also arranged at the same interval as the coupler. The interval between the main line 1a and the stub line 21 may be wider than the interval between the couplers. Also, the main line 1a and the stub line 21
May be wider than the interval between couplers.

For main lines 1a and 1b, the transmission directions of the driver signals are opposite to each other. Further, since the stub lines are arranged according to the transmission direction of the driver signal of the main line, the arrangement of the stub lines 11 and 21 is also
The directions of the driver signals transmitted to each other are opposite.

A case where data is transferred from the bus master module 70 to the bus slave module 71 will be described.

Main line 1 from bus master module 70
When a signal is output to a, a backward crosstalk occurs not only on the stub line 11 constituting the coupler 31 but also on another stub line 21 to which the same signal D1 is transmitted. Stub wire 21
Are arranged such that the transmission direction of the driver signal is opposite to the stub line 11. Therefore, the direction of the backward crosstalk generated in the stub line 21 is the direction toward the terminating resistor 521. Therefore, the backward crosstalk is not propagated to the receiver provided in the bus slave module 72 but is absorbed by the terminating resistor 521.

Further, since the coupler 31 is constituted by a strip line, almost no forward crosstalk occurs. Therefore, the noise from the main line 1a hardly occurs in the bus slave module 72 to which the stub line 21 is connected.

A case where data is transferred from the bus slave module 72 to the bus master module 70 will be described.

When a signal is output from the bus slave module 72 to the stub line 21, backward crosstalk occurs in the adjacent main line 1a in addition to the main line 1b forming the coupler 41. The direction of the driver signal transmitted on the main line 1a is opposite to the direction of the driver signal transmitted on the main line 1b. Therefore, the direction of the rear crosstalk generated in the main line 1a is the direction toward the terminating resistor 51. Therefore, the backward crosstalk is not propagated to the receiver 62 provided in the bus master module 70, but is absorbed by the terminating resistor 51.

Further, since the coupler is constituted by a strip line, almost no forward crosstalk occurs.
Therefore, noise from the stub line 21 hardly occurs in the bus master module 70 to which the main line 1a is connected.

The order of arrangement of the main lines and the stub lines may be switched between signals or within a coupler. For example, the arrangement order in the A layer may be the main line 1a, the stub line 11, the main line 1b, and the stub line 21, or the stub line 21, the main line 1b, and the stub line 1
1. The main line 1a may be used. Similarly, in the B layer, the main line 2a, the stub line 12, the main line 2b, and the stub line 22 may be used.
b, the stub line 12, and the main line 2a. Regardless of the arrangement order, the effects of the present invention can be obtained.

When a signal line for transmitting a data signal is provided in addition to the signals D1 and D2, the configuration of the main line and the stub line is the same as that of the signal line for transmitting D1 and D2. For example, if a signal line for transmitting a signal D3 having the same wiring configuration as D1 is newly provided, D3 and D1 are arranged side by side. As a result, there is no effect of crosstalk between the signals D1 and D3, so that the effect of the present invention can be obtained.

That is, the signal lines arranged in the same layer may have the same wiring configuration.

In the present embodiment, the same effects as in the first embodiment can be obtained.

FIG. 7 is a side sectional view of a memory bus system to which the present embodiment is applied.

Hereinafter, portions different from FIG. 3 will be described.

On the layer A of the motherboard 300, a main line 1a connected to the bus master module 70 is arranged. The main line 1a arranged in the layer A is a folded line 821.
Is connected to the main line 1b of the same A layer. The return line 821 corresponds to the return line 811 in FIG.

Although not shown, the main lines 2a and 2b are arranged in the B layer.

FIG. 8 is a diagram showing a layout example of a printed wiring board according to the second embodiment. The upper figure is A
The figures in the lower layer and the lower row show the wiring layout of the B layer, respectively. The bus master module 70, the socket 31
1 and the positional relationship between the socket 312 are transparently shown. Hereinafter, points different from FIG. 4 will be described.

In the A layer, a main line 1a connected to the bus master module 70 is arranged. Main line 1a
Are arranged below sockets 311, 312 and sockets 313, 314, 315, 316, not shown,
The folded line 821 is connected to the main line 1b in the same A layer. The main line 1b is wired so that the direction of the driver signal transmitted from the main line 1a is reversed.
It is connected to the terminating resistor 51 via the via hole.

In the B layer, a main line 2a connected to the bus master module 70 is arranged. Main line 2a
Are sockets 311 and 312 in the same manner as the main line 1a.
And 313, 314, 315, 316 (not shown), and are connected to the main line 2b of the same B layer by a folded line 822. The main line 2b is the main line 2
It is wired so that the direction of the transmitted driver signal is opposite to that of a, and is connected to the terminating resistor 52 via the via hole.

In the layer A, the stub line 12 and the main line 1a are close to each other. In the layer B, the stub wire 21
And the main line 2b are close to each other. However, the directions of the driver signals transmitted on the main line 1a and the main line 1b are opposite. For this reason, no noise is generated due to backward crosstalk between adjacent signals even if the layout is performed in this manner for the reason described above.

Although the present embodiment has been described with two wiring layers, the number of wiring layers may be one or more.

By configuring the wiring in this way,
The memory bus system according to the present invention can be realized.

[0126]

According to the present invention, even when the data signals constituting the bus wiring are brought close to each other, noise due to crosstalk can be suppressed. Therefore, in a bus system using crosstalk, the wiring density can be improved. This makes it possible to reduce the size of the bus system and increase the throughput by increasing the bus width. Further, since the crosstalk noise can be suppressed, the signal-to-noise ratio can be improved, and as a result, the speed of the bus system can be increased.

[Brief description of the drawings]

FIG. 1 is a diagram showing a first embodiment of a bus system to which the present invention has been applied.

FIG. 2 is a cross-sectional view of the printed wiring board according to the first embodiment.

FIG. 3 is a side sectional view of the memory bus system according to the first embodiment.

FIG. 4 is a wiring layout of a printed wiring board according to the first embodiment.

FIG. 5 is a diagram showing a second embodiment of the bus system to which the present invention is applied.

FIG. 6 is a sectional view of a printed wiring board according to a second embodiment.

FIG. 7 is a side view of a memory bus system according to a second embodiment.

FIG. 8 is a wiring layout of a printed wiring board according to the second embodiment.

FIG. 9 is a diagram showing a conventional bus system using crosstalk.

FIG. 10 is a timing chart of a conventional bus system.

FIG. 11 is a diagram showing a configuration of a conventional technique.

FIG. 12 is a cross-sectional view of a conventional printed wiring board.

FIG. 13 is a diagram showing a configuration of a second conventional technique.

FIG. 14 is a sectional view of a second prior art printed wiring board.

FIG. 15 is a prior art simulation model.

FIG. 16 is a diagram showing operation waveforms in a simulation model according to the related art.

FIG. 17 is a diagram illustrating a wiring layout of a printed wiring board according to the first embodiment.

[Explanation of symbols]

1a, 1b, 2a, 2b, 901 ... main line, 11, 1
2, 21, 22, 902, 903 ... stub lines, 31, 3
2, 41, 42, 910 coupler, 51, 52, 51
1, 512, 521, 522, 913, 914, 91
5, 916, 917: Terminating resistor, 61, 911: Driver, 62, 912: Receiver, 70: Bus master module, 71, 72, 73, 74, 75, 76: Bus slave module, 201, 202, 203, 920 …
Power supply wiring layer, 300 motherboard, 301, 302,
303, 304, 305, 306 ... memory module,
311, 312... Sockets, 811, 812, 991,
992: via holes, 91, 92, 821, 822: folded lines.

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Susumu Hatano 5-20-1, Josuihoncho, Kodaira-shi, Tokyo F-term in Hitachi Semiconductor Group 5B046 AA08 BA06

Claims (11)

[Claims] 1. In a bus system having a bus including a plurality of signal lines including a first signal line and a second signal line connected to the first signal line, transmission is performed on the first signal line. The direction of the driver signal transmitted is different from the direction of the driver signal transmitted through the second signal line. 2. A bus system having a plurality of directional couplers including a first directional coupler and a second directional coupler, wherein the direction of the first directional coupler is the second directional coupler. A bus system, wherein the first and second directional couplers are arranged so as not to coincide with the direction of the directional coupler. 3. A bus system having a wiring layer and a directional coupler in which a main line and a stub line are wired side by side in the wiring layer, wherein the main line is looped back in the wiring layer, and is folded back in the wiring layer. A bus system, wherein the wired main line is wired next to the stub line. 4. A bus system having a directional coupler in which a main line and a stub line are wired side by side in a plurality of wiring layers. A second main line different from the main line is wrapped back to the second wiring layer, and is wrapped back to the first wiring layer from the second wiring layer, and in the first wiring layer, A bus system wherein a signal direction on a main line is different from a driver signal direction on the second main line. 5. A bus system comprising a wiring layer and a directional coupler in which a main line and a stub line are wired side by side in said wiring layer, wherein said main line and said main line in said wiring layer are different from said main line. Between the main line and the second main line where the driver signal is transmitted in the same direction,
A bus system comprising three signal lines. 6. The second directional coupler of the plurality of directional couplers, wherein the direction of the first directional coupler of the plurality of directional couplers is adjacent to the first directional coupler. A printed wiring board, wherein the first and second directional couplers are arranged so as not to coincide with the direction of the coupler. 7. A wiring layer, wherein a main line is folded back in the wiring layer, and a folded portion of the folded back main line is arranged side by side with the main line across a stub line. A printed wiring board characterized by being made. 8. A semiconductor device comprising a plurality of wiring layers, wherein a main line is routed from the first wiring layer of the plurality of wiring layers to a second wiring layer, and a second line different from the main line is provided. A main line is folded back from the second wiring layer to the first wiring layer, and a direction of a driver signal on the main line and a direction of a driver signal on the second main line in the first wiring layer. Wherein the printed wiring board is different. 9. An electronic device having a module and a printed wiring board to which the module is connected, wherein the printed wiring board has a wiring layer, and a main line connected to the module in the wiring layer is provided. An electronic device, wherein the main line is folded back and wired, and the folded back portion of the main line is wired side by side with the main line across a stub line. 10. An electronic device, comprising: a module; and a printed wiring board to which the module is connected, wherein the printed wiring board has a plurality of wiring layers, and the main line connected to the module has a plurality of main lines. The wiring is folded back from the first wiring layer of the wiring layers to the second wiring layer,
A second main line connected to the module different from the main line is routed back from the second wiring layer to the first wiring layer, and a driver for the main line is provided in the first wiring layer. An electronic device, wherein a direction of a signal is different from a direction of a driver signal on the second main line. 11. An electronic device, comprising: a plurality of modules; and a printed wiring board to which the plurality of modules are connected, wherein the printed wiring board is connected to a first module of the plurality of modules. A first directional coupler composed of a main line and a stub line connected to a second module of the plurality of modules, and a third module of the main line and the plurality of modules. A second directional coupler comprising a stub line to be connected to the first directional coupler, and the first directional coupler does not coincide with the direction of the second directional coupler. And the second directional coupler is disposed adjacent to the electronic device.