JP2002289998A - Circuit board and manufacturing method thereof - Google Patents
Circuit board and manufacturing method thereofInfo
- Publication number
- JP2002289998A JP2002289998A JP2001084199A JP2001084199A JP2002289998A JP 2002289998 A JP2002289998 A JP 2002289998A JP 2001084199 A JP2001084199 A JP 2001084199A JP 2001084199 A JP2001084199 A JP 2001084199A JP 2002289998 A JP2002289998 A JP 2002289998A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- metal
- wiring
- substrate
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 22
- 239000002184 metal Substances 0.000 claims abstract description 61
- 229910052751 metal Inorganic materials 0.000 claims abstract description 61
- 229920005989 resin Polymers 0.000 claims abstract description 17
- 239000011347 resin Substances 0.000 claims abstract description 17
- 239000000758 substrate Substances 0.000 claims description 48
- 239000000463 material Substances 0.000 claims description 32
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims description 19
- 150000002739 metals Chemical class 0.000 claims description 17
- 238000000034 method Methods 0.000 claims description 14
- 230000001681 protective effect Effects 0.000 claims description 13
- 239000000853 adhesive Substances 0.000 claims description 6
- 230000001070 adhesive effect Effects 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 6
- 238000007772 electroless plating Methods 0.000 claims description 5
- 239000003054 catalyst Substances 0.000 claims description 2
- 238000009413 insulation Methods 0.000 abstract 1
- 239000002585 base Substances 0.000 description 27
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 12
- 238000007747 plating Methods 0.000 description 8
- 229910052759 nickel Inorganic materials 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 244000126211 Hericium coralloides Species 0.000 description 1
- 239000003513 alkali Substances 0.000 description 1
- 230000003197 catalytic effect Effects 0.000 description 1
- 238000005238 degreasing Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は回路基板とその製造
方法に関するものである。The present invention relates to a circuit board and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】以下、図面を用いて従来技術の一例を説
明する。図１１は従来例の回路基板の構造を示す断面図
である。図１１に図示するように、基板８の上下面に接
続材料６を用いて電子部品７を接続するための配線４を
有し、上下面の配線４を導通させるためのスルーホール
９を有し、配線を保護するための保護膜５とを有する構
造となっている。2. Description of the Related Art An example of the prior art will be described below with reference to the drawings. FIG. 11 is a sectional view showing the structure of a conventional circuit board. As shown in FIG. 11, the upper and lower surfaces of the substrate 8 have wirings 4 for connecting the electronic components 7 using the connection material 6, and have through holes 9 for conducting the wirings 4 on the upper and lower surfaces. , And a protective film 5 for protecting the wiring.
【０００３】基板８は四角形で板厚が０．２mm程度のガ
ラスエポキシ樹脂からなり、その基板８には、複数のス
ルーホール９を切削ドリル加工によって設ける。スルー
ホール９の壁面を含む基板面を洗浄した後、基板８の全
表面には、無電解銅メッキ層を設け、その銅メッキ層は
スルーホール９の内部にまで形成されている。The substrate 8 is made of a glass epoxy resin having a rectangular shape and a thickness of about 0.2 mm. The substrate 8 is provided with a plurality of through holes 9 by cutting drilling. After cleaning the substrate surface including the wall surface of the through hole 9, an electroless copper plating layer is provided on the entire surface of the substrate 8, and the copper plating layer is formed up to the inside of the through hole 9.
【０００４】次に基板８の上下両面に、エッチングレジ
ストを露光現像し、エッチングを行うことで配線４のパ
ターンを形成し、その後エッチングレジストを除去す
る。このようにして基板上下両面には厚さ１８μｍ程度
の配線４が設けられる。Next, an etching resist is exposed and developed on both upper and lower surfaces of the substrate 8, and a pattern of the wiring 4 is formed by performing etching. Thereafter, the etching resist is removed. In this way, the wiring 4 having a thickness of about 18 μm is provided on both upper and lower surfaces of the substrate.
【０００５】さらに基板８の両面に保護膜５をラミネー
トし、露光現像を行うことにより保護膜５を設け、電子
部品７を実装する部分には保護膜５に開口部を設ける。
保護膜５の開口部で露出している配線４の表面に、ニッ
ケルメッキ層を設ける。そのニッケルメッキ層の表面
に、さらに金メッキ層を設けることもある。Further, the protective film 5 is laminated on both surfaces of the substrate 8 and exposed and developed to provide the protective film 5, and an opening is provided in the protective film 5 at a portion where the electronic component 7 is mounted.
A nickel plating layer is provided on the surface of the wiring 4 exposed at the opening of the protective film 5. A gold plating layer may be further provided on the surface of the nickel plating layer.
【０００６】その後、抵抗、ダイオード、トランジス
タ、ＩＣなどの電子部品７をハンダや導電接着剤などの
接続材料６を用いて、保護膜５の開口部で露出している
配線４と電気的接続を行う。Thereafter, the electronic components 7 such as resistors, diodes, transistors, and ICs are electrically connected to the wirings 4 exposed at the openings of the protective film 5 by using a connection material 6 such as solder or conductive adhesive. Do.
【０００７】[0007]
【発明が解決しようとする課題】従来の回路基板の構造
では、基板上下面に形成した配線と導通させるために、
スルーホールを設けており、そのスルーホールの面積が
回路基板を高密度化する上での障害となっている。従来
の技術では切削ドリル加工によってスルーホールを形成
しているためスルーホールの直径が最小で０．５mm程度
となってしまう。本発明の目的は、上記課題を解決し
て、スルーホールの面積に影響を受けない高密度回路基
板を提供することにある。In the structure of a conventional circuit board, in order to electrically connect with wiring formed on the upper and lower surfaces of the board,
A through hole is provided, and the area of the through hole is an obstacle in increasing the density of the circuit board. In the prior art, the through hole is formed by cutting drilling, so that the diameter of the through hole is at least about 0.5 mm. An object of the present invention is to solve the above problems and to provide a high-density circuit board that is not affected by the area of a through hole.
【０００８】[0008]
【課題を解決するための手段】上記の目的を達成するた
めに、本発明の回路基板の構造およびその製造方法は、
下記記載の構成と製造方法を採用する。In order to achieve the above object, a circuit board structure and a method of manufacturing the same according to the present invention are provided.
The following configuration and manufacturing method are adopted.
【０００９】本発明の回路基板の構成は、絶縁樹脂を介
して複数の金属を並べた母材基板を用意し、この母材基
板の片面上、あるいは両面上に、金属の端面に開口部を
有するように絶縁膜を設置し、開口部と開口部を電気的
に接続するように配線を備えていることを特徴とする。The circuit board according to the present invention has a structure in which a base material substrate in which a plurality of metals are arranged via an insulating resin is prepared, and an opening is formed on one or both sides of the base material substrate at an end surface of the metal. An insulating film is provided so as to have the wiring, and wiring is provided so as to electrically connect the openings.
【００１０】また、本発明の回路基板の製造方法は、台
座部上に複数の金属を並べて配置した基台基板を用意す
る工程と、金属と金属の間に絶縁樹脂を設置する工程
と、基台基板から台座部を除去して母材基板を形成する
工程と、母材基板における金属の端面に開口部を残して
絶縁膜を形成する工程と、開口部に配線となる金属膜を
形成する工程とを有することを特徴としている。The method of manufacturing a circuit board according to the present invention includes a step of preparing a base board having a plurality of metals arranged on a pedestal portion; a step of installing an insulating resin between the metals; Removing a pedestal portion from the base substrate to form a base material substrate, forming an insulating film while leaving an opening at an end surface of the metal in the base material substrate, and forming a metal film to be a wiring in the opening portion And a process.
【００１１】この基台基板を用意する工程では、金属ブ
ロックを用意し、台座部となる箇所を除いた位置に複数
の溝を形成することによって、台座部上に複数の金属を
並べて配置した基台基板を形成することを特徴としてい
る。あるいは、基台基板の形成は台座部となる板状の基
板に接着材料を介して複数の金属を貼り付け、台座部上
に複数の金属を並べて配置してもよい。In the step of preparing the base substrate, a metal block is prepared, and a plurality of grooves are formed at positions other than a portion serving as a pedestal portion, so that a plurality of metals are arranged and arranged on the pedestal portion. It is characterized in that a base substrate is formed. Alternatively, in forming the base substrate, a plurality of metals may be attached to a plate-shaped substrate serving as a pedestal via an adhesive material, and the plurality of metals may be arranged on the pedestal.
【００１２】金属の端面に開口部を残して絶縁膜を形成
する工程で用いた絶縁膜は、感光性樹脂を使用すること
を特徴としている。また、開口部に配線となる金属膜を
形成する工程では、絶縁膜上に触媒金属を吸着させ、無
電解メッキ液に浸漬して、配線となる金属膜を形成する
ことを特徴としている。The insulating film used in the step of forming the insulating film while leaving the opening on the end face of the metal is characterized by using a photosensitive resin. In the step of forming a metal film to be a wiring in the opening, a catalyst metal is adsorbed on an insulating film and immersed in an electroless plating solution to form a metal film to be a wiring.
【００１３】さらに、母材基板における金属の端面側の
全面に金属膜を形成した後、前記金属膜をエッチングし
て、配線を形成する工程を有することを特徴としてい
る。さらに配線上に保護膜を形成する工程を有すること
が好ましい。Further, the method is characterized in that a metal film is formed on the entire surface of the base material substrate on the end face side of the metal, and then the metal film is etched to form wiring. It is preferable that the method further includes a step of forming a protective film on the wiring.
【００１４】[0014]
【発明の実施の形態】図１に本発明の回路基板の断面図
を示す。図１に記載するように棒状の金属１が絶縁樹脂
２を介して規則的に配置した母材基板を有し、上下面の
配線４を導通させる部分のみを開口した絶縁膜３を備
え、さらに母材基板の上下面に形成した配線４によっ
て、棒状の金属を部分的に導通させることができる。こ
のようにスルーホールを用いずに、基板上面と基板下面
を微少な棒状の金属１により母材基板の上下面に形成し
た配線４で導通させることができる。さらに配線を保護
するための保護膜を有する構造となっている。FIG. 1 is a sectional view of a circuit board according to the present invention. As shown in FIG. 1, a bar-shaped metal 1 has a base material substrate regularly arranged with an insulating resin 2 interposed therebetween, and has an insulating film 3 having openings only at portions where the upper and lower wirings 4 are conducted. The bar-shaped metal can be partially conducted by the wirings 4 formed on the upper and lower surfaces of the base material substrate. As described above, without using the through holes, the upper surface and the lower surface of the substrate can be electrically connected by the wiring 4 formed on the upper and lower surfaces of the base material substrate by the fine rod-shaped metal 1. Further, the structure has a protective film for protecting the wiring.
【００１５】[0015]
【実施例】次に実施例における回路基板の製造方法を説
明する。図１から図１０は、実施例の回路基板の製造工
程を示す断面図である。Next, a method of manufacturing a circuit board according to an embodiment will be described. 1 to 10 are cross-sectional views illustrating the steps of manufacturing the circuit board of the embodiment.
【００１６】本実施例では直方体の金属ブロックをダイ
シングソーやワイヤーソーなどで、図２に示すように櫛
歯部分１０と台座部分１１とを備えるように加工し、さ
らに、最初に加工した溝に垂直に交わる方向にダイシン
グソーやワイヤーソーなどでさらに溝を形成する。この
ように溝を複数形成することによって、図４に示すよう
な、棒状の金属１が台座部分上に並んだ構造の基台基板
を形成する。棒状に加工した金属１の大きさは１００μ
ｍ□で高さが２００μｍ程度、隣接する棒状の金属１間
は１００μｍ程度とした。In this embodiment, a rectangular parallelepiped metal block is processed with a dicing saw or a wire saw so as to have a comb portion 10 and a pedestal portion 11 as shown in FIG. Further grooves are formed with a dicing saw or a wire saw in a direction intersecting vertically. By forming a plurality of grooves in this manner, a base substrate having a structure in which rod-shaped metals 1 are arranged on a pedestal portion as shown in FIG. 4 is formed. The size of metal 1 processed into a rod shape is 100μ
The height was about 200 μm in m □, and the distance between adjacent rod-shaped metals 1 was about 100 μm.
【００１７】この時、台座部分は金属１でなくてもよ
く、図３に示すように、ガラスやプラスチックなどの基
台基板１２にワックスや接着剤などの接着材料１３を用
いて棒状の金属を貼り付けて、形成してもよい。この時
使用する金属１は金、銅、ニッケルなどを用いることが
可能であるが、特に限定されない。本実施例では、加工
性が良好なニッケルを使用した。At this time, the pedestal portion does not need to be made of the metal 1, but as shown in FIG. It may be attached and formed. The metal 1 used at this time can be gold, copper, nickel or the like, but is not particularly limited. In this example, nickel having good workability was used.
【００１８】次に、図５に示すように絶縁樹脂２を棒状
の金属１の隙間に流し込み熱処理により硬化させる。本
実施例では絶縁樹脂に熱硬化型エポキシ樹脂を使用し
た。その後、不要な絶縁樹脂２と金属１の台座部分１１
を研削により除去し、図６に示すような構造の、絶縁樹
脂を介して複数の金属が配列している母材基板８を得
た。台座部分と櫛歯部分が同一金属ではなく、台座部と
なる板状の基板に金属を接着した基台基板の場合には、
溶剤等を用いて接着材料を除去し、台座部分を分離し、
金属と絶縁樹脂とからなる母材基板を形成する。Next, as shown in FIG. 5, the insulating resin 2 is poured into the gap between the rod-shaped metals 1 and hardened by heat treatment. In this embodiment, a thermosetting epoxy resin is used as the insulating resin. Then, the pedestal portion 11 of the unnecessary insulating resin 2 and metal 1
Was removed by grinding to obtain a base material substrate 8 having a structure as shown in FIG. 6 and having a plurality of metals arranged via an insulating resin. In the case of a base substrate in which the pedestal portion and the comb tooth portion are not the same metal, and the metal is bonded to a plate-shaped substrate serving as the pedestal portion,
Remove the adhesive material using a solvent etc., separate the pedestal part,
A base material substrate made of a metal and an insulating resin is formed.
【００１９】次に、図７に示すように母材基板８上に絶
縁膜３を形成する。最初に母材基板８の上下面に感光性
の樹脂を全面に塗布し、露光現像により開口部を設けた
絶縁膜を形成する。開口部は母材基板８の上下面を導通
させる金属１の端面である。Next, an insulating film 3 is formed on the base material substrate 8 as shown in FIG. First, a photosensitive resin is applied to the entire upper and lower surfaces of the base material substrate 8, and an insulating film having openings is formed by exposure and development. The opening is an end surface of the metal 1 that connects the upper and lower surfaces of the base material substrate 8.
【００２０】配線４の形成方法は、まず図７に示す絶縁
膜３を設けた母材基板８表面の全面に、無電解メッキが
可能となる触媒金属をセンシタイザー・アクチベータ
法、またはキャタリスト法により吸着させておく。その
後、無電解メッキ液に浸漬することで図８に示すように
絶縁膜３を設けた母材基板８全面に配線４となる金属膜
を形成することができる。無電解メッキを行う前後でア
ルカリ脱脂や流水洗浄などの洗浄工程を行うとより効果
的である。The method of forming the wiring 4 is as follows. First, a catalytic metal capable of electroless plating is applied to the entire surface of the base material substrate 8 provided with the insulating film 3 shown in FIG. To be adsorbed. Thereafter, by immersing the substrate in an electroless plating solution, a metal film to be the wiring 4 can be formed on the entire surface of the base material substrate 8 provided with the insulating film 3 as shown in FIG. It is more effective to perform a cleaning process such as alkali degreasing or running water cleaning before and after performing the electroless plating.
【００２１】その後、配線４となる金属膜上にエッチン
グレジストを露光現像し、配線４となる金属膜をエッチ
ングし、エッチングレジストを除去することで、図９に
示すような配線４のパターンを形成する。Thereafter, an etching resist is exposed and developed on the metal film to be the wiring 4, the metal film to be the wiring 4 is etched, and the etching resist is removed to form a pattern of the wiring 4 as shown in FIG. I do.
【００２２】図１０に示すように、配線４を保護するた
めに感光性樹脂を用いて、電子部品を実装する部分につ
いては露光現像により開口するようにし、保護膜５を形
成する。保護膜５の開口部で露出している配線４の表面
に、ニッケルメッキ層を設け、そのニッケルメッキ層の
表面に、金メッキ層を設けてもかまわない。As shown in FIG. 10, a protective film 5 is formed by using a photosensitive resin to protect the wiring 4 and opening the portion where the electronic component is to be mounted by exposure and development. A nickel plating layer may be provided on the surface of the wiring 4 exposed at the opening of the protective film 5, and a gold plating layer may be provided on the surface of the nickel plating layer.
【００２３】その後、図１に示すように、抵抗、ダイオ
ード、トランジスタ、ＩＣなどの電子部品７をハンダや
導電接着剤などの接続材料６を用いて、保護膜５の開口
部で露出している配線４と電気的接続を行う。Thereafter, as shown in FIG. 1, electronic components 7 such as resistors, diodes, transistors, and ICs are exposed at the openings of the protective film 5 using a connection material 6 such as solder or conductive adhesive. Electrical connection with the wiring 4 is performed.
【００２４】上記記載の方法により回路基板を形成する
ことで、従来技術で使用していたスルーホール９を形成
することなく、微少な面積で母材基板８の上下面に形成
した配線４同士を導通させることができ、回路基板の高
密度化が可能となった。By forming the circuit board by the above-described method, the wires 4 formed on the upper and lower surfaces of the base material substrate 8 with a small area can be formed without forming the through holes 9 used in the prior art. The conduction can be achieved, and the density of the circuit board can be increased.
【００２５】[0025]
【発明の効果】以上の説明で明らかなように、本発明で
は、棒状の金属が絶縁樹脂を介して規則的に配置した母
材基板を用いており、母材基板の上下面に形成した配線
を微少な棒状の金属により導通させているので、スルー
ホールを用いた場合より回路基板の高密度化が可能とな
り、回路基板の面積を小さくすることができる。As is apparent from the above description, in the present invention, the base material substrate in which rod-shaped metals are regularly arranged via the insulating resin is used, and the wiring formed on the upper and lower surfaces of the base material substrate is used. Is made conductive by a fine rod-shaped metal, so that the density of the circuit board can be increased and the area of the circuit board can be reduced as compared with the case where through holes are used.
【図１】本発明の実施例における回路基板を示す断面図
である。FIG. 1 is a sectional view showing a circuit board according to an embodiment of the present invention.
【図２】本発明の実施例における回路基板の製造方法を
示す断面図である。FIG. 2 is a cross-sectional view illustrating a method of manufacturing a circuit board according to an embodiment of the present invention.
【図３】本発明の実施例における回路基板の製造方法を
示す断面図である。FIG. 3 is a cross-sectional view illustrating a method of manufacturing a circuit board according to an embodiment of the present invention.
【図４】本発明の実施例における回路基板の製造方法を
示す斜視図である。FIG. 4 is a perspective view illustrating a method for manufacturing a circuit board according to an embodiment of the present invention.
【図５】本発明の実施例における回路基板の製造方法を
示す断面図である。FIG. 5 is a cross-sectional view illustrating a method of manufacturing a circuit board according to an embodiment of the present invention.
【図６】本発明の実施例における回路基板の製造方法を
示す断面図である。FIG. 6 is a sectional view illustrating a method of manufacturing a circuit board according to an embodiment of the present invention.
【図７】本発明の実施例における回路基板の製造方法を
示す断面図である。FIG. 7 is a cross-sectional view illustrating a method of manufacturing a circuit board according to an embodiment of the present invention.
【図８】本発明の実施例における回路基板の製造方法を
示す断面図である。FIG. 8 is a cross-sectional view illustrating a method of manufacturing a circuit board according to an embodiment of the present invention.
【図９】本発明の実施例における回路基板の製造方法を
示す断面図である。FIG. 9 is a cross-sectional view illustrating a method for manufacturing a circuit board according to an embodiment of the present invention.
【図１０】本発明の実施例における回路基板の製造方法
を示す断面図である。FIG. 10 is a sectional view illustrating the method of manufacturing the circuit board according to the embodiment of the present invention.
【図１１】従来例における回路基板の構造を示す断面図
である。FIG. 11 is a cross-sectional view showing a structure of a circuit board in a conventional example.
１ 金属 ２ 絶縁樹脂 ３ 絶縁膜 ４ 配線 ５ 保護膜 ６ 接続材料 ７ 電子部品 ８ 母材基板 ９ スルーホール １０ 櫛歯部 １１ 台座部 １２ 基台基板 １３ 接着材料 DESCRIPTION OF SYMBOLS 1 Metal 2 Insulating resin 3 Insulating film 4 Wiring 5 Protective film 6 Connection material 7 Electronic component 8 Base material substrate 9 Through hole 10 Comb part 11 Base part 12 Base substrate 13 Adhesive material
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ テーマコート゛(参考） Ｈ０５Ｋ 3/40 Ｈ０１Ｌ 23/12 Ｎ 3/42 ６２０ 23/52 Ｂ ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification symbol FI Theme coat ゛ (Reference) H05K 3/40 H01L 23/12 N 3/42 620 23/52 B
Claims (8)
母材基板を備え、前記母材基板の片面上、あるいは両面
上には、前記金属の端面に開口部を有する絶縁膜を備
え、前記開口部には配線を備えていることを特徴とする
回路基板。1. A base material substrate in which a plurality of metals are arranged via an insulating resin, and an insulating film having an opening at an end surface of the metal is provided on one side or both sides of the base material substrate, A circuit board, wherein the opening is provided with wiring.
基台基板を用意する工程と、前記複数の金属間に絶縁樹
脂を設置する工程と、前記基台基板から台座部を除去
し、母材基板を形成する工程と、母材基板における金属
の端面に開口部を残して絶縁膜を形成する工程と、開口
部に配線となる金属膜を形成する工程とを有する回路基
板の製造方法。2. A step of preparing a base substrate having a plurality of metals arranged side by side on a pedestal portion, a step of installing an insulating resin between the plurality of metals, removing the pedestal portion from the base substrate, A method of manufacturing a circuit board, comprising: a step of forming a base material substrate; a step of forming an insulating film while leaving an opening at a metal end surface in the base material substrate; and a step of forming a metal film serving as a wiring in the opening. .
ブロックを用意し、台座部となる箇所を除いた位置に複
数の溝を形成することによって、台座部上に複数の金属
を並べて配置した基台基板を形成することを特徴とする
請求項２に記載の回路基板の製造方法。3. In the step of preparing the base substrate, a metal block is prepared, and a plurality of grooves are formed at positions other than a portion serving as a pedestal portion, so that a plurality of metals are arranged side by side on the pedestal portion. The method for manufacturing a circuit board according to claim 2, wherein the base board is formed.
部上に接着材料を介して複数の金属を貼り付け、台座部
上に複数の金属を並べて配置した金属基板を形成するこ
とを特徴とする請求項２に記載の回路基板の製造方法。4. In the step of preparing the base substrate, a plurality of metals are attached to the pedestal via an adhesive material, and a metal substrate in which the plurality of metals are arranged and arranged on the pedestal is formed. The method for manufacturing a circuit board according to claim 2.
部を残して絶縁膜を形成する工程で用いた絶縁膜は、感
光性樹脂であることを特徴とする請求項２に記載の回路
基板の製造方法。5. The circuit board according to claim 2, wherein the insulating film used in the step of forming the insulating film while leaving an opening at the end face of the metal in the base material substrate is a photosensitive resin. Manufacturing method.
る工程では、絶縁膜上に触媒金属を吸着させ、無電解メ
ッキ液に浸漬して、配線となる金属膜を形成することを
行う請求項２に記載の回路基板の製造方法。6. In the step of forming a metal film to be a wiring in the opening, a catalyst metal is adsorbed on an insulating film and immersed in an electroless plating solution to form a metal film to be a wiring. A method for manufacturing a circuit board according to claim 2.
る工程では、金属の端面側の全面に金属膜を形成した
後、前記金属膜をエッチングして、配線を形成する工程
を有することを特徴とする請求項２に記載の回路基板の
製造方法。7. The step of forming a metal film serving as a wiring in the opening includes a step of forming a metal film on the entire end face side of the metal and then etching the metal film to form a wiring. 3. The method for manufacturing a circuit board according to claim 2, wherein:
することを特徴とする請求項２に記載の回路基板の製造
方法。8. The method according to claim 2, further comprising a step of forming a protective film on the wiring.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001084199A JP2002289998A (en) | 2001-03-23 | 2001-03-23 | Circuit board and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001084199A JP2002289998A (en) | 2001-03-23 | 2001-03-23 | Circuit board and manufacturing method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2002289998A true JP2002289998A (en) | 2002-10-04 |
Family
ID=18939904
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001084199A Pending JP2002289998A (en) | 2001-03-23 | 2001-03-23 | Circuit board and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2002289998A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007294863A (en) * | 2006-03-31 | 2007-11-08 | Sanyo Electric Co Ltd | Circuit apparatus |
| JP2009289964A (en) * | 2008-05-29 | 2009-12-10 | Aoi Electronics Co Ltd | Through wiring board, multilayer through wiring board, method of manufacturing through wiring board, and method of manufacturing multilayer through wiring board |
| WO2012133380A1 (en) * | 2011-03-28 | 2012-10-04 | 株式会社村田製作所 | Circuit board, and method for manufacturing circuit board |
| JP2014179411A (en) * | 2013-03-14 | 2014-09-25 | Shinko Electric Ind Co Ltd | Wiring board and method of manufacturing the same |
| JP2020092152A (en) * | 2018-12-04 | 2020-06-11 | 板橋精機株式会社 | Printed circuit board and manufacturing method thereof |
-
2001
- 2001-03-23 JP JP2001084199A patent/JP2002289998A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007294863A (en) * | 2006-03-31 | 2007-11-08 | Sanyo Electric Co Ltd | Circuit apparatus |
| JP2009289964A (en) * | 2008-05-29 | 2009-12-10 | Aoi Electronics Co Ltd | Through wiring board, multilayer through wiring board, method of manufacturing through wiring board, and method of manufacturing multilayer through wiring board |
| WO2012133380A1 (en) * | 2011-03-28 | 2012-10-04 | 株式会社村田製作所 | Circuit board, and method for manufacturing circuit board |
| JP2014135502A (en) * | 2011-03-28 | 2014-07-24 | Murata Mfg Co Ltd | Circuit board manufacturing method and circuit board |
| JPWO2012133380A1 (en) * | 2011-03-28 | 2014-07-28 | 株式会社村田製作所 | Circuit board and circuit board manufacturing method |
| JP2014179411A (en) * | 2013-03-14 | 2014-09-25 | Shinko Electric Ind Co Ltd | Wiring board and method of manufacturing the same |
| JP2020092152A (en) * | 2018-12-04 | 2020-06-11 | 板橋精機株式会社 | Printed circuit board and manufacturing method thereof |
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