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JP2002280703A - Electronic component mounting board and mounting method using the same - Google Patents

Electronic component mounting board and mounting method using the same

Info

Publication number
JP2002280703A
JP2002280703A JP2001080884A JP2001080884A JP2002280703A JP 2002280703 A JP2002280703 A JP 2002280703A JP 2001080884 A JP2001080884 A JP 2001080884A JP 2001080884 A JP2001080884 A JP 2001080884A JP 2002280703 A JP2002280703 A JP 2002280703A
Authority
JP
Japan
Prior art keywords
mounting
electronic component
conductive portion
conductive
concave portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001080884A
Other languages
Japanese (ja)
Inventor
Teiichi Inada
禎一 稲田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resonac Corp
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP2001080884A priority Critical patent/JP2002280703A/en
Publication of JP2002280703A publication Critical patent/JP2002280703A/en
Pending legal-status Critical Current

Links

Classifications

    • H10W72/07251
    • H10W72/20
    • H10W72/5522

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Structure Of Printed Boards (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

(57)【要約】 (修正有) 【課題】 本発明は、位置合わせが容易であり、バンプ
の高さにばらつきが有る場合でも接続信頼性が高い、実
装用基板及びそれを用いた実装方法を提供することを目
的とする。 【解決手段】 半導体素子をはじめとする電子部品10
の実装基板20であって、凸な形状である導電部11を
有する電子部品10の導電部11の対応する位置に導電
部11を受け入れ可能な凹部24を有する基板20及び
それを用いた実装方法である。
PROBLEM TO BE SOLVED: To provide a mounting substrate and a mounting method using the same, in which alignment is easy and connection reliability is high even when there is a variation in bump height. The purpose is to provide. An electronic component including a semiconductor element is provided.
Board 20 having concave portion 24 capable of receiving conductive portion 11 at a position corresponding to conductive portion 11 of electronic component 10 having conductive portion 11 having a convex shape, and mounting method using the same It is.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、接続信頼性に優れ
る半導体素子、電子部品等の実装用基板及びそれを用い
た実装方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate for mounting semiconductor elements, electronic components and the like having excellent connection reliability and a mounting method using the same.

【0002】[0002]

【従来の技術】近年、電子機器の発達に伴い電子部品の
搭載密度が高くなり、チップスケールパッケージ、チッ
プサイズパッケージと呼ばれるような半導体チップサイ
ズとほぼ同等なサイズを有する半導体パッケージや半導
体のベアチップ実装など新しい形式の実装方法が採用さ
れ始めている。
2. Description of the Related Art In recent years, with the development of electronic equipment, the mounting density of electronic components has increased, and semiconductor packages having a size substantially equivalent to a semiconductor chip size called a chip scale package or a chip size package or a bare chip mounting of semiconductors have been developed. A new type of mounting method has begun to be adopted.

【0003】半導体素子をはじめとする各種電子部品を
搭載する実装用基板のもっとも重要な特性の一つとして
接続信頼性がある。半導体素子などの各種電子部品と実
装基板の接続部分を正確に位置合わせして接続する必要
があるが、微細化が進み正確な位置合わせが難しくなっ
ている。位置ずれが生じると、初期の接続不良が発生す
るだけでなく、熱疲労に対する接続信頼性が低下するこ
とがあるため、正確な位置合わせは実装基板を用いた機
器の信頼性に直接関係するきわめて重要な項目である。
One of the most important characteristics of a mounting board on which various electronic components such as semiconductor elements are mounted is connection reliability. It is necessary to accurately align and connect the connection portions between various electronic components such as semiconductor elements and the mounting board. However, miniaturization has progressed and accurate alignment has become difficult. When misalignment occurs, not only initial connection failures occur, but also connection reliability against thermal fatigue may decrease, so accurate alignment is directly related to the reliability of equipment using mounting boards. This is an important item.

【0004】ベアチップ実装では、はんだボールを用い
て半導体チップの電極と配線板の配線パッドを接続する
方法があり、この方法によれば、はんだが溶融するとき
にセルフアラインメント効果により位置合わせされる、
という作用が期待できる。しかしながら、鉛を含む等の
点ではんだの使用は環境対策上好ましくない。バンプと
称する小突起をチップ側に作製して導電ペーストなどで
接続する方式では、前記のセルフアラインメント効果が
ないため、位置合わせが難しかった。また、従来のボン
ディングワイヤを用いて半導体チップの電極と配線板の
配線パッドを接続する方式もあるが、ボンディングワイ
ヤを保護するために封止材樹脂を被覆せねばならず、実
装工程を増やしていた。このため信頼性が高く、電気的
な接続とチップの固定を一括して行え、かつ鉛などの環
境に害のあるとされる材料を有さない実装方式が求めら
れている。
In bare chip mounting, there is a method of connecting electrodes of a semiconductor chip to wiring pads of a wiring board using solder balls. According to this method, when the solder is melted, the solder is aligned by a self-alignment effect.
The effect can be expected. However, the use of solder is not preferable in terms of environmental measures because it contains lead. In a method in which small projections called bumps are formed on the chip side and connected with a conductive paste or the like, the above-described self-alignment effect is not provided, so that alignment is difficult. There is also a method of connecting the electrodes of the semiconductor chip and the wiring pads of the wiring board using conventional bonding wires.However, in order to protect the bonding wires, a sealing material resin must be coated, and the number of mounting steps is increasing. Was. For this reason, there is a demand for a mounting method which is highly reliable, can perform electrical connection and chip fixing in a batch, and does not have a material such as lead which is harmful to the environment.

【0005】[0005]

【発明が解決しようとする課題】本発明は、位置合わせ
が容易であり、バンプの高さにばらつきが有る場合でも
接続信頼性が高い、実装用基板及びそれを用いた実装方
法を提供することを目的とする。
SUMMARY OF THE INVENTION It is an object of the present invention to provide a mounting board and a mounting method using the same, which are easy to align and have high connection reliability even when the height of bumps varies. With the goal.

【0006】[0006]

【課題を解決するための手段】すなわち本発明は、半導
体素子をはじめとする電子部品の実装基板であって、凸
な形状である導電部を有する電子部品の該導電部の対応
する位置に該導電部を受け入れ可能な凹部を有する基板
及びそれを用いた実装方法である。
That is, the present invention is directed to a mounting board for an electronic component including a semiconductor element, the electronic component having a conductive portion having a convex shape, the electronic component being provided at a position corresponding to the conductive portion. A substrate having a recess capable of receiving a conductive portion and a mounting method using the substrate.

【0007】[0007]

【発明の実施の形態】本発明において、半導体素子をは
じめとする電子部品は、該電子部品の凸な形状である導
電部を、該実装用基板に設けた該導電部に対応する凹部
に受け入れることで位置合わせがなされる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, an electronic component such as a semiconductor element receives a conductive portion having a convex shape of the electronic component in a concave portion provided on the mounting substrate and corresponding to the conductive portion. By doing so, the alignment is performed.

【0008】ここで、該電子部品の導電部と該実装用基
板に設けた凹部とを対応させて配置した後、一方に振
動、超音波、圧縮応力等をかけることが好ましい。該凸
状の導電部が該実装用基板の対応する凹部に安定して納
まるようになるからである。
Here, it is preferable that, after arranging the conductive portion of the electronic component and the concave portion provided on the mounting substrate in correspondence with each other, one of them is subjected to vibration, ultrasonic wave, compressive stress or the like. This is because the convex conductive portions can be stably accommodated in the corresponding concave portions of the mounting substrate.

【0009】尚、凸な形状を有する導電部の態様として
は、公知の態様、例えば銀ペーストなどの印刷バンプ、
めっきバンプ、該導電部にボンディングした金線を切断
し、そしてボール形状に形成したもの等が挙げられる。
その形成方法としては、公知の方法、例えば金属めっ
き、ワイヤボンダを改良した装置を用いた金バンプの形
成、導電樹脂や絶縁樹脂の印刷、モールドなどの手段を
単用又は必要に応じて組み合わせて形成すればよい。中
でも、導電性ペーストを用いて形成することが、位置合
わせ完了後の硬化時にそれが流動し、表面張力による、
いわゆるセルフアラインメント効果により、より正確に
位置合わせが行えるため接続の信頼性が向上するだけで
なく、実装基板と半導体チップ等の電子部品の接続抵抗
が小さくなる点で好ましい。
The conductive portion having a convex shape may be a known one such as a printed bump made of silver paste or the like.
For example, a plated bump, a gold wire bonded to the conductive portion, cut and formed into a ball shape may be used.
As the forming method, known methods, for example, metal plating, formation of gold bumps using an improved wire bonder, printing of conductive resin or insulating resin, molding of means such as single use or combination as necessary do it. Above all, it is possible to form using a conductive paste, it flows at the time of curing after completion of alignment, and due to surface tension,
The so-called self-alignment effect is preferable in that not only the reliability of the connection is improved because the alignment can be performed more accurately, but also the connection resistance between the mounting substrate and electronic components such as a semiconductor chip is reduced.

【0010】一方、実装基板側に設ける凹部の態様とし
ては、前記の導電部を受け入れ可能なものであれば、ど
のような形状のものであってもよく、例えば孔(必ずし
も実装基板を貫通する孔である必要はない。該導電部と
接続されるべき回路の態様にあわせればよい。代表的な
ものを図1(a)〜(c)に例示する。因みに、(a)
は窪み、(b)はスルーホール、(c)はIVH・イン
ターフェイシャルバイアホールである。尚、図1は断面
図であるが図面が煩雑になるので「回路」及び一部の部
材以外には斜線を入れていない)、レジストなどの絶縁
樹脂で回路の周囲に土手を築いたもの(図1(d)及び
(e)参照)、所定の位置に貫通孔を開けたフィルム状
絶縁樹脂を実装基板の上面に貼り付けたもの(図1
(f)参照)、複数の導電部に対応する窪みを設けたも
の(図1(g)参照)等が挙げられる。尚、図1におい
て、符号10が半導体チップ等の電子部品、11が導電
部としてのバンプ、20が実装基板、21が実装基板に
設けられた回路、22がレジスト等の絶縁樹脂、23が
フィルム状の絶縁樹脂、24が凹部である。この凹部の
形成方法としては、公知の方法、例えば金型で成形する
方法、レーザーやドリルなどによる穿孔、エッチングす
る方法、レジストの塗付・露光・現像による方法等が使
用できる。また、層間接続用のIVHをそのまま凹部と
して活用してもよい。
On the other hand, the form of the concave portion provided on the mounting substrate side may be any shape as long as the conductive portion can be received, and for example, a hole (not necessarily penetrating the mounting substrate). It is not necessary to be a hole, and it may be adjusted according to the mode of the circuit to be connected to the conductive portion, and typical ones are illustrated in FIGS.
Is a depression, (b) is a through hole, and (c) is an IVH / interfacial via hole. Note that FIG. 1 is a cross-sectional view, but the drawing is complicated, so that diagonal lines are not shown except for the “circuit” and some members), and a bank built around the circuit with an insulating resin such as a resist ( 1 (d) and 1 (e)), a film-like insulating resin having a through hole formed at a predetermined position is attached to the upper surface of a mounting substrate (FIG. 1).
(See FIG. 1 (f)), and those provided with depressions corresponding to a plurality of conductive portions (see FIG. 1 (g)). In FIG. 1, reference numeral 10 denotes an electronic component such as a semiconductor chip, 11 denotes a bump as a conductive portion, 20 denotes a mounting board, 21 denotes a circuit provided on the mounting board, 22 denotes an insulating resin such as a resist, and 23 denotes a film. The insulating resin 24 is a concave portion. As a method of forming the concave portion, a known method, for example, a method of molding with a mold, a method of punching and etching with a laser or a drill, a method of applying, exposing, and developing a resist can be used. Further, the IVH for interlayer connection may be used as a concave portion as it is.

【0011】更に、実装基板と半導体チップ等の電子部
品との間に接着剤又は接着フィルムを介挿・圧着しても
よい。実装基板と該電子部品とが強固に接着されるた
め、該電子部品が剥離しにくくなり信頼性がより高まる
からである。
Further, an adhesive or an adhesive film may be interposed and pressed between the mounting substrate and an electronic component such as a semiconductor chip. This is because the mounting substrate and the electronic component are firmly adhered to each other, so that the electronic component is less likely to be separated, and the reliability is further improved.

【0012】本発明において、凸な形状の導電部の高さ
は、実装基板の凹部の深さの1倍以上、10倍以下が好
ましい。該比が1倍未満であると接続信頼性確保できな
い可能性があり、一方、10倍を越える場合では、凸部
が必要以上に長くなるためコスト面で不利になりやす
く、また、接続信頼性、取り扱い性、加工性などでも不
利になる可能性があるからである。
In the present invention, the height of the conductive portion having a convex shape is preferably not less than 1 and not more than 10 times the depth of the concave portion of the mounting board. If the ratio is less than 1, the connection reliability may not be ensured. On the other hand, if the ratio is more than 10, the protruding portions are unnecessarily long, which is disadvantageous in terms of cost. This is because there is a possibility that it is disadvantageous in terms of handling, workability and the like.

【0013】また、凸な形状の導電部の最大径は、加工
後の接続不良を防止する観点から、実装基板の凹部の径
の0.5倍以上、10倍以下であることが好ましい(図
1の(g)の態様では、それぞれ、最外側の導電部間の
断面距離及び最外側の回路の断面距離と読み替える)。
凸な形状の導電部を形成する材料にもよるが、該比が
0.5倍未満では断線の可能性が大きくなり、10倍を
越える場合は短絡の可能性が大きくなるからである。
The maximum diameter of the conductive portion having a convex shape is preferably 0.5 times or more and 10 times or less the diameter of the concave portion of the mounting board from the viewpoint of preventing connection failure after processing (FIG. In the embodiment of (g), the cross-sectional distance between the outermost conductive portions and the cross-sectional distance of the outermost circuit are respectively read.
If the ratio is less than 0.5, the possibility of disconnection increases, and if it exceeds 10 times, the possibility of short-circuit increases, although it depends on the material forming the conductive portion having a convex shape.

【0014】本発明において、接着剤、接着フィルムと
しては、絶縁接着剤、絶縁フィルム、絶縁接着剤中に導
電粒子を有する異方導電性接着剤、絶縁フィルム中に導
電粒子を有する異方導電性フィルムなどを使用すること
ができる。
In the present invention, the adhesive and the adhesive film include an insulating adhesive, an insulating film, an anisotropic conductive adhesive having conductive particles in the insulating adhesive, and an anisotropic conductive adhesive having conductive particles in the insulating film. A film or the like can be used.

【0015】これらの材料としては、エポキシ樹脂、シ
アネートエステル樹脂、シアネート樹脂、シリコーン樹
脂等の樹脂やアクリルゴム、アクリロニトリルブタジエ
ンゴム等の高分子量成分が挙げられるが、これらに限定
されるものではない。硬化後の耐熱性が良い点で特にエ
ポキシ樹脂が好ましい。また、接着剤、接着フィルムを
使用することで電気的な接続と半導体チップ等の電子部
品の固定を同時に行なえる点で好ましい。
These materials include, but are not limited to, resins such as epoxy resins, cyanate ester resins, cyanate resins and silicone resins, and high molecular weight components such as acrylic rubber and acrylonitrile butadiene rubber. Epoxy resins are particularly preferred in that they have good heat resistance after curing. The use of an adhesive or an adhesive film is preferable in that electrical connection and fixing of electronic components such as semiconductor chips can be performed at the same time.

【0016】[0016]

【実施例】実施例1 半導体チップ(10mm□、厚さ:450μmのロジック
素子を使用)の端子部に導電ペースト(日立化成製銀ペ
ースト:EN−4700A)で高さ:20μm、最大
径:30μm のバンプ(該チップの外周縁から内方に1
mm入ったところに1mm間隔で線状に38個)を作成し
た。一方、銅張積層板を回路加工した配線板のパッド部
に金型を用いて深さ:10μm、最大径:50μm の凹
部(個数:38)を作成した。これらを半導体の搭載装
置(日立東京エレクトロニクス製CM−110)を使用
して最大誤差20μm の精度で位置合わせした後、16
0℃の熱板上で、荷重1kg を3秒間かけ、導電ペース
トを流動、硬化させた。170℃で1時間キュアした
後、半導体チップと配線板間を樹脂(日立化成製封止
材:CEL−C−7200)で封止し、さらに170℃
で1時間キュアした。
EXAMPLE 1 A terminal part of a semiconductor chip (10 mm square, using a logic element having a thickness of 450 μm) was coated with a conductive paste (Silver paste manufactured by Hitachi Chemical: EN-4700A) at a height of 20 μm and a maximum diameter of 30 μm. Bump (1 inward from the outer edge of the chip)
mm, 38 lines were formed at 1 mm intervals linearly. On the other hand, concave portions (number: 38) having a depth of 10 μm and a maximum diameter of 50 μm were formed in a pad portion of a wiring board obtained by circuit-working a copper-clad laminate using a mold. After positioning them with a maximum error of 20 μm using a semiconductor mounting device (CM-110 manufactured by Hitachi Tokyo Electronics), 16
On a hot plate at 0 ° C., a load of 1 kg was applied for 3 seconds to flow and harden the conductive paste. After curing at 170 ° C. for 1 hour, the space between the semiconductor chip and the wiring board is sealed with a resin (Hitachi Chemical's sealing material: CEL-C-7200).
For 1 hour.

【0017】実施例2 銅及び金めっきで高さ:10μm、最大径:40μm の
バンプを作成したこと、作成した凹部の寸法が深さ:5
μm、最大径:50μm のものとしたこと、半導体チッ
プと実装基板との間に厚さ:25μmのBステージの接
着フィルム(日立化成製HS−231S)をはさんだこ
と、熱板の温度を160℃としたことを除き実施例1と
同様にして半導体チップを実装した配線板を作成した。
Example 2 A bump having a height of 10 μm and a maximum diameter of 40 μm was formed by copper and gold plating, and the size of the formed recess was 5 depth.
μm, maximum diameter: 50 μm, a B-stage adhesive film (HS-231S manufactured by Hitachi Chemical Co., Ltd.) having a thickness: 25 μm between the semiconductor chip and the mounting board, and a temperature of the hot plate of 160 μm. A wiring board on which a semiconductor chip was mounted was prepared in the same manner as in Example 1 except that the temperature was changed to ° C.

【0018】比較例1 配線板に凹部を形成しない他は、実施例1と同様にして
半導体チップを実装した配線板を作成した。
Comparative Example 1 A wiring board on which a semiconductor chip was mounted was prepared in the same manner as in Example 1 except that no recess was formed in the wiring board.

【0019】比較例2 配線板に凹部を形成しない他は、実施例2と同様に半導
体チップを実装した配線板の作成した。
Comparative Example 2 A wiring board having a semiconductor chip mounted thereon was produced in the same manner as in Example 2 except that no recess was formed in the wiring board.

【0020】評価方法 サンプルを−55℃雰囲気に30分間放置し、その後1
25℃の雰囲気に30分間放置する工程を1サイクルと
して、300サイクル後、500サイクル後、1000
サイクル後、2000サイクル後に、それぞれ超音波顕
微鏡を用いて半導体チップとの接合部の剥離やクラック
等の破壊が発生していないものを「○」、発生したもの
を「×」として「信頼性」を評価した。また、半導体チ
ップを配線板に実装した後、断面を走査型電子顕微鏡で
観察し、半導体チップの中心と配線板の中心間の位置ず
れ量を測定した。それぞれの結果を表1と表2に示す。
Evaluation method The sample was left in an atmosphere of -55 ° C for 30 minutes, and then
The process of leaving the substrate in an atmosphere of 25 ° C. for 30 minutes is one cycle, and after 300 cycles, 500 cycles, and 1000 cycles.
After cycling and after 2,000 cycles, using an ultrasonic microscope, "○" indicates that no peeling or cracking of the joint with the semiconductor chip occurred, and "X" indicates that occurred, indicating "reliability". Was evaluated. After the semiconductor chip was mounted on the wiring board, the cross section was observed with a scanning electron microscope, and the amount of displacement between the center of the semiconductor chip and the center of the wiring board was measured. Tables 1 and 2 show the results.

【0021】[0021]

【表1】 [Table 1]

【0022】[0022]

【表2】 [Table 2]

【0023】実施例のように配線板のパッド部に凹部を
形成したものは、接続信頼性が高かった。
The connection reliability was high in the case where the concave portion was formed in the pad portion of the wiring board as in the example.

【0024】[0024]

【発明の効果】上記の通り、本発明の実装基板及びそれ
を用いた実装方法によれば、位置合わせが容易であり、
しかも信頼性に優れる接続が得られる。尚、接着フィル
ムを使用すれば、電子部品と実装基板との電気的な接続
と半導体チップの固定を同時に行なえるのでより生産性
が向上する。
As described above, according to the mounting board of the present invention and the mounting method using the same, alignment is easy,
Moreover, a connection with excellent reliability can be obtained. If an adhesive film is used, the electrical connection between the electronic component and the mounting substrate and the fixing of the semiconductor chip can be performed simultaneously, so that the productivity is further improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の凹部の態様を電子部品とともに示した
断面図である。
FIG. 1 is a cross-sectional view showing an embodiment of a concave portion of the present invention together with an electronic component.

【符号の説明】[Explanation of symbols]

10 電子部品(半導体チップ) 11 導電部(バンプ) 20 実装基板 21 回路 22 絶縁樹脂 23 フィルム状樹脂 24 凹部(パッド部) DESCRIPTION OF SYMBOLS 10 Electronic component (semiconductor chip) 11 Conductive part (bump) 20 Mounting board 21 Circuit 22 Insulating resin 23 Film-shaped resin 24 Concave part (pad part)

フロントページの続き Fターム(参考) 5E319 AA03 AB05 AC01 AC16 BB04 CC12 CC61 CD04 CD26 GG09 GG15 GG20 5E336 AA04 BC25 CC32 CC44 CC55 EE05 EE07 EE08 GG09 GG14 5E338 BB04 BB13 BB19 BB75 EE31 EE60 5F044 KK02 KK17 KK19 LL09 Continued on the front page F term (reference) 5E319 AA03 AB05 AC01 AC16 BB04 CC12 CC61 CD04 CD26 GG09 GG15 GG20 5E336 AA04 BC25 CC32 CC44 CC55 EE05 EE07 EE08 GG09 GG14 5E338 BB04 BB13 BB19 BB75 EE31 KK02 KK02 KK

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 凸な形状である導電部を有する電子部品
の該導電部を受け入れ可能な凹部を有する実装基板。
An electronic component having a conductive portion having a convex shape has a concave portion capable of receiving the conductive portion.
【請求項2】 前記の凹部の深さ及び径が、前記の導電
部の高さ及び最大径のそれぞれ0.1〜1及び0.1〜
2である、請求項1に記載の実装基板。
2. The height and the maximum diameter of the conductive portion are 0.1-1 and 0.1-0.1, respectively.
2. The mounting board according to claim 1, wherein the mounting board is 2.
【請求項3】凸な形状である導電部を有する電子部品の
該導電部を受け入れ可能な凹部を有する実装基板を、該
導電部と該凹部とを対応させることで両者の位置合わせ
を行う電子部品の実装方法。
3. An electronic component having a concave portion capable of receiving a conductive portion of an electronic component having a conductive portion having a convex shape, and positioning the conductive portion and the concave portion by matching the conductive portion with the concave portion. Component mounting method.
【請求項4】 前記の位置合わせの後、実装基板に振
動、超音波又は圧縮応力をかける、請求項3に記載の実
装方法。
4. The mounting method according to claim 3, wherein after the positioning, a vibration, an ultrasonic wave, or a compressive stress is applied to the mounting substrate.
【請求項5】 前記の電子部品と前記の実装基板との間
に接着剤又は接着フィルムを介在させる、請求項3又は
4に記載の実装方法。
5. The mounting method according to claim 3, wherein an adhesive or an adhesive film is interposed between the electronic component and the mounting board.
【請求項6】 前記の導電部が、位置合わせ完了後に凹
部に流動させられ、そして接着せしめられる、請求項3
乃至5のいずれか1に記載の実装方法。
6. The method according to claim 3, wherein the conductive portion is caused to flow into the concave portion after the alignment is completed, and is bonded.
6. The mounting method according to any one of items 1 to 5.
JP2001080884A 2001-03-21 2001-03-21 Electronic component mounting board and mounting method using the same Pending JP2002280703A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001080884A JP2002280703A (en) 2001-03-21 2001-03-21 Electronic component mounting board and mounting method using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001080884A JP2002280703A (en) 2001-03-21 2001-03-21 Electronic component mounting board and mounting method using the same

Publications (1)

Publication Number Publication Date
JP2002280703A true JP2002280703A (en) 2002-09-27

Family

ID=18937086

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001080884A Pending JP2002280703A (en) 2001-03-21 2001-03-21 Electronic component mounting board and mounting method using the same

Country Status (1)

Country Link
JP (1) JP2002280703A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006066775A (en) * 2004-08-30 2006-03-09 Nippon Dempa Kogyo Co Ltd IC chip fixing method by ultrasonic thermocompression bonding and surface mount crystal oscillator
US7753489B2 (en) 2004-09-27 2010-07-13 Brother Kogyo Kabushiki Kaisha Connection structure of flexible wiring substrate and connection method using same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006066775A (en) * 2004-08-30 2006-03-09 Nippon Dempa Kogyo Co Ltd IC chip fixing method by ultrasonic thermocompression bonding and surface mount crystal oscillator
US7753489B2 (en) 2004-09-27 2010-07-13 Brother Kogyo Kabushiki Kaisha Connection structure of flexible wiring substrate and connection method using same

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