JP2002262552A - DC-DC converter - Google Patents

Abstract

(57) Abstract: To prevent a high voltage from being generated between switch terminals when a semiconductor switch element is turned off without lowering circuit efficiency. A converter circuit section includes an FET for chopping an input voltage, a diode D1 connected in anti-parallel to the FET, a resonance reactor L1 connected in series to the FET 10, and a resonance capacitor C1.
A low-pass filter including a reactor L2 and a capacitor C2, a freewheel diode D2, a capacitor C3 connected between the drain of the FET 10 and the ground line 9, and a cathode connected to the source of the FET 10; A diode D3 whose anode is connected to the ground line 9;

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a DC-DC converter for preventing a high voltage from being generated between switch terminals when a semiconductor switch element is turned off.

[0002]

2. Description of the Related Art Conventionally, as a DC-DC converter, a switch mode converter using ON / OFF of a semiconductor switch element has been known. Since the switching loss increases as the switching frequency increases, the switch mode converter includes a resonance circuit including a resonance reactor and a resonance capacitor in order to reduce the switching loss. A method of performing switching, a method of performing switching at zero current using current resonance, and the like are often adopted.

FIG. 5 is a circuit diagram of a conventional DC-DC converter. FIG. 5 shows a step-down converter of the full waveform zero current switching type.

In this circuit, a transistor Q11 for chopping an input voltage and an antiparallel to the transistor Q11 for flowing a current in a reverse direction, that is, an anode is connected to an output (emitter) side and a cathode is connected to an input (collector) side. It includes a diode D11, a resonance reactor L11 connected in series to the transistor Q11, a resonance capacitor C11, and a low-pass filter including the reactor L12 and the capacitor C12. The pulsation of the output voltage is suppressed and smoothed. Reflux diode D12
Is for releasing the energy stored in the reactor L12 when the transistor Q11 is turned off. Further, the capacitor C13 connected between the collector of the transistor Q11 and the ground is for preventing the switching noise of the transistor Q11 from leaking to the input side.

In such a DC-DC converter, when the transistor Q11 is turned off, a high spike voltage is transiently generated between the input terminal and the output terminal (collector and emitter) of the transistor Q11. This may cause the transistor Q11 to deteriorate. Therefore, in order to prevent such a high spike voltage from occurring, a snubber circuit S10 is generally provided between the input terminal and the output terminal of the transistor Q11. In the simplest example, as shown in FIG. 10, the snubber circuit S10 includes a capacitor C14 and a resistor R11.
Are connected in parallel to the transistor Q11.

[0006]

When the snubber circuit S10 shown in FIG. 5 is used, the effect of preventing a high voltage is increased by lowering the resistance value of the resistor R11, but the current flowing through the snubber circuit S10 is accordingly increased. Increases, the resistance R1
1 needs to be increased. Therefore, the resistance R1
1 becomes larger and it is necessary to consider heat radiation.
Further, since the loss of the snubber circuit S10 increases, the DC-
The efficiency as a DC converter will be reduced.

On the contrary, if the resistance value of the resistor R11 is increased, the above problem can be solved, but it becomes difficult to achieve the intended purpose of preventing generation of a high voltage.

On the other hand, while the resistance value of the resistor R11 is suppressed to a predetermined level, the transistor Q1 having a high withstand voltage level is
It is also conceivable to use 1. However, transistor Q
When the withstand voltage of 11 is increased, its on-resistance increases by the square, so that the efficiency as a DC-DC converter also decreases.

SUMMARY OF THE INVENTION The present invention solves the above-mentioned problem, and reduces the circuit efficiency of generating a high voltage between an input terminal and an output terminal when a semiconductor switching element, for example, a MOS-FET is turned off. It is an object of the present invention to provide a DC-DC converter capable of preventing the DC-DC converter from being prevented.

[0010]

According to the present invention, there is provided a semiconductor switching device for turning on / off an input voltage, a resonance reactor and a resonance capacitor, the resonance circuit being provided on the output side of the semiconductor switching device, An anti-parallel rectifier connected in anti-parallel between an input terminal and an output terminal of the semiconductor switch element; a driving unit for turning on and off the semiconductor switch element; The semiconductor device comprises a connected voltage suppressing capacitor and a voltage suppressing rectifying element having a cathode connected to the output terminal of the semiconductor switching element and an anode connected to the ground.

When the semiconductor switch element is turned off,
The energy stored in the resonance reactor is applied to the semiconductor switch element, and the voltage between the input terminal and the output terminal tends to increase. However, according to this configuration, the connection between the input terminal of the semiconductor switch element and the ground. Since the voltage suppressing capacitor is connected therebetween, the voltage between the input terminal of the semiconductor switch element and the ground is suppressed to a level close to the input voltage of the DC-DC converter by the voltage suppressing capacitor. On the other hand, the voltage between the output side terminal of the semiconductor switch element and the ground is such that when the potential of the output side terminal falls below the ground level, the rectifying element for voltage suppression is turned on. Is maintained at a level lower than the ground level by a forward voltage.

Accordingly, the potential difference between the input terminal and the output terminal of the semiconductor switch element is suppressed to a level slightly higher than the input voltage of the DC-DC converter,
This prevents a high voltage from being generated between the input terminal and the output terminal.

Further, energy generated when the semiconductor switch element is turned off is returned to the voltage suppressing capacitor by a circuit formed by the voltage suppressing rectifying element, the antiparallel rectifying element, and the voltage suppressing capacitor. In addition, since loss due to a resistor as in a snubber circuit does not occur, circuit efficiency is improved.

Further, the antiparallel rectifier and the semiconductor switch may be constituted by one semiconductor. For example, a MOS-FET has a structure in which a diode is equivalently built in between a drain and a source. Therefore, the number of components constituting a circuit can be reduced by using a MOS-FET.

[0015]

FIG. 1 is a circuit diagram of one embodiment of a DC-DC converter according to the present invention. This DC-DC
The converter includes a converter circuit unit 1, a drive circuit 2,
And a control circuit 3.

Converter circuit section 1 has a DC output voltage V lower than DC input voltage Vin applied between input terminals 4 and 5.
ot is generated and applied to the load 8 connected between the output terminals 6 and 7, and constitutes a well-known full-waveform zero-current switching type step-down converter.

The converter circuit section 1 has a drain (input side terminal) connected to the input terminal 4 and a MOS-FET (semiconductor switch element) for chopping the input voltage Vin.
10, a resonance reactor L1 connected to the source (output side terminal) of the FET 10, a resonance capacitor C1,
A low-pass filter including a reactor L2 and a capacitor C2; and a reactor L when the FET 10 is turned off.
2 includes a freewheeling diode D2 for discharging the energy stored in 2 and a capacitor C3 connected between the drain of the FET 10 and the ground line 9.

The pulsation of the voltage is suppressed by the low-pass filter, and a smoothed output voltage Vot is obtained. Further, the switching noise generated in the FET 10 by the capacitor C3 is prevented from leaking from the input terminals 4 and 5.

The diode D1 is equivalently incorporated between the drain and source of the FET 10 because of the structure of the MOS-FET. When another semiconductor switch element, for example, a bipolar transistor, is used instead of the MOS-FET, a single diode may be connected.

The converter circuit section 1 further includes a diode D3 whose cathode is connected to the source of the FET 10 and whose anode is connected to the ground line 9.

The drive circuit 2 applies a drive voltage to the gate of the FET 10 according to a control signal from the control circuit 3 to
T10 is turned on and off. The control circuit 3 uses C
It comprises a PU, an A / D converter, etc., and sends a control signal consisting of a pulse signal to the drive circuit 2 to control the on / off of the FET 10, and has the following functions.

After the FET 10 is turned on, the resonance current i
Is inverted and flows through the diode D1, while the FET1
A function of performing zero current switching for switching 0 from on to off; a function of detecting the output voltage Vot and controlling the switching frequency of the FET 10 so that the detected output voltage Vot matches a preset value.

Next, the operation of the circuit shown in FIG. 1 when the FET 10 is turned off will be described.

When FET 10 is turned off, FET 1
Since the drain-to-earth voltage of 0 is maintained at a level close to the charging voltage of the capacitor C3, its voltage rise is suppressed.

On the other hand, when the diode D3 is not provided, the source-to-earth voltage may become a high negative voltage due to the energy stored in the resonance reactor L1.
In the present embodiment, when the voltage between the source and the ground of the FET 10 decreases to a negative voltage, the diode D3 is turned on and the source is directly connected to the ground line 9, so that the voltage between the source and the ground is higher than the ground. The forward voltage of D3 is maintained at a low level and does not become a high negative voltage.

As a result, the drain-source voltage V _DS of the FET 10 is maintained at a level close to the input voltage Vin, thereby suppressing the generation of a high voltage between the drain and source.

As described above, according to the present embodiment, the cathode is connected to the source of the FET 10 and the anode is provided with the diode D3 connected to the ground line 9, so that when the FET 10 is turned off, the increase in the resulting drain-source voltage V _DS, large even it is possible to suppress to a slightly higher degree of level than the input voltage Vin. Accordingly, the FET 10 can be sufficiently employed as long as its withstand voltage is at a level slightly higher than the input voltage Vin.
The use of T can be avoided, and a decrease in the efficiency of the DC-DC converter due to the use of such an FET can be avoided.

The energy (mainly, the energy stored in the resonance reactor L1) generated when the FET 10 is turned off is the diode D3 and the diode D3.
1. Since the capacitor C3 is returned to the capacitor C3 by the circuit formed by the capacitor C3, the loss due to the resistance unlike the snubber circuit does not occur, and the circuit efficiency can be improved.

In this embodiment, since the MOS-FET is used as the semiconductor switch element, the MOS-F
Since a diode is equivalently built in between the drain and the source in the structure of the ET, it is not necessary to prepare a single diode as the diode D1, and the number of components can be reduced.

FIGS. 2 and 3 show the drain and the drain according to the present embodiment.
In the timing chart to explain the inhibitory effect of the source voltage V _DS, (a) shows a case in which with a diode D3 illustrated in FIG. 1, shows a case where (b) is not provided with the diode D3 as a comparative example And the gate and
The source voltage V _GS is shown, and the drain-source voltage V _DS is shown in the lower part. Note that the gate-source voltage V _GS is 5
Expressed in V / div, the drain-source voltage V _DS is 20V
/ Div. Further, the input voltage Vin = 42 V, the output voltage Vot = 14 V, and the capacitance C ₃ of the capacitor C ₃ = 30 μF
It is. FIG. 2 shows the output current = 20 A, and FIG. 3 shows the output current = 60 A.

In FIG. 2B, the voltage V_DSIs 82.4V
On the other hand, in FIG. _DSThe maximum value is 47.2V
According to the latter example, the voltage V_DSIs the input voltage V
It can be seen that it can be suppressed to a value near in.

In FIG. 3B, the maximum value of the voltage _VDS is 6
Maximum value shown in FIG. 3 (a) the voltage V _DS is a Whereas 8.0V has become a 48.8V, What can be suppressed voltage V _DS of the value of the input voltage Vin vicinity According to the latter embodiment I understand.

In the above embodiment, the capacitor C3
Is used alone, but is not limited thereto, and may be used in combination with other circuit components. For example, in the circuit shown in FIG. 4, a reactor L3 and a capacitor C4 are provided between the capacitor C3 and the input terminals 4 and 5, and constitute a noise filter.

[0034]

As described above, according to the present invention,
A voltage suppression capacitor connected between the input terminal of the semiconductor switch element and ground; and a voltage suppression rectifier element having a cathode connected to the output terminal of the semiconductor switch element and an anode connected to ground. Therefore, it is possible to suppress an increase in voltage generated between the input side terminal and the output side terminal when the semiconductor switch element is turned off. This eliminates the need for a snubber circuit, so that the loss of the DC-DC converter can be reduced and the circuit efficiency can be improved.

In addition, by employing an antiparallel rectifying element and a semiconductor switch element formed of one semiconductor element, the number of parts can be reduced.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing one embodiment of a DC-DC converter according to the present invention.

FIGS. 2A and 2B are timing charts for explaining an effect of suppressing a drain-source voltage according to the embodiment;
(a) shows a case where the diode D3 shown in FIG. 1 is provided, and (b) shows a case where the diode D3 is not provided as a comparative example.

FIGS. 3A and 3B are timing charts for explaining an effect of suppressing a drain-source voltage according to the embodiment;
(a) shows a case where the diode D3 shown in FIG. 1 is provided, and (b) shows a case where the diode D3 is not provided as a comparative example.

FIG. 4 is a circuit diagram of a modification.

FIG. 5 is a circuit diagram of a conventional DC-DC converter.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 converter circuit section 2 drive circuit (drive means) 10 FET (semiconductor switch element, semiconductor element) C1 resonance capacitor C3 capacitor (voltage suppression capacitor) D1 diode (antiparallel rectification element, semiconductor element) D3 diode (voltage suppression) Rectifier) L1 Resonance reactor

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Chen Nobo 1-7-10 Kikuzumi, Minami-ku, Nagoya-shi, Aichi Inside the Auto Network Engineering Laboratory Co., Ltd. (72) Inventor ▲ Taka ▼ Mitsuaki Osaka Minami-ku, Nagoya-shi, Aichi 1-7-10 Kikuzumi F-term in Auto Network Engineering Laboratory Co., Ltd. (Reference) 5H730 AA02 AA20 AS01 BB13 BB57 DD04 DD41 FD01 FG01 XX04 XX12 XX26

Claims (2)

[Claims] 1. A semiconductor circuit comprising: a semiconductor switch element for turning on and off an input voltage; a resonance reactor and a resonance capacitor; a resonance circuit disposed on an output side of the semiconductor switch element; an input terminal of the semiconductor switch element; An anti-parallel rectifier connected in anti-parallel between the output terminals;
Driving means for turning on and off the semiconductor switch element;
A voltage suppressing capacitor connected between the input terminal of the semiconductor switch element and ground, a voltage suppressing rectifier element having a cathode connected to the output terminal of the semiconductor switch element and an anode connected to ground; A DC-DC converter comprising: 2. The DC-DC converter according to claim 1, wherein the anti-parallel rectifying element and the semiconductor switch element are constituted by one semiconductor element.