JP2002216379A - Optical disk apparatus and method of calculating sled servo compensation amount - Google Patents

Abstract

PROBLEM TO BE SOLVED: To calculate an offset compensation amount which is given to a control amount in controlling the position of an optical head with respect to the radius direction of an optical disk, with a simple constitution. SOLUTION: In an optical disk apparatus 1, servo balance is adjusted by adding the offset compensation amount to a positional loop of a sled servo control. The servo balance is calculated at the time of shipment of the apparatus and so forth, and is preset in a memory. In the optical disk apparatus 1, a jitter of a FMDT signal obtained by demodulating a wobble signal is detected, and the offset amount for adjusting the servo balance is set to the value so that this jitter component is caused to be lowest. The jitter of the FMDT signal is calculated by counting a pulse width of the FMDT signal by an internal clock of the apparatus.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical disk apparatus for recording and / or reproducing information on and from an optical disk having a wobbling recording track, and a method for controlling the position of an optical head in a radial direction of the optical disk. The present invention relates to a thread servo correction amount calculation method for calculating an offset amount given to a control target value.

[0002]

2. Description of the Related Art In an optical disk such as a CD-R, for example, grooves or lands serving as recording tracks meander in a radial direction, and the meandering component includes position information of recording tracks and synchronization information for controlling disk rotation. ing. The meandering of these grooves and lands is called wobbling,
A signal recorded on an optical disk by wobbling is called a wobble signal.

When wobbling is performed on a recording track of an optical disk, the optical disk drive can extract position information in the disk radial direction and disk rotational speed information from a wobble signal when recording data. For this reason, in the optical disk drive, even for a blank disk on which data is not recorded yet and pits are not formed, thread servo control for controlling the position of the optical head to a predetermined recording track position,
Spindle servo control for controlling the rotation of the optical disc at a predetermined speed becomes possible.

In an optical disk drive, a tracking error signal and a focus error signal are extracted, and based on the tracking error signal and the focus error signal, tracking servo control and focus servo control are performed to record and reproduce data on the optical disk. .
In the conventional optical disk drive, when performing the tracking servo control or the focus servo control, a predetermined offset amount is added to the tracking error signal or the focus error signal to adjust the control balance of the servo control, for example, a reproduction signal or a wobble signal. Is made smaller. By reducing the jitter of the reproduction signal and the wobble signal in this way, even if high-speed recording processing in which the condition of the field of view precision at the time of recording becomes strict is performed, data recording and reproduction and wobble signal reproduction can be performed with high accuracy. Becomes possible.

[0005]

By the way, in the optical disk drive for recording and reproducing data on and from the wobbled optical disk as described above, the offset amount is added to the thread error signal, and the control balance of the thread servo control is adjusted. Done.

In order to adjust the control balance of the thread servo control, a predetermined offset amount to be added to the thread error signal must be calculated in advance, for example, in a drive manufacturing process, and the value must be preset in the drive. . In general, the predetermined offset amount is determined by demodulating a binary signal modulated into a wobble signal while writing data on a test optical disk or the like, and determining the jitter of the demodulated binary signal. The value is set to decrease. The jitter of the binarized signal modulated into the wobble signal is obtained by measuring a time difference between the binarized signal and an ideal value calculated from a reproduction clock or a master clock of the binarized signal.

However, conventionally, in order to determine the jitter of the binary signal, a so-called time interval time is used.
A measuring device such as an analyzer for measuring the time difference between pulses is separately required.

However, when jitter is measured using such an external device, the number of measurement steps is increased and the cost is increased. In addition, since an external device must be used separately, the measurement time becomes long. For example, if the test optical disk is an optical disk such as a CD-R that can be recorded only once, the number of consumed optical disks increases.

The present invention has been made in view of such circumstances, and has a simple configuration and calculates an offset correction amount to be applied to a control target value when performing servo control of the position of an optical head in the radial direction of an optical disk. It is an object of the present invention to provide an optical disk device capable of suppressing the measurement cost for performing the measurement, and a thread servo correction amount calculation method.

[0010]

SUMMARY OF THE INVENTION An optical disk apparatus according to the present invention records and / or reproduces data on and from an optical disk whose recording track is wobbled in accordance with a wobble signal containing a binary signal. An optical disk device for detecting a wobble signal from the optical disk and extracting a binarized signal included in the wobble signal, and servo-controlling the position of an optical head in a radial direction of the optical disk. Thread servo control means, offset means for providing a predetermined offset amount to a servo control target value of the thread servo control means during recording and / or reproduction of the optical disc, and offset means for calculating the predetermined offset amount And an offset amount calculating means for setting the offset amount. The jitter amount of the binarized signal for each offset amount is calculated by counting the pulse width of the binarized signal using the master clock while changing it, and the offset amount is calculated based on the calculated jitter amount. An optimum value is obtained, and the obtained optimum value is set as the predetermined offset amount.

In this optical disc device, the offset correction amount is given to the control target value of the thread servo control while being varied, and the pulse width of the binary signal is counted using a clock for each offset correction amount. The jitter amount of the binary signal in each offset correction amount is calculated based on the width count value, and the optimum value of the offset correction amount set in the optical disc device is determined based on each jitter amount in each offset correction amount.

A method for calculating a thread servo correction amount according to the present invention is set in an optical disk apparatus that records and / or reproduces data on an optical disk in which a recording track is wobbled in accordance with a wobble signal including a binarized signal. A sled servo correction amount calculating method for calculating an offset correction amount to be given to a control target value when servo-controlling the position of the optical head in the radial direction of the optical disk, wherein the binary value included in the wobble signal is The binarized signal is extracted to reproduce the binary signal, and the offset correction amount is given to the control target value of the thread servo control for moving the position of the optical head in the radial direction of the optical disc while varying the offset correction amount. The pulse width of the binary signal is counted using a clock for each offset correction amount, and the count value of the pulse width is counted. Based calculating the quantity of jitter of the binary signals in each offset correction amount, and obtains the optimum value of the offset correction amount to be set in the optical disc device based on the amount of jitter in the respective offset correction amount.

In this thread servo correction amount calculation method,
The offset correction amount is given to the control target value of the thread servo control while varying the offset correction amount.
The pulse width of the digitized signal is counted using a clock, the jitter amount of the binary signal in each offset correction amount is calculated based on the count value of the pulse width, and the jitter amount is calculated based on the jitter amount in each offset correction amount. An optimum value of the offset correction amount set in the optical disk device is obtained.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an optical disk recording / reproducing apparatus to which the present invention is applied will be described as an embodiment of the present invention. The optical disk recording / reproducing device described below is
So-called CD-, an optical disk that can be recorded only once
This is an apparatus for recording and reproducing data on the R disk. In this embodiment, only a recording / reproducing apparatus for recording / reproducing a CD-R will be described. However, the present invention is applicable to any optical disc as long as a wobble is formed on a recording track. Can be.

(Overall Configuration) FIG. 1 shows a block diagram of an optical disk recording / reproducing apparatus 1 to which the present invention is applied.

As shown in FIG. 1, an optical disk recording / reproducing apparatus 1 comprises an optical head 11, a matrix amplifier 12,
RF signal processing circuit 13, CD encode / decode circuit 14, recording compensation circuit 15, ATIP demodulation circuit 16
And a jitter amount detection circuit 17.

The optical disk recording / reproducing apparatus 1 has:
A focus / tracking servo circuit 18, a thread speed sensor 19, a digital-analog converter (DA converter) 20, a thread offset value storage circuit 21,
A thread servo circuit 22, a thread motor 23, a spindle motor 24, and a system controller 25 are provided.

The optical head 11 includes a laser diode 31, an optical system 32, a photodetector 33, a two-axis actuator 34, and the like inside. The optical head 11 converts the laser light emitted from the laser diode 31 into an optical system 32.
And irradiates the recording track of the optical disc through the optical disc, and detects the reflected light of the radiated laser beam using the photodetector 33. Further, the biaxial actuator 34 of the optical head 11 moves the objective lens so that the laser beam irradiated on the optical disk becomes a just spot and a just track. Further, the optical head 11 is supported in the apparatus housing via a sled mechanism. The sled mechanism can move the optical head 11 in the radial direction of the optical disk using, for example, a rail or the like whose traveling direction is in the disk radial direction. The driving source of this thread mechanism is
It becomes the thread motor 21.

The matrix amplifier 12 converts a detection signal from the photodetector 33 into a voltage value and reproduces (RF)
A signal, a focus error (FE) signal, a tracking error (TE) signal, and a wobble signal are generated. The RF signal is a signal containing information recorded on the optical disc. The RF signal is generated based on, for example, the total amount of light reflected from the optical disc. The FE signal is a signal including focus error amount information indicating how much the focus position of the laser light is shifted in the direction perpendicular to the disc with respect to the recording layer of the optical disc. This FE signal is generated using, for example, a method called astigmatism method, and when its value becomes 0, it becomes just focus. T
The E signal is a signal containing tracking error amount information indicating how much the irradiation position of the laser spot is shifted in the disk radial direction with respect to the center of the recording track of the optical disk. The TE signal is generated using a method of detecting a difference signal of reflected light from both edges of the pre-groove, which is a so-called push-pull method, and when this value becomes 0, it becomes a just track. The wobble signal is a signal including address information and the like included in the meandering component of the pre-groove. This wobble signal is
As in the case of the TE signal, the signal is detected from the difference signal of the reflected light from both edges of the pregroove.

From such a matrix amplifier 12, R
The F signal is supplied to the RF signal processing circuit 13, and the FE signal and the TE signal are supplied to the focus / tracking servo circuit 18.
, And the wobble signal is supplied to the ATIP demodulation circuit 16. The TE signal is output from the thread servo circuit 22.
Is also supplied.

During reproduction, the RF signal processing circuit 13
A waveform equalization process, a binarization process, an EFM demodulation process, and the like are performed on the F signal, and data recorded on the optical disc is reproduced. The reproduced data is supplied to the CD encode / decode processing unit 14. Further, the RF signal processing unit 14
During recording, the CD encoding / decoding processing unit 14
The data is supplied to the recording compensation circuit 15 by performing EFM modulation processing and the like on the recording data supplied from.

At the time of reproduction, the CD encode / decode circuit 14 generates a parity (C) added to the reproduced data.
Error correction processing is performed using (1, C2). The error-corrected data is sent to the outside via an interface (not shown). During recording, the CD encoding / decoding circuit 14 receives recording data from the outside via an interface (not shown) or the like, adds parity (C1, C2) to the recording data, and supplies the recording data to the RF signal processing circuit 13. I do.

The recording compensation circuit 15 is an RF signal processing circuit 1
3, the recording data is input, and the laser diode 31 is driven while controlling the power according to the recording data.
Write the recording data into the optical disc.

The ATIP demodulation circuit 16 is supplied with a wobble signal from the matrix amplifier 12, and receives an ATIP (Absolut Time IN Pre) signal included in a modulation component of the wobble signal.
-groove). The ATIP demodulation circuit 16 supplies the ATIP to the system controller 25.

The FMDT signal detected when extracting the ATIP is supplied from the ATIP demodulation circuit 16 to the jitter amount detection circuit 17. This jitter amount detection circuit 17
An FMDT count value relatively indicating how much a jitter component is included in the FMDT signal is detected. The FMDT count value is FM when the value is large.
When the jitter component of the DT signal is small and its value is small, it is a signal indicating that the jitter component of the FMDT signal is large. This FMDT count value is supplied to the system controller 25. The FMDT count value detected by the jitter amount detection circuit 17 is used when setting a thread offset value. The process of setting the thread offset value is not performed during normal data recording / reproduction, but is performed, for example, at the time of manufacturing or shipping inspection of the apparatus. The details of the process of setting the thread offset value will be described later.

Focus / tracking servo circuit 18
Drives the biaxial actuator 34 of the optical head 11 based on the FE signal and the TE signal supplied from the matrix amplifier 12, and controls the laser beam irradiated on the optical disc to be in the just focus and just track. That is, the focus / tracking servo circuit 18 moves the objective lens so that the FE signal becomes 0, and performs control so that the focus position of the laser beam coincides with the recording layer of the optical disc. The focus / tracking servo circuit 18 moves the objective lens so that the TE signal becomes 0, and performs control so that the laser spot irradiated on the optical disc coincides with the center of the recording track.

The sled speed sensor 19 is provided for the optical head 1.
This is a sensor for detecting the moving speed of the first sled movement. The sled speed sensor 19 may be configured to detect the rotation speed of the sled motor with, for example, a Hall element or the like. Alternatively, a scale may be mounted on the optical head 11 and the disk radius of the optical head 11 may be determined. The moving speed in the direction may be directly detected. The thread speed sensor 19 supplies a speed detection signal to the thread servo circuit 22.

The DA converter 20 converts the thread offset value data stored in the thread offset value storage circuit 21 into an analog signal, and generates an offset signal. The DA converter 20 supplies the analogized offset signal to the thread servo circuit 22. In addition,
The thread offset value storage circuit 21 includes, for example, an EEP
ROM (Electrically Erasable and Programmable Re
ad Only Memory), and is set, for example, by performing a thread offset value setting process performed at the time of manufacture or shipment of the device.

The thread servo circuit 22 drives the thread motor 23 based on the speed detection signal detected by the thread speed sensor 19 and the TE signal, thereby moving the optical head 11 in the disk radial direction.
The thread servo circuit 22 performs servo control so that the thread speed becomes constant using the position control signal given from the system controller 25 as a target value. That is, the thread servo circuit 22 generates an error signal (speed error signal) between the position control signal and the thread speed detected by the thread speed sensor 19, and sets the thread servo signal so that the speed error signal becomes zero. Perform control. The thread servo circuit 22 detects a low-frequency component of the TE signal, generates a thread error signal, and adds the thread error signal to the position control signal. Here, the thread servo circuit 22 responds to this thread error signal with D
The offset signal output from the A converter 20 is added. By adding a predetermined offset amount to the thread error signal in this way, the control balance of the thread servo control is adjusted, and even if a high-speed recording process in which the condition of the field of view accuracy at the time of recording is strict is performed, recording is performed with high precision. It is possible to do. However, the offset amount to be added to the thread error signal must be set to an optimum value that achieves the best control balance, and the optimum value differs for each device. Therefore, in the optical disk recording / reproducing apparatus 1, at the time of manufacturing or shipping, the setting process of the thread offset value is performed to obtain the optimum offset amount.

The spindle motor 24 drives, for example, an optical disk held by a turntable or a chucking mechanism.

The system controller 25 controls the start and stop of recording and reproduction, the start and stop of each servo circuit, the control of track jump to a target recording track, and the like. The system controller 25 exchanges control data with a host computer or the like, and controls the entire system as described above based on the control data. Further, when performing thread control such as track jump control, the system controller 25 supplies a position control signal indicating the amount of movement of the thread to the thread servo circuit 22.

The disk recording / reproducing apparatus 1 according to the embodiment of the present invention has the above-described configuration,
While performing various servo controls such as focus servo control, tracking servo control, and thread servo control, it is possible to perform recording and reproduction on the optical disc.

(ATIP Demodulation Circuit) Next, the ATIP demodulation circuit 16 will be described.

FIG. 2 shows a block diagram of the ATIP demodulation circuit 16. The ATIP demodulation circuit 16 includes a channel demodulation circuit 41 that demodulates a frequency of a wobble signal to extract an FMDT signal, a channel clock reproduction circuit 42 that reproduces a channel clock (FMCK) from the FMDT signal and outputs channel data, AT from data
And an ATIP decoder 43 for decoding the IP.

A included in the wobble signal of the CD-R
TIP (Absolute Time In Pre-groove) indicates time information of a recording track. One frame of ATIP includes a synchronization code (4 bits), minutes (8 bits), and seconds (8 bits).
Bits), a frame number (8 bits), and a CRC (14 bits).

The ATIP is converted into bi-phase encoded channel data, and then frequency-modulated with respect to the carrier of the wobble signal. Therefore, the cycle of the channel data has only three types of lengths, 1T and 2T and 3T used for the frame sync pattern. The channel frequency (FMCK) of the channel data is 6.3 kHz when the CD-R is rotated at the standard rotation speed.

The CD-R wobble signal is a signal obtained by frequency-modulating the channel data at ± 1 kHz with respect to a carrier signal of 22.05 kHz when rotated at a standard rotation speed. The wobble signal has channel data of 1
, The frequency is 22.05 kHz + 1 kHz, and when the channel data is 0, the frequency is 22.05 kHz.
kHz-1 kHz.

The channel demodulation circuit 41 receives a wobble signal as shown in FIG. The channel demodulation circuit 41 performs frequency demodulation by applying the input wobble signal to a PLL and outputting a signal from a low-pass filter of the PLL. A signal obtained by frequency-demodulating the wobble signal in this manner is as shown in FIG.
The signal is called an ATIP eye pattern. ATI
The P eye pattern has a high level corresponding to 23.05 kHz and a low level corresponding to 21.05 kHz. Then, the channel demodulation circuit 41 outputs a binarized signal obtained by binarizing the ATIP eye pattern at a predetermined threshold as shown in FIG. This binarized signal is called an FMDT signal. The channel demodulation circuit 41 supplies this FMDT signal to the channel clock reproduction circuit 42.

The channel clock recovery circuit 42 further applies the input FMDT signal to a PLL, and
The channel clock (FMCK) is reproduced as shown in FIG. Then, the FMDT signal is synchronized with the reproduced channel clock, and this signal is used as the channel data as the ATI signal.
It is supplied to the P decoder 43.

The ATIP decoder 43 decodes bi-phase modulated channel data to decode ATIP. Then, after performing a CRC check and the like as necessary, the data is supplied to the system controller 25.

As described above, in the ATIP demodulation circuit 16,
ATIP can be extracted from the wobble signal detected from the recording track of the optical disc.

In the ATIP demodulation circuit 16, the ATI
The FMDT signal detected when extracting P is supplied to the jitter amount detection circuit 17.

(Thread Servo Circuit) Next, the thread servo circuit 22 will be described.

FIG. 4 is a block diagram of the thread servo circuit 22. The thread servo circuit 22 includes a low-pass filter (LPF) 44, a first subtractor 45, an adder 46, a compensation circuit 47, a second subtractor 48, and a driver 49.

The thread servo circuit 22 receives a TE signal from the matrix amplifier 12, an offset signal from the DA converter 20, a position control signal from the system controller 25, and a speed detection signal from the thread speed sensor 19. .

The TE signal is input to the low-pass filter 44. The low-pass filter 44 detects and outputs a low-frequency component of the TE signal. That is, since the low-frequency component of the tracking error component becomes a signal indicating the error amount of the thread position, the low-pass filter 44 detects this error amount. The low-frequency component of the TE signal is supplied to a first subtractor 45.

The offset signal and the low frequency component of the TE signal are input to the first subtractor 45. The first subtractor 45 subtracts a low-frequency component of the TE signal from the offset signal. That is, the first subtractor 45 calculates a thread error signal which is an error amount of the thread position from the target value. Normally, a thread error signal is calculated using a position where the low frequency component of the TE signal becomes 0 as a target value.
In the optical disc recording / reproducing apparatus 1, the target value is corrected by giving an offset value to the target value 0. The offset value is calculated at the factory building when the optical disc recording / reproducing apparatus 1 is shipped. Details of this calculation processing will be described later. The thread error signal calculated by the first subtractor 45 is supplied to a first adder 46.

The first adder 46 receives a position control signal and a thread error signal. The position control signal is, for example, a signal input when a thread is forcibly moved from the system controller 25 by address movement. The first adder 46 adds the position control signal and the thread error signal.
The thread error amount to which the position control signal has been added is supplied to the compensation circuit 47.

The compensation circuit 47 performs a compensation process on the thread error signal, and outputs a thread speed signal indicating a target value of the moving speed of the thread. The thread speed signal is
The signal is supplied to a second subtractor 48.

The second subtractor 48 includes the sled speed signal output from the compensating circuit 48 and the sled speed sensor 1
9 is input. The second subtractor 48 subtracts the speed detection signal from the sled speed signal to generate a speed error signal. That is, this thread speed signal becomes the target speed of the thread speed,
From the second subtracter 48, a speed error signal indicating how much the target speed is deviated is output.
This speed error signal is supplied to the driver 49.

The driver 49 drives the sled motor 23 according to the speed error signal.

As described above, the thread servo circuit 22
A speed error signal indicating how much the thread speed deviates from the target speed is generated, and the servo control is performed so that the speed error signal becomes zero.

The thread server circuit 22 has a constant offset value added to the thread error signal indicating the error amount of the thread position with respect to the track. Therefore, it is possible to balance the control of the thread servo control.

(Process for Calculating Thread Offset Value) Next, a description will be given of a process for calculating a thread offset value to be added in order to balance the control of the thread servo control described above.

The process of calculating the thread offset value is as follows.
For example, the adjustment is performed at the time of system adjustment at the time of manufacturing or shipping of an apparatus, and the optimum thread offset value of the apparatus is calculated. The calculated thread offset value is
The thread offset value is preset in the thread offset value storage circuit 21 in the apparatus, and at the time of recording or reproduction, the thread offset value is always added to the control amount of the thread servo loop, and the thread servo control is performed.

In the disk recording / reproducing apparatus 1 according to the embodiment of the present invention, the system controller 25 provided inside
Calculates the thread offset value by forcibly changing the thread offset value, detecting the jitter amount of the FMDT signal at each change position, and finding the thread offset value at which the jitter amount is most optimal. I have. In the disk recording / reproducing apparatus 1, the obtained thread offset value is stored in an offset value storage circuit 21 in the apparatus.
Preset to.

Here, the jitter amount of the FMDT signal obtained during the process of calculating the thread offset value is detected by the jitter amount detection circuit 17. The jitter amount detection circuit 17 counts the pulse width of the FMDT signal using a main clock provided inside the apparatus or input from the outside, and calculates based on this count value.

[0058] jitter amount detection process, first, before describing the detection processing procedure of thread offset value by the system controller 25, the jitter amount of detection processing using the main clock by the jitter detection circuit 17 with reference to FIG. 5 I will explain.

The jitter amount detection circuit 17 is provided with a first counter for counting the pulse width of each pulse of the FMDT signal using a main clock. For example, the clock frequency of the main clock is set to 4.3218 MHz (34.57 MHz).
When the FMDT signal is counted using this main clock, the ideal count value of 1T is 343 counts.

Further, a window is set for determining whether or not the count value counted by the first counter falls within the range of 172 to 514. In this window, each pulse of the FMDT signal is in the range of 1T (0.5
T to 1.5T). This window is referred to as window1.

The count value counted by the first counter is 343 ± 10 counts (333 to 333).
353 count) is set. This window determines whether each pulse of the FMDT signal falls within the 1T range (0.5T-1.5T) and whether its jitter value falls within a certain range from the ideal 1T period. Window The range of the jitter value may be set to any range as long as the range is included in the range of 1T (0.5T to 1.5T). For example, if the count value is 3
23 to 363 (± 20 counts), 313 to 37
The range may be arbitrarily set as needed, such as a range of 3 (± 30 counts) or a range of 303 to 383 (± 40). The window for determining the fixed jitter position is defined as window2.

Further, a second counter for counting the number of pulses entering window 1 and a third counter for counting the number of pulses entering window 2 are provided.

Then, in the jitter amount detection circuit 17, the second
When the count value of the third counter reaches a certain number (for example, 256), the count value of the third counter is output.

The count value of the third counter output at this time is equal to FM which indicates the relative jitter amount of the FMDT signal.
It becomes the DT count value.

FIG. 6 shows a specific implementation example of the jitter amount detection circuit 17.

As shown in FIG. 6, the jitter amount detection circuit 17 includes an edge detection circuit 51, a system clock generation circuit 52, a frequency divider 53, a first counter 54, and a first comparison circuit 55. , The second comparison circuit 56, the third comparison circuit 57, the fourth comparison circuit 58, and the first AND circuit 5
9, a second counter 60, an inverting circuit 61, a second AND circuit 62, and a third counter 63.

An FMDT signal is input from the ATIP demodulation circuit 16 to the edge detection circuit 51. The edge detection circuit 51 detects both the rising edge and the falling edge of the input FMDT signal, and the output becomes high at the detection timing.

The system clock generating circuit 52 generates a system clock of, for example, 34.5744 MHz.

The frequency divider 53 divides the system clock into, for example, １ ／ cycle.

In the first counter 54, 1 /
The system clock divided by 8 is input (hereinafter, the system clock divided by 1/8 is referred to as a master clock), and the output of the edge detection circuit 51 is input to the clear terminal. That is, the first counter 54 counts the master clock whose clock frequency is 4.3218 MHz and outputs the count value. Then, the count value is cleared to 0 at the rising edge and the falling edge of the FMDT signal. Therefore, the first counter 54 outputs, for each pulse of the FMDT signal,
A count value when the pulse width is counted by the master clock is output.

The first comparison circuit 55 includes a first counter 5
The count value of 4 is compared with the lower limit value (172) of window1. The first comparison circuit 55 includes a first counter 5
If the count value of 4 is equal to or more than the lower limit value (172) of window1, the output is set to high. The second comparison circuit 56
The count value of the first counter 54 is compared with the upper limit value (514) of window1. The second comparison circuit 56
If the count value of the first counter 54 is equal to or less than the upper limit value (514) of window1, the output is set to high. That is, if both the first comparison circuit 55 and the second comparison circuit 56 are high, the count value is within the range of window1.

The third comparison circuit 57 includes a first counter 5
4 and the lower limit of window2 (for example, 33
Compare with 3). The third comparison circuit 57 determines that the count value of the first counter 54 is equal to the lower limit value (33) of the window2.
3) If above, the output is set to high. The fourth comparison circuit 58 compares the count value of the first counter 54 with the window
Compare with the upper limit value of w2 (for example, 353). The fourth comparison circuit 57 determines that the count value of the first counter 54 is wi.
If it is equal to or less than the upper limit value (353) of dow2, the output is set to high. That is, if both the third comparison circuit 57 and the fourth comparison circuit 58 are high, the count value is wi.
It will be within the range of ndow2.

Each output signal of the first comparison circuit 55, the second comparison circuit 56, the edge detection circuit 51, and the inversion circuit 63 is input to the first AND circuit 59. The first AND circuit 59 performs an AND operation on the input signal, and when all inputs are high, the output goes high. That is, when a pulse within the range of window 1 (that is, a 1T pulse) is input, the output of the first AND circuit 59 becomes high for one clock.

The output of the first AND circuit 59 is input to the EN terminal of the second counter 60. The second counter 60 counts the number of times the output of the first AND circuit 59 becomes high from 0 to 255, and the count value is 25.
When it becomes 5, the overflow signal is set to high.
The overflow signal is input to the first AND circuit 59 and the second AND circuit 62 via the inverting circuit 61. That is, the second counter circuit 60 uses the FMDT
When 256 pulses (that is, 1T pulses) in the range of window 1 among the signal pulses are input, the overflow signal is set to high. After the overflow signal goes high (that is, after 256 1T pulses are counted), the first AND circuit 59 and the second AND circuit 62 are not used until the clear signal is input from the system controller 25. Output remains low.

The output signals of the third comparison circuit 57, the fourth comparison circuit 58, the edge detection circuit 51, and the inversion circuit 63 are input to the second AND circuit 62. The second AND circuit 62 performs an AND operation on the input signal, and when all inputs are high, the output goes high. That is, the second AND circuit 62 outputs the pulse (1) in the range of window2.
The output goes high when a pulse of the T pulse that has a jitter value within a certain range is input.

The output of the second AND circuit 62 is input to the EN terminal of the third counter 63. The third counter 63 counts the number of times the output of the second AND circuit 62 becomes high, and outputs the count value as the FMDT count value. That is, the third counter circuit 63
Counts the number of pulses in the window2 range (that is, 1T pulses whose jitter value falls within a predetermined range) among the pulses of the FMDT signal.

The internal count value of each of the second counter 60 and the third counter 63 is cleared to 0 by a clear signal (input when the offset value is changed) supplied from the system controller 25. It will be.

As described above, in the jitter amount detection circuit 17,
The number of pulses having a period of 1T among the pulses of the FMDT signal is counted, and the number of pulses having a period of 1T is counted until the number becomes constant. At the same time, this counted 1T
Out of the pulses having a period of 1T, the number of pulses whose jitter value falls within a certain range is counted. When the number of pulses having a period of 1T becomes a certain number, the jitter value falls within a certain range. The number of present pulses is supplied to the system controller 25 as an FMDT count value.

Note that the FMDT count value calculated by the jitter amount detection circuit 17 indicates the rate of occurrence of pulses whose jitter value falls within a certain range among pulses having a period of 1T. The higher the value, the more FM
This shows that the jitter of the DT signal is small. Also, this FM
The DT count value is not an actual jitter value (the absolute time of the jitter between the channel clock and the FMDT signal) but a relative value.

The frequency dividing ratio of the frequency dividing circuit 53 of the jitter amount detecting circuit 17 is a value when the optical disc is recorded at a normal speed. For example, when performing double speed recording, the frequency dividing ratio is 1/4. When performing 4 times speed recording, the frequency dividing ratio is 1/2, and when performing 8 times speed recording, the frequency dividing ratio is 1 /.
If it is set to 1, it is possible to respond. Further, without changing the frequency division ratio of the frequency dividing circuit 53, for example,
It is also possible to cope with this by changing the setting of the upper and lower limits of ow1 and window2, or by changing the oscillation frequency of the system clock.

Further, the lower limit and the upper limit of window2 may be switched to arbitrarily switch the measurement accuracy of the jitter amount.

Calculation of Thread Offset Value Next, the calculation process of the thread offset value by the system controller 25 will be described with reference to the flowcharts of FIGS.

First, the system controller 25 sets the DA
An initial value (SO_start) of a thread offset value to be input to the converter 20 is set (step S1). This initial value (SO_start) is obtained when an offset signal is given to the position servo loop of the thread servo control.
The value should be such that each control loop of the focus servo, tracking servo, and thread servo can be reliably formed. Further, the value is assumed to reliably increase the FMDT counter value when the offset amount is increased from the initial value. . When the 8-bit DA converter 20 is used, for example, the value (SO_start) is set to 78h.

Subsequently, the system controller 25
The measurement end value (SO_end) of the thread offset value input to the A converter 20 is set (step S2). This measurement end value (SO_end) is a value that defines the maximum value given as the thread offset value. When the 8-bit DA converter 20 is used, for example, its value (S
O_end) is set to 90h.

Subsequently, the system controller 25
A thread offset value measurement step (SO_step) to be input to the A converter 20 is set (step S)
3). Hereinafter, the optimum thread offset value will be calculated while increasing the thread offset value from the initial value. This measurement step (SO_step) is a value that defines the increase interval. When the 8-bit DA converter 20 is used, for example, its value (SO_ste
Set p) to 4. Then, the system controller 2
5 sets the number of samples of the FMDT count value acquired from the jitter amount detection circuit 17 (step S4). For example, the number of samples of the FMDT count value is set to “50”.

Subsequently, the system controller 25 initializes a variable D_FMDT set in the firmware to 0 (step S5).

Subsequently, the system controller 25 sets a variable N set in the firmware to 0 (step S6).

Subsequently, the system controller 25 sets the initial value (SO_start) set in step S1 as the thread offset value (SO).
The initial value (SO_start) is input to the DA converter 20 (Step S7).

Subsequently, the system controller 25 starts recording on the test optical disk (step S).
8).

Subsequently, the system controller 25 acquires the FMDT count value from the jitter amount detection circuit 17 for the number of samples (for example, 50 samples) set in step S4, and calculates the average value (AVE) (step S9). ). That is, the number of pulses (FMDT count value) in which the jitter value of the FMDT signal pulse of the 1T cycle is within a certain range out of 256 pulses is, for example, 5
Zero samples are extracted, and the average value is obtained.

Subsequently, the system controller 25 compares the average value AVE calculated in step S9 with the variable D_FMD.
Compare with T (step S10). As a result of the comparison, if the average value AVE is larger, the next (step S11)
If the variable D_FMDT is larger, the process proceeds to step S15.

Subsequently, the value of the variable D_FMDT is set to step S9.
Substitute the average value AVE calculated in (Step S1)
1).

Subsequently, the system controller 25 increments the variable N by one (step S12).

Subsequently, the system controller 25
Thread offset value (SO) given to A converter 20
Is the measurement step (SO_st) set in step S3.
ep) (step S13).

Subsequently, the system controller 25 determines whether or not the currently given thread offset value (SO) is equal to or greater than the measurement end value (SO_end) set in step S2. When it is equal to or more than the measurement end value (SO_end), the process proceeds to step S15. When it is smaller than the measurement end value (SO_end), the process proceeds to step S1.
The process is repeated from 0.

Then, in step S15, the current thread offset value (SO) is set as an optimum value in this system, written in the thread offset value storage circuit 21, and the processing is terminated.

As described above, in this thread thread offset value setting processing, while increasing the thread offset value to be set in the DA converter 20 in a predetermined step,
The average value of the FMDT count value is detected, and the thread offset value having the highest FMDT count value (ie, the lowest jitter) is calculated.

As shown in FIG. 9, the jitter characteristic with respect to the thread offset value has a peak characteristic centered on a certain value. Therefore, when the FMDT count value is monitored by increasing the value from a sufficiently low thread offset value, the FMDT count value initially increases with the increase of the thread offset value, but exceeds a certain thread offset value. And FMD
The T count value decreases. Therefore, the process is terminated when the FMDT count value decreases, and the thread offset value immediately before the decrease is set to an optimal value, whereby
Processing can be performed at higher speed.

When the peak value cannot be detected (that is, when the FMDT count value has not decreased), the last thread offset value (measurement end value (SO_end)) may be set to an optimum value. .

As described above, in the optical disc recording / reproducing apparatus 1 according to the embodiment of the present invention, the offset amount applied to the position loop of the thread servo control is varied, and the pulse width of the FMDT signal is determined for each offset amount by using a clock. Then, the amount of jitter of the FMDT signal in each offset correction amount is calculated based on the count value of the pulse width.
Then, based on the calculated jitter amounts, the optimum value of the offset amount added to the position loop of the thread servo control is obtained.

As a result, in the optical disk recording / reproducing apparatus 1 according to the embodiment of the present invention, the measurement cost for calculating the offset amount given to the control amount when the position of the optical head 11 in the radial direction of the optical disk is servo-controlled is reduced. The offset correction amount can be calculated at a high speed.

FIG. 10 shows the FMDT count value for the thread offset value calculated in the embodiment of the present invention, which is obtained for the same optical disk drive, and the FM value calculated by the conventional time interval analyzer.
FIG. 3 shows a diagram comparing a jitter value of a DT signal. This FIG.
As shown in the figure, the offset value obtained by the conventional time interval analyzer and yielding the optimum jitter value matches the optimum offset value calculated by the embodiment of the present invention, and the correlation between the two values. It can be seen that the thread offset value can be calculated accurately.

In the embodiment of the present invention described above, an example is shown in which only one thread offset value is preset. However, a plurality of thread offset values when the recording speed on the optical disc is changed are recorded. For example, the configuration may be such that the thread offset value is switched between high-speed recording and low-speed recording. That is, the servo characteristics may differ depending on the recording speed depending on the thread feed mechanism. By storing the thread offset value corresponding to each speed, it is possible to flexibly cope with control systems having different characteristics.

[0104]

In the optical disc apparatus and the thread servo correction amount calculating method according to the present invention, the control target value of the thread servo control is given while varying the offset correction amount, and the binarized signal of the binary signal is provided for each offset correction amount. The pulse width is counted using a clock, the amount of jitter of the binary signal in each offset correction amount is calculated based on the count value of the pulse width, and set in the optical disc device based on the amount of jitter in each offset correction amount. The optimum value of the offset correction amount is calculated.

As a result, in the present invention, the measurement cost for calculating the offset correction amount given to the control target value when performing servo control of the position of the optical head in the radial direction of the optical disk can be reduced, and the speed can be reduced. This offset correction amount can be calculated.

[Brief description of the drawings]

FIG. 1 is a block diagram of an optical disk recording and reproducing apparatus to which the present invention is applied.

FIG. 2 is a block diagram of an ATIP demodulation circuit of the optical disc recording / reproducing apparatus.

FIG. 3 shows a wobble signal, an ATIP eye pattern, and an FMD.
It is a figure which shows the waveform of T signal and FMCK.

FIG. 4 is a block diagram of a thread servo circuit of the optical disc recording / reproducing apparatus.

FIG. 5 is a diagram for explaining an example of a jitter value detection processing method.

FIG. 6 is a circuit diagram of a jitter amount detection circuit of the optical disk recording / reproducing apparatus.

FIG. 7 is a flowchart illustrating a processing procedure of a thread offset value calculation process.

FIG. 8 is a flowchart continued from FIG. 7;

FIG. 9 is a diagram illustrating characteristics of an FMDT counter value with respect to a thread offset value.

FIG. 10 is a diagram for comparing characteristics of an FMDT counter value with respect to a thread offset value and a jitter value calculated by a time interval analyzer.

[Explanation of symbols]

1 optical disk recording / reproducing device, 11 optical head, 12
Matrix amplifier, 13 RF signal processing circuit, 14
CD encode / decode processing circuit, 15 recording compensation circuit, 16 ATIP demodulation circuit, 17 jitter amount detection circuit, 18 focus / tracking servo circuit, 19
Speed detection sensor, 20 DA converter, 21 thread offset value storage circuit, 22 thread servo circuit, 2
3 thread motor, 24 spindle motor, 25
System controller

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Takashi Sasaki 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Inside Sony Corporation (72) Inventor Jun Ishimura 6-35, Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation F term (reference) 5D090 AA01 BB04 CC01 CC04 CC14 CC16 FF02 GG03 HH01 LL09 5D118 AA13 AA18 BA01 BF02 BF03 CA13 CC12 CD11

Claims (14)

[Claims] 1. An optical disc apparatus for recording and / or reproducing data on an optical disc whose recording track is wobbled in accordance with a wobble signal containing a binarized signal, wherein a wobble signal is detected from the optical disc. Extracting means for extracting a binary signal included in the wobble signal; thread servo control means for servo-controlling the position of the optical head in the radial direction of the optical disk; Offset means for providing a predetermined offset amount to a servo control target value of the thread servo control means; and offset amount calculating means for calculating the predetermined offset amount and setting the offset amount in the offset means. The calculating means maps the pulse width of the binarized signal while changing the offset amount. The jitter amount of the binary signal for each offset amount is calculated by counting using the clock, and the optimum value of the offset amount is calculated based on the calculated jitter amount. An optical disc device characterized by setting as an offset amount. 2. The optical disc apparatus according to claim 1, wherein said offset means gives a predetermined offset amount to a control target value in a servo loop of said thread servo control means. 3. The optical disk according to claim 1, wherein said offset amount calculating means obtains an offset amount at which a jitter amount of said binarized signal is minimized, and sets the obtained offset amount to said optimum value. apparatus. 4. The offset amount calculating means calculates, for each changed offset amount, a generation ratio of a pulse whose jitter falls within a predetermined range as a jitter amount, and obtains the optimum value based on the generation ratio. 2. The method according to claim 1, wherein
An optical disk device as described in the above. 5. The offset amount calculating means calculates a generation rate of a pulse whose count value of the pulse width by the master clock falls within a predetermined range, and sets an offset amount having the highest generation rate as the optimum value. 5. The optical disk device according to claim 4, wherein: 6. The offset amount calculating means calculates the predetermined offset amount corresponding to a recording speed or a reproduction speed of an optical disk, and sets the predetermined offset amount for each recording speed or reproduction speed. Claim 1.
An optical disk device as described in the above. 7. The offset amount calculating means sets the calculated predetermined offset amount in the non-volatile memory by writing the predetermined offset amount in the non-volatile memory, and writes the predetermined offset amount in the non-volatile memory during recording and / or reproduction of the optical disk. 2. The optical disk device according to claim 1, wherein the predetermined offset amount is read. 8. An optical disc in a radial direction of the optical disc, which is set in an optical disc apparatus for recording and / or reproducing data on an optical disc whose recording track is wobbled in accordance with a wobble signal including a binarized signal. In a thread servo correction amount calculating method for calculating an offset correction amount given to a control target value at the time of performing servo control of a head position, a binarized signal included in the wobble signal is extracted and the binarized signal is extracted. The offset correction amount is given to the control target value of the sled servo control for reproducing and moving the position of the optical head in the radial direction of the optical disk while varying the offset correction amount. The pulse width is counted using a clock, and the above-described binarization for each offset correction amount is performed based on the pulse width count value. Sled servo correction amount calculation method characterized by determining an optimum value of the offset correction amount calculating the quantity of jitter of the item, is set in the optical disc device based on the amount of jitter in the respective offset correction amount. 9. The thread servo correction amount calculating method according to claim 8, wherein a predetermined offset amount is given to a control amount in a servo loop of the thread servo control. 10. The thread servo correction amount calculation method according to claim 8, wherein an offset correction amount at which the jitter amount is minimized is determined, and the determined offset correction amount is set to the optimum value. 11. For each converted offset correction amount,
9. The sled servo correction amount calculation method according to claim 8, wherein a ratio of occurrence of pulses whose jitter amount of the binarized signal falls within a predetermined range is calculated, and the optimum value is calculated based on the ratio of occurrence. 12. The method according to claim 1, wherein a generation ratio of a pulse whose count value of the pulse width by the master clock falls within a predetermined range is calculated, and an offset correction amount having the highest generation ratio is set as the optimum value. Item 12. The thread servo correction amount calculation method according to Item 11. 13. The method according to claim 1, wherein the predetermined offset correction amount is calculated in accordance with a recording speed or a reproduction speed of the optical disc, and the predetermined offset correction amount is calculated for each recording speed or reproduction speed. 8. The method for calculating a thread servo correction amount according to 8. 14. The sled servo correction amount calculation method according to claim 8, wherein the calculated predetermined offset correction amount is written to a nonvolatile memory provided in the optical disk device.