JP2002207062A - Method for obtaining electrical characteristic correlation of socket in electronic part-testing apparatus, handler, method for controlling handler and electronic part-testing apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for obtaining a correlation of electrical characteristics of a plurality of sockets, a handler, a method for controlling a handler, and an electronic part-testing apparatus. SOLUTION: A first process and a second process are carried out, and moreover, the second process is repeated so that each evaluation electronic part is set to all sockets and tested. In the first process, a plurality of evaluation electronic parts whose data are detected to be different are loaded from a customer tray to a test tray. After each of the evaluation electronic parts loaded to the test tray is set to a socket and tested, the evaluation electronic parts are transferred from the test tray and loaded to the customer tray. In the second process, the evaluation electronic parts shifted to the customer tray are loaded to the test tray so as to be set to different sockets from those to which the evaluation electronic parts are set for the test in the first process, and each of the evaluation electronic parts loaded to the test tray is set to the socket and tested. Thereafter, the evaluation electronic parts are shifted from the test tray to the customer tray.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for acquiring a correlation between electrical characteristics of a socket in an electronic component testing apparatus for testing an electronic component such as an IC chip, and a method for obtaining a correlation between electrical characteristics of such a socket. The present invention relates to a handler, a handler control method, and an electronic component test apparatus that can be acquired.

[0002]

2. Description of the Related Art As one type of a test device for testing electronic components such as IC chips, a plurality of IC chips stored in a customer tray are loaded on a test tray, conveyed onto a test head, and a plurality of ICs are pushed by a pusher. The chips are pressed all at once into the socket of the test head, and the connection terminals of each IC chip are electrically connected to the connection terminals of the socket. The IC chip is tested by an electric signal sent from the test main unit to the test head. There is known an electronic component test apparatus that separates at least a good chip and a defective chip according to the test result.

Conventionally, in such an electronic component testing apparatus, for example, when starting to use a new test head or socket, in order to make the electrical properties of a plurality of sockets uniform, the correlation of the electrical properties of each socket is determined. If there is a variation in the electric characteristics after the acquisition, the electric characteristics are adjusted.

For this purpose, an IC chip for evaluation whose data is known in advance has been subjected to the test as described above. However, in an electronic component test apparatus having a large number of sockets, the test time is reduced. For this reason, conventionally, a method of simultaneously using a plurality of evaluation IC chips having the same known data has been mainly used.

FIG. 16 is a flowchart showing a series of processing operations of the electronic component test apparatus in the conventional socket electrical characteristic correlation acquisition method, and FIG. 17 shows the transition of a tray in the conventional socket electrical characteristic correlation acquisition method. It is a schematic diagram. Here, as an example, four evaluation IC chips a1 to a4, 10 rows × 6 as shown in FIG.
17 (b)-(e), and a 2-row × 8-column socket (T1-T16) as shown in FIG. 17 (f). Shall be used.

First, as shown in FIG. 17A, an operator stores four evaluation IC chips a1 to a4 having the same data in a customer tray and sets the customer tray in a loader section of a handler. Then, when the electronic component test apparatus is started, the IC chip transporting device of the loader unit, as shown in FIG.
1 to a4 are loaded from the customer tray to the test tray (step S201). At this time, the evaluation IC chip a
1 to a4 are 1 row, 2 columns, 1 row 4 of the test tray, respectively.
Columns, 1 row, 6 columns and 1 row, 8 columns are loaded.

The test tray on which the evaluation IC chips a1 to a4 are stacked is transported to a test head by a test tray transport device. Then, each of the evaluation IC chips a1 to a4 stacked on the test tray is electrically connected to the socket of the test head by a pusher, and a test of electrical characteristics is performed (step S202). At this time, the evaluation IC chips a1 to a4 are respectively connected to the socket T1 in the first row and the first column,
Socket T2 in the first row and second column, socket T3 in the first row and third column
And the socket T4 in the first row and the fourth column (FIG. 17)
(See (b) and (f)).

After performing the first test in this way,
When the test tray loaded with the evaluation IC chips a1 to a4 is transported to the unloader unit by the test tray transport device (step S203), the IC chip transport device of the unloader unit removes the evaluation IC chips a1 to a4 from the test tray to the customer tray. (Step S20)
4).

The customer tray loaded with the evaluation IC chips a1 to a4 is temporarily stored in a stocker by the elevator (step S205). The control unit of the electronic component test apparatus determines whether or not all tests have been completed (step S206), and ends the processing operation when it determines Yes. On the other hand, if No, the customer tray (evaluation IC chips a1 to a4)
Are transported to the loader unit by the tray transfer device (step S207), and the processing operation is performed in step S2.
Return to 01.

[0010] In performing the second test, the IC chip transport device of the loader unit transfers the evaluation IC chips a1 to a4 to the test tray in one row, ten columns, and one row, respectively, as shown in FIG. Loading is carried out in 12 columns, 1 row and 14 columns, and 1 row and 16 columns. In step S202, the evaluation IC chips a1 to a4 thus loaded on the test tray are the first row and fifth column socket T5, the first row and sixth column socket T6, the first row and seventh column socket T7, and 8 per line
17 (c), (f).
See), a second test is performed.

Similarly, at the time of performing the third test, the IC chip transport device of the loader unit transfers the evaluation IC chips a1 to a4, as shown in FIG. , 2 rows and 4 columns, 2 rows and 6 columns, and 2 rows and 8 columns. In step S202, the evaluation IC chips a1 to a4 thus loaded on the test tray are respectively a socket T9 in the second row and the first column, a socket T10 in the second row and the second column, and a socket T11 in the second row and the third column. 2
It is attached to the socket T12 in the fourth column of the row (FIG. 17D,
(See (f)) The third test is performed.

In performing the fourth test, as shown in FIG. 17E, the IC chip transport device of the loader unit transfers the evaluation IC chips a1 to a4 to the test tray in two rows and ten columns, respectively. Loading is carried out in 2 rows and 12 columns, 2 rows and 14 columns, and 2 rows and 16 columns. The evaluation IC chips a1 to a4 loaded on the test tray as described above are stored in step S202.
, The socket T13 in the second row and the fifth column, the socket T14 in the second row and the sixth column, and the socket T15 in the second row and the seventh column, respectively.
And the socket T16 in the second row and the eighth column (FIG. 17).
(See (e) and (f).) A fourth test is performed.

Conventionally, according to the above sequence,
One of the IC chips a1 to a4 for evaluation was attached to all the sockets T1 to T16, and a test of the electric characteristics was performed to obtain a correlation between the electric characteristics of the sockets T1 to T16.

[0014]

However, since a plurality of evaluation IC chips which have been used in the past have the same known data, the electrical characteristics of each socket have a single correlation. Can be obtained only on the basis of the above data, and based on the correlation data of the electric characteristics obtained using the handler, the electric characteristics among the plurality of sockets can be made uniform by the test main device. It was only. However, since recent IC chips operate at extremely high frequencies, it is not enough to make the electrical characteristics uniform among a plurality of sockets. There is a need to make adjustments to improve test accuracy.

SUMMARY OF THE INVENTION The present invention has been made in view of such circumstances, and a plurality of sockets have uniform electrical characteristics with respect to various electronic components, and each socket has desired electrical characteristics. A method of obtaining a correlation of the electrical characteristics of the socket so that the electrical characteristics of the socket can be fine-tuned by the test main device, and a method of obtaining a correlation of the electrical characteristics of the socket, which can also be obtained without complicated work; An object of the present invention is to provide a handler, a handler control method, and an electronic component test apparatus.

[0016]

In order to achieve the above object, a first method for obtaining a correlation between electrical characteristics of a socket according to the present invention is to sequentially output a plurality of electronic components for evaluation having different known data. The test is carried out by mounting on all sockets to obtain the correlation of the electrical characteristics of each socket (claim 1). The first handler according to the present invention differs in the known data. A plurality of electronic components for evaluation are set so that they can be sequentially mounted on all sockets (claim 4). The handler is controlled so that each of a plurality of evaluation electronic components having different data can be sequentially mounted on all sockets (claim 7). The electronic device testing apparatus, characterized by comprising the handler (Claim 4) (claim 10).

Here, “acquisition of electrical characteristic correlation” and “acquisition of electrical characteristic correlation” referred to in the present invention include not only acquiring the electrical characteristic relationship between a plurality of sockets, but also
It also includes obtaining data on the electrical characteristics of the socket alone.

According to the above invention (claims 1, 4, 7, and 10), a plurality of evaluation electronic components having different known data can be mounted on all sockets and tested, so that the sockets can be tested. The correlation of the electrical characteristics is obtained from a plurality of data from a plurality of data, based on which the electrical characteristics of the plurality of sockets are uniform for various electronic components and each socket exhibits a desired electrical characteristic. In addition, the electrical characteristics of each socket can be finely adjusted by the test main device, so that the measurement accuracy of the socket can be improved.

In the second socket electrical characteristic correlation acquisition method according to the present invention, a plurality of evaluation electronic components having different data are loaded from a customer tray to a test tray, and each of the evaluation electronic components loaded on the test tray is loaded. After the component is mounted on the socket and the test is performed, a first step of reloading the evaluation electronic component from the test tray to the customer tray, and mounting the evaluation electronic component reloaded on the customer tray in the test The test tray so that it is installed in a different socket from the socket
After a test is performed by mounting each electronic component for evaluation loaded on the test tray to a socket, a second transfer of the electronic component for evaluation from the test tray to a customer tray is performed.
And the second step is repeatedly performed so that each of the electronic components for evaluation is mounted on all the sockets and tested (claim 2). A plurality of evaluation electronic components having different data are loaded from a customer tray to a test tray, and each of the evaluation electronic components loaded on the test tray is attached to a socket, and after the test is performed, the evaluation electronic components are loaded. A first step of transferring components from the test tray to the customer tray, and loading the evaluation electronic components transferred to the customer tray into the test tray so as to be mounted in a socket different from the socket mounted in the test; The electronic components for evaluation loaded in the test tray are mounted in sockets, and after the test is performed, the electronic components for evaluation are subjected to the test. Performing a second step of transferring from the lay to the customer tray, and repeating the second step so that each evaluation electronic component is mounted on all sockets and tested (claim 5). In the second handler control method according to the present invention, a plurality of evaluation electronic components having different data are loaded from a customer tray to a test tray, and each of the evaluation electronic components loaded in the test tray is mounted on a socket. A first step of reloading the evaluation electronic component from the test tray to the customer tray after the test has been performed, and a socket different from the socket mounted in the test for the evaluation electronic component reloaded in the customer tray. Loaded on a test tray to be mounted on the socket, each evaluation electronic component loaded on the test tray is mounted on the socket, The evaluation electronic component after the test has been performed with performing a second step of reloading the customer tray from the test tray, the second
The second electronic component testing apparatus according to the present invention is characterized in that the handler is controlled such that the process is repeated and each evaluation electronic component is mounted on all sockets and tested. The invention is provided with the handler (claim 5) (claim 10).

The sequence in the conventional socket electrical characteristic correlation acquisition method includes a plurality of evaluation I with the same data.
Because it was designed on the assumption that a C chip was used,
When a plurality of evaluation IC chips having different data are used in the conventional sequence, there arises a problem that each evaluation IC chip is attached to only some sockets. In the example shown in FIG. 17, the evaluation IC chip a
1 is mounted only on the sockets T1, T5, T9 and T13, and the evaluation IC chip a2 is mounted on the sockets T2, T6 and T6.
IC chip a for evaluation that can be attached only to T10 and T14
3 is attached only to the sockets T3, T7, T11, and T15, and the evaluation IC chip a4 is
8, T12 and T16. To solve this problem, an evaluation IC stored in a customer tray
It is necessary to repeat the conventional sequence while rearranging the chips many times, which requires an extremely complicated operation to the operator.

However, the above invention (claims 2, 5 and 5)
According to 8, 10), a plurality of evaluation electronic components having different data can be automatically mounted on all the sockets and tested, so that the operator can first evaluate the evaluation IC. If the chips are stored in the customer tray and set in the electronic component tester, then the evaluation I
There is no need to perform the work of rearranging the C chips many times.

In a third socket electrical characteristic correlation acquiring method according to the present invention, in the socket electrical characteristic correlation acquiring method (claim 2), the evaluation electronic component is placed in a younger one of the test tray rows, In the first step, the electronic components for evaluation are picked up from the younger row in the socket, and from the younger row in the same row in the first step. The evaluation electronic component is loaded on a test tray so as to be mounted, and in the second step, the evaluation electronic component is placed in a socket next to the socket mounted in the test or a socket in the next row. If not, the electronic components for evaluation are loaded on a test tray so as to be mounted on the sockets in the first row of the next row, and each electronic component for evaluation is mounted on all sockets. Until worn and tested, after repeating the second step, again, so that the evaluation electronic components can be mounted from the younger row of the socket row, the same row from the younger row of the socket, The electronic component for evaluation is loaded on a test tray, and the electronic component for evaluation is reloaded from the test tray to a customer tray (Claim 3). In claim 5, the electronic components for evaluation are set so as to be picked up from the test tray and transferred to the customer tray in order from the youngest row in the test tray row and the youngest row in the same row. ,
In the first step, the electronic components for evaluation are loaded on a test tray so that the electronic components for evaluation are mounted from the younger row of the socket and the younger row in the same row,
In the second step, the electronic component for evaluation is mounted in a socket in the next row of the socket mounted in the test, or in a case where there is no socket in the next column, in a socket in the next row and first column. Then, after loading the electronic components for evaluation on a test tray and repeating the second step until all the electronic components for evaluation are mounted on all sockets and tested, the electronic components for evaluation are again placed in the socket. Younger one in a row,
In the same row, the evaluation electronic components are loaded on a test tray so that the evaluation electronic components can be mounted from a younger one in a column, and the evaluation electronic components are reloaded from the test tray to a customer tray. Claim 6),
In a third handler control method according to the present invention, in the handler control method (Claim 8), the electronic components for evaluation may be stored in the test tray in descending row of a test tray and in the same row in descending order of column. The handler is controlled so as to be picked up from a tray and transshipped to a customer tray, and in the first step, the evaluation electronic component is mounted from a younger row of the socket row and a younger row of the same row. The electronic component for evaluation is loaded on a test tray, and in the second step, the electronic component for evaluation is a socket next to the socket mounted in the test, or if there is no socket in the next row, The electronic components for evaluation are loaded on the test tray so as to be mounted on the sockets in the first row and the next column, and the electronic components for evaluation are mounted on all the sockets and tested. After repeating the second step, the evaluation electronic component is again mounted so that the evaluation electronic component can be mounted from the younger row of the socket row and the youngest row of the same row. A third electronic component testing apparatus according to the present invention, wherein a handler is controlled so as to be loaded on a test tray and that the electronic components for evaluation are loaded from the test tray to a customer tray (claim 9). Is provided with the handler (claim 6) (claim 10). Here, the “next row” means, in principle, a row obtained by adding 1 to the current row. When the current row is the last row, the first row is set as the next row.

In the above invention (claims 3, 6, 9, and 10), mounting of each of the electronic components for evaluation on all sockets is performed.
In the process after the test is completed, the electronic components for evaluation are stacked on the test tray in the same state as in the first step, and from that state, the younger one of the rows of the test tray and the younger one of the columns in the same row. They are picked up in order and transshipped to customer trays. At this time, each evaluation electronic component having different data can be loaded on the customer tray in the same order as when it was first loaded on the customer tray. Therefore, according to the invention (claims 3, 6, 9, and 10), the socket electrical characteristic correlation acquisition sequence can be repeatedly performed a plurality of times without replacing each evaluation electronic component with a customer tray. it can.

Although the electronic components are not particularly limited, for example, IC chips such as memory devices are the most common.

[0025]

Embodiments of the present invention will be described below with reference to the drawings. FIGS. 1 to 12 are diagrams relating to the first embodiment of the present invention, and FIGS. 13 to 15 are diagrams relating to the second embodiment of the present invention. First, a first embodiment of the present invention will be described.

[First Embodiment] FIG. 1 is an overall side view of an IC test apparatus according to a first embodiment of the present invention, and FIG.
, FIG. 3 is a flowchart of a tray showing a method of handling an IC under test, FIG. 4 is a perspective view showing a structure of an IC stocker of the IC test apparatus, and FIG.
A perspective view showing a customer tray used in the C test apparatus,
FIG. 6 is a sectional view of a main part in a test chamber of the IC test apparatus.
FIG. 7 is a partially exploded perspective view showing a test tray used in the IC test apparatus, and FIG. 8 is an exploded perspective view showing a structure near a socket in a test head of the IC test apparatus.

First, the overall configuration of an IC test device as an electronic component test device according to the first embodiment of the present invention will be described. As shown in FIG. 1, an IC test apparatus 10 according to the present embodiment includes a handler 1, a test head 5, and a test main apparatus 6. The handler 1 carries out an operation of sequentially transporting an IC chip to be tested (an example of an electronic component) to a socket provided in the test head 5, sorting the IC chips having undergone the test in accordance with the test result, and storing them in a predetermined tray. I do.

The socket provided in the test head 5 is electrically connected to the main test device 6 through a cable 7, and an IC chip detachably mounted on the socket is connected to the socket.
The IC chip is connected to the test main device 6 through the cable 7 and the IC chip is tested by a test electric signal from the test main device 6.

Although a control device for mainly controlling the handler 1 is built in a lower portion of the handler 1, a space portion 8 is provided in a part thereof. In this space portion 8, the test head 5
The IC chip can be mounted in a socket on the test head 5 through a through hole formed in the handler 1.

This IC test apparatus 10 is an apparatus for testing an IC chip as an electronic component to be tested at a temperature higher than normal temperature (high temperature) or lower than normal temperature (low temperature). As shown in FIG. 2 and FIG. 3, the thermostat 101, the test chamber 102, and the heat removal tank 10
3 with the chamber 100. The upper part of the test head 5 shown in FIG. 1 is inserted into the test chamber 102 as shown in FIG. 6, where the test of the IC chip 2 is performed.

FIG. 3 is a view for explaining a method of mounting a test IC chip in the IC test apparatus according to the present embodiment. Actually, members arranged vertically are shown in plan view. There is also a part shown in. Therefore, its mechanical (three-dimensional) structure can be understood mainly with reference to FIG.

As shown in FIGS. 2 and 3, the handler 1 of the IC test apparatus 10 according to the present embodiment stores IC chips to be tested and stores IC chips that have been tested and classified. Section 200, a loader section 300 for sending an IC chip under test sent from the IC storage section 200 to the chamber section 100, a chamber section 100 including a test head, and an IC that has been tested in the chamber section 100 and is taken out. And an unloader section 400 for classification. Inside the handler 1, the IC chip
It is stored in the test tray and transported.

A large number of IC chips before being set in the handler 1 are stored in the customer tray KST shown in FIG. 5, and in that state, are supplied to the IC storage section 200 of the handler 1 shown in FIGS. The test tray T conveyed in the handler 1 from the customer tray KST
The IC chip 2 is replaced in ST (see FIG. 7). Inside the handler 1, as shown in FIG. 3, the IC chip moves while being placed on the test tray TST, is subjected to high-temperature or low-temperature stress, and is tested (inspected) for proper operation. Are classified according to the test results. Hereinafter, the inside of the handler 1 will be described in detail individually.

First, a part related to the IC storage unit 200 will be described. As shown in FIG.
0, a pre-test IC stocker 201 for storing pre-test IC chips, and a tested IC stocker 202 for storing IC chips classified according to the test results.

The pre-test IC stocker 201 and the tested IC stocker 202, as shown in FIG. 4, have a frame-shaped tray support frame 203, which penetrates from a lower portion of the tray support frame 203 and moves upward and downward. And an elevator 204 that enables it. In the tray support frame 203,
A plurality of customer trays KST are stacked and supported,
Only the stacked customer trays KST are moved up and down by the elevator 204. As shown in FIG. 5, the customer tray KST in this embodiment has a 10-row × 6-column IC chip storage section.

In the pre-test IC stocker 201 shown in FIG. 2, customer trays KST containing IC chips to be tested are stacked and held. Also,
In the tested IC stocker 202, customer trays KST containing IC chips classified after the test are stacked and held.

Since the pre-test IC stocker 201 and the tested IC stocker 202 have substantially the same structure, the pre-test IC stocker 201 is replaced with the tested IC stocker 201.
It can be used as the stocker 202 and vice versa. Therefore, the number of pre-test IC stockers 201 and the number of tested IC stockers 202 can be easily changed as needed.

As shown in FIGS. 2 and 3, in the present embodiment, two stockers S
TK-B is provided. Next to the stocker STK-B,
The unloader unit 400 is used as the tested IC stocker 202.
There are provided two empty stockers STK-E to be sent to the server. In addition, next to the tested IC stocker 202, 8
Stockers STK-1, STK-2, ..., STK-8
Are provided so that they can be sorted and stored in a maximum of eight categories according to the test results. In other words, besides the non-defective products and the defective products, the operation speed can be sorted into high-speed ones, medium-speed ones, low-speed ones among the non-defective ones, and the ones that need to be retested among the defective ones. .

Second, a portion related to the loader section 300 will be described. The pre-test IC stocker 201 shown in FIG.
Customer tray K stored in the tray support frame 203
As shown in FIG. 2, the ST is carried from below the device substrate 105 to the window 306 of the loader unit 300 by a tray transfer arm 205 provided between the IC storage unit 200 and the device substrate 105. In the loader unit 300, the IC chips under test loaded on the customer tray KST are once transferred to a preciser 305 by the XY transfer device 304, where the mutual positions of the IC chips under test are corrected. After that, this Precisor 3
The IC chip under test transferred to the test tray 05 is transferred to the test tray TST stopped on the loader unit 300 again using the XY transfer device 304.

From the customer tray KST to the test tray T
XY transfer device 3 for transferring IC chips under test to ST
As shown in FIG. 2, reference numeral 04 denotes two rails 301 provided on the upper portion of the device substrate 105, and two rails 30
1. Test tray TST and customer tray KST
And a movable head 303 supported by the movable arm 302 and capable of moving in the X direction along the movable arm 302. .

The movable head 3 of the XY transport device 304
At 03, a suction head is mounted downward, and the suction head moves while sucking air, thereby sucking the IC chip under test from the customer tray KST, and transferring the IC chip under test to the test tray TST. Transshipment. For example, about eight such suction heads are mounted on the movable head 303, and eight IC chips to be tested can be transferred to the test tray TST at a time.

Third, a portion related to the chamber 100 will be described. The test tray TST described above is loaded into the chamber 100 after the IC chips to be tested are loaded by the loader unit 300, and each IC chip to be tested is tested while being mounted on the test tray TST.

As shown in FIGS. 2 and 3, the chamber 1
00 is the IC under test loaded on the test tray TST
A constant temperature bath 101 for applying a desired high or low temperature thermal stress to the chip; a test chamber 102 in which the IC chip to be tested which is given a thermal stress in the constant temperature bath 101 is mounted on a socket on a test head; From the IC chip under test tested in the test chamber 102,
And a heat removal tank 103 for removing applied thermal stress.

In the heat removal tank 103, when a high temperature is applied in the constant temperature bath 101, the IC chip under test is cooled by blowing air to return to room temperature, and when a low temperature is applied in the constant temperature bath 101, the IC chip under test is applied. Is heated with warm air or a heater to return the temperature to a level that does not cause condensation. Then, the heat-removed IC chip under test is carried out to the unloader section 400.

As shown in FIG. 2, a constant temperature bath 101 and a heat removal bath 103 of a chamber 100 are
It is arranged so as to project upward. As shown conceptually in FIG. 3, the thermostatic chamber 101 is provided with a vertical transfer device, and a plurality of test trays TST are supported by the vertical transfer device until the test chamber 102 becomes empty. While waiting. Mainly, during this standby, a high-temperature or low-temperature thermal stress is applied to the IC chip under test.

As shown in FIG. 6, the test chamber 102
, A test head 5 is arranged at the lower center thereof, and a test tray TST is carried on the test head 5. In this case, all the IC chips 2 held by the test tray TST shown in FIG. 7 are sequentially brought into electrical contact with the test head 5, and a test is performed on all the IC chips 2 in the test tray TST. On the other hand, the test tray TST that has completed the test is heat-removed in the heat-removal tank 103, and after returning the temperature of the IC chip 2 to room temperature, is discharged to the unloader section 400 shown in FIGS.

Further, as shown in FIG. 2, an entrance opening for feeding the test tray TST from the apparatus substrate 105 is provided above the constant temperature bath 101 and the heat removal tank 103, and the test tray TST is An outlet opening for sending out is formed. The device substrate 105 includes
A test tray transport device 108 for inserting and removing the test tray TST from these openings is mounted. These transport devices 108 are constituted by, for example, rotating rollers. The test tray TST discharged from the heat removal tank 103 is transported to the unloader unit 400 by the test tray transport device 108 provided on the device substrate 105.

FIG. 7 is an exploded perspective view showing the structure of the test tray TST used in this embodiment. The test tray TST has a rectangular frame 12, on which a plurality of crossbars 13 are provided in parallel and at equal intervals. A plurality of mounting pieces 14 are formed on both sides of these bars 13 and on the inside of the side 12a of the frame 12 parallel to the bars 13 so as to project at equal intervals in the longitudinal direction. Each insert storage portion 15 is constituted by two opposed mounting pieces 14 of a plurality of mounting pieces 14 provided between the crosspiece 13 and between the crosspiece 13 and the side 12a.

Each insert storage section 15 has one
Each of the inserts 16 is housed, and the insert 16 is attached to the two attachment pieces 14 in a floating state by using a fastener 17. In this embodiment, 16 × 2 inserts 16 are attached to one test tray TST. That is, the test tray TST in the present embodiment
Has an IC chip storage section of 2 rows × 16 columns. By storing the IC chip 2 under test in the insert 16, the IC chip 2 under test is loaded on the test tray TST.

In the insert 16 of the present embodiment,
As shown in FIGS. 7 and 8, a rectangular concave IC housing portion 19 for housing the IC chip 2 to be tested is formed at the center. A guide hole 20 into which the guide pin 32 of the pusher 30 is inserted is formed at the center of both ends of the insert 16, and a corner for both ends of the insert 16 for attaching to the mounting piece 14 of the test tray TST. A hole 21 is formed.

As shown in FIG. 8, a socket board 50 is arranged on the test head 5, and the socket 40 is fixed to the socket board 50. The socket 40 is provided with connection terminals 43 to which the connection terminals 2a of the IC chip 2 are connected. At both ends of the socket 40, guide holes 4 into which the guide pins 32 of the pusher 30 are inserted.
1 is provided.

The socket 40 according to this embodiment is the same as that shown in FIG.
As shown in FIG. 2 (j), the IC chips 2 to be tested which are configured in 2 rows × 8 columns and held in the test tray TST shown in FIG. 7 in 2 rows × 16 columns are mounted every other column. It has a configuration. In such a configuration, an even-numbered (or odd-numbered) row of IC chips 2 is first mounted on the socket 40 and tested, and then an odd-numbered (or even-numbered) IC chip 2 is tested.
The chip 2 is mounted on the socket 40 and tested.

As shown in FIGS. 6 and 8, on the upper side of the test head 5, pushers 30 are provided corresponding to the number of sockets 40. As shown in FIG. 8, the pusher 30 is provided with a pressing element 31 for pressing the lead 2 a of the IC chip 2 under test against the connection terminal 43 of the socket 40 toward the lower side.

As shown in FIG. 6, each pusher 30 is fixed to the lower end of an adapter 62.
The match plate 60 is elastically held. The match plate 60 is positioned above the test head 5 and between the pusher 30 and the socket 40.
The ST is mounted so that it can be inserted. The pusher 30 held by the match plate 60 serves as a driving plate (driving body) of the test head 5 or the Z-axis driving device 70.
With respect to 72, it is movable in the Z-axis direction. It should be noted that the test tray TST is positioned in a direction (X
From the shaft) and is conveyed between the pusher 30 and the socket 40. Test tray TST inside chamber 100
As a transporting means, a transporting roller or the like is used.
When the test tray TST is transported, the driving plate of the Z-axis driving device 70 is raised along the Z-axis direction, and between the pusher 30 and the socket 40, there is sufficient space for the test tray TST to be inserted. A gap is formed.

As shown in FIG. 6, the test chamber 102
A pressing portion 74 is fixed to the lower surface of the drive plate 72 disposed inside the device, so that the upper surface of the adapter 62 held by the match plate 60 can be pressed. A drive shaft 78 is fixed to the drive plate 72.
Is connected to a drive source (not shown) such as a motor, and moves the drive shaft 78 up and down along the Z-axis direction.
2 can be pressed.

The match plate 60 is formed according to the shape of the IC chip 2 to be tested, the number of sockets of the test head 5 (the number of IC chips 2 to be measured simultaneously), and the like.
It has a replaceable structure together with the adapter 62 and the pusher 30. By making the match plate 60 exchangeable in this way, the Z-axis driving device 70 can be made a general-purpose one. In the present embodiment, the pressing portion 74
And the adapter 62 have a two-to-one correspondence, for example,
When the number of rows of the socket 40 of the test head 5 is changed from two to four as in a second embodiment described later, the pressing portion 74 and the adapter 62 are connected to one another by replacing the match plate 60. A one-to-one correspondence is also possible.

In the present embodiment, in the chamber 100 configured as described above, as shown in FIG. 6, a temperature control blower 90 is mounted inside a closed casing 80 forming a test chamber 102. is there. The temperature control blower 90 has a fan 92 and a heat exchange unit 94,
The air inside the casing is sucked in by the fan 92, and discharged into the inside of the casing 80 through the heat exchange section 94 and circulated, thereby setting the inside of the casing 80 to a predetermined temperature condition (high or low temperature).

Fourth, a portion related to the unloader section 400 will be described. The XY transfer devices 404 and 404 having the same structure as the XY transfer device 304 provided in the loader unit 300 are also provided in the unloader unit 400 illustrated in FIGS.
The test tray T carried out to the unloader unit 400 by the XY transfer devices 404
From ST, the tested IC chips are transferred to the customer tray KST.

As shown in FIG. 2, a pair of windows 406 on which the customer tray KST conveyed to the unloader section 400 is disposed so as to face the upper surface of the apparatus board 105 is formed on the apparatus board 105 of the unloader section 400. There are 406 pairs.

An elevator 204 for raising and lowering the customer tray KST is provided below each window 406 (see FIG. 4). Here, the tested IC chips to be tested are reloaded and filled up. The loaded customer tray KST is placed and lowered, and the full tray is transferred to the tray transfer arm 205.

Next, a sequence for obtaining the correlation of the electrical characteristics of each socket 40 provided on the test head 5 in the IC test apparatus 10 described above will be described. FIGS. 9 and 10 are flowcharts showing a series of processing operations relating to the acquisition of the socket electrical characteristic correlation of the IC test apparatus according to the present embodiment. FIGS. It is a schematic diagram which shows transition of.

As described above, in this embodiment, a customer tray of 10 rows × 6 columns as shown in FIGS. 5 and 11A, and shown in FIGS. 7 and 11B to 12I. The test tray of 2 rows × 16 columns as shown in FIG.
(J) Sockets of 2 rows × 8 columns (T1 to T1) as shown in FIG.
6) shall be used. Also, in the present embodiment, as an example, four evaluation ICs having different data are known.
The electrical characteristics correlation of the socket 40 is obtained by using the chips A, B, C, and D. However, the present invention is not limited to this, and any number of two or more evaluation IC chips can be used.

The XY transfer device 404 of the unloader section 400 of the handler 1 according to the present embodiment, when reloading IC chips from the test tray to the customer tray, uses the smaller row of the test tray (FIG. 11, FIG. In the same row, IC chips are picked up in order from the youngest column (the leftmost column in FIGS. 11 and 12). Younger row), the younger one of the columns in the same row (the younger one on the left in FIG. 11)
It is set to be stacked in order from.

First, the operator sets the processing operation of the handler 1 through the interface unit 110 as shown in FIG. 2 and, as shown in FIG. Evaluation IC chips A to D
Are stored in rows 1 to 4 of the customer tray, and the customer tray is set in the pre-test IC stocker 201.

When the IC test apparatus 10 is started, the XY transfer device 304 of the loader unit 300
As shown in (b), the evaluation IC chips A to D are loaded from the customer tray to the test tray (step S10).
1). At this time, the evaluation IC chips A to D are placed on the test tray at 1 row and 2 columns, 1 row and 4 columns, 1 row and 6 columns, and 1 row, respectively.
Loaded in row 8 column.

The test tray on which the evaluation IC chips A to D are stacked is sent into the chamber 100 by the test tray transfer device 108, and then transferred to the test head 5 by the test tray transfer device in the chamber 100. Each of the evaluation IC chips A to A stacked on the test tray
D is electrically connected to the socket 40 of the test head 5 by a pusher, and an electrical characteristic test is performed (step S).
102). At this time, the evaluation IC chips A to D are attached to the socket T1 in the first row and the first column, the socket T2 in the first row and the second column, the socket T3 in the first row and the third column, and the socket T4 in the first row and the fourth column, respectively. (FIGS. 11B and 12J)
reference).

After performing the first test in this way,
When the test tray loaded with the evaluation IC chips A to D is transported to the unloader unit 400 by the test tray transport device 108 (Step S103), the unloader unit 400
The XY transfer device 404 transfers the evaluation IC chips A to D from the test tray to the customer tray (step S104).

The customer tray loaded with the evaluation IC chips A to D is temporarily tested by the elevator
It is stored in the stocker 202 (step S105). The control unit of the handler 1 determines whether or not all the tests have been completed (step S106). If the determination is No, the customer tray (the evaluation IC chips A to A) temporarily stored in the tested IC stocker 202 is temporarily determined. D is loaded) to the loader unit 300 by the tray transfer arm 205 (step S107), and the processing operation returns to step S101.

In performing the second test, the loader unit 3
As shown in FIG. 11 (c), the XY transport device 304 of No. 00 transfers the evaluation IC chips A to D to the test tray in one row and four columns, one row and six columns, one row and eight columns, and one Load in 10 rows. In step S102, the evaluation IC chips A to D loaded on the test trays are the socket T2 in the first row and the second column, the socket T3 in the first row and the third column, and the socket T4 in the first row and the fourth column, respectively. It is attached to the socket T5 in the first row and the fifth column (FIGS. 11C and 12J).
See), a second test is performed.

Similarly, in the third test and the fourth test, the evaluation IC chips A to D are mounted so as to be mounted on the sockets in the next row of the socket mounted in the previous test. Handle chips AD.

In performing the fifth test, the loader unit 3
As shown in FIG. 11D, the X-Y transfer device 304 of No. 00 transfers the evaluation IC chips A to D to the test tray at 1 row, 10 columns, 1 row 12 columns, 1 row 14 columns, and 1 row, respectively. 1
Load in 6 rows. In step S102, the evaluation IC chips A to D loaded on the test tray are respectively a socket T5 in the first row and the fifth column, a socket T6 in the first row, a socket T7 in the first row and the seventh column, and a first row. It is attached to the socket T8 in the eighth row (FIG.
(See (j)) The fifth test is performed.

In performing the sixth test, the loader unit 3
As shown in FIG. 11 (e), the XY transport device 304 of No. 00 transfers the evaluation IC chips A to D to the test tray at 1 row, 12 columns, 1 row 14 columns, 1 row 16 columns, and 2 rows, respectively. 2
Load in rows. In step S102, the evaluation IC chips A to D stacked on the test tray in this manner are the first row and sixth column socket T6, the first row and seventh column socket T7, the first row and eighth column socket T8, and 2 lines 1
It is attached to the socket T9 in the row (FIG.
(J)), the sixth test is performed.

Similarly, in the seventh to twelfth tests, the evaluation IC chips A to D are mounted in the next row of sockets mounted in the previous test, or in the next row. If there is no socket at the next line (2
(Row) The evaluation IC chips A to D are handled so as to be attached to the sockets in the first column.

In performing the thirteenth test, as shown in FIG. 12F, the XY transfer device 304 of the loader 300 transfers the evaluation IC chips A to D to the test tray in two rows and ten columns, respectively. , 2 rows and 12 columns, 2 rows and 14 columns, and 2 rows and 16 columns. In step S102, the evaluation IC chips A to D stacked on the test tray are respectively a socket T13 in the second row and the fifth column, a socket T14 in the second row and the sixth column, and a socket T15 in the second row and the seventh column. It is attached to the socket T16 in the second row and the eighth column (FIG. 12).
(See (f) and (j)), and the thirteenth test is performed.

In performing the fourteenth test, the XY transfer device 304 of the loader 300 transfers the evaluation IC chips A to D to the test tray in two rows and twelve columns as shown in FIG. , 2 rows and 14 columns, 2 rows and 16 columns, and 1 row and 2 columns. In step S102, the evaluation IC chips A to D loaded on the test tray in this manner are the socket T14 in the second row and the sixth column, the socket T15 in the second row and the seventh column, and the socket T16 in the second row and the eighth column, respectively. It is attached to the socket T1 in the first row and first column (FIG. 12 (g),
(J)), the 14th test is performed.

Similarly, in the fifteenth test, the evaluation IC chips A to D are mounted on the sockets in the next row of the sockets mounted in the previous test, or when there is no socket in the next row. The evaluation IC chips A to D are attached to the sockets of the next row (first row) and the first column.
Handle.

In performing the sixteenth test, the XY transfer device 304 of the loader 300 transfers the evaluation IC chips A to D to the test tray in two rows and 16 columns, respectively, as shown in FIG. , 1 row, 2 columns, 1 row, 4 columns and 1 row, 6 columns. The evaluation IC chips A to D loaded on the test tray in this manner are
The sockets are mounted on the socket T16 in the second row and the eighth column, the socket T1 in the first row and the first column, the socket T2 in the first row and the second column, and the socket T3 in the first row and the third column (see FIGS. 12H and 12J). ), The 16th test is performed.

After the sixteenth test is performed in this way, the test tray on which the evaluation IC chips A to D are stacked is unloaded by the test tray transport device 108 to the unloader section 400.
Transported to the unloader unit 4 (step S103).
The X-Y transfer device 404 of evaluation IC chips A to
D is transferred from the test tray to the customer tray (step S104).

The customer tray loaded with the evaluation IC chips A to D is temporarily
It is stored in the stocker 202 (step S105). The control unit of the handler 1 determines whether or not all the tests have been completed (step S106).
The customer tray (containing the evaluation IC chips A to D) once stored in the tested IC stocker 202 is transported to the loader unit 300 by the tray transfer arm 205 (step S108).

Next, the XY transfer device 304 of the loader unit 300 loads the evaluation IC chips A to D from the customer tray to the test tray as shown in FIG. 12 (i) (step S109). At this time, the evaluation IC chip A
To D are 1 row and 2 columns, 1 row and 4 columns of the test tray, respectively.
It is loaded in one row and six columns and one row and eight columns.

The test tray on which the evaluation IC chips A to D are stacked is sent into the chamber 100 by the test tray transfer device 108, and then transferred to the test head 5 by the test tray transfer device in the chamber 100. Then, without performing the test, the test tray on which the evaluation IC chips A to D are stacked is transported to the unloader unit 400 by the test tray transport device 108 (Step S1).
10).

Evaluation I transported to unloader section 400
The C chips A to D are reloaded from the test tray to the customer tray by the XY transfer device 404 of the unloader unit 400 (step S111). At this time, the XY transfer device 404 of the unloader unit 400 picks up the evaluation IC chips A to D from the test tray in the order of A, B, C, D, and in that order, the first row, the first column to the fourth column of the customer tray. Since the evaluation IC chips A to D are stacked in a row, the evaluation IC chips A to D are transshipped to the customer tray in an arrangement as shown in FIG.

The customer tray on which the evaluation IC chips A to D are loaded is lifted by the elevator 204.
Store it in the tested IC stocker 202 (step S11)
2).

According to the above sequence, all of the evaluation IC chips A to D are mounted on all the sockets T1 to T16, and the electrical characteristics are tested.
The correlation between the electrical characteristics of T16 and T16 is obtained. Since each of the evaluation IC chips A to D has different data, the correlation of the electrical characteristics of the socket 40 is obtained from a plurality of data in a multi-faceted manner. Fine adjustment of the electrical characteristics of each socket can be performed by the test main unit so that the electrical characteristics of the sockets 2 are uniform and each socket 40 exhibits desired electrical characteristics. By such an operation, the socket 4
It is possible to improve the measurement accuracy of 0, eliminate the inaccurate test results due to the poor electrical characteristics of the sockets 40 and the variation in the electrical characteristics among the sockets 40, and secure the reliability of the IC test apparatus 10. .

When the series of sequences is completed, the evaluation IC chips A to D are stacked on the customer tray in the same arrangement as that initially stacked on the customer tray. The above sequence can be repeated a plurality of times without the need to switch to the customer tray.

[Second Embodiment] Next, a second embodiment of the present invention will be described. FIG. 13 is a partially exploded perspective view showing a test tray used in the IC test apparatus according to the second embodiment of the present invention, and FIGS. 14 and 15 show the transition of the tray in the socket electric characteristic correlation acquisition of the IC test apparatus. FIG. Regardless of the difference between the embodiments, members and the like represented by the same name in the drawings are given the same numbers.

The IC test apparatus according to the first embodiment has sockets (T1 to T16) of 2 rows × 8 columns on the test head as shown in FIG. 12 (j). As shown in FIGS. 11 (b) to 12 (i), the test tray TST of 2 rows × 16 columns is used.
As shown in FIG. 15H, the IC test apparatus according to the embodiment of the present invention has a socket (T1
13 and FIGS. 14 (b) to 15
As shown in (g), a test tray TST of 4 rows × 16 columns
Other than that, it has the same configuration as the IC test apparatus according to the first embodiment. in this way,
The IC test apparatus according to the second embodiment includes a test tray T
This is a type that can simultaneously test all the IC chips held in the ST.

Hereinafter, a sequence for obtaining the correlation of the electrical characteristics of each socket in the IC test apparatus according to the second embodiment will be described. Note that a series of processing operations relating to the acquisition of the socket electrical characteristic correlation is shown by the flowcharts of FIGS. 9 and 10 as in the case of the IC test apparatus according to the first embodiment.

Here, in this embodiment, FIGS.
It is assumed that a customer tray of 10 rows × 6 columns as shown in FIG. In the present embodiment, as an example, four evaluation IC chips A, B, C, D and 60 dummy IC chips 1 having different data are known.
The electrical characteristic correlation of the socket is obtained using 60.
As described above, by using the dummy IC chips 1 to 60 to fill all the IC chip storage portions of the test tray,
The test can be performed under the same conditions as when actually testing the IC chip (for example, conditions such as contact pressure between the IC chip and the socket).

First, the operator sets the processing operation of the handler 1 through the interface unit 110 as shown in FIG. 2 and, as shown in FIG. Evaluation IC chips A to D
Are stored in rows 1 to 4 of the first customer tray, and dummy IC chips 1 to 56 are respectively stored in the first customer tray.
And the dummy IC chips 57 to 60 are stored in rows 1 to 1 of the second customer tray, respectively, and the customer trays are stored. It is set on the pre-test IC stocker 201.

When the IC test apparatus 10 is started, the XY transfer device 304 of the loader unit 300
As shown in (b), evaluation IC chips A to D and dummy IC chips 1 to 60 are sequentially loaded from a customer tray to a test tray (step S101). At this time, the evaluation IC chips A to D are loaded on the test tray in rows 1 to 4 respectively, and the dummy IC chips
Reference numerals 60 to 60 denote test trays in rows 1 to 5 and rows 4 to 16, respectively.
Loaded in a row.

Evaluation IC chips A to D and dummy I
The test tray loaded with the C chips 1 to 60 is sent into the chamber 100 by the test tray transfer device 108, and then transferred to the test head 5 by the test tray transfer device in the chamber 100. Each of the evaluation IC chips A to D and the dummy I
The C chips 1 to 60 are electrically connected to the socket 40 of the test head 5 by a pusher, and an electric characteristic test is performed (step S102). At this time, the evaluation IC chips A to D are respectively connected to the sockets T1 to 1 row 4 in the first row and first column.
Dummy IC chip 1 attached to socket T4 in the row
-60 are sockets T5 in the first row and the fifth column, and the fourth row is the first row.
The socket T64 in the sixth row is mounted (FIG. 14B,
FIG. 15 (h)).

After conducting the first test in this way,
Evaluation IC chips A to D and dummy IC chips 1 to 1
The test tray loaded with 60
8 (step S103), the XY transfer device 4 of the unloader 400
04 transfers the evaluation IC chips A to D and the dummy IC chips 1 to 60 from the test tray to the customer tray (step S104).

Evaluation IC chips A to D and dummy I
The customer tray loaded with the C chips 1 to 60 is temporarily stored in the tested IC stocker 202 by the elevator 204 (step S105). The control unit of the handler 1
It is determined whether all tests have been completed (step S10).
6) If No, the tray transfer arm 205 transfers the customer tray (containing the evaluation IC chips A to D and the dummy IC chips 1 to 60) once stored in the tested IC stocker 202. Loader unit 30
0 (step S107), and the process returns to step S101.

In performing the second test, the loader unit 3
As shown in FIG. 14 (c), the XY transfer device 304 of FIG.
The test IC chips A to D are loaded on the test tray in rows 1 to 2 of the test tray, respectively.
Chips 1 to 59 are placed in 1 row and 6 columns of the test tray, respectively.
Load in 4 rows and 16 columns. The evaluation IC chips A to D loaded on the test tray as described above are stored in step S102.
, Sockets T2 to 1 row 5 in the first row and second column, respectively.
Dummy IC chip 1 attached to the socket T5 in the row
To 59 are sockets T6 to 4th row, 1st row and 6th column, respectively.
The dummy IC chip 60 is mounted in the socket T64 in the sixth column, and the dummy IC chip 60 is mounted in the socket T1 in the first row and first column (FIG. 1).
4 (c), see FIG. 15 (h)), a second test is performed.

In performing the third test, the loader unit 3
As shown in FIG. 14D, the X-Y transfer device 304 of FIG. 00 loads the dummy IC chips 59 to 60 on the test tray in the first row and the first column and the second column, respectively. Are loaded on rows 1 to 3 of the test tray, and dummy IC chips 1 to 58 are loaded on rows 1 to 7 of the test tray. Evaluation IC chips A to A loaded in the test tray in this manner
D is attached to the first row and third column socket T3 to the first row and sixth column socket T6 in step S102, and the dummy IC chips 1 to 58 are respectively mounted in the first row and seventh column socket T7 to four rows. The dummy IC chips 59 to 60 are mounted on the socket T64 in the 16th row,
The sockets are mounted on the socket T1 in the first row and the socket T2 in the first row and second column (see FIGS. 14D and 15H), and a third test is performed.

Similarly, in the fourth test to the 62nd test, each IC chip (evaluation IC chips A to D and dummy IC chips 1 to 60) is connected to the socket mounted in the previous test. The IC chip for evaluation is mounted in the socket in the next column or, if there is no socket in the next column, mounted in the socket in the first column of the next row (the first row after the fourth row). A to D and dummy IC chips 1 to 60 are handled.

In performing the 63rd test, as shown in FIG. 15E, the XY transfer device 304 of the loader 300 transfers the evaluation IC chips C to D to the test tray in one row and one column. , And dummy IC chips 1 to 60 are placed in rows 1 to 3 and rows 4 to 1 of the test tray, respectively.
The IC chips A and B for evaluation are stacked in four columns, and are stacked in four rows and 15 columns and four rows and 16 columns of the test tray, respectively. The evaluation IC chips A and B loaded on the test tray as described above are each stored in four rows 1 in step S102.
5th column socket T63 to 4th row and 16th column socket T6
4 and the evaluation IC chips C to D
The sockets T1 in the first row and the first row, and the sockets T2 in the first row and the second column are attached to the dummy IC chips 1 to 60, respectively.
Socket T3 at row 3 column to socket T6 at row 4 column 14
2 (see FIGS. 15E and 15H), and the 63rd test is performed.

In performing the 64th test, as shown in FIG. 15F, the XY transfer device 304 of the loader 300 transfers the IC chips BD for evaluation to the test tray in one row and one column. And dummy IC chips 1 to 60 are placed in rows 1 to 4 and rows 4 to 1 of the test tray, respectively.
IC chips A for evaluation are stacked in 5 rows, and 4 rows and 16 columns of the test tray. The evaluation IC chip A loaded on the test tray in this manner is mounted in the socket T64 in the fourth row and the 16th column in step S102, and the evaluation IC chips BD are respectively connected to the socket T1 in the first row and the first column. The dummy IC chips 1 to 60 are mounted on the sockets T4 on the first row and the fourth column and the sockets T63 on the fourth row and the fifteenth column, respectively.
5 (f), (h)), the 64th test is performed.

After performing the 64th test in this way, the test tray carrying the evaluation IC chips A to D and the dummy IC chips 1 to 60 is transferred to the unloader section 400 by the test tray transfer device 108 ( Step S103), the XY transfer device 404 of the unloader unit 400 sends the evaluation IC chips A to D and the dummy I
The C chips 1 to 60 are reloaded from the test tray to the customer tray (step S104).

Evaluation IC chips A to D and dummy I
The customer tray loaded with the C chips 1 to 60 is temporarily stored in the tested IC stocker 202 by the elevator 204 (step S105). The control unit of the handler 1
It is determined whether all tests have been completed (step S10).
6) If it is determined to be Yes, the customer tray (on which the evaluation IC chips A to D are loaded) once stored in the tested IC stocker 202 is transported to the loader unit 300 by the tray transfer arm 205 (step). S10
8).

Next, as shown in FIG. 15 (g), the XY transfer device 304 of the loader unit 300 loads the evaluation IC chips A to D and the dummy IC chips 1 to 60 from the customer tray to the test tray. (Step S10
9). At this time, the evaluation IC chips A to D are loaded on columns 1 to 4 of the test tray, respectively, and the dummy IC chips 1 to 60 are loaded on the rows 5 of the test tray, respectively.
Columns 4 to 16 are loaded.

Evaluation IC chips A to D and dummy I
The test tray loaded with the C chips 1 to 60 is sent into the chamber 100 by the test tray transfer device 108, and then transferred to the test head 5 by the test tray transfer device in the chamber 100. Then, without performing the test, the test tray on which the evaluation IC chips A to D and the dummy IC chips 1 to 60 are stacked is transported to the unloader unit 400 by the test tray transport device 108 (Step S110).

Evaluation I transported to unloader section 400
C chips A to D and dummy IC chips 1 to 60
The test tray is transferred to the customer tray by the XY transfer device 404 of the unloader unit 400 (step S111). At this time, the XY transfer device 404 of the unloader unit 400 transfers the evaluation IC chips A to D and the dummy IC chips 1 to 60 from the test tray to the evaluation IC chips A to D and the dummy IC chips 1 to 60. Pickup in order, and in that order, 1 row, 1 column to 4 rows 1 of the customer tray
Since they are stacked in six rows, the evaluation IC chips A to D and the dummy IC chips 1 to 60 are reloaded on the customer tray in an arrangement as shown in FIG.

The customer tray loaded with the evaluation IC chips A to D and the dummy IC chips 1 to 60 is stored in the tested IC stocker 202 by the elevator 204 (step S112).

According to the above sequence, all the evaluation IC chips A to D are mounted on all the sockets T1 to T64, and the electrical characteristics are tested.
The correlation of the electrical characteristics of T64 is obtained. Since each of the evaluation IC chips A to D has different data, the correlation of the electrical characteristics of the socket 40 is obtained from a plurality of data in a multi-faceted manner. Fine adjustment of the electrical characteristics of each socket can be performed by the test main unit so that the electrical characteristics of the sockets 2 are uniform and each socket 40 exhibits desired electrical characteristics. By such an operation, the socket 4
The measurement accuracy of 0 is improved, and inaccurate test results due to defective electrical characteristics of the sockets 40 and variations in electrical characteristics among the sockets 40 can be eliminated, and the reliability of the IC test apparatus can be secured.

At the stage where a series of sequences is completed, the evaluation IC chips A to D and the dummy IC chips 1 to 60 are stacked on the customer tray in the same arrangement as that initially stacked on the customer tray. The above sequence can be repeated a plurality of times without the need to replace the evaluation IC chips A to D and the dummy IC chips 1 to 60 with customer trays.

[Other Embodiments] The embodiments described above are described to facilitate understanding of the present invention, but are not described to limit the present invention. Therefore, each element disclosed in the above embodiment is intended to include all design changes and equivalents belonging to the technical scope of the present invention.

For example, the test was not performed in the last step (the 17th time in the first embodiment and the 65th time in the second embodiment) in the socket electrical characteristic correlation acquisition sequence of the above embodiment. The present invention is not limited to this, and the test may be performed by mounting each IC chip in a socket. In addition, the final step of mounting the IC chip for evaluation in the socket and performing the test (in the first embodiment, 1 step).
At the end of the sixth time or the 64th time in the second embodiment) or at the end of each process, if the stacking is performed on the customer tray in the same arrangement as that initially stacked on the customer tray, the socket electrical characteristics of the above embodiment can be obtained. The last step in the correlation acquisition sequence (the 17th time in the first embodiment,
The 65th operation in the second embodiment may not be necessary. Further, the IC test apparatus according to the embodiment is not limited to the chamber type, but may be a chamberless type.

[0110]

As described above, according to the socket electrical characteristic correlation acquisition method, the handler, the handler control method, or the electronic component test apparatus of the present invention, the electrical characteristics of a plurality of sockets are different for various electronic components. It is possible to obtain a correlation between the electrical characteristics of the sockets so that the electrical characteristics of each socket can be fine-tuned by the test main device so that the sockets exhibit the desired electrical characteristics. Can also be obtained without the need for complicated work.

[Brief description of the drawings]

FIG. 1 is an overall side view of an IC test apparatus according to a first embodiment of the present invention.

FIG. 2 is a perspective view of the handler shown in FIG.

FIG. 3 is a flowchart of a tray showing a method of handling an IC under test.

FIG. 4 is a perspective view showing a structure of an IC stocker of the IC test apparatus.

FIG. 5 is a perspective view showing a customer tray used in the IC test apparatus.

FIG. 6 is a sectional view of a main part in a test chamber of the IC test apparatus.

FIG. 7 is a partially exploded perspective view showing a test tray used in the IC test apparatus.

FIG. 8 is an exploded perspective view showing a structure near a socket in a test head of the IC test apparatus.

FIG. 9 is a flowchart showing a series of processing operations for acquiring a socket electrical characteristic correlation of the IC test apparatus.

FIG. 10 is a flowchart showing a series of processing operations regarding acquisition of a socket electrical characteristic correlation of the IC test apparatus.

FIG. 11 is a schematic view showing a transition of a tray in acquiring an electrical characteristic correlation of a socket of the IC test apparatus.

FIG. 12 is a schematic diagram showing a transition of a tray in acquiring a socket electrical characteristic correlation of the IC test apparatus.

FIG. 13 is a partially exploded perspective view showing a test tray used in the IC test apparatus according to the second embodiment.

FIG. 14 is a schematic diagram showing a transition of a tray in obtaining a socket electrical characteristic correlation of the IC test apparatus.

FIG. 15 is a schematic diagram showing a transition of a tray in acquiring an electrical characteristic correlation of a socket of the IC test apparatus.

FIG. 16 is a flowchart showing a series of processing operations of an electronic component test apparatus in a conventional socket electrical characteristic correlation acquisition method.

FIG. 17 is a schematic diagram showing a transition of a tray in a conventional socket electrical characteristic correlation acquisition method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Handler 2 ... IC chip (electronic component) 5 ... Test head 10 ... IC testing device (electronic component testing device) 40 ... Socket

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2G003 AA07 AB01 AC03 AF06 AG01 AG11 AH05 4M106 AA02 BA01 BA14 CA60 CA62 DG02 DG03 DG08 DG25 DJ19 DJ39

Claims (10)

[Claims] 1. A method according to claim 1, wherein each of a plurality of evaluation electronic components having different known data is sequentially mounted on all sockets and a test is performed to obtain a correlation of electrical characteristics of each socket. A method for acquiring a correlation between electrical characteristics of a socket in an electronic component test apparatus. 2. After a plurality of evaluation electronic components having different data are loaded from a customer tray to a test tray, each of the evaluation electronic components loaded on the test tray is mounted on a socket, and a test is performed. A first step of reloading the evaluation electronic component from the test tray to the customer tray; and mounting the evaluation electronic component reloaded on the customer tray to a socket different from the socket mounted in the test. A test is performed by loading the electronic components for evaluation loaded on the test tray and mounting the respective electronic components for evaluation loaded on the test tray to the socket, and then reloading the electronic components for evaluation from the test tray to the customer tray. The second step is repeated so that each evaluation electronic component is mounted on all sockets and tested. That, electric characteristics correlation acquisition method of the socket in the electronic device testing apparatus. 3. The method according to claim 1, wherein the evaluation electronic components are picked up from the test tray and reloaded onto a customer tray in order from the youngest row of the test tray and the youngest row in the same row. Loading the electronic component for evaluation on a test tray such that the electronic component for evaluation is mounted from the younger row of the row of the socket and the younger row in the same row; and in the second step, the electronic component for evaluation is loaded. The electronic component for evaluation is placed in a test tray so that the component is mounted in the socket in the next row of the socket mounted in the test, or if there is no socket in the next row, so that the component is mounted in the socket in the first row of the next row The second step is repeated until all the electronic components for evaluation are mounted on all the sockets and tested, and then the electronic components for evaluation are again placed in the rows of the sockets. On the other hand, in the same row, the electronic components for evaluation are loaded on a test tray so that the electronic components for evaluation can be mounted from the younger one in the column, and the electronic components for evaluation are reloaded from the test tray to the customer tray. The electrical characteristic correlation acquisition method according to claim 2, wherein: 4. A handler characterized in that a plurality of evaluation electronic components having different known data are set so as to be sequentially mounted on all sockets. 5. A plurality of evaluation electronic components having different known data are loaded from a customer tray to a test tray, and each of the evaluation electronic components loaded on the test tray is mounted on a socket, and after a test is performed. A first step of reloading the evaluation electronic component from the test tray to the customer tray; and mounting the evaluation electronic component reloaded on the customer tray to a socket different from the socket mounted in the test. Loading a test tray, mounting each of the electronic components for evaluation loaded on the test tray to a socket, and performing a second step of reloading the electronic components for evaluation from the test tray to a customer tray after a test is performed. Repeating the second step so that each evaluation electronic component is mounted on all sockets and tested. Handler to be characterized. 6. The electronic component for evaluation is set to be picked up from the test tray and reloaded to a customer tray in order from a younger row of a test tray row and a younger row of columns in the same row. In the first step, the electronic components for evaluation are loaded on a test tray so that the electronic components for evaluation are mounted from the younger row of the socket, and the younger row in the same row. In the second step, The electronic component for evaluation is mounted on the socket in the next column of the socket mounted in the test, or in the case where there is no socket in the next column, so that the electronic component for evaluation is mounted on the socket in the first column of the next row. After loading the components on the test tray and repeating the second step until each of the electronic components for evaluation is mounted on all the sockets and tested, the electronic components for evaluation are again placed in the rows of the sockets. Loading the electronic components for evaluation on a test tray so that they can be mounted from the younger one in the same row and the younger column in the same row, and reloading the electronic components for evaluation from the test tray to the customer tray The handler according to claim 5, characterized in that: 7. A method of controlling a handler, comprising: controlling a handler so that a plurality of evaluation electronic components having different data are sequentially mounted on all sockets. 8. A plurality of evaluation electronic components having different known data are loaded from a customer tray to a test tray, each of the evaluation electronic components loaded on the test tray is mounted in a socket, and after a test is performed. A first step of reloading the evaluation electronic component from the test tray to the customer tray; and mounting the evaluation electronic component reloaded on the customer tray to a socket different from the socket mounted in the test. Loading a test tray, mounting each of the electronic components for evaluation loaded on the test tray to a socket, and performing a second step of reloading the electronic components for evaluation from the test tray to a customer tray after a test is performed. The second step is repeated, so that each electronic component for evaluation is mounted on all sockets and tested. The method handlers and controlling the Dora. 9. A handler is controlled so that the electronic components for evaluation are picked up from the test tray and transferred to a customer tray in order from the youngest row in the test tray row and the youngest row in the same row. In the first step, the evaluation electronic components are loaded on a test tray so that the evaluation electronic components are mounted from the younger row of the socket, and the youngest row in the same row. The electronic component for evaluation is mounted on the socket in the next row of the socket mounted in the test, or when there is no socket on the next column, the electronic component for evaluation is mounted on the socket in the first row of the next row. After loading the electronic components on the test tray, repeating the second step until all the electronic components for evaluation are mounted on all the sockets and tested, the electronic components for evaluation are again The electronic components for evaluation are loaded on a test tray so that the sockets can be mounted from the younger row and the younger row in the same row, and the electronic components for evaluation are loaded from the test tray to the customer tray. The method of controlling a handler according to claim 8, wherein the handler is controlled so as to reload. 10. An electronic component test apparatus comprising the handler according to claim 4. Description: