JP2002203970A - Thin film transistor and liquid crystal display using it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a thin film transistor which reduces the fluctuation of the capacity made between a gate and a drain in manufacturing process, and a liquid crystal display which reduces the poor quality on display of an image. SOLUTION: In the liquid crystal display, a picture element electrode and a thin film transistor connected through a drain electrode to the picture element electrode are arranged in matrix form. The thin film transistor has a first drain electrode 2-1 which is so made as to overlap the region of the gate electrode including one end out of the two ends in opposition of the gate electrode 5, and a second drain electrode 2-2 which is so made as to overlap the region of the gate electrode including other end of the gate electrode 5 symmetrically with the first drain electrode 2-1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a thin film transistor suitable for a liquid crystal display device, and more particularly to a liquid crystal display device using a thin film transistor such as an active matrix type liquid crystal panel as a switching element.

[0002]

2. Description of the Related Art In recent years, in the field of CRT displays, liquid crystal display devices have been gradually increasing their market share due to advantages such as realization of light weight and thinness, power saving and space saving. The reasons for this are that the selling price has fallen due to the improvement of the quality of the liquid crystal display, and that it has become possible to supply large-sized liquid crystal panels on a commercial basis due to advances in liquid crystal manufacturing technology.

FIG. 4 is a circuit diagram of a conventional active matrix type liquid crystal display device. As shown in FIG.
And a plurality of scanning lines 7 are provided in a direction orthogonal to each other, and a thin film transistor 1a is provided at each intersection. The drain electrode 2 of the thin film transistor 1a is electrically connected to the pixel electrode 3. The display in one pixel of the liquid crystal display is controlled by the pixel electrode 3.
The signal wiring 6 is electrically connected to the source electrode 4 of the transistor 1a, and the scanning wiring 7 is electrically connected to the gate electrode 5 of the transistor 1a.

FIG. 5 is a diagram showing a specific structure of a portion corresponding to one pixel of the circuit shown in FIG. FIG. 5 is a plan view of a unit pixel when a thin film transistor 1a made of a semiconductor material typified by amorphous silicon (hereinafter referred to as "a-Si") is integrated as a switching element. As described above, the thin film transistor 1a includes the source electrode 4 for supplying a signal voltage, the gate electrode 5 for supplying a scanning voltage, and the drain electrode 2 for supplying a signal voltage to the pixel electrode 3 via the thin film transistor 1a. .

[0005] Each electrode is formed through the following steps. That is, first, after a film is deposited, a photosensitive polyimide film (hereinafter, referred to as a “resist film”) is applied.
Thereafter, an exposure step of transferring the pattern on the mask formed of Cr to a resist film on the substrate using, for example, ultraviolet rays, a developing step of removing a photosensitive portion of the resist irradiated with ultraviolet rays, and a portion exposed from the resist film Is performed to remove the deposited film.

FIG. 6 is a view showing a cross section taken along line AA 'in FIG. First, a gate electrode 5 is formed on a glass substrate 8, and a gate insulating layer 9 made of, for example, Si ₃ N ₄ is formed on the gate electrode 5 by glow discharge decomposition mainly containing a SiH 4 -based gas.
An -Si layer is deposited on the entire surface to form an island-like a-Si layer 10. An etching stopper layer 12 made of, for example, Si ₃ N ₄ is formed thereon, and an a-Si layer 11 containing, for example, phosphorus serving as a donor or an acceptor for improving ohmic properties, a source electrode, and a drain are formed thereon. The electrodes, the signal lines 6 and the scanning lines 7 connected to the electrodes are formed at the same time.

[0007]

With the increase in the density and the size of the screen of the liquid crystal panel, an improvement in image display performance has been desired. However, in the above-described configuration, it is difficult to maintain and improve the image display performance due to the reduction in the transistor size accompanying the high density. One of the issues is flicker reduction.

[0008] The flicker causes an increase in the load on the drive circuit, resulting in an increase in cost, and furthermore, an increase in image quality cannot be achieved, resulting in a loss cost due to economical opportunity loss. Thus, this is an important issue in terms of economics and quality in the liquid crystal field.

In FIG. 5, a capacitance (Cgd) exists at the intersection of the gate electrode 5 and the drain electrode 2.
This formation capacitance causes the voltage applied to the pixel electrode 3 to be reduced when the scanning signal at the time of driving the image display is turned off, and causes a normal voltage to not be applied to the pixel electrode 3. If the formed capacitance is uniform throughout the liquid crystal panel, it can be improved by, for example, raising the applied voltage by adding an offset voltage to the signal voltage. However, flicker occurs when the entire liquid crystal panel is not uniform.

The non-uniformity of the formed capacitance is caused by the performance of the exposure apparatus in the above-mentioned exposure process (for example, the alignment accuracy of the formation pattern of the drain electrode 2 relative to the formation pattern of the gate electrode 5) and the local alignment accuracy in the liquid crystal panel. It is caused by a decrease (hereinafter referred to as “alignment deviation”).
That is, due to the misalignment, the area of the overlapping portion of the gate electrode 5 and the drain electrode 2 is not uniform for each pixel, and the formed capacitance value differs for each pixel. As a result, flicker occurs locally on the liquid crystal panel. As a countermeasure, it is conceivable to increase the performance of the exposure apparatus to the utmost and remove the above-mentioned misalignment.However, it is necessary to match the variation in the alignment accuracy between the plurality of exposure apparatuses and the characteristics of each exposure apparatus. Producing a thin film transistor used for a liquid crystal display is actually inappropriate in consideration of management and operation of an exposure apparatus.

In particular, when the pixel electrodes 3 are arranged in a delta arrangement and the signal wires 6 are alternately drawn out to the left and right in the horizontal direction, each of the pixels generated due to the displacement of each layer of the gate electrode and the drain electrode The increase / decrease of the formation capacity differs for each adjacent pixel, the tendency of occurrence of flicker differs, and it is not uniform over the entire screen, and it is difficult to prevent flicker.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and has been made in view of the above. Even when a local misalignment of an area of an intersection between a gate electrode and a drain electrode occurs, a thin film transistor which suppresses a change in formed capacitance during the misalignment. It is another object of the present invention to provide a liquid crystal display device in which a decrease in image quality is suppressed by using the thin film transistor.

[0013]

A thin film transistor according to the present invention has a structure for correcting a local misalignment of an area of an intersection between a gate electrode and a drain electrode, which is necessary for maintaining a normal image quality.

More specifically, in the thin film transistor according to the present invention, in a thin film transistor having a drain electrode and a gate electrode, even if the positional relationship of the drain electrode with respect to the gate electrode deviates from a predetermined positional relationship, There is a capacitance fluctuation suppressing means for suppressing a change in the formed capacitance so that a formed capacitance generated at an overlapping portion between the gate electrode and the drain electrode is constant.

The capacitance fluctuation suppressing means includes: a forming capacitance increasing means for increasing a forming capacitance when a positional relationship between the gate electrode and the drain electrode deviates from a predetermined positional relationship in an overlapping portion of the gate electrode and the drain electrode; It may be formed with a formation capacity reducing means for reducing the formation capacity when the positional relationship between the electrode and the drain electrode deviates from a predetermined positional relationship.

In the case where the gate electrode has a substantially T-shape comprising two opposing ends and one end provided in a direction orthogonal to the direction connecting the two ends, the formation capacity is increased. Preferably, the means comprises a first drain electrode formed so as to overlap a region of the gate electrode including one of two opposite ends of the gate electrode. Also,
The formation capacity reducing means is formed symmetrically with the first drain electrode, and formed so as to overlap with a region of the gate electrode including the other end of the two opposing ends of the gate electrode. Of the drain electrode.

The two opposite ends of the gate electrode may each have a rectangular, arcuate, or triangular shape.

7. A liquid crystal display device comprising the thin film transistors according to claim 1 arranged in a matrix and used for display control of each pixel.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of a thin film transistor according to the present invention and a display device using the same will be described in detail with reference to the accompanying drawings.

(Embodiment 1) FIG. 1 is a view showing a thin film transistor used in a liquid crystal display device according to the present invention and its peripheral portion. The thin film transistor is provided for each pixel of the liquid crystal display device, and is used for display control of each pixel. As shown in the figure, the thin film transistor has a source electrode 4, drain electrodes 2-1 and 2-2, and a gate electrode 5. The gate electrode 5 has a substantially T-shape including a rectangular electrode portion 5a and a wiring connection portion 5b connected thereto, and is electrically connected to the scanning wiring 7 via the wiring connection portion 5b. The drain electrodes 2-1 and 2-2 are arranged at both ends of the horizontally long electrode portion of the gate electrode 5, and are formed so as to cover the end of the gate electrode 5. The drain electrodes 2-1 and 2-2 are formed symmetrically with respect to the gate electrode 5. Source electrode 4 is electrically connected to signal wiring 6.

By arranging the drain electrodes 2-1 and 2-2 symmetrically with respect to the gate electrode 5 as described above, the X-direction between the gate electrode 5 and the drain electrodes 2-1 and 2-2 is provided. When the misalignment occurs, the area of the intersection between the one drain electrode and the gate electrode (hereinafter referred to as “intersection area”) increases, and the intersection area between the other drain electrode and the gate electrode decreases. As a result, the increase / decrease of the intersection area is offset and maintained at a constant value as a whole.
That is, at the time of misalignment between the drain electrode and the gate electrode during the manufacture of the thin film transistor, one of the overlapping portions of the drain electrodes 2-1 and 2-2 and the gate electrode 5 serves as a means for increasing the formation capacitance (Cgd). And the other functions as a means for reducing the formed capacitance.
Thereby, the gate electrode 5 and the drain electrodes 2-1 and 2-
Even if there is misalignment between the two, the formation capacitance between the gate electrode 5 and the drain electrodes 2-1 and 2-2 can be kept constant as a whole. Therefore, in a liquid crystal display device using such a thin film transistor, flicker on the entire screen can be reduced.

Hereinafter, a description will be given of the suppression of fluctuations in the formation capacity of the thin film transistor. In FIG. 1, the horizontal direction is the X direction, the vertical direction is the Y direction, the length in the X direction of the overlapping portion between the drain electrode 2-1 and the gate electrode 5 is D1, and the length in the Y direction is L1. Similarly, the length in the X direction of the overlapping portion between the drain electrode 2-2 and the gate electrode 5 is D2, and the length in the Y direction is L2. Gate electrode 5 and drain electrode 2-
Assuming that the area of the intersection with 1 (hereinafter referred to as "intersection area") is S1, and the intersection area between the gate electrode 5 and the drain electrode 2-2 is S2, they are obtained by the following equations. S1 = L1 × D1 S2 = L2 × D2

The gate electrode 5 and the drain electrodes 2-1 and 2-
The total S of the intersection area with 2 is as follows. S = S1 + S2 = L1 × D1 + L2 × D2

Since one drain electrode 2-1 and the other drain electrode 2-2 are formed simultaneously by the same exposure process, the symmetry with respect to the gate electrode 5 does not change. Also, because of the symmetry, L1 = L
2 and D1 = D2. Also, the drain electrode 2-1,
The length of 2-2 in the Y direction is such that even when misalignment occurs between the gate electrode 5 and the drain electrodes 2-1 and 2-2 in the Y direction, their crossing areas S1 and S2 do not change. , With a sufficient margin.

Now, the gate electrode 5 in the above-described exposure apparatus will be described.
Consider a case where a displacement of Dx occurs in the X direction as a displacement between the drain electrodes 2-1 and 2-2. Assuming that the intersection areas of the drain electrodes 2-1 and 2-2 with respect to the gate electrode 5 are S1 'and S2', respectively, and the total area is S ', the values are obtained by the following equations. S1 ′ = (D1−Dx) × L1 S2 ′ = (D2 + Dx) × L2 S ′ = S1 ′ + S2 ′ = L1 × D1 + L2 × D2 In other words, the area S ′ after the misalignment does not occur It is the same as the area S in the case.

Similarly, when a shift of Dy occurs in the Y direction as an alignment shift, the Y of the drain electrodes 2-1 and 2-2 is changed.
Since the length in the direction is determined with a sufficient margin for the misalignment, S1 ′ = L1 × D1 S2 ′ = L2 × D2 S ′ = S1 ′ + S2 ′ = L1 × D1 + L2 × D2, Also in this case, the area S ′ after the occurrence of the misalignment is the same as the area S when no misalignment occurs.

As described above, in the thin film transistor of the present embodiment, even if misalignment occurs, the cross-sectional area between the gate electrode 5 and the drain electrodes 2-1 and 2-2 is kept constant and occurs there. The formation capacity can be uniformly maintained as a whole. In a liquid crystal display device using such a thin film transistor, deterioration of image quality, particularly generation of flicker can be easily suppressed, and reduction in manufacturing cost can be achieved.

FIG. 2 shows a modification of the shape of the gate electrode 5 and the drain electrodes 2-1 and 2-2 of the thin film transistor according to the present invention. In FIG. 2A, the electrode portion of the gate electrode 5 has a shape having arcuate portions at both ends. In FIG. 2B, the electrode portion of the gate electrode 5 has a triangular portion at both ends. Even in the case of the shape of the gate electrode 5 as shown in FIG.
2-2 at each end of the gate electrode 5 so as to cover the electrode portion with a predetermined margin, thereby forming the gate electrode 5 and the drain electrodes 2-1 and 2-2.
Even if there is a misalignment at the time of forming, the influence of the misalignment can be reduced as a whole.

(Embodiment 2) FIG. 3 is a circuit diagram of a liquid crystal display device using the thin film transistor 1 of Embodiment 1. The circuit shown in FIG. 3 is a circuit in an active matrix type liquid crystal display device. A liquid crystal display device has liquid crystal sealed between a pair of substrates, and has pixel electrodes arranged in a matrix on one substrate. By applying a predetermined voltage to the pixel electrodes, a liquid crystal between the substrates is formed. A desired image display is obtained by changing the state of the liquid crystal and controlling the light transmittance.

As shown in FIG. 3, a plurality of signal wirings 6 and scanning wirings 7 are provided in a direction orthogonal to each other, and the thin film transistor 1 of this embodiment is provided at each intersection of the scanning wirings 7 and the signal wirings 6. Have been. The signal wiring 6 is electrically connected to the source electrode 4 of the transistor 1, and the scanning wiring 7 is electrically connected to the gate electrode 5 of the transistor 1. Further, the pixel electrode 3 and the drain electrode 2 are electrically connected.

When writing a video signal to one pixel, a scanning pulse is applied to the scanning wiring 7 to turn on the transistors 1 in the same row, and a signal voltage is applied through the transistor 1 to the signal wiring (yj, yj + 1). ..) Is applied to the pixel electrode 3 to write a video signal to the pixel electrode 3. Thereafter, by sequentially scanning in the row direction (xi, xi + 1), an image display function can be realized.

By using the thin film transistor of the first embodiment in a liquid crystal display device as described above, even if the misalignment between the gate electrode and the drain electrode occurs during the manufacturing process of the thin film transistor, the variation in the capacitance formed in each pixel can be achieved. Is suppressed, the occurrence of flicker can be suppressed in the liquid crystal display device, and the deterioration of image quality can be prevented.

[0033]

According to the present invention, in a thin film transistor, even if a local misalignment of the drain electrode with respect to the gate electrode occurs during the manufacturing process, the variation in the capacitance formed at the intersection can be suppressed, and the uniformity can be achieved throughout the liquid crystal panel. Can be Therefore, by using such a thin film transistor in a liquid crystal display device, it is possible to easily suppress the deterioration of the image quality in the liquid crystal display device, particularly the occurrence of flicker, and to reduce the production loss cost.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a thin film transistor according to the present invention.

FIG. 2 is a diagram showing a modification of the thin film transistor according to the present invention.

FIG. 3 is an equivalent circuit diagram of a display unit of an active matrix liquid crystal display device using a thin film transistor according to the present invention.

FIG. 4 is an equivalent circuit diagram of a display unit of a conventional active matrix type liquid crystal display device.

FIG. 5 is a plan view of a unit pixel portion of a display section of a conventional active matrix liquid crystal display device.

FIG. 6 is a sectional view of a unit pixel portion of a display section of a conventional active matrix type liquid crystal display device.

[Explanation of symbols]

 1,1a Thin film transistor 2,2-1,2-2 Drain electrode 3 Pixel electrode 4 Source electrode 5 Gate electrode 6 Signal wiring 7 Scan wiring

 ──────────────────────────────────────────────────続 き Continued on front page F-term (reference) 2H092 JA26 JA29 JA38 JA42 JA44 JB13 JB23 JB32 JB33 JB38 KA05 KA07 KA16 KA18 MA05 MA08 MA14 MA15 MA16 MA18 MA19 MA20 MA27 MA35 MA37 MA41 NA24 NA25 NA27 NA29 PA06 5C094 AA03 BA03 BA03 EA07 5F110 AA02 AA04 AA30 BB01 CC07 EE24 HM04 HM12 HM13 HM20 NN72 NN77

Claims (7)

[Claims] 1. A thin film transistor having a drain electrode and a gate electrode, wherein even when a positional relationship between the gate electrode and the drain electrode deviates from a predetermined positional relationship, an overlapping portion between the gate electrode and the drain electrode. A thin film transistor having a capacitance fluctuation suppressing means for suppressing a change in formed capacitance so that a generated formed capacitance is constant. 2. The method according to claim 1, wherein said capacitance fluctuation suppressing means increases a formation capacitance when a positional relationship between the gate electrode and the drain electrode is deviated from a predetermined positional relationship in an overlapping portion of the gate electrode and the drain electrode. 2. The thin-film transistor according to claim 1, further comprising: means for forming, and forming capacity reducing means for reducing forming capacity when a positional relationship between the gate electrode and the drain electrode deviates from a predetermined positional relationship. 3. When the gate electrode has a substantially T-shape including two opposite ends and one end provided in a direction orthogonal to a direction connecting the two ends, The formation capacity increasing means includes a counter electrode of the gate electrode.
A first drain electrode formed so as to overlap a region of the gate electrode including one end of the two ends, wherein the formation capacity reducing means is formed symmetrically with the first drain electrode; 3. The thin film transistor according to claim 2, comprising a second drain electrode formed so as to overlap a region of the gate electrode including the other end of the two opposing ends of the gate electrode. 4. The thin film transistor according to claim 3, wherein each of the two opposite ends of the gate electrode has a rectangular shape. 5. The thin film transistor according to claim 3, wherein each of two opposing ends of said gate electrode has an arc shape. 6. The shape of each of two opposing ends of the gate electrode is triangular.
The thin film transistor as described in the above. 7. A liquid crystal display device, wherein the thin film transistors according to claim 1 are arranged in a matrix and used for display control of each pixel.