JP2002162947A - Display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a display device which is designed so as to reduce power consumption. SOLUTION: A plurality of gate signal lines 51 connected to a gate driver 50 and a plurality of drain signal lines 61 connected to a drain driver 60 are arranged on a substrate 10. Display pixels 200 are constituted in an area surrounded by the both signal lines. Each pixel 200 is provided with a TFT 70 connected to the lines 51 and 61, a signal holding circuit 110 which holds digital signals connected to a source 11s of the TFT 70 and a signal selecting circuit 120 which selects signals A or signals B in accordance with the held signals and supplied the signals to a display electrode 80. Once digital signals corresponding to a display image are written into the circuit 110 of the pixel 200, the display is maintained by operating the circuit 110 even though the drivers 50 and 60 are stopped from a next frame. Power consumption of the device is reduced while the drivers are being stopped.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device having a thin film transistor (hereinafter, referred to as "TFT").

[0002]

2. Description of the Related Art In recent years, there has been a strong market demand for a display device as a portable display device, for example, a monitor for a portable television, a mobile phone, and the like. In these applications, the display device is correspondingly smaller and lighter. The demands for energy saving and power saving are particularly strong, and R & D is also active to meet the demands.

FIG. 10 shows an equivalent circuit diagram of a conventional liquid crystal display device.

[0004] As shown in FIG.
0 denotes a plurality of gate signal lines 51 connected to a gate driver 50 for supplying a gate signal on the insulating substrate 10;
Sampling pulses SP1, SP2,..., SPn output from the drain driver 60 that supplies the drain signal
Sampling transistor SPS according to the timing of
Pt1, SPt2,..., SPtn are turned on, and a plurality of drain signal lines 61 to which the data signal of the data signal line 62 is supplied are arranged. A TFT 70 connected to both signal lines 51 and 61 and a display electrode 80 connected to the TFT 70 are arranged.

A panel driving LSI 91 is provided on an external circuit board 90 separate from the insulating board 10.

The panel driving L of the external circuit board 90
From SI 91, start signals STH and STV are input to gate driver 50 and drain driver 60, and video signal Sig is input to data line 62.

The sampling transistor SPt is turned on in response to the sampling signal based on the start signal, and the data signal on the data signal line 62 is supplied to the drain signal line 61. Further, a gate signal is input from the gate signal line 51 to the gate electrode 13, and the TFT 70 is turned on. As a result, a drain signal is applied to the display electrode 80 via the TFT 70. At the same time, a drain signal is also applied to the auxiliary capacitor 85 via the TFT 70 to hold the voltage applied to the display electrode 80 for one field period. One electrode 86 of the storage capacitor 85 is connected to the source 1 of the TFT 70.
1s, and the other electrode 87 is connected to each display pixel 2
At 00, a common potential is applied.

When the gate of the TFT 70 is opened and a drain signal is applied to the liquid crystal 21, it must be held for one field period. However, the voltage of the signal is gradually reduced with the passage of time only with the liquid crystal 21. Then, it appears as flicker or display unevenness, and good display cannot be obtained. Therefore, an auxiliary capacitor 85 is provided to hold the voltage for one field period.

The voltage applied to the display electrode 80 is
, The liquid crystal 21 is oriented according to the voltage to obtain a display. Thus, moving images,
Display can be performed regardless of a still image. In this case, the LSI 91 of the external circuit board 90 and each driver 5
Voltages for driving these are applied to 0 and 60, and power is consumed according to the voltages.

Incidentally, the liquid crystal display panel 1 as described above
When a still image is displayed in a display area composed of 00 display pixels 200, for example, the liquid crystal display panel 100 is used as a display section of a mobile phone, and the remaining amount of a battery for driving the mobile phone is partially displayed. In this case, the picture of the dry battery is displayed as a still picture.

[0011]

However, when a conventional liquid crystal display panel is used, the panel is driven regardless of whether the panel is used for a still image or a moving image. The display on the liquid crystal display panel 100 is performed by driving the gate driver 50, the drain driver 60, and the external panel driving LSI 91 as in the case of displaying a moving image.

Therefore, the drivers 50 and 60 and the external LSI 91 always consume power, and the power consumption of the liquid crystal display device is large.
However, there is a drawback that a mobile phone having a limited power supply, such as a battery, having a limited power supply, such as a battery, has a short usable time.

That is, there is a drawback that power is always consumed when a still image is displayed as in the case where a moving image is always displayed.

Therefore, a liquid crystal display device having a static memory for each display pixel is disclosed in Japanese Patent Application Laid-Open No. 8-194205. The liquid crystal display device reduces power consumption by using a memory having a two-stage inverter with positive feedback, that is, a static memory as a signal holding circuit for digital video signals.

As shown in FIG. 2 of the publication, when the switch element 7 changes from on to off after the signal from the memory element 6 is applied to the liquid crystal layer 10, the liquid crystal is applied. In this configuration, the refresh voltage Vref is applied so that the DC component is not applied.

In this case, when the pixel electrode leaks with another signal line or when a leak current is generated in the switch element, the display with the switch element turned off is caused by a decrease in the pixel electrode potential due to the leak current. Changes during the display period in the direction of the refresh voltage Vref.
This causes display unevenness. When a still image is displayed, the time until the next voltage is applied, that is, the still image display period is very long (for example, the remaining battery level of a mobile phone is displayed). Will increase.

Further, as described above, the conventional liquid crystal display device is suitable for displaying a full-color moving image corresponding to an analog video signal. On the other hand, a liquid crystal display device including a static memory for holding a digital video signal is suitable for displaying a still image with a low gradation and reducing power consumption.

However, since both liquid crystal display devices have different video signal sources, a single display device can simultaneously realize full-color moving image display and low-power-consumption still image display. Did not.

Accordingly, the present invention has been made in view of the above-mentioned conventional drawbacks, and reduces power consumption when displaying a still image, thereby reducing power consumption as a whole display device. It is an object to provide a display device (for example, one liquid crystal display panel) capable of supporting two types of display, that is, full-color moving image display and low-power-consumption gradation display. .

[0020]

According to the present invention, there is provided a display device comprising: a plurality of gate signal lines arranged in one direction on a substrate; a plurality of drain signal lines arranged in a direction intersecting the gate lines; In a display device in which a plurality of display pixels selected by a gate signal from the gate signal line and supplied with a video signal from the drain signal line are arranged, the drain signal is supplied in accordance with a signal input from the gate signal line. A first display circuit including a signal holding circuit for holding a digital video signal from a line, and a signal selecting circuit for selecting a signal to be supplied to the display electrode in accordance with the signal from the signal holding circuit It is.

Further, in the above-mentioned display device, the first
And a storage capacitor that is arranged adjacent to the display circuit and holds an analog video signal from the drain signal line in response to a signal input from the gate signal line, and displays the signal held in the storage capacitor on a display electrode. Is a display device including a second display circuit for supplying to the display device.

According to such a display device of the present invention, the digital image signal is held in the signal holding circuit, and a signal corresponding to the digital data, for example, a predetermined DC voltage signal, an AC voltage signal, or the like, is output by the signal selection circuit. And supplies it to the display element. When the display element is a liquid crystal display element as described above, the display element has a display electrode for driving liquid crystal. Therefore, a signal may be supplied to the display electrode from the signal selection circuit. By adopting such a configuration, when a still image is displayed, once the holding circuit holds data, it is not necessary to select a display pixel until the display content changes next. Therefore, there is no need to drive the driver and the panel driving LSI during this period, and the power consumption of the display device can be reduced accordingly.

Still further, according to the display device of the present invention, there are provided a plurality of gate signal lines arranged in one direction on the substrate; a plurality of drain signal lines arranged in a direction intersecting the gate lines; In a display device in which a plurality of display pixels selected by a gate signal from a line and to which a video signal is supplied from the drain signal line are arranged, in response to a signal input from the gate signal line, a signal from the drain signal line is output. A first display circuit provided with a signal holding circuit for holding a digital video signal; and a first display circuit disposed adjacent to the first display circuit, wherein the first display circuit receives a signal from the drain signal line in response to a signal input from the gate signal line. A display device comprising: an auxiliary capacitor that holds an analog video signal; and a second display circuit that supplies a signal held in the auxiliary capacitor to a display electrode.

Further, in the above display device, the first
Is a display device which is a first display circuit further including a signal selection circuit for selecting a signal to be supplied to the display electrode according to a signal from the signal holding circuit.

Further, in the above display device, a circuit selection circuit for selecting one of the first and second display circuits according to a circuit selection signal and connecting to the drain signal line. It is a display device further provided.

The above-mentioned display device is a display device in which the signal holding circuit includes an inverter circuit or an inverter circuit and a capacitor.

Further, in the above display device, the display pixel provided with the signal holding circuit and the signal selection circuit is a display device which is a display pixel for displaying a still image.

In the above display device, the display device is a liquid crystal display device.

As described above, each display pixel is provided with the first display circuit for processing a digital video signal and the second display circuit for processing an analog video signal. According to a simple switching configuration, it is possible to display both a digital video signal and an analog video signal on a single display device by switching in accordance with and / or selecting output data from two display circuits.

Further, when a still image is to be displayed, by supplying this as a digital video signal, this image data can be held in the signal holding circuit. And L for driving
The operation of the SI can be stopped, and power consumption can be reduced.

In the case where the liquid crystal display device is realized, when displaying an analog video signal, the level of the analog video signal is inverted at a predetermined cycle and supplied to each display pixel as usual, so that the liquid crystal is displayed. AC drive is possible. Also, when displaying a digital signal,
When the liquid crystal is turned on, the signal selection circuit selects an AC voltage signal and supplies it to the display electrodes of the liquid crystal display element. Display can be performed.

[0032]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A display device according to the present invention will be described below. <First Embodiment> FIG. 1 shows an equivalent circuit diagram when the display device of the present invention is applied to a liquid crystal display device, and FIG. 2 shows a timing chart when the liquid crystal display device is driven.

As shown in FIG. 1, the liquid crystal display panel 100
Are driven based on signals supplied from the LSI 91 and the terminals 92 of the external substrate 90 separate from the liquid crystal display panel 100.

In the liquid crystal display panel 100, a plurality of gate signal lines 51 connected to a gate driver 50 for supplying a gate signal are arranged in a row direction (horizontal direction) and connected to a drain driver 60 for supplying a drain signal. A plurality of drain signal lines 61 are arranged in the column direction (vertical direction). In the vicinity of the intersection of both signal lines 51 and 61, TF
T70 is arranged. Also, the liquid crystal display panel 100
Has a plurality of display pixels arranged in a matrix. These display pixels are formed in regions partitioned by the gate signal lines 51 and the drain signal lines 61, respectively. The rise and fall of the liquid crystal 21 are controlled by the voltage applied to the display electrode 80 connected to the TFT 70.

Further, the source 11 s of the TFT 70 and the liquid crystal 2
Between the signal holding circuit 11 and the source 11s.
0, a signal selection circuit 120 is provided.

Each driver 5 is provided on the external circuit board 90.
LSI that supplies signals for scanning 0 and 60
A terminal 91 is provided for applying a data signal, a counter electrode voltage, a voltage for driving each driver, and a voltage for driving a signal holding circuit.

Signal holding circuit 1 on liquid crystal display panel 100
Numeral 10 includes two inverter circuits 111 and 112, which are connected in parallel in opposite directions. That is, the inverter circuit 111 is connected to the source 11s of the TFT 70 in the forward direction,
2 is connected in the forward direction between the output side of the inverter circuit 111 and the source 11s of the TFT 70. Further, both of the two inverter circuits 111 and 112 have the upper power supply V.
DD and the lower power supply VSS are connected.

The signal selection circuit 120 is provided between the signal holding circuit 110 and the display electrode 80, and the display electrode 8 is provided in accordance with a signal supplied from the signal holding circuit 110.
This circuit selects a signal to be output to 0. The signal selection circuit 120 includes two transistors 121 and 122 whose gates are connected to the signal holding circuit 110. The gate of the transistor 121 is the signal holding circuit 1
The gate of the transistor 122 is connected to the output side of the inverter 112 of the signal holding circuit 110. The signals selected by the two transistors 121 and 122 are a common electrode signal VCOM (signal A) of a DC voltage and an AC voltage centered on the common electrode signal VCOM, and an AC drive signal for driving the liquid crystal. (Signal B). When the transistor 121 is turned on, a DC signal A is selected and applied to the display electrode 80, and when the transistor 122 is turned on, an AC signal B is selected and applied to the display electrode 80.

As described above, the external circuit board 90 is provided with the panel driving LSI 91 and the terminals 92.
Timing signals (STV, STH) and display data signals (Sig) for operating the drivers 50 and 60 described above.
Create Further, from the terminal 92, the counter electrode voltage VCO
M, a driver power supply, a signal holding circuit power supply VDD, VSS, an AC signal B, and the like are supplied to the liquid crystal display panel 100.

Here, a driving method of the display device of the present invention will be described.

FIG. 2 shows a timing chart at each point of the liquid crystal display device of FIG.

First, a start signal STV, which is the start timing of one frame, is output from the panel driving LSI 91 of the external circuit board 90 to the gate driver 50. The start signal STH is input to the drain driver 60 every horizontal period. Drain driver 60
Generates a sampling signal from SP1 to SPn based on the signal STH and a clock having a cycle corresponding to the number n of pixels in one horizontal direction. The signals SP1 to SPn are supplied to the corresponding sampling transistors SPt1 to SPtn, and the sampling transistors SPt1 and SPtn are supplied.
, SPtn are sequentially turned on. At this time, the digital data signal Sig output to the data signal line 62 is sampled and supplied to each drain signal line 61.

Here, the display pixels P11 connected to the first row, that is, the gate signal line G1 to which the gate signal SG1 is applied.
To P1n will be described.

First, the gate signal SG1 is applied to the gate signal line G.
When the signal is output to 1, the TFTs 70 of the display pixels P11 and P12 to P1n connected to the gate signal line G1 are turned on for one horizontal scanning period.

Focusing on the display pixel P11 in the first row and first column, the digital signal S11 sampled during the output period of the sampling signal SP1 is supplied to the drain signal line 61 in the first column. P11 TFT
When the gate 70 is turned on by the gate signal SG1, the drain signal SD1 is input to the signal holding circuit 110 via the TFT 70.

As will be described later, the signal holding circuit 110 holds the input drain signal SD1, and the held signal is input to the signal selection circuit 120, and the signal selection circuit 120 responds to the held signal. Signal A or signal B
Is selected, the selected A or B signal is applied to the display electrode 80, and the liquid crystal between the display electrode 80 and the counter electrode 32 is controlled according to the voltage.

The remaining display pixels P12 to P1n in the first row
In the same way, the drain signal is supplied, the opposing signal A or B is applied to the display pixel 80, and the liquid crystal is controlled.

By executing the same control from the gate signal line G1 to the gate signal line Gm of the last row, scanning for one screen (one field period), that is, all dot scanning is completed, and one screen is displayed.

In this embodiment, when the data for one pixel is written to all the pixels as described above, that is, when one screen is displayed, the gate driver 50 and the drain driver 60 and the external panel drive The supply of voltage to the LSI 91 is stopped, and their operations are stopped. On the other hand, the voltages VDD and VSS are always supplied to the signal holding circuit 110 of each display pixel to continue the data holding operation. Vcom is supplied to the counter electrode 32 as usual, and the signals A and B are also supplied to the selection circuit 120 of each display pixel.

That is, the voltages VDD and VSS for driving the signal holding circuit 110 are supplied to the signal holding circuit 110, and the common electrode voltage VCOM (signal A) of DC voltage is applied to the common electrode. When a normally white (NW) type is adopted for the liquid crystal display panel 100, a voltage of the same potential as the counter electrode 32 is applied to the signal A supplied to the selection circuit 120, and the liquid crystal is driven for the signal B. (For example, 60 Hz). By doing so, the display pixels that display white even when the driver is stopped can maintain the white display by continuously supplying the signal A to the electrode 80, and can hold one screen and display it as a still image. Can be. In addition, no voltage is applied to the other gate driver 50, drain driver 60, and external LSI 91. Also, normally black (NB)
In the case of adopting the pattern, the signal B may be selected and applied to the display electrode 80 for white display.

When the digital signal output to the drain signal line 61 is “H (high)”, the signal holding circuit 110
When this “H” is input via the line 70, “L (low)” is input to the first TFT 121 in the signal selection circuit 120, so that the first TFT 121 is turned off, and the other second TFT 121 is turned off. Since "H" is input to the TFT 122, the second TFT 122 is turned on. Then, the selection circuit 120 selects the signal B, and a voltage corresponding to the signal B is applied to the liquid crystal. That is, since the AC voltage of the signal B is applied and the liquid crystal rises by the electric field, black display is observed for the pixel in the NW display panel.

When the digital signal output to the drain signal line 61 is “L” and “L” is input to the signal holding circuit 110, the first TFT is selected in the signal selection circuit 120.
Since “H” is input to 121, the first TFT 121
Is turned on, and "L" is input to the other second TFT 122, so that the second TFT 122 is turned off. Then, the signal A is selected, and the voltage of the signal A is applied to the liquid crystal. That is, since the same voltage as that of the counter electrode 32 is applied, no electric field is generated and the liquid crystal does not rise, so that the NW
In the display panel, white display is observed for the display pixel.

In this manner, after writing one screen, after writing, the still image can be displayed by holding it, but the driving of each of the drivers 50 and 60 and the LSI 91 is stopped, so that power consumption is reduced accordingly. Can be.

Therefore, according to the display device of the present invention, the power consumption of the entire display device can be reduced. Therefore, even when the display device of the present invention is used for a monitor of a portable television or a mobile phone using a limited power supply such as a battery, the display can be performed for a long time because of low power consumption.

The display device of the present invention is preferably applied to a reflection type liquid crystal display device among liquid crystal display devices. Therefore, the device structure of the reflection type liquid crystal display device will be described with reference to FIG.

As shown in FIG. 4, the liquid crystal display device has a first
The substrate 10 and the second substrate 30 are bonded to each other with a predetermined interval, and a liquid crystal 21 is sealed between the first and second substrates. In the active matrix type liquid crystal display device, a TFT is formed on one of the first and second substrates.

In FIG. 4, this T
FT is formed.

More specifically, a semiconductor layer 11 made of polycrystalline silicon and made into an island and a gate insulating film 12 are formed on the insulating substrate 10. A gate electrode 13 is formed on the film 12. A source 11 s and a drain 11 d are formed in the lower semiconductor layer 11 located on both sides of the gate electrode 13. An interlayer insulating film 14 is formed on the gate electrode 13 and the gate insulating film 12, and a contact hole 15 penetrating these is formed at a position corresponding to the drain 11 d of the interlayer insulating film 14 and the gate insulating film 12. The drain 11d is connected to the drain electrode 16 via the contact hole 15. The drain electrode 16 and the interlayer insulating film 14 are further covered with a planarizing insulating film 17, and contact holes penetrating these at positions corresponding to the source 11 s of the planarizing insulating film 17, the interlayer insulating film 14 and the gate insulating film 12. The source 11 s is connected to the display electrode 19 via the contact hole 18. In the case of the reflection type liquid crystal display device, the display pixel is constituted by the display electrode 19. That is, the display electrode 19 is connected to the gate signal line 51 and / or the drain signal line 6.
1, the display pixel is not limited to the area defined by the gate signal line 51 and the drain signal line 61 as described above, and the area where the display electrode 80 is formed is one display area. Make a pixel.

Each display electrode 19 formed on the flattening insulating film 17 is made of a reflective material such as aluminum (Al). An alignment film 20 made of polyimide or the like for aligning the liquid crystal 21 is formed on each of the display electrodes 19 and the flattening insulating film 17.

On the other insulating substrate 30, red (R),
A color filter 3 that exhibits green (G) and blue (B) colors
1. Counter electrode 32 made of a transparent conductive film such as ITO (Indium Tin Oxide), and alignment film 33 for aligning liquid crystal 21
Are formed in order. When color display is not performed, the color filter 31 is unnecessary.

The periphery of the pair of insulating substrates 10 and 30 thus formed is adhered to each other with an adhesive sealing material, and the gaps formed thereby are filled with liquid crystal 21 to complete the reflection type liquid crystal display device. .

As shown by the dotted arrows in the drawing, in the reflection type liquid crystal display device, external light incident from the observer 1 side sequentially enters from the counter electrode substrate 30 and is reflected by the display electrode 19 to be reflected by the observer 1. And the display can be observed by the observer 1.

As described above, the reflection type liquid crystal display device is a system for observing a display by reflecting external light, and it is necessary to use a so-called backlight on the side opposite to the observer side like a transmission type liquid crystal display device. Therefore, power for lighting the backlight is not required. Therefore, if the present invention is applied to a reflective liquid crystal display device which does not require a backlight and is suitable for power saving, the power saving of the reflective liquid crystal display device can be further enhanced, and low power consumption is strongly required. It is very effective as a monitor for required equipment.

In the above embodiment, the case where an inverter circuit is used as the configuration of the signal holding circuit has been described. However, the present invention is not limited to this, and as shown in FIG. May be provided (second embodiment).

FIG. 3 shows a configuration provided with the capacitor.

As shown in FIG. 3, the signal holding circuit 110
Are composed of two inverter circuits connected in series and a capacitor 130.

One electrode 131 of this capacitor 130
Is connected to the source 11s, and the other electrode 132 is connected to VDD which is the power supply of the inverter circuits 111 and 112. The other electrode 132 has a voltage VSS or Vs
It may be connected to a signal line that supplies COM.

The configuration and driving method other than the signal holding circuit 110 are the same as those in FIG.

The drain signal supplied from the drain signal line 61 to the source 11 s of the TFT 70 is
Is accumulated in The drain signal is input to the inverter circuit 111, and the output signal from the inverter circuit 110 is supplied to the other inverter circuit 112 and the gate of the first TFT 121 of the signal selection circuit 120. The other inverter circuit 112 inverts the output signal from the inverter circuit 111 and outputs the inverted signal to the second signal of the signal selection circuit 120.
Is output to the gate of the TFT 122.

Here, the drain signal supplied via the TFT 70 is held by the capacitor 130, and a selection signal is output from the inverter circuits 111 and 112 in accordance with the held data. 1 can hold a data signal similarly to the signal holding circuit of FIG.

The operation of the signal selection circuit 120 is the same as that of the first
Since the third embodiment is the same as the first embodiment, a still image can be displayed even when the drivers 50 and 60 are stopped according to the second embodiment. Further, after writing for one screen, the driving of each of the drivers 50 and 60 and the LSI 91 is stopped, so that power consumption can be reduced.

When rewriting the written display for one screen, the gate driver 50, the drain driver 60, and the panel driving LSI 91 are operated to write a data signal for one screen, and then each of them is again written. The drivers 50 and 60 and the LSI 91 may be stopped. Note that the written still image is not limited to a still image such as a photograph or a background image, for example, when the remaining battery power of a mobile phone is indicated by a plurality of segments, only when the remaining battery power changes. Even when a segment corresponding to the remaining amount is displayed, it is a still image display.

Further, in the above-described embodiment, the case where the common electrode voltage and the voltages of the signals A and B are not applied during the entire dot scan period of one screen has been described. However, the present invention is not limited to this. However, these voltages may be applied even during this period. However, in order to reduce power consumption, it is preferable not to apply the voltage. Here, in the above-described embodiment, the case where a 1-bit digital data signal is input has been described, but the present invention is not limited thereto. However, the present invention can be applied to digital data signals of a plurality of bits. By doing so, multi-gradation display can be performed. At that time, the number of signal holding circuits and signal selection circuits needs to be set to the number of input bits.

Here, a case where a digital data signal of a plurality of bits is input to the display device of the present invention will be described (third embodiment).

FIG. 5 shows a case of a display circuit configuration of a liquid crystal display device to which 2-bit digital data is input.

The difference from the above-described equivalent circuit of the liquid crystal display device shown in FIG. 1 is that the input digital data signal is 2 bits. Also, the 2-bit signal is applied to the data line 6.
2, 64 input from the LSI 91 and two sampling transistors SPt arranged per column.
1 and a data signal (2-bit digital signal) is supplied to two drain signal lines 61 and 63 connected thereto. Further, 2 supplied by the drain signal lines 61 and 63
In each display pixel, the signal holding circuit 110 is provided with two sets of inverter circuits 111 and 11 to hold bit signals.
2, 113 and 114, and the circuit selection circuit 120 has eight n-ch transistors and is configured to selectively supply four types of signals (A to D) to the display electrode 80. .

The operation of the circuit selection circuit 120 will be described.

When the 2-bit data signal is “11” and a “H” level signal is input from each of the drain signal lines 61 and 63, the inverter circuit 11 of the signal holding circuit 110
An “L” level signal is output from the transistor 12
0a, 120b, 120e, and 120f, so that these transistors 120a, 120b, 1
20e and 120f are not turned on. Conversely, since an "H" level signal is applied from the inverter circuits 112 and 114 to the gates of the transistors 120c, 120d, 120g and 120h, the transistors 120c, 120d and 12h
0g and 120h are turned on. Accordingly, the transistor 120 provided between the signal A supply line and the display electrode is provided.
When both g and 120c are turned on, the signal A is selected, and a voltage corresponding to the signal A is supplied to the liquid crystal 21.

When the 2-bit data signal is, for example, "10",
When an “H” level signal is input from the drain signal line 61 and an “L” level signal is input from the drain signal line 63, both the transistors 120d and 120e are turned on, and a voltage corresponding to the signal C is applied to the liquid crystal. When the 2-bit data signal is "01" and the drain signal line 61 is "L"
When a high level signal or an “H” level signal is input from the drain signal line 63, the transistors 120 a and 120
0h is turned on, the signal B is selected, the corresponding voltage is applied to the liquid crystal, and the 2-bit data signal is “00” and the drain signal line 61 is at the “L” level and the drain signal line 63 is at the “L” level. When the signal of is input,
The transistors 120b and 120f are turned on, the signal D is selected, and a corresponding voltage is applied to the liquid crystal. here,
Each of the signals A, B, C, and D is set to a different voltage level to enable display of four gradations.

As described above, the selection circuit 120 selects one of the four levels of the signal in accordance with the digital signal held in the signal holding circuit 110, and the corresponding voltage is applied to the liquid crystal 21.
, A four-gradation still display can be obtained.

Further, according to the above configuration, FIG.
Similarly to the case of one bit shown in FIG. 3, after writing one screen, each driver 50, 60 and LS
The driving of I91 can be stopped, thereby making it possible to reduce power consumption. <Switching between analog display image and still image>
9 shows a fourth embodiment of the present invention.

FIG. 6 shows a circuit configuration diagram when the display device of the present invention is applied to a liquid crystal display device.

On the insulating substrate 10, a plurality of gate signal lines 51 connected to a gate driver 50 for supplying a gate signal are arranged in one direction, and a plurality of gate signal lines 51 are arranged in a direction crossing the gate signal lines 51. A drain signal line 61 is provided.

The sampling transistors SPt 1 and SPt are connected to the drain signal line 61 in accordance with the timing of the sampling pulse output from the drain driver 60.
, SPtn are turned on, and the data signal (analog video signal or digital video signal) on the data signal line 62 is supplied.

The liquid crystal display panel 100 has a gate signal line 5
A plurality of display pixels 200 which are selected by the gate signal from 1 and to which the data signal from the drain signal line 61 is supplied are arranged in a matrix.

Hereinafter, a detailed configuration of the display pixel 200 will be described.

A circuit selection circuit 300 including a p-channel TFT 310 and an n-channel TFT 320 is provided near the intersection of the gate signal line 51 and the drain signal line 61. Both drains of the TFTs 310 and 320 are connected to a drain signal line 61, and both gates 313 and 323 are connected to a selection signal line 800.
One of the TFTs 310 and 320 is turned on in response to the selection signal from the selection signal line 800. Further, as described later, a data selection circuit 301 is provided which is paired with the circuit selection circuit 300 and selects one of analog data and digital data and outputs the selected data to the display electrode 80.

By adding the above-described circuit selection circuit 300, analog / digital data selection circuit 301, and the like to the configuration of the display pixel described in each of the above embodiments, an analog video signal display (full-color moving image display) ) And digital video display (low power consumption, still image display) can be selected and switched. Further, adjacent to the circuit selection circuit 300, an n-channel TFT 41
A pixel selection circuit 400 including 0 and n-channel TFTs 420 is arranged. The drains of the TFTs 410 and 420 are connected to the sources of the TFTs 310 and 320 of the circuit selection circuit 300, respectively. That is, these T
The FTs 410 and 420 are connected to the drain signal line 61 via the TFTs 310 and 320, respectively. The gate signal line 51 is connected to both gates of these 410 and 420. The TFTs 310 and 320 are configured so that both are turned on simultaneously in response to a gate signal from the gate signal line 51.

Further, an auxiliary capacitor 700 for holding an analog video signal is provided. One electrode 710 of the auxiliary capacitor 700 is connected to the source 411 s of the TFT 410. The other electrode 720 is connected to the liquid crystal display panel 100.
And a bias voltage Vsc is supplied thereto. While the gate of the TFT 410 is open, the analog video signal supplied from the drain signal line 61 is applied to the liquid crystal 21.
It must be held for one field period before T410 turns on again and opens the gate. However, only the capacitance of the liquid crystal 21 cannot hold the signal, and the voltage applied to the liquid crystal 211 gradually decreases with time.
Then, it appears as display unevenness, and good display cannot be obtained. Therefore, an auxiliary capacitor 700 is provided to hold a voltage corresponding to a signal supplied when the TFT 410 is turned on for one field period.

The p-channel TFT 350 of the data selection circuit 301 is provided between the auxiliary capacitor 700 and the liquid crystal 21.
And an n-channel TFT 360. When an analog video signal is supplied to the drain signal line 61, the TFT is turned on and off simultaneously with the TFT 310 of the circuit selection circuit 300.

The TFT 420 of the pixel selection circuit 400
And a display electrode 80 of the liquid crystal 21, a signal holding circuit 5
00, a signal selection circuit 600 is provided. The signal holding circuit 500 includes two inverter circuits 51 that are positively fed back.
0, 520, and constitutes a static memory for holding digital binary values, and has the same configuration as the above-described signal holding circuit 110 of FIG.

The signal selection circuit 600 is a circuit for selecting a signal in accordance with a signal from the signal holding circuit 500, and includes two n-channel TFTs 610 and 620. The configuration is the same as that of the signal selection circuit 120 shown in FIG. Since complementary output signals from the signal holding circuit 500 are applied to the gates of the TFTs 610 and 620, the TFTs 610 and 620 are turned on and off complementarily.

Here, when digital data of “H” is applied from the drain signal line 61 to the gate of the TFT 620 via the TFT 320, the TFT 420 and the signal holding circuit 500, the TFT 620 is turned on, and the counter electrode signal VCOM of DC voltage is applied. (Signal A) is selected, and conversely, when digital data of “L” is supplied from the drain signal line 61, the TFT 6
10 is turned on, an AC drive signal (signal B) for driving the liquid crystal is selected as an AC voltage centered on the counter electrode signal VCOM, and an analog / digital data selection circuit 3 is selected.
01 through the TFT 360 of the display electrode 80 of the liquid crystal 21.
Supplied to

In summary, in one display pixel 200, an analog data circuit (second display circuit) including a TFT 410 as a pixel selection element and an auxiliary capacitor 700 for holding an analog video signal is provided in one display pixel 200. A digital data circuit (first display circuit) including a TFT 420 serving as a pixel selection element, a signal holding circuit 500 for holding a binary digital video signal, and a signal selection circuit 600 is provided. Further, these two circuits are selected according to the switching signal MD. That is, a circuit selection circuit 3 for selecting which of the two data signals is to be supplied according to the signal MD.
00 is provided near the intersection of the gate signal line 51 and the drain signal line 61. Further, between the two display circuits and the display electrode 80, there is provided a data selection circuit 301 for switching which of the display circuits to supply data to the display electrode 80 in accordance with the switching signal MD.

Next, peripheral circuits of the liquid crystal panel 100 will be described.

The external circuit board 90 has a panel driving L
An SI 91 is provided. The vertical start signal STV is input to the gate driver 50 from the panel driving LSI 91 of the external circuit board 90, and the horizontal start signal STV
H is input to the drain driver 60. An analog or digital video signal is input to the data line 62.

FIG. 7 is a circuit configuration diagram of a video signal switching circuit.

When the switch SW1 is connected to the terminal P2, the n-bit digital video signal input from the input terminal Din is converted into an analog video signal by the DA converter 130, and then the data line 62 is switched via the switch SW1. Is output to On the other hand, when the switch SW1 is switched to the terminal P1 side, for example, the most significant bit of the n-bit digital video signal is output to the data line 62. Switch S
Switching of W1 is performed according to a mode signal MD that controls switching between the analog latch display mode and the digital latch display mode corresponding to low power consumption.

Here, a method of driving the display device according to the fourth embodiment will be described with reference to FIGS. The operation similar to that of the first embodiment already described is simply described below. (1) In the case of the analog display mode When the analog display mode is selected in accordance with the mode signal MD, the state where the analog video signal is output to the data signal line 62 is set, and the circuit selection signal line 800 and the high level are set. The potential of the voltage side power supply line VDD becomes “L”, and the TFTs 310 and 3 of the circuit selection circuit 300 and the data selection circuit 301
50 turns on.

The sampling transistor SP according to the sampling signal based on the horizontal start signal STH
Is turned on, and the analog video signal of the data signal line 62 is supplied to the drain signal line 61.

A gate signal is supplied to the gate signal line 51 based on the vertical start signal STV. When the TFT 410 is turned on in response to the gate signal, the analog video signal Sig is supplied from the drain signal line 61 to the display electrode 8 via the transistor 350 whose ON is controlled at this time.
0 and is held in the auxiliary capacitor 700.
A video signal voltage applied to the display electrode 80 is applied to the liquid crystal 21 and the liquid crystal 21 is oriented according to the voltage, whereby a liquid crystal display can be obtained.

This analog display mode is suitable for displaying full-color moving images. However, the LSI 91 of the external circuit board 90 and the drivers 50 and 60 always need to operate, and power is constantly consumed for driving them. (2) Digital display mode When the digital display mode is selected according to the mode signal MD, a state is set in which a digital video signal is output to the data signal line 62, and the circuit selection signal line 800 and the high voltage side are set. The potential of the power supply line VDD becomes “H”, and the signal holding circuit 500 becomes operable. Also, the TFTs 310 and 35 of the circuit selection circuit 300 and the data selection circuit 301
When 0 is turned off, the TFTs 320 and 360 are turned on.

A start signal STH is input to the gate driver 50 and the drain driver 60 from the panel driving LSI 91 of the external circuit board 90. Sampling signals are sequentially generated in response thereto, and sampling transistors SP1, SP1 are generated in accordance with the respective sampling signals.
SP2,..., SPn are sequentially turned on and the digital video signal S
ig is sampled and supplied to each drain signal line 61.

Here, the operation in the first row, that is, the display pixel connected to the gate signal line 51 to which the gate signal G1 is applied will be described. First, each of the display pixels P11 and P1 connected to the gate signal line 51 by the gate signal G1.
Each of the TFTs 410 and 420 of 2 to P1n is turned on for one horizontal scanning period.

Focusing on the display pixel P11 in the first row and first column, the digital video signal S11 sampled by the sampling signal SP1 is input to the drain signal line 61. When the TFT 420 is turned on by the gate signal G1, the drain signal D1 is input to the signal holding circuit 500 via the TFT 320 and the TFT 420.

The signal (H or L) held by the signal holding circuit 500 is supplied to the signal selection circuit 600. The signal selection circuit 600 selects the signal A or the signal B according to the output data from the signal holding circuit 500, as in the signal selection circuit 120 according to the first embodiment, and the selected signal is displayed on the display electrode. 80, and accordingly the liquid crystal 2
Controlled to 1.

The same processing is performed for the display pixels P12 to P12 in the first row.
P1n, and further, the gate signal line 6 in the first row.
By scanning from 1 (G1) to the gate signal line Gm of the last row, scanning for one screen (one field period), that is, all dot scanning is completed, and one screen is displayed.

When one screen is displayed, the supply of voltage to the gate driver 50, the drain driver 60, and the external panel driving LSI 91 is stopped to stop their driving. The signal holding circuit 500 always has the voltage VD
D and VSS are supplied and driven, and the counter electrode voltage Vcom is supplied to the counter electrode 32, and the signals A and B are supplied to the selection circuit 600.

That is, VDD and VSS for driving this signal holding circuit are supplied to the signal holding circuit 500, and a counter electrode voltage VCOM (signal A) of a DC voltage is applied to the counter electrode.
When the liquid crystal display panel 100 is normally white (NW), a voltage having the same potential as that of the counter electrode 32 is applied to the signal A, and an AC voltage (for example, 60 Hz) for driving the liquid crystal is applied to the signal B. Just do it. By doing so, one screen can be held and displayed as a still image. In addition, no voltage is applied to the other gate driver 50, drain driver 60, and external LSI 91.

For example, when “H” is input to the signal holding circuit 500 as a digital video signal from the drain signal line 61, the first TFT 610 of the signal selection circuit 600
Turns off, and the other second TFT 620 turns on.

Then, the signal B is selected and applied to the display electrode 80. As in the first embodiment, the signal B is an AC voltage signal centered on Vcom. When the signal B is selected, the liquid crystal is driven and black is displayed on the NW display panel.

Conversely, when “L” is input to the signal holding circuit 500 as a digital video signal from the drain signal line 61, the TFT 610 of the signal selection circuit 600 turns on and the TFT 620 turns off.

Then, the signal A is selected and applied to the display electrode 80. The signal A has the same potential as Vcom, and when the signal A is selected, no voltage is applied to the liquid crystal.
White is displayed on the W display panel.

In this manner, a still image can be displayed by writing and holding one screen, but in this case, the driving of each of the drivers 50 and 60 and the LSI 91 is stopped. can do.

As described above, according to the embodiment of the present invention, two display circuits, a circuit selection circuit 300 and a data selection circuit 301 are provided in one display pixel, and a signal selection circuit 3001 and a data selection circuit 301 are provided. Performs a selection operation on one liquid crystal display panel 100, thereby displaying two types of images, a full-color moving image display (in an analog display mode) and a low power consumption digital gradation display (in a digital display mode). Can be handled.

According to the present invention, even with a configuration different from the above, a full-color moving image display (in the case of the analog display mode) on one liquid crystal display panel 100, as in the fourth embodiment, It is possible to cope with two types of display, that is, low power consumption digital gradation display (in the case of a digital display mode).

Hereinafter, configurations obtained by further improving the fourth embodiment will be described as fifth and sixth embodiments.

FIG. 8 shows a configuration example of a liquid crystal display device according to the fifth embodiment of the present invention.

FIG. 16 is a diagram showing the configuration of FIG. 6 described in the fourth embodiment.
6 is that the circuit selection circuit 300 provided for each display pixel is not provided in FIG. 6 and that the full-color moving image display signal and the digital gradation display signal are provided on the liquid crystal display panel 100, respectively. Dedicated data signal line 62
a, 62d.

As described above, the analog signal and the digital signal are supplied to the panel by the separate data signal lines 62a and 62d, and each of the display pixels 200 is connected to the analog signal and the digital signal by the two drain signal lines 61a and 61d. The digital signal is supplied separately. Therefore, each display pixel 20
It is not necessary to provide the circuit selection circuit 300 for 0. That is,
In the fourth embodiment, the p-channel TFT 310 and the n-channel TFT 320 arranged corresponding to one display pixel 200 can be omitted, and the display electrode 80 can be made larger in one display pixel 200 accordingly. Can,
Alternatively, a space for providing another TFT is increased.

The data signal lines 62a and 62d, the sampling switch SPt, and the drain signal line (61a,
61d) increases. However, since it is necessary to arrange the TFTs 310 and 320 for each display pixel,
The space occupied by 10, 320 is the data signal line 6
2. Sampling switch SPt and drain signal line 6
1 is much larger than the space occupied. Therefore, by supplying digital and analog signals to the liquid crystal display panel through the dedicated data signal line 62,
A sufficient space in the display pixel can be secured.

Here, a configuration example of the liquid crystal display device according to the sixth embodiment of the present invention will be described with reference to FIG.

FIG. 18 is a diagram showing the configuration of FIG. 6 described in the fourth embodiment.
Is an equivalent circuit of the TF constituting the data selection circuit 301.
The difference is that T350 is deleted.

In FIG. 6, the TFT 350 is arranged for each display pixel, but if this is omitted as in the sixth embodiment, a space within the display pixel can be secured by that amount. There is room for the arrangement of other TFTs.

The TFT 35 of the data selection circuit 301
Even if 0 is deleted, if the supply source of the signal A and the signal B has a charge supply capacity enough to charge the signal supplied to the liquid crystal to the auxiliary capacitor 700, the liquid crystal is charged while the auxiliary capacitor 700 is charged. Can be driven.

In the above embodiment, the TFT 350
Are omitted, but the TFT 310 can be omitted instead of the TFT 350. Even if the TFT 310 is omitted, if the supply source of the digital signal has such a charge supply capability that the signal supplied to the storage capacitor 700 and the holding circuit can be charged, the supply source of the digital signal is the storage capacitor 70
While charging 0, the holding circuit can also be charged.

In the fifth embodiment, the TFT 350 of the data selection circuit 301 may be omitted from each display pixel 200 as in the present embodiment. With such a configuration, more space is allowed in one display pixel.

In the first to sixth embodiments,
During the entire dot scan period of one screen, the common electrode voltage Vco
Although the case where the voltages of m and the signals A and B are applied is shown, the present invention is not limited to this, and it is not necessary to apply these voltages even during this period. In order to reduce power consumption, it is more preferable not to apply power.

In the first, second, and fourth to sixth embodiments, the case where a 1-bit digital data signal is input in the digital display mode has been described.
The present invention is not limited to this, and can be applied to a case where a digital data signal of a plurality of bits is input to a panel, for example, as in the third embodiment. By doing so, multi-gradation display can be performed. At that time, the number of elements in the signal holding circuit and the signal selection circuit needs to be set to a number corresponding to the number of input bits.

In the first to sixth embodiments, the operation is the same whether the still image is displayed on a part of the liquid crystal display panel or the still image is displayed on all the display pixels. It has the same effect.

In the above-described embodiment, the case of the reflection type liquid crystal display device has been described. However, in one pixel, a transparent region is formed as the display electrode 80 in a region excluding the TFT, the signal holding circuit, the signal selection circuit and the signal wiring. By arranging the electrodes, it can be used for a transmission type liquid crystal display device. In addition, by arranging a transparent electrode in a region except for a TFT, a signal holding circuit, a signal selection circuit, and a signal wiring in one pixel, and arranging a reflective electrode in the other region, a transflective liquid crystal display device can be provided. Can be used. In either case of the transmissive or transflective liquid crystal display device, after one screen is displayed, the supply of voltage to the gate driver 50, the drain driver 60 and the external panel driving LSI 91 is stopped, thereby increasing the amount. Power consumption can be reduced.

Further, in the above-described embodiment, the case where a still image is displayed on a part of the liquid crystal display panel has been described. However, the present invention is not limited to this, and a still image is displayed on all display pixels. It is also possible to achieve the specific effects of the present invention.

Further, according to the present invention, one of the transistors of the signal selection circuit is always connected, and one of the fixed voltages (signal A or B) is selected to apply the voltage to the transistor of the signal selection circuit. Is applied, even if a leakage current occurs in the switching transistor 7 in the configuration described in the above publication, there is no adverse effect such that display unevenness occurs.

[0134]

According to the display device of the present invention, when a still image is displayed on the display device, each driver and panel driving L
A display device that eliminates the need to drive the SI, reduces power consumption, and enables a single display device to support two types of display, a full-color moving image display and a low-power consumption gradation display. Obtainable.

[Brief description of the drawings]

FIG. 1 is an equivalent circuit diagram of a liquid crystal display device according to a first embodiment of the present invention.

FIG. 2 is a timing chart of the liquid crystal display device of the present invention.

FIG. 3 is an equivalent circuit diagram of a liquid crystal display device according to a second embodiment of the present invention.

FIG. 4 is a sectional view of a reflective liquid crystal display device.

FIG. 5 is an equivalent circuit diagram of a liquid crystal display device according to a third embodiment of the present invention.

FIG. 6 is an equivalent circuit diagram of a liquid crystal display device according to a fourth embodiment of the present invention.

FIG. 7 is an equivalent circuit diagram of a signal switching circuit of the display device of the present invention.

FIG. 8 is an equivalent circuit diagram of a liquid crystal display device according to a fifth embodiment of the present invention.

FIG. 9 is an equivalent circuit diagram of a liquid crystal display device according to a sixth embodiment of the present invention.

FIG. 10 is an equivalent circuit diagram of a conventional liquid crystal display device.

[Explanation of symbols]

 REFERENCE SIGNS LIST 10 insulating substrate 13 gate 21 liquid crystal 50 gate driver 51 gate signal line 60 drain driver 61 drain signal line 70 TFT 80 display electrode 91 external LSI 100 liquid crystal display panel 110, 500 signal holding circuit 120, 600 signal selection circuit 130 capacitor 200 Display pixel 300 circuit selection circuit 301 data selection circuit 400 pixel selection circuit 700 auxiliary capacitance 800 selection signal line

Claims (8)

[Claims] A plurality of gate signal lines arranged in one direction on a substrate, a plurality of drain signal lines arranged in a direction crossing the gate lines, and a gate signal from the gate signal lines. And a display device in which a plurality of display pixels to which a video signal is supplied from the drain signal line are arranged, wherein a signal holding unit holds a digital video signal from the drain signal line in accordance with a signal input from the gate signal line. A display device comprising: a first display circuit including a circuit and a signal selection circuit that selects a signal to be supplied to the display electrode in accordance with a signal from the signal holding circuit. 2. An auxiliary capacitor disposed adjacent to the first display circuit, the auxiliary capacitor holding an analog video signal from the drain signal line in response to a signal input from the gate signal line, 2. The display device according to claim 1, further comprising a second display circuit that supplies a signal held in the display device to a display electrode. 3. A plurality of gate signal lines arranged in one direction on the substrate, a plurality of drain signal lines arranged in a direction intersecting with the gate lines, and a gate signal from the gate signal lines. And a display device in which a plurality of display pixels to which a video signal is supplied from the drain signal line are arranged, wherein a signal holding unit holds a digital video signal from the drain signal line in accordance with a signal input from the gate signal line. A first display circuit provided with a circuit, and an auxiliary capacitor arranged adjacent to the first display circuit and holding an analog video signal from the drain signal line according to a signal input from the gate signal line And a second display circuit for supplying a signal held in the storage capacitor to a display electrode. 4. The first display circuit according to claim 1, further comprising a signal selection circuit for selecting a signal to be supplied to the display electrode according to a signal from the signal holding circuit. The display device according to claim 3. 5. A circuit selection circuit for selecting one of the first and second display circuits in accordance with a circuit selection signal and connecting to the drain signal line. The display device according to claim 2. 6. The signal holding circuit includes an inverter circuit,
6. The display device according to claim 1, comprising an inverter circuit and a capacitor. 7. The display pixel according to claim 1, wherein the display pixel including the signal holding circuit and the signal selection circuit is a display pixel that displays a still image. The display device according to item. 8. The display device according to claim 1, wherein the display device is a liquid crystal display device.