JP2002124433A - Electronic component and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an electronic component such as a monolithic ceramic capacitor which can improve electrostatic capacity per unit volume, has a large capacitance even if miniaturized and has high reliability. SOLUTION: An electronic component has an element body where a dielectric layer and an inner electrode layer are laminated alternately and a hetero phase of a prescribed thickness is formed at least in a part of an area near a boundary between the dielectric layer and the inner electrode layer. Although the composition of the hetero phase is the same as a main element constituting the dielectric layer, crystal lattices differ.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component such as a multilayer ceramic capacitor which has a high capacitance per unit volume, has a large capacity even if it is miniaturized, and has a high reliability, and a method for manufacturing the same.

[0002]

2. Description of the Related Art The obtained capacitance of a multilayer ceramic capacitor as an example of an electronic component has the following relationship.

C = ε ₀ · ε _r × n × (S / d) (where C: capacity (F), ε ₀ : vacuum permittivity, ε
_r : relative dielectric constant of the dielectric material, n: number of layers, S: effective area, d: dielectric thickness).

[0004] To increase the acquired electrostatic capacitance of the capacitor, decreasing the dielectric thickness d, to increase the specific dielectric constant epsilon _r of the dielectric material increases the effective area S, the dielectric layer number n Either of these methods can be considered. However, there is a limit in increasing the effective area in order to obtain a small size and a large capacity. Therefore, a method of increasing the relative dielectric constant or reducing the thickness of the dielectric is generally adopted. Due to problems such as variations in thickness, the thickness of the dielectric has been said to be 10 μm or 5 μm due to problems such as thickness variations. It has become.

[0005]

However, even if a chip capacitor having an extremely thin layer having a dielectric thickness of 3 μm or less can be manufactured, there arises a problem that the resistance of the dielectric is too low to be practically usable. Was. For this reason, the reduction in the thickness of the dielectric layer is currently being stopped, and this has been an obstacle to increasing the size and capacity of the capacitor.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a highly reliable electronic component such as a multilayer ceramic capacitor which can improve the obtained capacitance per unit volume, has a large capacity even if it is miniaturized, and a method of manufacturing the same. It is.

[0007]

In order to achieve the above object, an electronic component according to a first aspect has an element body in which dielectric layers and internal electrode layers are alternately stacked, A different phase having a predetermined thickness is formed in at least a part near a boundary between the body layer and the internal electrode layer.

[0008] The different phase may be formed on at least a part of the vicinity of the boundary between the dielectric layer and the internal electrode layer, or may be formed on the entire area near the boundary.

In the present invention, the hetero-phase means a phase having the same composition as the main component constituting the dielectric layer, but having a distorted crystal lattice and different from the composition crystal lattice of the main component.

[0010] Preferably, the thickness of the different phase is 0.2 to
0.8 nm.

Preferably, the number of dielectric particles contained in the dielectric layer sandwiched between the pair of internal electrode layers is one in the thickness direction of the dielectric layer.

Preferably, the dielectric layer comprises SiO 2
_It contains 500 ppm or less of a silicon compound in terms of ₂ .

An electronic component according to a second aspect has an element body in which dielectric layers and internal electrode layers containing conductive material particles are alternately stacked, and an internal electrode sandwiched between a pair of dielectric layers. The number of conductive material particles contained in the layer is one in the thickness direction of the internal electrode layer.

Preferably, the conductive material particles are made of nickel and / or a nickel alloy in which two or more twins are formed per particle.

The method for manufacturing an electronic component according to the present invention comprises the steps of firing a device body obtained by alternately laminating dielectric layers and internal electrode layers at a temperature of 1200 to 1400 ° C. to obtain a sintered body. Annealing the sintered body at a temperature of 800 to 1100 ° C. to obtain an annealed sintered body; and subjecting the annealed sintered body to a holding temperature of more than 600 ° C. and less than 1000 ° C. and a temperature of 0.5 ° C. Heat treatment for a holding time of up to 1.5 hours to obtain a sintered body after the heat treatment.

Preferably, the rate of temperature rise and fall in the heat treatment step is more than 1000 ° C./hour.

[0017]

The present inventors can increase the obtained capacitance per unit volume by having a specific heterophase near the boundary between the dielectric layer and the internal electrode layer (for example, 100F).
/ Capacitance of m ³ or more of a high volume ratio) was found to be.

Further, when the number of conductive material particles contained in the internal electrode layer sandwiched between the pair of dielectric layers is one in the thickness direction of the internal electrode layer, a sufficient electrostatic property can be obtained even if the multilayer is formed. It has been found that an electronic component having a capacity can be obtained.

That is, according to the present invention, it is possible to realize an electronic component such as a multilayer ceramic capacitor having a high reliability even if the obtained capacitance per unit volume is increased and the size is reduced.

In the method for manufacturing an electronic component according to the present invention, a specific heat treatment is performed after firing and annealing an element body such as a green chip, so that a specific heat treatment is performed near the boundary between the dielectric layer and the internal electrode layer. Heterophase can be formed. For this reason, the acquired capacitance per unit volume of the manufactured electronic component is increased, and as a result, even if the electronic component is downsized, an electronic component such as a multilayer ceramic capacitor having a large capacity and high reliability can be realized. .

Although the electronic component is not particularly limited,
Multilayer ceramic capacitors, piezoelectric elements, chip inductors, chip varistors, chip thermistors, chip resistors,
Other surface mount (SMD) chip type electronic components are exemplified.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below based on embodiments shown in the drawings.

FIG. 1 is a cross-sectional view of a multilayer ceramic capacitor according to an embodiment of the present invention, FIG. 2A is an enlarged cross-sectional view of a principal part of the dielectric layer shown in FIG. 1, and FIG. A) II
FIG. 3 is a transmission electron microscope photograph of the ceramic fired body of Example 1, FIG. 4 is an enlarged photograph of a main part of FIG. 3, and FIG. 5 is a TEM of the fine structure of the ceramic fired body of Example 1. 6 is a transmission electron micrograph of the ceramic fired body of Comparative Example 1, and FIG. 7 is an enlarged photograph of a main part of FIG.

In this embodiment, the multilayer ceramic capacitor 1 shown in FIG. 1 will be exemplified as an electronic component, and its structure and manufacturing method will be described.

[0025] As shown in multilayer ceramic capacitors Figure 1, a multilayer ceramic capacitor 1 as an electronic device according to an embodiment of the present invention, the capacitor element and the dielectric layers 2 and internal electrode layers 3 stacked alternately It has a main body 10. At both ends of the capacitor element body 10, a pair of external electrodes 4 are formed which are electrically connected to the internal electrode layers 3 alternately arranged inside the element body 10. The shape of the capacitor element body 10 is not particularly limited, but is generally a rectangular parallelepiped. The dimensions are not particularly limited, and may be appropriately determined according to the application.
(0.6-5.6mm) x (0.3-5.0mm) x
(0.3 to 1.9 mm).

The internal electrode layers 3 are laminated so that each end face is alternately exposed on the surfaces of the two opposing ends of the capacitor element body 10. The pair of external electrodes 4 are formed at both ends of the capacitor element body 10 and connected to the exposed end faces of the alternately arranged internal electrode layers 3 to form a capacitor circuit.

The composition of the dielectric layer 2 dielectric layer 2 is not particularly limited in the present invention,
For example, it is composed of the following dielectric ceramic composition.

The dielectric porcelain composition of the present embodiment is, for example,
If the composition formula 組成 (Ba_(1-xy) Ca_x Sr_y)
O｝_A(Ti_(1-z)Zr_z)_BO₂ In table
It has a main component containing a dielectric oxide to be formed. A,
B, x, y, and z are all in an arbitrary range.
For example, 0.990 ≦ A / B ≦ 1.010, 0 ≦ x ≦ 0.8
0, 0 ≦ y ≦ 0.5, 0.01 ≦ z ≦ 0.98
Is preferred.

As subcomponents contained in the dielectric ceramic composition together with the main components, Y, Gd, Tb, Dy, V, Mo,
Examples of the auxiliary component include at least one selected from oxides of Zn, Cd, Sn, W, Ca, Mn, Si, and P. By adding the subcomponent, low-temperature sintering can be performed without deteriorating the dielectric properties of the main component, reliability failure when the dielectric layer is thinned can be reduced, and the life can be prolonged.

In the present invention, a preferable example of the subcomponent is a compound of Si.
The content is preferably 500 ppm or less, more preferably 20 to 100 ppm in terms of SiO ₂ . By adding the compound of Si, low-temperature firing becomes easier. However, if too much Si compound is contained in the dielectric layer,
The relative permittivity tends to be low. Such a Si compound is contained in a trace amount that is contained in impurities or a dielectric paste described later.

The conditions such as the number of layers and the thickness of the dielectric layer 2 shown in FIG. 1 may be appropriately determined according to the purpose and application. In the present embodiment, the thickness d1 of the dielectric layer is 6 μm. Or less, preferably 5 μm or less, more preferably less than 3 μm.

As shown in FIGS. 2A and 2B, the dielectric layer 2 includes a dielectric particle 2a, a grain boundary phase 2b,
And at least a different phase 2c. The area ratio of the grain boundary phase 2b in the cross section of the dielectric layer 2 is preferably 2% or less.

In this embodiment, a pair of internal electrode layers 3 and 3
The number of the dielectric particles 2 a included in the dielectric layer 2 sandwiched between them is one in the thickness direction of the dielectric layer 2. If the number of the dielectric particles 2a in the thickness direction is increased to two or more by increasing the thickness of the dielectric layer 2, the capacitance as a capacitor tends to be insufficient. On the other hand, when the number of the dielectric particles 2a is increased to two or more by reducing the size of the dielectric particles 2a, the dielectric constant of the dielectric layer 2 itself decreases, and as a result, a sufficient capacitance as a capacitor is obtained. Tend not to be. The dielectric particles 2a
Is one in the thickness direction of the dielectric layer 2 means that a straight line drawn from one internal electrode layer 3 perpendicular to the adjacent internal electrode layer 3 passes through one dielectric particle 2a. Means

The grain boundary phase 2b usually contains an oxide of a material constituting the dielectric material or the internal electrode material, an oxide of a material added separately, or an oxide of a material mixed as an impurity during the process. As a component, it is usually made of glass or vitreous. In the grain boundary phase 2b, Mo, Y, Si,
It contains at least two or more segregates (segregated phase (second phase)) selected from Ca, V and W.

The different phase 2 c is located near the boundary with the internal electrode layer 3.
Exists. Due to the existence of such a foreign phase 2c,
The obtained capacitance per unit volume can be increased. Heterogeneous 2c
Are the main components of the dielectric layer 2 (in the present embodiment, the
Formula ｛(Ba_(1-xy) Ca_x Sr_y) O｝
_A(Ti_(1-z)Zr_z)_BO₂ Represented by
Dielectric oxide), but its crystal lattice is
Distortion means a phase different from the composition crystal lattice of the main component. This
The width W of the hetero phase 2c is not particularly limited, but is preferably
0.2 to 0.8 nm, more preferably 0.2 to 0.8 nm
0.5 nm.

Internal Electrode Layer 3 The conductive material contained in the internal electrode layer 3 is not particularly limited, but a base metal can be used since the constituent material of the dielectric layer 2 has reduction resistance. As the base metal used as the conductive material, Ni or a Ni alloy is preferable. The Ni alloy is selected from Mn, Cr, Co and Al.
An alloy of at least one kind of element and Ni is preferable.
The content is preferably at least 95% by weight. In addition,
Ni or Ni alloy may contain various trace components such as P, Fe, and Mg in an amount of about 0.1% by weight or less. The thickness d2 of the internal electrode layer may be appropriately determined according to the use or the like, but is usually preferably 0.5 to 5 μm, particularly preferably about 1 to 2.5 μm.

In the present embodiment, the number of conductive material particles 3 a included in the internal electrode layer 3 sandwiched between the pair of dielectric layers 2 and 2 is one in the thickness direction of the internal electrode layer 3. By increasing the thickness of the internal electrode layer 3, the conductive material particles 3
If the number of a is two or more, for example, 100 or more layers,
Preferably, it tends to be impossible to form a multilayer of 500 or more layers. On the other hand, by reducing the conductive material particles 3a,
When the number of the conductive material particles 3a is two or more, the firing temperature becomes low, and the dielectric constant of the dielectric layer 2 itself cannot be sufficiently obtained.
As a result, there is a tendency that sufficient capacitance as a capacitor cannot be obtained. It should be noted that the number of the conductive material particles 3 a is one in the thickness direction of the internal electrode layer 3.
This means that a straight line drawn perpendicular to the adjacent dielectric layer 2 passes through one conductive material particle 3a.

The conductive material particles 3 constituting the internal electrode layer 3
a has preferably two or more twins when observed by a transmission electron microscope. It is considered that the presence of twins further improves the acquired capacitance.

External Electrode 4 The conductive material contained in the external electrode 4 is not particularly limited, but usually Cu or Cu alloy, Ni or Ni alloy or the like is used. Incidentally, Ag, Ag-Pd alloy or the like can of course be used. In this embodiment, inexpensive Ni, C
u and their alloys are used. The thickness of the external electrode may be appropriately determined according to the application and the like.
m is preferable.

The method of manufacturing a multilayer ceramic capacitor will be explained a manufacturing method of a multilayer ceramic capacitor according to an embodiment of the present invention.

In the present embodiment, a green chip is produced by a normal printing method or a sheet method using a paste, fired, and then printed or transferred to an external electrode and fired. Hereinafter, the manufacturing method will be specifically described.

The dielectric layer paste may be an organic paint obtained by kneading a dielectric material and an organic vehicle, or may be an aqueous paint.

According to the composition of the above-described dielectric ceramic composition, the dielectric raw material includes a raw material constituting a main component, a raw material constituting a subcomponent, and a raw material constituting a sintering aid as required. Is used. The raw materials constituting the main component include Ti,
Ba, Sr, Ca, and Zr oxides and / or compounds that become oxides by firing are used. Raw materials constituting the sub-components include Sr, Y, Gd, Tb, Dy, V, M
one or more, preferably three or more, single oxides selected from oxides of o, Zn, Cd, Ti, Ca, Sn, W, Mn, Si and P and / or compounds that become oxides upon firing; A composite oxide is used.

In the production method according to the present invention, it is not always necessary to include a sintering aid in the dielectric material, but when a sintering aid is included, for example, a compound of Si and / or
Alternatively, a compound that becomes an oxide by firing is used. S
After firing, the compound of i is 500 pp in terms of SiO _2.
It is preferable to add it so as to contain m or less. Examples of the compound that becomes an oxide upon firing include carbonates, nitrates, oxalates, and organometallic compounds. Of course, an oxide and a compound which becomes an oxide by firing may be used in combination.

These raw material powders usually have an average particle size of about 0.0005 to 5 μm. To obtain a dielectric material from such a raw material powder, for example, the following method may be used.

First, the starting materials are blended in a predetermined ratio, and are wet-mixed by, for example, a ball mill or the like. Next, it is dried by a spray drier or the like and then calcined to obtain a dielectric oxide of the above formula constituting a main component. The calcination is usually performed at 500 to 1300 ° C., preferably 500 to 1300 ° C.
At 00 ° C, more preferably 800-1000 ° C, 2
Perform in air for about 10 to 10 hours. Next, the material is pulverized by a jet mill or a ball mill until a predetermined particle size is obtained, thereby obtaining a dielectric material. The sub-component and the sintering aid (for example, SiO ₂ ) are calcined separately from the main component, and are mixed with the obtained dielectric material. When pre-baking of the main component is performed including sub-components, desired characteristics tend not to be obtained.

Various additives such as a binder, a plasticizer, a dispersant, and a solvent may be used for preparing the dielectric layer paste. Further, glass frit may be added to the paste for the dielectric layer. As the binder, for example, ethyl cellulose, resin abietic acid, polyvinyl butyral, etc., as the plasticizer, for example, abietic acid derivatives, diethyl oxalic acid, polyethylene glycol,
Examples of dispersing agents such as polyalkylene glycol, phthalic acid ester, dibutyl phthalate, etc. , Mensaiden oil and other solvents
For example, toluene, terpineol, butyl carbitol, methyl ethyl ketone and the like can be mentioned. When the paste is fired, the ratio of the dielectric material to the entire paste is about 50 to 80% by weight, the binder is 2 to 5% by weight, the plasticizer is 0.01 to 5% by weight, The dispersant is 0.01 to 5% by weight, and the solvent is about 20 to 50% by weight. Then, the dielectric material and these solvents are mixed and kneaded with, for example, a three-roll mill or the like to form a paste (slurry).

In the case where the dielectric layer paste is an aqueous coating, an aqueous vehicle in which a water-soluble binder or dispersant is dissolved in water may be kneaded with a dielectric material. The water-soluble binder used for the aqueous vehicle is not particularly limited, and for example, polyvinyl alcohol, cellulose, a water-soluble acrylic resin, or the like may be used.

The paste for the internal electrode layer is obtained by kneading a conductive material made of various conductive metals or alloys, or various oxides, organometallic compounds, resinates, etc. which become the above-mentioned conductive material after firing, and an organic vehicle. To be prepared.

As the conductor material used in producing the paste for the internal electrode, Ni, a Ni alloy, or a mixture thereof is used. Such a conductive material is not particularly limited in its shape, such as a sphere or a scale, and a mixture of these shapes may be used. The average particle diameter of the conductive material is usually 0.1 to 10 μm, preferably about 0.2 to 1 μm.

The organic vehicle contains a binder and a solvent. As the binder, any known binder such as ethyl cellulose, acrylic resin and butyral resin can be used. Binder content is 1
About 5% by weight. As the solvent, any of known solvents such as terpineol, butyl carbitol, and kerosene can be used. The solvent content is about 20 to 55% by weight based on the entire paste.

The paste for an internal electrode layer and the paste for a dielectric layer thus obtained are alternately laminated by a printing method, a transfer method, a green sheet method, or the like. When a printing method is used, the dielectric layer paste and the internal electrode layer paste are laminated and printed on a substrate such as PET, cut into a predetermined shape, and then separated from the substrate to form a laminate. When the sheet method is used, a green sheet (dielectric layer before sintering) is formed using a dielectric layer paste, and an internal electrode pattern (pre-sintering internal electrode layer) made of the internal electrode layer paste is formed thereon. Print).

A large number of green sheets on which the internal electrode patterns are printed are laminated in the laminating direction to form a laminate, and a plurality of green sheets on which the internal electrode patterns are not printed are also laminated on the upper and lower ends in the laminating direction. .

Next, the laminate thus obtained is
After being cut into a predetermined laminated body size to obtain a green chip, the green chip is subjected to binder removal processing, firing, and annealing processing for reoxidizing the dielectric layer 2.

The binder removal treatment may be performed under ordinary conditions. When a base metal such as Ni or a Ni alloy is used as the conductor material of the internal electrode layer, it is particularly preferable to perform the following conditions. Heating rate: 5 to 300 ° C / hour, especially 10 to 50 ° C / hour, Holding temperature: 200 to 400 ° C, especially 250 to 350 ° C, Holding time: 0.5 to 20 hours, especially 1 to 10 hours, atmosphere : A mixed gas of humidified N ₂ and H ₂ .

The firing is preferably performed under the following conditions. Heating rate: 50 to 500 ° C / hour, especially 200 to 300
° C / hour, holding temperature: 1200-1400 ° C, especially 1250-13
50 ° C., holding time: 0.5 to 8 hours, especially 1 to 3 hours, cooling rate: 50 to 500 ° C./hour, especially 200 to 300
° C / hour, atmosphere gas: humidified mixed gas of N ₂ and H ₂ , etc.

However, the oxygen partial pressure is 10 ⁻⁴ Pa or less,
It is particularly preferable to carry out at a pressure of 10 ⁻⁹ to 10 ⁻⁴ Pa.
If it exceeds the above range, the internal electrode layer tends to be oxidized, and if the oxygen partial pressure is too low, the electrode material of the internal electrode layer tends to be abnormally sintered and cut off.

The annealing (re-oxidation) treatment after the calcination is preferably performed at a holding temperature or a maximum temperature of preferably 800 ° C. or more, more preferably 800 to 1100 ° C. When the holding temperature or the maximum temperature during the annealing treatment is less than the above range, the oxidation of the dielectric material is insufficient, so that the insulation resistance life tends to be shortened. Not only decreases, but also reacts with the dielectric substrate, and the life tends to be shortened. The oxygen partial pressure during annealing is
Oxygen partial pressure higher than the reducing atmosphere during firing, preferably 10 ⁻⁴ Pa to 1 Pa, more preferably 10 ⁻³ P
a to 10 ^-1 Pa. Below this range, reoxidation of the dielectric layer 2 is difficult, and beyond this range, the internal electrode layer 3 tends to oxidize. The other annealing treatment conditions are preferably the following conditions. Holding time: 0 to 6 hours, especially 2 to 5 hours, Cooling rate: 50 to 500 ° C / hour, especially 100 to 300
° C / hour, atmosphere gas: humidified N ₂ gas, etc.

In the present invention, a heat treatment is performed on the sintered body of the capacitor chip after annealing. By performing heat treatment,
A different phase 2c can be formed at the interface between the dielectric layer 2 and the internal electrode layer 3, thereby increasing the capacitance of the capacitor.

The oxygen partial pressure of the heat treatment atmosphere is preferably 1
0 ^-6 to 10 ⁴ Pa, more preferably 10 ^-6 to 10
^-1 Pa. If the oxygen partial pressure is too low, it becomes difficult to form the hetero phase 2c at the interface between the dielectric layer 2 and the internal electrode layer 3, and if the oxygen partial pressure is too high, the internal electrode layer may be oxidized.

The holding temperature of the heat treatment is more than 600 ° C. and 1000
C is preferable, more preferably 700 to 900 C,
More preferably, it is 700 to 800 ° C. If the holding temperature is too low or too high, the effect of increasing the capacity of the finally obtained capacitor tends not to be obtained. The holding time at such a temperature is preferably 0.5 to 1.5 hours, more preferably 0.8 to 1.2 hours.

The rate of temperature rise and fall during the heat treatment is preferably 10
The temperature is higher than 00 ° C./hour, more preferably 1500 ° C./hour or more, and the upper limit is about 3000 ° C. due to the limitations of the heat treatment apparatus and the heat treatment method. If the temperature rise / fall rate is 1000 ° C./hour or less, the effect of increasing the capacitance of the capacitor tends not to be obtained.

As the atmosphere gas for the heat treatment, for example,
It is desirable to use nitrogen gas after humidification.

In order to humidify the N ₂ gas or the mixed gas, for example, a wetter may be used. In this case, the water temperature is preferably about 0 to 75 ° C.

The above-described binder removal processing, firing and annealing may be performed continuously or independently. When these are continuously performed, after removing the binder, the atmosphere is changed without cooling, and then the temperature is raised to the holding temperature at the time of firing, firing is performed, and then cooling is performed, and the temperature reaches the holding temperature of annealing. It is preferable to perform the annealing while changing the atmosphere. On the other hand, when performing these independently, at the time of firing, after raising the temperature under N ₂ gas atmosphere with N ₂ gas or wet to the holding temperature of the binder removal processing, further continuing the heating to change the atmosphere After cooling to the holding temperature during annealing,
It is preferable to change the atmosphere again to the N ₂ gas or humidified N ₂ gas atmosphere and continue cooling. In the annealing, the temperature may be raised to a holding temperature in an N ₂ gas atmosphere, and then the atmosphere may be changed, or the entire heat treatment may be performed in a humidified N ₂ gas atmosphere. On the other hand, it is preferable that the heat treatment be performed independently of the binder removal treatment, firing and annealing.

The sintered body (element body) thus obtained
10), for example, by barrel polishing, sand blasting, etc.
After polishing the end face, baking the paste for external electrodes
The electrode 4 is formed. The firing conditions for the external electrode paste are as follows:
For example, humidified N₂And H ₂60 in a mixed gas with
It is preferable to set the temperature at 0 to 800 ° C. for about 10 minutes to 1 hour.
Good. Then, if necessary, plating or the like on the external electrode 4
Is performed to form a pad layer. In addition, external electrodes
Paste is the same as the internal electrode layer paste described above.
May be prepared.

The multilayer ceramic capacitor 1 of the present embodiment thus manufactured has an improved capacitance. The multilayer ceramic capacitor of the present embodiment is mounted on a printed circuit board or the like by soldering or the like, and is used for various electronic devices and the like.

Although the embodiments of the present invention have been described above, the present invention is not limited to these embodiments at all, and can be implemented in various modes without departing from the gist of the present invention. Of course.

For example, in the above-described embodiment, the multilayer ceramic capacitor is exemplified as the electronic component according to the present invention. However, the electronic component according to the present invention is not limited to the multilayer ceramic capacitor, but may be formed of a dielectric ceramic composition. Any material may be used as long as it has an element body in which dielectric layers and internal electrode layers are alternately stacked.

[0070]

EXAMPLES The present invention will be described in further detail with reference to examples which embody the embodiments of the present invention. However, the present invention is not limited to only these examples.

Example 1 Two laminated ceramic fired bodies were prepared by the following procedure.
One of them was used for internal observation. Also, the remaining 1
A sample of the multilayer ceramic capacitor was manufactured using the individual pieces.

[0072]Production of multilayer ceramic fired body As a starting material, a main component material produced by hydrothermal synthesis
(Ba, Ca) (Ti, Zr) O as₃(Average grain
0.4μm in diameter, 1.5μm in maximum particle size)
MnO (provided that carbonate (MnCO
₃), SiO₂ And Y₂O₅And were used. Soshi
The amount of MnCO was₃0.
4 moles and Y₂O₅Weigh 0.2 moles
After wet mixing with a ball mill for about 16 hours, dry
Thus, a dielectric material (dielectric ceramic composition) was obtained. What
The dielectric material contains SiO₂Is about 100pp
m. 100 parts by weight of the obtained dielectric material
5.0 parts by weight of an acrylic resin, and benzyl phthalate
2.5 parts by weight of butyl and 6.5 parts by weight of mineral spirit
Parts, 4 parts by weight of acetone and 20.5 parts of trichloroethane.
Parts by weight and 41.5 parts by weight of methylene chloride
To obtain a paste for the dielectric layer.
Was.

100 parts by weight of Ni particles having an average particle size of 0.2 μm, 50 parts by weight of an organic vehicle (8 parts by weight of ethyl cellulose dissolved in 92 parts by weight of terpineol),
35 parts by weight of terpineol was kneaded by pot mixing to form a paste, and an internal electrode layer paste was obtained.

A green sheet having a thickness of 5 μm was formed on a PET film using the dielectric layer paste, the internal electrode layer paste was printed thereon, and then the green sheet was peeled from the PET film. . These green sheets and protective green sheets (without printing the internal electrode layer paste) were laminated and pressed to obtain a green chip. The number of stacked dielectric layers 2 was 500.

The obtained green chip was 3.2 mm ×
The resultant was cut into a size of 1.6 mm × 2.0 mm, and subjected to a binder removal treatment, a baking treatment, an annealing (reoxidation) treatment and a heat treatment to obtain two laminated ceramic fired bodies.

In the binder removal treatment, the heating time was 20 ° C./hour, the holding temperature was 260 ° C., the holding time was 8 hours, and the atmosphere was:
In a humidified mixed gas of N ₂ and H ₂ . The baking treatment is performed at a heating rate of 200 ° C./hour, a holding temperature of 1300 ° C., a holding time of 2 hours, a cooling rate of 200
C./hour, atmosphere: in a humidified N ₂ + H ₂ mixed gas (oxygen partial pressure = about 4.2 × 10 ⁻⁷ Pa). The annealing is performed at a holding temperature of 1000 ° C., a holding time of 3 hours, a cooling rate of 200 ° C./hour, an atmosphere of humidified N ₂ gas (oxygen partial pressure is about 6 × 10 ⁻² Pa).
Was performed under the following conditions. In the heat treatment, the heating rate is 1500 ° C./hour, the holding temperature is 800 ° C., the holding time is 1 hour, and the cooling rate is:
The test was performed at 1500 ° C./hour in an atmosphere of a humidified N ₂ + H ₂ mixed gas (oxygen partial pressure = about 10 ⁻⁴ Pa). A wetter with a water temperature of 35 ° C. was used for humidification of the atmosphere gas in the baking treatment, the annealing treatment, and the heat treatment.

Observation of Microstructure One of the obtained laminated ceramic fired bodies was cut along the thickness direction to expose a cross section, and then was subjected to a high-resolution transmission electron microscope (product number: JEOL-JEM). −301
0, manufactured by JEOL Ltd.), the cross section of the ceramic fired body was observed. The results are shown in FIGS. Further, a cross section of the ceramic fired body was observed using a TEM (Transmission Electron Microscope). The result is shown in FIG.

Referring to FIGS. 3 and 4, a different phase was observed at the boundary between the dielectric layer 2 and the internal electrode layer 3. The width of this heterophase was about 0.4 nm. When the composition of the different phase was analyzed, it was confirmed that the composition was the same as the dielectric ceramic composition constituting the dielectric layer 2. In addition, as can be seen by observing FIGS. 3 and 4, in the different phase, a shift between the dielectric layer 2 and the crystal lattice was observed.

Referring to FIG. 5, it was confirmed that the number of particles of the dielectric layer 2 sandwiched between the pair of internal electrode layers 3 was one in the thickness direction. It was also confirmed that the number of particles of the internal electrode layer 3 sandwiched between the pair of dielectric layers 2 was one in the thickness direction, and two or more twins were observed per particle. .

Preparation of Capacitor Sample 100 parts by weight of Cu particles having an average particle size of 0.5 μm and an organic vehicle (8 parts by weight of an acrylic resin were mixed with terpineol 92
35 parts by weight) and 7 parts by weight of terpineol were kneaded into a paste to obtain a paste for an external electrode.

Then, after polishing the end face of the remaining multilayer ceramic fired body by sandblasting, the external electrode paste was transferred to the end face and fired at 800 ° C. for 10 minutes in a humidified N ₂ + H ₂ atmosphere ( Terminal baking treatment) was performed to form the external electrode 4, and a sample of the multilayer ceramic capacitor 1 shown in FIG. 1 was obtained. The size of the obtained capacitor sample is 3.2 mm × 1.6 mm × 2.
The thickness of the dielectric layer 2 was 2.4 μm, and the thickness of the internal electrode layer 3 was 2.1 μm.

Measurement of Capacitance The obtained capacitor sample was measured at a reference temperature of 25 ° C. using a digital LCR meter (4274A manufactured by YHP) at a frequency of 1 kHz and an input signal level (measured voltage).
As a result of measuring the capacitance under the condition of 1 Vrms, 10
It was 0 μF.

Comparative Example 1 Two laminated ceramic fired bodies were produced in the same manner as in Example 1 except that the heat treatment after the annealing treatment was not performed, and a laminated ceramic capacitor sample was prepared using one of them. Produced.

The fired multilayer ceramic body was cut along the thickness direction in the same manner as in Example 1, and the cross section was observed. The results are shown in FIGS.

Referring to FIGS. 6 and 7, no different phases were observed at the boundary between dielectric layer 2 and internal electrode layer 3.

On the other hand, the capacitance of the obtained capacitor sample was measured in the same manner as in Example 1, and as a result, 80 μF
Thus, the superiority of Example 1 was confirmed.

Example 2 and Comparative Examples 2 to 3 The same procedures as in Example 1 were carried out except that the holding temperature in the heat treatment was fixed at 800 ° C., and the heating rate and the cooling (cooling) rate were changed as shown in Table 1. Similarly, the internal structure of the fired ceramic body was observed, and the capacitance of the capacitor sample was measured. Table 1 shows the results. For reference, heat treatment conditions and the like of Example 1 and Comparative Example 1 are also described.

[0088]

[Table 1]

As shown in Table 1, the temperature rise / fall rate was 1000
When the temperature is lower than 100 ° C./hour, no different phase is observed at the boundary between the dielectric layer 2 and the internal electrode layer 3 and the capacitance of the capacitor is less than 100 μF, while the temperature rise / fall rate is 1000 ° C. In case of more than / hour, a different phase was observed at the boundary between the dielectric layer 2 and the internal electrode layer 3, and it was confirmed that the capacitance of the capacitor was 100 μF or more.

Comparative Examples 4 and 5 Except that the rate of temperature rise and fall in the heat treatment was fixed at 1500 ° C./hour and the holding temperature was changed as shown in Table 2,
In the same manner as in Example 1, the internal structure of the fired ceramic body was observed, and the capacitance of the capacitor sample was measured. Table 2 shows the results. For reference, the heat treatment conditions and the like of Example 1 are also described.

[0091]

[Table 2]

As shown in Table 2, when the holding temperature is 600 ° C. or 1000 ° C., no out-of-phase is observed at the boundary between the dielectric layer 2 and the internal electrode layer 3. When the capacitance is less than 100 μF and the holding temperature is more than 600 ° C. and less than 1000 ° C., a different phase is observed at the boundary between the dielectric layer 2 and the internal electrode layer 3 and the capacitance of the capacitor is reduced. It was confirmed that it was 100 μF or more.

COMPARATIVE EXAMPLE 6 The thickness of the internal electrode layer 3 sandwiched between the pair of dielectric layers 2 was set to about 2
The number of the conductive material particles 3a contained in the internal electrode layer 3 is reduced to about 4.2 μm, which is twice as large.
A capacitor sample was manufactured in the same manner as in Example 1, except that two capacitors were designed in the thickness direction. The relative permittivity and the capacitance of this capacitor sample were measured. The capacitance was measured in the same manner as in Example 1. The relative permittivity was calculated from the obtained capacitance, the electrode dimensions of the capacitor sample, and the distance between the electrodes. Table 3 shows the results.

COMPARATIVE EXAMPLE 7 When producing a multilayer ceramic fired body, the conductive material particles 3 contained in the internal electrode layer 3 sandwiched between the pair of dielectric layers 2
The average particle size of a is about 1.0 times, which is about 1/2 times that of Example 1.
μm, the same procedure as in Example 1 was performed except that the number of conductive material particles 3a contained in the internal electrode layer 3 was designed to be two in the thickness direction of the internal electrode layer 3. Thus, a capacitor sample was manufactured. The relative permittivity and the capacitance of this capacitor sample were measured. Table 3 shows the results. The relative dielectric constant of the capacitor sample of Example 1 was calculated in the same manner, and the value of the capacitance is shown in Table 3 together with this value.

[0095]

[Table 3]

The following can be understood from the results in Table 3. When the thickness of the internal electrode layer 3 is increased to about 4.2 μm and the number of the conductive material particles 3a is two, 3.2 mm × 1.6.
In the case of the size of mm × 2.0 mm, it was confirmed that the electrode thickness of the internal electrode layer 3 per layer was too large, and there was a tendency that multilayering was not possible. On the other hand, when the average particle diameter of the conductive material particles 3a is reduced to about 1.0 μm and the number of the conductive material particles 3a is two, the firing temperature is lowered (less than 1300 ° C.), and the relative dielectric constant of the dielectric layer 2 itself is reduced. Rate was as low as 8000, and as a result, it was confirmed that the capacitance of the capacitor sample tended to be as low as 45 μF.

REFERENCE EXAMPLE 1 When producing a laminated ceramic fired body, the thickness of the dielectric layer 2 sandwiched between the pair of internal electrode layers 3 was set to about 2 in Example 1.
By setting the number of dielectric particles 2a included in the dielectric layer 2 to two in the thickness direction of the dielectric layer 2, A capacitor sample was manufactured in the same manner as in Example 1.
The relative permittivity and capacitance of this capacitor sample are
The measurement was performed in the same manner as in Comparative Examples 6 and 7. Table 4 shows the results.

REFERENCE EXAMPLE 2 When producing a laminated ceramic fired body, dielectric particles 2 contained in dielectric layer 2 sandwiched between a pair of internal electrode layers 3 and 3
The average particle size of a is about 1.2 μ
m, the same as in Example 1 except that the number of the dielectric particles 2a contained in the dielectric layer 2 is designed to be two in the thickness direction of the dielectric layer 2. Thus, a capacitor sample was manufactured. The relative permittivity and the capacitance of this capacitor sample were measured in the same manner as in Comparative Examples 6 and 7. Table 4 shows the results. The relative dielectric constant of the capacitor sample of Example 1 was calculated in the same manner, and the value of the capacitance is shown in Table 4 together with this value.

[0099]

[Table 4]

The following can be understood from the results shown in Table 4. When the thickness of the dielectric layer 2 was increased to about 4.8 μm and the number of the dielectric particles 2 a was set to 2, it was confirmed that the capacitance of the capacitor sample tended to be as low as 43 μF. On the other hand, the average particle size of the dielectric particles 2a is about 1.2 μm
When the number of the dielectric particles 2a is set to two, the relative dielectric constant of the dielectric layer 2 itself is as low as 8000, and as a result,
It was confirmed that the capacitance of the capacitor sample tended to be as low as 45 μF.

[0101]

As described above, according to the present invention, it is possible to improve the obtained capacitance per unit volume, to have a large capacity even if the size is reduced, and to obtain a highly reliable electronic device such as a multilayer ceramic capacitor. A component and a method for manufacturing the same can be provided.

[Brief description of the drawings]

FIG. 1 is a sectional view of a multilayer ceramic capacitor according to an embodiment of the present invention.

2 (A) is an enlarged sectional view of a main part of the dielectric layer shown in FIG. 1, and FIG. 2 (B) is an enlarged view of IIB portion in FIG. 2 (A).

FIG. 3 is a transmission electron micrograph of the fired ceramic body of Example 1.

FIG. 4 is an enlarged photograph of a main part of FIG. 3;

FIG. 5 is a micrograph of the microstructure of the fired ceramic body of Example 1 observed by TEM.

FIG. 6 is a transmission electron micrograph of the fired ceramic body of Comparative Example 1.

FIG. 7 is an enlarged photograph of a main part of FIG. 6;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Multilayer ceramic capacitor 10 ... Element body 2 ... Dielectric layer 3 ... Internal electrode layer 4 ... External electrode

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5E001 AB03 AC09 AD04 AE04 AH00 AH08 AH09 AJ01 AJ02 5E082 AB03 BC39 EE04 EE23 EE35 FF14 FG01 FG22 FG26 FG46 FG54 GG10 GG26 GG28 JJ03 JJ23 LL02 PP03 MM02

Claims (9)

[Claims] 1. An element body in which dielectric layers and internal electrode layers are alternately laminated, and at least a part near a boundary between the dielectric layer and the internal electrode layer has a different thickness with a predetermined thickness. An electronic component, characterized in that a component is formed. 2. The electronic component according to claim 1, wherein the different phase has the same composition as a main component of the dielectric layer, but has a different crystal lattice. 3. The thickness of the hetero phase is 0.2 to 0.8 nm.
The electronic component according to claim 1, wherein: 4. The dielectric layer sandwiched between a pair of internal electrode layers, wherein the number of dielectric particles contained in the dielectric layer is one in the thickness direction of the dielectric layer. Electronic components. 5. An element body in which dielectric layers and internal electrode layers containing conductive material particles are alternately laminated, wherein the conductive material particles contained in the internal electrode layer sandwiched between a pair of dielectric layers are formed. An electronic component, wherein the number is one in the thickness direction of the internal electrode layer. 6. The electronic component according to claim 5, wherein the conductive material particles are made of nickel and / or a nickel alloy in which two or more twins are formed per particle. 7. The dielectric layer has a thickness of 5 in terms of SiO _2.
2. The composition according to claim 1, which contains a silicon compound of not more than 00 ppm.
The electronic component according to any one of claims 1 to 4. 8. A step of firing a device body obtained by alternately stacking dielectric layers and internal electrode layers at a temperature of 1200 to 1400 ° C. to obtain a sintered body; A step of annealing at a temperature of ℃ to obtain an annealed sintered body;
Heat treatment at a holding temperature of less than 0.5 to 1.5 hours to obtain a sintered body after the heat treatment. 9. A heating and cooling rate in the heat treatment step,
The method for producing an electronic component according to claim 8, wherein the temperature is higher than 1000 ° C./hour.