JP2002110910A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To fully reduce the leakage current of a capacitor and to enhance the breakdown voltage of the capacitor. SOLUTION: A semiconductor device comprises a capacitor constituted by inserting a high dielectric film between a lower electrode 13 and an upper electrode 16. In this case, a dielectric film and the electrode 13, a silicon oxide film 14 and an amorphous Ta2O5 film 15 of high quality of a thickness of 6 to 10 nm are laminated on a cobalt silicide (CoSi2) film.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to relates to a semiconductor device having a capacitor using a metal oxide film such as Ta ₂ O ₅ capacitor insulating film.

[0002]

2. Description of the Related Art In recent years, semiconductor manufacturing technology has made remarkable progress, and the dimensions of devices have been increasingly miniaturized. Under such circumstances, in Bip / BiCMOS devices such as TV ICs, the occupied area ratio of passive elements (capacitors, resistors) that do not follow the scaling law is relatively increasing.

At present, as an insulator film (dielectric film) of a capacitor, a single silicon oxide film or a silicon oxide film / dielectric film is used.
A three-layer structure of a nitride film / silicon oxide film is used.
The capacitance per unit area when these dielectrics are used is about 2.0 and 1.2 fF / μm ^2, respectively, which is not so large. Therefore, the use of a high-dielectric film is indispensable for reducing the size of devices in the future, but the high-dielectric film has problems in leak characteristics, withstand voltage, reliability, and the like, and has been difficult to apply to a capacitor insulating film. .

For example, a capacitor using Ta ₂ O ₅ as a high dielectric film has been proposed (JP-A-8-2796).
No. 01). However, this type of capacitor does not have satisfactory leakage current characteristics and has a low withstand voltage, so that it cannot be applied to a device that requires a high withstand voltage.

[0005]

As described above, the conventional Ta
_Although a capacitor using a high dielectric material such as ₂ O ₅ as a capacitor insulator film has been proposed, this type of capacitor has poor leak current characteristics, and it has been difficult to obtain a sufficient withstand voltage.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to provide a semiconductor device capable of sufficiently reducing leakage current in a capacitor and increasing the breakdown voltage of the capacitor, and a method of manufacturing the same. Is to provide.

[0007]

(Structure) In order to solve the above problem, the present invention employs the following structure.

That is, the present invention is a semiconductor device in which a dielectric film is inserted between a lower electrode and an upper electrode to constitute a capacitor, wherein the dielectric film is formed of a silicon oxide film and an amorphous metal oxide. It is characterized by being a laminate with a film.

Here, preferred embodiments of the present invention include the following.

(1) The metal oxide film is Ta ₂ O ₅ .

(2) The lower electrode is a silicon substrate or metal silicide.

(3) The metal that forms the metal silicide is
Use a substance whose absolute value of oxide formation energy is smaller than that of silicon.

(4) Metal silicide used as lower electrode
Is cobalt silicide (CoSi _Two) Or nickel
Reside (NiSi).

(5) A metal silicide film used as a lower electrode has large surface irregularities, and has a metal oxide film having a uniform film thickness thereon.

(6) The thickness of the silicon oxide film is 6 to 10 n
m.

Further, the present invention is a semiconductor device in which a capacitor is formed by inserting a dielectric film between a lower electrode and an upper electrode, wherein the dielectric film is a silicon oxide film and a single crystal metal oxide film. And a laminate of the above.

Further, according to the present invention, there is provided a method of manufacturing a semiconductor device having the above structure, wherein a step of depositing an amorphous metal oxide film by sputtering in an oxidizing atmosphere on a silicon substrate or a lower electrode made of metal silicide. Forming a silicon oxide film between the metal oxide film and the lower electrode by performing a heat treatment at a temperature lower than a temperature at which the metal oxide film is crystallized; and forming an upper electrode on the metal oxide film. And a step of performing

According to the present invention, in the method of manufacturing a semiconductor device having the above structure, an amorphous metal oxide film is deposited on a silicon substrate or a lower electrode made of metal silicide by sputtering in an oxidizing atmosphere at a predetermined temperature. Along with
Forming a silicon oxide film between the metal oxide film and the lower electrode; and forming an upper electrode on the metal oxide film.

According to the present invention, there is provided a method of manufacturing a semiconductor device having the above structure, wherein a silicon oxide film is formed on a silicon substrate or a lower electrode made of metal silicide, and sputtering is performed on the silicon oxide film in an oxidizing atmosphere. A step of depositing an amorphous metal oxide film and a step of forming an upper electrode on the metal oxide film.

(Operation) According to the present invention, since the amorphous metal oxide film is formed when the high dielectric film is formed on the lower electrode, the leakage current in the capacitor can be reduced sufficiently, High breakdown voltage can be achieved. Here, if the metal oxide film is polycrystalline as in the prior art, the silicon oxide film grows at the crystal grain boundaries, causing a leak and deteriorating the stability. On the other hand, when the metal oxide film is amorphous, such a phenomenon does not occur because there is no crystal grain boundary.

When the metal oxide film is polycrystalline, it is difficult to form a uniform silicon oxide film because the silicon oxide film protrudes at the crystal grain boundaries. However, such a phenomenon does not occur when the metal oxide film is amorphous. Therefore, a high quality silicon oxide film can be formed. When the metal oxide film is amorphous, the dielectric constant is lower than that of polycrystal, which is disadvantageous in terms of the capacitance of the capacitor. However, from the viewpoint of high withstand voltage, it is much better.

As described above, in the present invention, an extremely thin high quality silicon oxide film is formed on a silicon substrate or metal silicide, and a high dielectric film such as tantalum oxide is deposited thereon to form a laminated structure. A high withstand voltage can be realized, and the capacity density can be improved more than before.

[0023]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of the present invention will be described below with reference to the illustrated embodiments.

(First Embodiment) FIG. 1 shows a first embodiment of the present invention.
FIG. 4 is a sectional view of an element structure showing a semiconductor device according to an embodiment.

In the figure, reference numeral 10 denotes a Si substrate.
The element isolation insulating film 11 is buried in the element isolation region
It is embedded. Surrounded by the isolation insulating film 11
CoSi layer as metal silicon side
13 is formed thereon, and an extremely thin silicon oxide film is formed thereon.
(SiO_Two) 14 are formed. Thin SiO_TwoMembrane 1
4 is formed of amorphous Ta as a capacitor insulating film._TwoO_Five
A film (metal oxide film) 15 is formed, and an upper electrode and
TiN film 16 is formed. Ta_TwoO _FiveMembrane 1
5, an interlayer insulating film 1 is formed on the substrate on which the TiN film 16 and the like are formed.
7 is formed, and a contact hole is formed on a part of the insulating film 17.
Is formed. Then, the insulating film 17 and the contour
Via a barrier metal 18 such as TiN / Ti
Thus, a metal wiring 19 of Al or the like is formed.

Next, a method of manufacturing the semiconductor device according to the present embodiment will be described with reference to FIG.

First, as shown in FIG. 2A, a groove is dug in a portion of the Si substrate 10 where an element is to be isolated, and an insulating film 11 for element isolation is buried in the groove. Subsequently, a silicon oxide film is formed on the surface of the substrate 10, and the portion of the oxide film where a capacitor is to be formed is removed. In the drawings, a shallow trench isolation (STI) is formed and a capacitor is formed therebetween. At this time,
The silicon oxide film may be removed at the same time from the source, the drain, the gate, and the like where the resistance is to be reduced.

Next, as shown in FIG.
Cobalt (Co) / titanium nitride (TiN) or a titanium (Ti) / TiN laminated film 21 is continuously deposited on the entire surface on the substrate 0. Here, nickel (Ni) instead of Co
In some cases, it is better to use a metal such as

Next, as shown in FIG.
A heat treatment of about 10 ° C. is performed to expose CoS to the exposed surface of the substrate 11.
After forming the silicide film 13 such as i, the unreacted excess metal 21 is removed with a mixed solution of sulfuric acid and hydrogen peroxide solution. By coating TiN on Co at the time of this heat treatment, the surface flatness of the CoSi film 13 is improved. Ti is used when it is desired to further promote the reaction between Co and Si. After this,
The CoSi film 13 is stabilized by a heat treatment at about 750 ° C.

Next, as shown in FIG. 2D, tantalum oxide (Ta ₂ O ₅ ) is used as a capacitor insulating film.
The film 15 is deposited to a thickness of 15 nm by a reactive sputtering method using a mixed gas of Ar and O ₂ . After the Ta ₂ O ₅ film 15 is deposited, the Ta ₂ O ₅ film 1 is heated at 500 to 700 ° C. in an oxidizing atmosphere, as shown in FIG.
At the same time, a very thin, for example, 8 nm silicon oxide film (SiO ₂ ) 14 of 8 nm is formed between the underlayer 5 and the underlying silicide electrode 13.

Here, the shape of the laminated film 21 shown in FIG.
By using no TiN cap layer at the time of formation,
It is also possible to produce a CoSi film having a large value. in this case
Is Ta_TwoO_FivePendaethoxyta
(Ta (OC_TwoH_Five) _Five) And O_TwoAs the source gas
It is deposited by a CVD method. Thus, the surface irregularities are large.
By using a uniform film forming method, the breakdown voltage is impaired.
And increase capacitance area by increasing capacitor area
You can also.

Next, as shown in FIG.
Ti, W and nitrides thereof are formed as the upper electrode 16.
To achieve. Subsequently, the upper electrode 16 and the Ta
_TwoO _FiveThe film 15 is processed into a capacitor shape. At this time
The dimensions are larger than when the oxide film is opened. In the figure
Is larger than the element region surrounded by the element isolation insulating film 11.
Make

Thereafter, after the interlayer insulating film 17 is formed on the entire surface, the insulating film on the capacitor is removed for the contact opening. At this time, contacts such as source / drain / gate may be opened at the same time. Thereafter, the structure shown in FIG. 1 is obtained by forming the metal wiring 19. Note that after the formation of the Ta ₂ O ₅ film 15, 700
A process for maintaining an amorphous state is performed by avoiding a process at a temperature higher than or equal to ° C.

In the device thus manufactured, the Ta ₂ O ₅ film 15 as a high dielectric film is amorphous, and furthermore, a very thin high quality Ta ₂ O ₅ film is provided between the film 15 and the base electrode 13. Since the SiO ₂ film 14 was formed, the leakage current was small, and the withstand voltage could be improved. In addition, by using metal silicide for the lower electrode 13, a process compatible with the salicide process can be performed.

According to the experiment by the present inventors, when the capacitor density was measured while changing the thickness of the SiO ₂ film 14 in the configuration shown in FIG. 1, the result shown in FIG. 3A was obtained. Was done. That is, as the thickness of SiO ₂ increases, the capacitor density tends to decrease. When the thickness exceeds 10 nm, the capacitor density significantly decreases. That is, if the film thickness of SiO ₂ is 10 nm or less, a sufficiently large capacitor density can be obtained. When the leak current was measured while changing the thickness of the SiO ₂ film, the result as shown in FIG. 3B was obtained. That is, as the thickness of SiO ₂ increases, the leak current tends to decrease. In particular, when the thickness is 6 nm or more, the leak current decreases sufficiently. Therefore, SiO
_It is considered that good device characteristics can be obtained by setting the film thickness of ₂ to 6 to 10 nm.

(Second Embodiment) FIG. 4 shows a second embodiment of the present invention.
FIG. 14 is a cross-sectional view showing a manufacturing step of the semiconductor device according to the embodiment. The same parts as those in FIG.
Detailed description is omitted.

This embodiment is different from the first embodiment described above in the method of forming the Ta ₂ O ₅ film and the SiO ₂ film which will be the capacitor insulating films.

As shown in FIG. 4A, the process is the same as that of the first embodiment until a silicide film 13 of CoSi or the like is formed on the surface of the device region surrounded by the device isolation insulating film 11. Thereafter, in this embodiment, as shown in FIG. 4B, a Ta ₂ O ₅ film 15 is deposited by a reactive sputtering method using a mixed gas of Ar and O _2.
By heating to 0 ° C., the SiO ₂ film 14 is formed simultaneously with the formation of the Ta ₂ O ₅ film 15.

Thereafter, as in the first embodiment, the upper electrode 16 is formed, processed into a capacitor shape, an interlayer insulating film 17 is formed, a contact opening is formed, and a metal wiring 19 is formed. The structure shown in FIG. 1 is obtained.

As described above, according to the present embodiment, when the Ta ₂ O ₅ film 15 as the high dielectric film is deposited, the substrate temperature is set at 30.
By maintaining the temperature at about 0 ° C., a high-quality SiO ₂ film 14 can be formed between the Ta ₂ O ₅ film 15 and the underlying silicide electrode 13. Therefore, the same effect as in the first embodiment can be obtained.

(Third Embodiment) FIG. 5 shows a third embodiment of the present invention.
FIG. 14 is a cross-sectional view showing a manufacturing step of the semiconductor device according to the embodiment. The same parts as those in FIG.
Detailed description is omitted.

This embodiment is different from the first embodiment described above in a method of forming a Ta ₂ O ₅ film and a SiO ₂ film which are to be a capacitor insulating film.

As shown in FIG. 5A, the process is the same as that of the first embodiment until a silicide film 13 of CoSi or the like is formed on the surface of the device region surrounded by the device isolation insulating film 11. Thereafter, in this embodiment, as shown in FIG. 5B, annealing is performed in a dry O ₂ atmosphere at 900 ° C.
An SiO ₂ film 14 having a thickness of about nm was formed.

Next, as shown in FIG. 5C, Ta ₂ O is formed by a reactive sputtering method using a mixed gas of Ar and O _2.
5 Film 15 was deposited to a thickness of 15 nm.

Thereafter, as in the first embodiment, the upper electrode 16 is formed, processed into a capacitor shape, an interlayer insulating film 17 is formed, a contact opening is formed, and a metal wiring 19 is formed. The structure shown in FIG. 1 is obtained.

As described above, according to the present embodiment, annealing of 900 ° C. in a dry O ₂ atmosphere is performed on the underlying silicide electrode 13 before Ta ₂ O ₅ is deposited as a high dielectric film. A high quality SiO ₂ film 14 can be formed. Therefore, the same effect as in the first embodiment can be obtained.

(Modification) The present invention is not limited to the above embodiments. The metal of the metal oxide film used as the capacitor insulating film is not limited to Ta,
Ti can also be used. Further, any metal having an insulating property in an oxide film state and having a sufficiently high dielectric constant can be used.

In the embodiment, the metal oxide film is formed to be amorphous because a uniform and high-quality silicon oxide film cannot be obtained if there is a crystal grain boundary such as polycrystal. From this viewpoint, the same effect can be expected even if the metal oxide film is a single crystal. That is, the capacitor insulating film of the present invention may be a laminate of a silicon oxide film and a single crystal metal oxide film.

Since the metal silicide as the base electrode needs to react with oxygen to form a silicon oxide film, it is desirable that the metal silicide be a substance having a smaller absolute value of oxide generation energy than silicon. Further, the underlying electrode is not necessarily limited to the metal silicon side, but may be a silicon layer. FIG. 6 shows an example thereof. In the figure, 30 is a p-type silicon substrate, 31 is an n-type silicon layer, 32
Is an n ⁺ type silicon layer. As described above, even when the underlying electrode 13 is the silicon layer 32, a high-quality silicon oxide film 14 can be formed between the metal oxide film 15 and the underlying electrode 13, so that the same effect as the present invention can be expected.

In addition, various modifications can be made without departing from the spirit of the present invention.

[0051]

According to the present invention as described in detail above, as a capacitor insulating film to be a high dielectric is required, and the amorphous metal oxide film such as a silicon oxide film and a Ta ₂ O ₅ By using the laminated body of the above, the leakage current in the capacitor can be sufficiently reduced and the withstand voltage of the capacitor can be increased. Although each of the laminated films alone cannot cope with a device that requires a high withstand voltage, the above-described laminated structure can cope with a device with a high withstand voltage and a higher capacity density than the conventional device.

[Brief description of the drawings]

FIG. 1 is an element structure sectional view showing a semiconductor device according to a first embodiment.

FIG. 2 is a sectional view showing a manufacturing process of the semiconductor device according to the first embodiment;

FIG. 3 is a characteristic diagram showing a relationship between a film thickness of a silicon oxide film, a capacitor density, and a leak current.

FIG. 4 is a sectional view showing a manufacturing process of the semiconductor device according to the second embodiment;

FIG. 5 is a sectional view showing a manufacturing step of the semiconductor device according to the third embodiment;

FIG. 6 is a sectional view of an element structure showing a modification of the present invention.

[Explanation of symbols]

10 ... Si substrate 11 ... the element isolation insulating film 13 ... CoSi film (underlying electrode) 14 ... SiO ₂ film 15 ... Ta ₂ O ₅ film (metal oxide film) 16 ... TiN film (upper electrode) 17 ... interlayer insulation film 18 ... Barrier metal 19 ... Al film (metal wiring) 30 ... p-type silicon substrate 31 ... n-type silicon layer 32 ... n ⁺ type silicon layer

Continuing from the front page (72) Inventor: Hoharu Sugawara 1st, Komukai Toshiba-cho, Saiwai-ku, Kawasaki-shi, Kanagawa Prefecture Inside the Toshiba Microelectronics Center Co., Ltd. Address F-term in Toshiba Microelectronics Center (reference) 5F038 AC05 AC16 AC17 AC18 EZ17 EZ20

Claims (7)

[Claims] 1. A semiconductor device comprising a capacitor formed by inserting a dielectric film between a lower electrode and an upper electrode, wherein the dielectric film is formed of a silicon oxide film and an amorphous metal oxide film. A semiconductor device, which is a laminate. 2. The semiconductor device according to claim 1, wherein said metal oxide film is made of Ta ₂ O ₅ . 3. The semiconductor device according to claim 1, wherein said lower electrode is a silicon substrate or a metal silicide. 4. A metal for producing the metal silicide,
4. The semiconductor device according to claim 3, wherein a substance having an absolute value of an oxide generation energy smaller than that of silicon is used. 5. The silicon oxide film has a thickness of 6 to 10 n.
2. The semiconductor device according to claim 1, wherein m is m. 6. A step of depositing an amorphous metal oxide film by sputtering in an oxidizing atmosphere on a silicon substrate or a lower electrode made of a metal silicide, and lowering the temperature than the temperature at which the metal oxide film is crystallized. A heat treatment at a temperature to form a silicon oxide film between the metal oxide film and the lower electrode; and a step of forming an upper electrode on the metal oxide film. Production method. 7. An amorphous metal oxide film is deposited on a silicon substrate or a lower electrode made of metal silicide by sputtering in an oxidizing atmosphere at a predetermined temperature, and an amorphous metal oxide film is deposited between the metal oxide film and the lower electrode. Forming a silicon oxide film on the metal oxide film, and forming an upper electrode on the metal oxide film.