JP2002090780A - Polysilicon tft liquid crystal display element - Google Patents
Polysilicon tft liquid crystal display elementInfo
- Publication number
- JP2002090780A JP2002090780A JP2000324739A JP2000324739A JP2002090780A JP 2002090780 A JP2002090780 A JP 2002090780A JP 2000324739 A JP2000324739 A JP 2000324739A JP 2000324739 A JP2000324739 A JP 2000324739A JP 2002090780 A JP2002090780 A JP 2002090780A
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- tft
- crystal display
- type
- display device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
- Transforming Electric Information Into Light Information (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
【0001】[産業上の利用分野]アクティブマトリク
ス型液晶ディスプレイや密着型イメージセンサやアクテ
ィブマトリクス型ELディスプレイに供せられる。[従
来の技術][Industrial applications] The present invention is applied to an active matrix type liquid crystal display, a contact type image sensor, and an active matrix type EL display. [Conventional technology]
【0002】駆動回路一体型多結晶Si−TFT液晶表
示装置においてアナログビデオ信号を保持し書き込むア
ナログスイッチは従来n型TFTをベースに構成されて
いた。基本的にはスイッチであり、多少特性が変化して
も、最終的に仕様を満たしていれば良いはずである。し
かし高いチャンネルコンダクタンスを確保するため、サ
イズの大きなトランジスタを用いるため、遮断時の容量
カップリングが大きくなる。したがってTFTの閾値電
圧が変化し有効チャネル電圧が変化したとき、ビデオ信
号レベルが変化する可能性がある。サンプリング回路デ
ィユーティは約99%であり、ほとんどがオフ期間であ
る。一方600℃以下の低温プロセスで作製されたn型
TFTはオフ状態でのストレスに弱く、表示品位の劣化
を引き起こすことがある。2. Description of the Related Art In a polycrystalline Si-TFT liquid crystal display device integrated with a driving circuit, an analog switch for holding and writing an analog video signal has conventionally been constructed based on an n-type TFT. Basically, it is a switch, and even if the characteristics change a little, it should be sufficient if it finally meets the specifications. However, since a large-sized transistor is used to secure high channel conductance, capacitance coupling at the time of cutoff increases. Therefore, when the threshold voltage of the TFT changes and the effective channel voltage changes, the video signal level may change. The sampling circuit duty is about 99%, and most of them are off periods. On the other hand, an n-type TFT manufactured by a low-temperature process of 600 ° C. or less is vulnerable to stress in an off state, and may cause deterioration of display quality.
【0003】[課題を解決するための手段]n型TFT
のオフストレス中の劣化の原因は、ゲート絶縁膜中への
ホールの注入によって引き起こされると考えられ、メカ
ニズムはSiO2中に含有されるSi−OHの結合がホ
ールによって破断され、固定電荷が膜中に誘起されるこ
とによると考えられる。そこでp型TFTを用い、この
効果を低減することが手段として考えられる。[Means for Solving the Problems] N-type TFT
Is considered to be caused by the injection of holes into the gate insulating film. The mechanism is that the bond of Si—OH contained in SiO 2 is broken by the holes, and the fixed charges are removed by the film. It is thought to be due to being induced in. Therefore, using a p-type TFT to reduce this effect is considered as a means.
【0004】[作用]p型TFTのオフストレス状態で
は電荷担体は電子となる。したがってドレン端のバリア
を乗り越えてゲート絶縁膜中に飛び込むのは電子であ
り、ホールに比べてSi−OHに対する衝突断面積が小
さくなり、結合が破れて固定電荷が発生する確率は低く
なる。[Operation] In the off-stress state of the p-type TFT, the charge carriers become electrons. Therefore, electrons jump over the barrier at the drain end and jump into the gate insulating film, and the collision cross section with respect to Si—OH is smaller than that of holes, so that the probability of breaking bonds and generating fixed charges is reduced.
【0005】[実施例]図1に、パネルサンプルホール
ド型TFT液晶表示素子の等価回路図を示す。画素TF
T1はn型で作製し、ビデオ信号書き込み用アナログス
イッチ用TFT2はp型で作製した。その他シフトレジ
スター3やバッファ回路4用の論理素子には相補型TF
Tを用いた。このときアナログスイッチオフ時の引き込
み電圧Vcは式で表される。 Vc=α・(Vth−Vgl)・Cgd/(Csl+Cgd)…… ここにα=Cgd/(Csl+Cgd)、Cgd:ゲー
トドレン容量、Csl:画素および補助容量、Vth:
TFTの閾値電圧、Vgl:低位ゲート電圧である。画
素TFTも同様の引き込み電圧が発生するが、TFTサ
イズが小さため、ビデオ信号レベルに大きな変動は与え
ない。図2はn型TFTに、オフ状態としてVg=−
7.0V、Vs=4.5V、Vd= −4.5〜4.5
V、オン状態としてVg=7.0V、Vs=−4.5
V、Vd=4.5Vを室温で1時間印加した後のVth
の変化を示している。また図3にはp型TFTに上記の
極性を逆にして、同様のエージングテストをした結果を
示す。n型TFTではオフ状態で特性の変化が大きく、
p型ではオン状態の変化が大きいことがわかる。アナロ
グスイッチ2においてはオンの動作期間がきわめて短
く、オフのバイアス条件にさらされている期間はVGA
駆動の場合で99%以上となる。従って、n型TFTを
アナログスイッチに用いた場合、TFT間の閾値の変動
が大きく、ソースライン毎のビデオ信号レヴェルがばら
つき、画面上たて筋となって画質の低下を招くが、これ
をp型TFTにすることによってこの劣化は回避するこ
とができた。[Embodiment] FIG. 1 shows an equivalent circuit diagram of a panel sample-hold type TFT liquid crystal display device. Pixel TF
T1 was made of n-type, and TFT2 for a video signal writing analog switch was made of p-type. Other logic elements for the shift register 3 and the buffer circuit 4 include complementary TFs.
T was used. At this time, the pull-in voltage Vc when the analog switch is off is expressed by the following equation. Vc = α · (Vth−Vgl) · Cgd / (Csl + Cgd) where α = Cgd / (Csl + Cgd), Cgd: gate drain capacity, Csl: pixel and auxiliary capacity, Vth:
The threshold voltage of the TFT, Vgl: a lower gate voltage. A similar pull-in voltage is generated in the pixel TFT, but the TFT size is small, so that the video signal level does not greatly change. FIG. 2 shows that an n-type TFT has Vg = −
7.0 V, Vs = 4.5 V, Vd = -4.5 to 4.5
V, Vg = 7.0 V, Vs = −4.5 as ON state
Vth after applying V and Vd = 4.5V for 1 hour at room temperature
Shows the change. FIG. 3 shows the results of a similar aging test performed on a p-type TFT with the above polarity reversed. The characteristics of the n-type TFT change greatly in the off state,
It can be seen that the change in the ON state is large in the p-type. In the analog switch 2, the ON operation period is extremely short, and the analog switch 2 is exposed to the OFF bias condition.
It becomes 99% or more in the case of driving. Therefore, when an n-type TFT is used for an analog switch, the threshold value between the TFTs greatly varies, and the video signal level varies from source line to source line. This deterioration could be avoided by using a type TFT.
【00010】[00010]
【図1】本発明を用いたTFT−LCDの等価回路であ
る。FIG. 1 is an equivalent circuit of a TFT-LCD using the present invention.
【図2】N型TFTのストレスエージング結果である。FIG. 2 is a result of stress aging of an N-type TFT.
【図3】P型TFTのストレスエージング結果である。FIG. 3 shows a result of stress aging of a P-type TFT.
1…画素TFT 2…アナログスイッチTFT 3…シフトレジスタ 4…バッファ回路 DESCRIPTION OF SYMBOLS 1 ... Pixel TFT 2 ... Analog switch TFT 3 ... Shift register 4 ... Buffer circuit
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H01L 29/78 616V Fターム(参考) 2H092 GA59 JA24 NA21 PA06 5C058 AA09 BA32 BA35 5C094 AA02 BA03 BA27 BA43 CA19 DB01 DB04 EA04 EA07 EB02 5F110 AA14 BB02 BB10 GG02 GG13 GG37 HJ04 QQ11 5G435 AA00 BB05 BB12 EE37 ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification FI FI Theme coat ゛ (Reference) H01L 29/78 616V F-term (Reference) 2H092 GA59 JA24 NA21 PA06 5C058 AA09 BA32 BA35 5C094 AA02 BA03 BA27 BA43 CA19 DB01 DB04 EA04 EA07 EB02 5F110 AA14 BB02 BB10 GG02 GG13 GG37 HJ04 QQ11 5G435 AA00 BB05 BB12 EE37
Claims (3)
おいて、ビデオ信号入力用アナログスイッチがP型TF
Tで構成されていることを特徴とする、駆動回路一体型
ポリシリコンTFT液晶表示装置。An analog switch for inputting a video signal is a P-type TF.
A polycrystalline silicon TFT liquid crystal display device integrated with a drive circuit, comprising:
プターとなる不純物が、ゲート電極をマスクにしてイオ
ン注入されることにより自己整合的に形成されることを
特徴とする、請求項1に記載の駆動回路一体型ポリシリ
コンTFT液晶表示装置用アナログスッチP型TFT。2. The method according to claim 1, wherein an impurity whose source and drain serve as acceptors to Si is formed in a self-aligned manner by ion implantation using the gate electrode as a mask. Drive circuit integrated type polysilicon TFT Analog switch P-type TFT for liquid crystal display device.
1018cm−3以下の濃度のP型不純物が1μm以下
の幅にドーピングされていることを特徴とする、請求項
1に記載の駆動回路一体型ポリシリコンTFT液晶表示
装置用アナログスッチP型TFT。3. The method according to claim 1, wherein a P-type impurity having a concentration of 10 18 cm −3 or less is doped to a width of 1 μm or less between the drain end and the drain and the channel. Drive circuit integrated type polysilicon TFT Analog switch P-type TFT for liquid crystal display device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000324739A JP2002090780A (en) | 2000-09-19 | 2000-09-19 | Polysilicon tft liquid crystal display element |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000324739A JP2002090780A (en) | 2000-09-19 | 2000-09-19 | Polysilicon tft liquid crystal display element |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2002090780A true JP2002090780A (en) | 2002-03-27 |
Family
ID=18802209
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2000324739A Pending JP2002090780A (en) | 2000-09-19 | 2000-09-19 | Polysilicon tft liquid crystal display element |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2002090780A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005043882A (en) * | 2003-07-10 | 2005-02-17 | Semiconductor Energy Lab Co Ltd | Display device and its driving method |
-
2000
- 2000-09-19 JP JP2000324739A patent/JP2002090780A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005043882A (en) * | 2003-07-10 | 2005-02-17 | Semiconductor Energy Lab Co Ltd | Display device and its driving method |
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