JP2002076369A - Electronic device and diode, transistor and thyristor using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress ohmic current and achieve high concentration in an electronic element having excellent heat resistance, radiation resistance and high-frequency response and suitable for high-temperature devices, high-power devices and high-frequency electronic devices. Provided are a high-efficiency electronic device in which barrier energy of carrier injection from a doped semiconductor into a channel is reduced to reduce a rising electric field of a space charge limiting current, and a diode, a transistor, and a thyristor using the electronic device. SOLUTION: A high-resistivity semiconductor diamond thin film 5 having a carrier concentration of 10 ¹⁵ cm ⁻³ or less is provided on an insulating diamond crystal substrate 1, and a low resistance carrier concentration of 10 ²⁰ cm ⁻³ or more is sandwiched therebetween. Semiconductor diamond thin films 2a and 2b are provided.
And 2b have the same conductivity type. Further, the source electrodes 11a, 11a,
A drain electrode 11b and a gate electrode 9a are provided.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device of a wide band gap semiconductor used for a device for emitting short wavelength light, a device for high temperature, a device for high power and a high frequency electronic device, and a diode using this electronic device.
In particular, the present invention relates to a transistor and a thyristor, and particularly to a highly efficient electronic device which has a small ohmic current, a small carrier movement barrier, a small electric field necessary for flowing a space charge limited current, and can move more carriers in a low electric field. .

[0002]

2. Description of the Related Art Diamond has a thermal conductivity (20 W).
/ Cm · K), the band gap (5.47 eV), saturated electron mobility (2000cm ² / V · s) and device properties and heat resistance such as the Hall mobility ^{(2100cm 2 / V · s)} , the radiation resistance is excellent Therefore, application to electronic devices, high-power devices, high-frequency devices, and the like that operate at high temperature and under radiation is expected.

One example of a field effect transistor using a diamond thin film is disclosed in, for example, JP-A-1-15877.
No. 4 discloses a MISFET (Metal Insulator) in which an insulating layer is inserted between a gate electrode and an operation layer, that is, a channel layer.
Semiconductor Field Effect Transistor (insulated gate field effect transistor) has been proposed. JP 1
The MISFET in 158774 is a normally-on type, and has a configuration in which a drain current is suppressed by setting a gate potential to be positive with respect to a source potential. In order to increase the transconductance and greatly change the drain current by inputting a slight gate potential, it is necessary to extend the effect of the gate potential to a deep region in the channel and greatly expand the depletion region of carriers. For that purpose, the concentration of the donor or the acceptor must be suppressed to some extent, and the thickness of the channel layer must be reduced to be equal to or less than the thickness affected by the gate potential. However, in order to increase the drain current, the concentration of the donor or acceptor impurity must be increased and the carrier concentration must be increased, and the improvement in the transconductance and the increase in the drain current are mutually contradictory in setting the carrier concentration. There is a problem.

[0004] For the reasons described above, the dopant concentration of the channel layer used in a normal MISFET is generally in the range of several tens ppm to several hundred ppm in atomic ratio. For example, in the example of JP-A-1-158774, the atomic ratio of boron (B) to carbon (C) is B / C = 2 based on the synthesis conditions of the p-type diamond thin film layer.
It can be calculated as 00 ppm.

Japanese Unexamined Patent Publication (Kokai) No. 3-263872 proposes a field effect transistor having a metal / insulating diamond / semiconductor diamond structure in a gate portion. FIG. 9 is a sectional view showing the MISFET. S
A diamond insulator underlayer 42 is formed on an i-substrate 41, and a p-type diamond semiconductor layer 43 and n-type diamond semiconductor layers 44a and 44b on both sides thereof are formed on the same plane on the diamond insulator underlayer 42. . Further, at the ends of the n-type diamond semiconductor layers 44a and 44b that are not connected to the p-type diamond semiconductor layer 43, a source electrode 46S and a drain electrode 46D are formed to cover these ends, respectively. . A diamond insulator layer 45 is provided on the p-type diamond semiconductor layer 43, and a gate electrode 46G is provided on the diamond insulator layer 45. The diamond insulator layer 45 includes a p-type diamond semiconductor layer 4 serving as a channel layer.
3 and the gate electrode 46G are insulated.

In this MISFET as well, in order to increase the transconductance and greatly change the drain current by inputting a slight gate potential, the acceptor concentration must be kept low and the p-type diamond semiconductor layer 43 must be kept low.
Must be made thinner than the thickness affected by the gate potential. However, in order to increase the drain current, the acceptor concentration must be increased and the carrier concentration must be increased. Therefore, there is a problem that the improvement of the transconductance and the increase of the drain current contradict each other in setting the acceptor concentration. .

The high electron and hole mobilities inherent in diamond are realized by minimizing impurities and crystal defects. However, the aforementioned MI
In a structure such as an SFET, in which a donor or an acceptor needs to be doped at a certain concentration in order to secure a carrier source in the channel layer, the carrier mobility becomes low depending on the impurity concentration, so that high-frequency response and the like are reduced. It is inevitable that it will worsen.

On the other hand, a field effect transistor using a high-resistivity diamond layer as a channel layer is disclosed in Japanese Unexamined Patent Publication No. 6-2323.
No. 88 discloses this. FIG. 10 is a schematic sectional view showing the configuration of this field effect transistor. In the field-effect transistor shown in FIG. 10, a first semiconductor diamond layer 51, a high-resistivity diamond layer 52, and a second semiconductor diamond layer 53 of the same conductivity type as the first semiconductor diamond layer 51 are arranged in a line in this order. The high resistivity diamond layer 52 is connected to the first semiconductor diamond layer 51 and the second semiconductor diamond layer 53. The channel layer 57 includes a first semiconductor diamond layer 51, a high-resistivity diamond layer 52, and a second semiconductor diamond layer 53. In addition, the first semiconductor diamond layer 51 and the high resistivity diamond layer 5
A source electrode 54, a gate electrode 55 and a drain electrode 56 are provided on the second and second semiconductor diamond layers 53, respectively. The resistivity of the high resistivity diamond layer 52 is 10 ² Ω · cm or more, and the carrier concentration changes depending on the potential of the gate electrode 55.

In the case of this transistor, carriers reaching the drain electrode 56 from the source electrode 54 flow through the semiconductor diamond layer 51, the high resistivity diamond layer 52 and the semiconductor diamond layer 53 in this order, as shown in FIG. By changing the voltage applied to the gate electrode 55, the potential of the high-resistivity diamond layer 52 is changed, and the amount of injected carriers from the semiconductor diamond layer 51 in contact with the source electrode 54 to the high-resistivity diamond layer 52. Control. Therefore, unlike the MISFET shown in FIG. 9, since the drain current is not controlled by expanding the depletion layer in the channel layer 57, it is not necessary to reduce the dopant concentration to make the channel layer 57 thin.

A feature of the transistor shown in FIG. 10 is that a so-called space charge limiting current can flow through the high resistivity diamond layer 52. As described in the literature (Inuishi et al., "Semiconductor Properties 1", Asakura Shoten, pp. 158 to 162), in an ideal defect-free insulating material, the current with respect to the applied electric field is high. Behaves as an ohmic current proportional to the electric field below a certain threshold electric field. When the electric field exceeds the threshold electric field, carriers exceeding the thermally excited carrier concentration flow due to carrier injection from the outside, resulting in a space charge limiting current proportional to the square of the electric field.

[0011]

However, when a field effect transistor having a structure as shown in FIG. 10 is actually manufactured, the voltage applied to the gate electrode is often reduced to 100V.
Unless the value is extremely large as described above, there is a problem that injection of carriers into the high resistivity diamond layer 52 does not occur.

As a result of investigating the cause in detail, it was found that the potential step between the semiconductor diamond layer 51 and the high resistivity diamond layer 52 was extremely large depending on the crystal growth conditions. That is, since the band gap of diamond is as large as 5.47 eV,
Even ideally diamonds with no impurities and no defects,
A potential step of 2.5 eV, which is about half of that, occurs. Moreover, in reality, it is inevitable that the diamond layer contains a small amount of impurities and defects, albeit little. For example, nitrogen is the most commonly mixed impurity in diamond and is known to form a deep donor level of 1.7 eV. Although nitrogen-containing diamond is an n-type semiconductor, it has a high resistivity because of its deep donor level, and satisfies the above-mentioned requirement of “high resistivity diamond”.

In the formation of the high-resistivity diamond layer 52, there is a high possibility that a trace amount of nitrogen is mixed.
A 1.7 eV donor level is formed. Since this donor level is not activated at room temperature, the high resistivity diamond layer 52 does not have a low resistivity of 10 ² Ω · cm or less.

As described in the literature (Inuishi et al., “Semiconductor Properties 1”, Asakura Shoten, pp. 108-112), based on the theory of semiconductors, ε _D is a donor level and ε _C is a conduction band. bottom energy, k _B the Boltzmann constant, absolute temperature T, donor density n _D, when the n _C is the effective density of states for electrons in the conduction band, when the n-type semiconductor, the Fermi level epsilon _F is expressed by the following equation 1 Is required.

[0015]

(Equation 1)

As shown in Equation 1, the Fermi level is the Donna level.
It changes under the influence of position and temperature. It's a diamond
In a semiconductor with a wide bandgap like this, at room temperature
(Ε _C−ε_D) / K_BSince T≫1, Equation 1 is given by
It can be approximated as 2. From Equation 2, Fermi level is conduction
It exists between the band bottom and the Donna level.

[0017]

(Equation 2)

Although the above discussion on the Fermi level has been made with respect to an n-type semiconductor, the same applies to a p-type semiconductor by replacing a donor with an acceptor, a conduction band with a valence band, and electrons with holes. Can be discussed. That is, the Fermi level of the p-type semiconductor exists between the top of the valence band and the acceptor level.

In n-type high resistivity diamond mixed with nitrogen, even if the donor concentration is as low as 0.1 atomic ppm or less, the Fermi level exists near 0.9 eV below the conduction band bottom. On the other hand, when doping the semiconductor diamond layer with boron to form a p-type semiconductor diamond, boron serves as an acceptor, and the acceptor level exists at 0.37 eV above the top of the valence band. At this time, the Fermi level exists near 0.2 eV above the top of the valence band. The band gap of diamond, that is, the energy difference between the conduction band bottom and the valence band top is 5.47 e as described above.
V, the difference between the Fermi levels of both diamonds is
It can be calculated as about 5.47-0.9-0.2 = 4.37 eV. As described above, when nitrogen-containing high resistivity diamond is bonded to boron-containing semiconductor diamond, the difference in Fermi level becomes a discontinuous step in energy potential, and the height of the step is 4.37 eV.

Incidentally, in order to inject carriers from semiconductor diamond into high resistivity diamond, it is necessary to lower the potential step by the gate electrode. If the potential step is large, unless the gate potential is increased, carriers are not injected and no current flows. To put it simply, the gate potential is -4.3 with respect to the source potential.
When the voltage is set to 7 V, carrier injection occurs. However, actually, the potential difference between the source potential and the gate potential is applied to both the gate insulating film and the high-resistivity diamond. The resulting potential difference decreases accordingly. Therefore, the gate potential actually required to reduce the potential step at the interface between the high-resistivity diamond and the semiconductor diamond depends on the thicknesses of the gate insulating film and the high-resistivity diamond layer, but it is several tens to several hundreds of volts. Very large gate potential is required. Therefore, a field effect transistor as shown in FIG. 10 is not practical.

More generally, in an electronic device having a structure in which a high-concentration doped diamond and a high-resistivity diamond are bonded, when the conductive types are different from each other, or even when the acceptor or the donor has the same conductivity type, the acceptor or the donor is different. When there is a potential difference, a step in the energy potential occurs at the junction interface. In such a case, in order to inject carriers from the highly doped diamond side to the high resistivity diamond side, there is a problem that the potential difference between them must be extremely large.

The present invention has been made in view of the above problems, and has been made in an electronic element which is excellent in heat resistance, radiation resistance, and high-frequency response, and is suitable for a high-temperature device, a high-power device, and a high-frequency electronic device. A high-efficiency electronic device that suppresses ohmic current, reduces the barrier energy of carrier injection from a heavily doped semiconductor into the channel, and reduces the rising electric field of space charge limited current; and a diode using this electronic device. It is an object of the present invention to provide a transistor and a thyristor having a high amplification rate.

[0023]

An electronic device according to the present invention comprises a first semiconductor region serving as a current channel and a first semiconductor region.
A second semiconductor region joined to the first semiconductor region and having the same conductivity type as the first semiconductor region and having a lower resistivity than the first semiconductor region. Wherein the carrier concentration in the equilibrium state in the above is not more than 10 ¹⁵ cm ⁻³ .

In the present invention, by setting the carrier concentration of the first semiconductor region to 10 ¹⁵ cm ⁻³ or less, an ohmic current is suppressed, and a current due to carrier injection, that is, a space charge limiting current is controlled in a low electric field. You can move to the target state. Thereby, the efficiency of the electronic element can be improved. Ideally, the ohmic current is 0
Is desirable, but it is impossible to achieve it under practical conditions. Although the carrier concentration changes depending on the temperature, if the carrier concentration in an equilibrium state at a temperature at which the electronic element is operated is set to 10 ¹⁵ cm ⁻³ or less, the ohmic current can be reduced to a level at which there is no practical problem. It is more preferable that the carrier concentration be 10 ¹³ cm ⁻³ or less, because the ohmic current can be reduced to near the measurement limit.

Further, by setting the conductivity type of the second semiconductor region to be the same as that of the first semiconductor region and lowering the resistivity than that of the first semiconductor region, the second semiconductor region is shifted from the first semiconductor region to the first semiconductor region. The barrier energy at the time of injecting carriers (electrons for an n-type semiconductor and holes for a p-type semiconductor) can be reduced. As a result, the rising electric field of the space charge limiting current can be reduced. For example, the rising electric field (threshold electric field) can be set to 1 × 10 ⁵ V / cm or less. At this time, when the electric field applied to the first and second semiconductor regions is equal to or smaller than the threshold electric field, the increase coefficient of the electric current flowing from the second semiconductor region to the first semiconductor region with respect to the electric field becomes substantially 1, and the electric field becomes smaller. Beyond the threshold electric field, the increase factor exceeds one. The increase coefficient is
It is a numerical value such that the current is proportional to the power of the increase of the electric field.
According to the ideal Ohm's law, the increase coefficient is exactly 1 and the current is proportional to the electric field. The ideal space charge limiting current has the increase coefficient exactly 2 and the current is proportional to the square of the electric field. However, in practice, the increase coefficient is not an integer due to various other factors, such as crystal defects and contact resistance between the electrode and the semiconductor. In the vicinity of the electric field where the transition from the Ohm rule to the space charge limited current exceeds the threshold electric field, the increase coefficient is 1 to 1.
It increases to a value larger than 2 and then increases in many cases to 2 or more and finally to almost 2 (Literature (Inuishi et al., “Semiconductor Properties 1”, Asakura Shoten, No. 162
page)).

In the present invention, if an electrode is formed in the first semiconductor region, an applied voltage between the electrode and the second semiconductor region or the third semiconductor region is applied to the first semiconductor region. Substantially, the electric field will be mainly controlled.
Further, in the case of manufacturing a two-terminal element having a third semiconductor region, it is not always necessary to form an electrode in the first semiconductor region. The voltage applied therebetween governs the electric field substantially applied to the first semiconductor region.

FIGS. 1A and 1B show the case where carriers (electrons in the case of an n-type semiconductor and holes in the case of a p-type semiconductor) are injected from the second semiconductor region into the first semiconductor region. FIGS. 1A and 1B are schematic diagrams showing the magnitude of barrier energy. FIG. 1A shows the magnitude of barrier energy in a conventional electronic device, and FIG. 1B shows the magnitude of barrier energy in an electronic device of the present invention. . As shown in FIG. 1A, when a semiconductor, an insulator, or a metal is bonded to each other, electrons and holes move at the same energy level so that the electron density becomes equal. Due to the mutual movement of electrons and holes, a transition region 15 is formed near the junction interface. Further, Fermi levels coincide in regions on both sides of the transition region. Therefore, an energy barrier of a conduction band or a valence band occurs at the junction interface due to a difference in Fermi level. If the difference between the conduction band or the valence band and the Fermi level is large, the energy barrier of the conduction band or the valence band is large, and if the difference is small, the energy barrier is small. In the present invention, as shown in FIG. 1B, the energy barrier is reduced by decreasing the difference between the conduction band or the valence band and the Fermi level, and the rising electric field of the space charge limited current is reduced. Can be.

Preferably, the first and second semiconductor regions have a band gap of 2 eV or more, and the first and second semiconductor regions are formed of diamond, silicon carbide, gallium nitride, boron nitride, aluminum nitride. , Indium nitride, zinc oxide, titanium oxide, tin oxide, and indium oxide.

By making the band gap of the first and second semiconductor regions a wide band gap semiconductor of 2 eV or more, the electronic element of the present invention is made an electronic element suitable for a high temperature device, a high power device, and the like. be able to. The band gap of the first and second semiconductor regions is 2e
When it is less than V, the effect of the present invention is small because the change in Fermi level due to impurities and defects is small. However, by selecting at least one of the semiconductors having a large band gap, the amount of change in the Fermi level is increased, so that a greater effect can be obtained. Examples of a semiconductor having a wide band gap and a wide band gap include diamond, silicon carbide, gallium nitride, boron nitride, aluminum nitride, indium nitride, zinc oxide, titanium oxide, tin oxide, and indium oxide. The first
The semiconductor region and the second semiconductor region need not necessarily be made of the same material.

Further, the dopant concentration of the first semiconductor region is preferably at most 10 ppm, more preferably at most 0.1 ppm, in terms of the atomic ratio in the base crystal.

The carrier concentration in the first semiconductor region can be kept low by mutual compensation between the donor and the acceptor. However, the mutually compensated donor-acceptor pairs do not generate carriers but can be the scattering centers of the carriers. Therefore, it becomes a factor of lowering the carrier mobility. Accordingly, the lower the concentration of the compensated impurity and the lower the defect, the higher the mobility of the carrier can be realized, and the higher the responsiveness of the electronic device can be improved. In addition, the threshold electric field at which the mode shifts to the space charge limited current mode decreases as the trap concentration due to defects and impurities decreases, and the current after the mode shift increases. In this sense, it is desirable that the trap concentration due to defects and impurities be low. When the dopant concentration is 10 ppm or less, the adverse effect is hardly observed. More preferably, it is 0.1 ppm or less, which is close to the detection limit of secondary ion mass spectroscopy.

The doping impurities (dopants) in the first and second semiconductor regions do not necessarily have to be the same element. For example, the first semiconductor region is phosphorus-doped n-type diamond, and the second semiconductor region is sulfur-doped n-type diamond.
It may be a shaped diamond. Further, the first semiconductor region may be a p-type diamond in which some crystal defect that is not an impurity serves as an acceptor, and the second semiconductor region may be a boron-doped p-type diamond.

Further, it is preferable that the dopant concentration of the second semiconductor region is higher than the Mott concentration.

The amount of carriers injected from the second semiconductor region into the first semiconductor region mainly depends on the electric field applied to the interface between the first semiconductor region and the second semiconductor region and the amount of carriers in the second semiconductor region. It depends on the carrier concentration. Therefore, if the applied electric field is the same, the higher the carrier concentration of the second semiconductor region, the more carriers are injected into the first semiconductor region. In order to increase the carrier concentration, the dopant concentration may be increased and the compensation rate may be decreased. The Mott concentration is a dopant concentration at which a semiconductor shifts to a metallic behavior.
By setting the dopant concentration equal to or higher than the Mott concentration,
The activation rate of the carrier can be almost 100%. In the case where a metal electrode in contact with the second semiconductor region is provided, the contact resistance between the second semiconductor region and the metal electrode can be reduced by increasing the carrier concentration or the dopant concentration of the second semiconductor region.

Furthermore, the first semiconductor region and the second semiconductor region can be made of diamond, and are selected from the group consisting of boron-doped p-type diamond or sulfur, phosphorus, nitrogen, oxygen and lithium. N-type diamond doped with one or more elements.

By using diamond for both the first and second semiconductor regions, an electronic device having excellent carrier mobility, heat resistance, stability, radiation resistance, dielectric breakdown electric field, and the like can be realized. When boron is doped into diamond, it becomes a p-type semiconductor. At present, with respect to diamond, p-type is easier to manufacture and lower in resistivity than n-type. Of course, depending on the application, the first and second semiconductor regions may be made of sulfur, phosphorus, nitrogen, or the like. N-type diamond doped with at least one of oxygen, lithium and lithium.

Still further, the electronic device according to the present invention may further include a first metal electrode connected to the first semiconductor region and flowing a current through the first semiconductor region, and a first metal electrode connected to the second semiconductor region. A second metal electrode that allows current to flow through the second semiconductor region.

As a result, the contact resistance when supplying or extracting current to the first and second semiconductor regions can be reduced, and the stability of the electronic device increases.

Further, the electronic device according to the present invention can have a third semiconductor region joined to the first semiconductor region on the side opposite to the side joined to the second semiconductor region. The third semiconductor region is formed by the first semiconductor region.
It is preferable that the semiconductor region has the same conductivity type as that of the first semiconductor region and has lower resistivity than the first semiconductor region.

Thus, a sandwich structure in which the second and third semiconductor regions having low resistivity are joined to both sides of the first semiconductor region having high resistivity. As a result, the carriers supplied from the second semiconductor region become the first carriers.
An electronic element that reaches the third semiconductor region through the semiconductor region described above can be manufactured. At this time, the third semiconductor region has the same conductivity type as the second semiconductor region and has a lower resistivity than the first semiconductor region, so that the third semiconductor region flows from the first semiconductor region to the third semiconductor region. Carriers to be collected can be collected with high efficiency. on the other hand,
In the case where the third semiconductor region is a semiconductor of a different type from that of the first semiconductor region, and in the case where the third semiconductor region has the same type and high resistivity, an energy barrier is formed at the interface between the first semiconductor region and the third semiconductor region. As a result, it becomes an interface resistance, so that carriers cannot flow efficiently.

As long as the above conditions are satisfied, the first semiconductor region, the second semiconductor region, and the third semiconductor region can be made of diamond, particularly, p-type diamond doped with boron or sulfur. , N-type diamond doped with at least one element selected from the group consisting of phosphorus, nitrogen, oxygen and lithium.

Still further, the electronic device according to the present invention may further include a second metal electrode connected to the second semiconductor region and flowing a current through the second semiconductor region, and a second metal electrode connected to the third semiconductor region. And a third metal electrode that allows a current to flow through the third semiconductor region.

As a result, it is possible to manufacture a three-terminal element having both low contact resistance and stable stability when supplying or extracting current to the second and third semiconductor regions.

Further, the semiconductor device may have an insulating film provided on the first semiconductor region, and an electrode provided on the insulating film.

Thus, a capacitor structure can be formed, and an electronic element such as a field effect transistor can be formed.

A diode according to the present invention comprises a first semiconductor region serving as a current channel, and a junction type junction with the first semiconductor region, having the same conductivity type as the first semiconductor region and having a resistivity higher than that of the first semiconductor region. And a second semiconductor region having a low
The first semiconductor region includes an electronic element having a carrier concentration of 10 ¹⁵ cm ⁻³ or less in an equilibrium state at the operating temperature.

A transistor according to the present invention has a first semiconductor region serving as a current channel, and a junction of the first semiconductor region and the same conductivity type as that of the first semiconductor region, which has a higher resistivity than the first semiconductor region. And a second semiconductor region having a low carrier density, wherein the first semiconductor region has an electronic element having a carrier concentration of 10 ¹⁵ cm ⁻³ or less in an equilibrium state at its operating temperature.

A thyristor according to the present invention has a first semiconductor region serving as a current channel, and a junction type connected to the first semiconductor region, having the same conductivity type as the first semiconductor region and having a resistivity higher than that of the first semiconductor region. And a second semiconductor region having a low
The first semiconductor region includes an electronic element having a carrier concentration of 10 ¹⁵ cm ⁻³ or less in an equilibrium state at the operating temperature.

The electronic element includes various diodes such as a rectifier diode and a light emitting diode, an optical sensor, a heat sensor,
The present invention can be applied to various electronic components such as various sensors such as an ion sensor and a gas sensor, and various current control elements such as a switching element, a transistor, and a thyristor.

[0050]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be specifically described below with reference to the accompanying drawings. First, a first embodiment of the present invention will be described. 2 (a) to 2 (d),
3 (a) to 3 (c), FIGS. 4 (a) to 4 (d), FIG.
6A to 6C and FIG. 6 are cross-sectional views showing a method of manufacturing an electronic device according to the present embodiment in the order of steps. This embodiment shows an example of manufacturing a transistor.

First, as shown in FIG. 2A, a microwave plasma CVD
B-doped p to become the second and third semiconductor regions by the chemical vapor deposition method (Chemical Vapor Deposition method).
Form semiconductor diamond thin film 2 is formed to a thickness of 0.1 μm. The film forming conditions are as follows. Hydrogen-diluted methane gas is used as a source gas. The composition is such that CH ₄ is 0.5% by volume and H ₂ is 99.5% by volume. B ₂ H ₆ gas is used as the doping gas, and the B / C ratio in the gas is set to 20.
It is set to 0 atomic ppm. The total flow rate of the gas was 100 ml / min (standard state), and the gas pressure during film formation was 6.67 kP.
a, The substrate temperature is 800 ° C. The carrier concentration of the semiconductor diamond deposited under these conditions is 10 ²⁰ cm ^−3.
As described above, the p-type semiconductor diamond thin film 2 having a sufficiently low resistivity can be obtained.

Next, as shown in FIG. 2B, a silicon oxide film 3 having a thickness of 0.3 μm is deposited on the semiconductor diamond thin film 2.

Next, as shown in FIG. 2C, a resist 4 is formed on the silicon oxide film 3, and the resist 4 is patterned by electron beam lithography.

Next, as shown in FIG. 2D, the silicon oxide film 3 is etched using the resist 4 as a mask to form an opening 3a in the silicon oxide film 3. The etching is performed by using a mixed gas of CF ₄ and Ar as an etching gas, and using a dielectrically coupled plasma (ICP: Inductivel) as a plasma source.
y Coupled Plasma) by reactive ion etching.

Next, as shown in FIG. 3A, the resist 4 is removed, the p-type semiconductor diamond thin film 2 is etched using the etched silicon oxide film 3 as a mask, and the semiconductor diamond thin film 2 is patterned. .
At this time, the semiconductor diamond thin film 2 is separated into two semiconductor diamond thin films 2a and 2b (second
Semiconductor region and third semiconductor region). In this etching, ICP is used as a plasma source similarly to the etching of the silicon oxide film 3. Oxygen was used as an etching gas, the flow rate of oxygen was 50 ml / min (standard state), the pressure was 2.67 Pa, and the substrate bias voltage was 200.
0V. At this time, the silicon oxide film 3 serving as a mask
Is hardly etched by oxygen plasma and remains as it is.

Next, as shown in FIG. 3B, a B-doped p-type semiconductor diamond thin film 5 as a first semiconductor region is formed on the exposed portion of the insulating diamond crystal substrate 1 and on the silicon oxide film 3. A film is formed to a thickness of 1 μm. At this time, methane gas diluted with hydrogen is used as a source gas.
The composition of this source gas is such that CH ₄ is 0.5% by volume and H ₂ is 9% by volume.
9.5% by volume. B ₂ H ₆ gas is used as the doping gas, and the B / C ratio in the gas is 0.1 atomic ppm. The total flow rate of the gas was 100 ml / min (standard state), the gas pressure during film formation was 6.67 kPa, and the substrate temperature was 800 ° C.
And The carrier concentration of the B-doped p-type semiconductor diamond thin film 5 deposited under these conditions is 10 ¹⁵ cm ⁻³ or less, and the semiconductor diamond thin film 5 has a higher resistivity than the semiconductor diamond thin films 2a and 2b.

After the formation of the semiconductor diamond thin film 5, FIG.
As shown in (c), the semiconductor diamond thin film 5 formed on the silicon oxide film 3 together with the silicon oxide film 3 is removed by a lift-off process of etching the silicon oxide film 3 with an HF aqueous solution. At this time, the high-resistivity semiconductor diamond thin film 5 having a carrier concentration of 10 ¹⁵ cm ⁻³ or less is formed only in the portion where the low-resistivity semiconductor diamond thin film 2 is etched. According to the method described above, the semiconductor diamond thin films 2a and 2b having a low resistivity and the semiconductor diamond thin films 2a and 2b having a high resistivity disposed on the insulating diamond crystal substrate 1 so as to be connected thereto. The electronic element 6 on which the thin film 5 is formed can be obtained.

Next, as shown in FIG. 4A, a silicon oxide film 7 as an insulating film is formed on the entire surface of the electronic element 6 by 0.05 μm.
m to form a film.

Next, as shown in FIG. 4B, a resist 8 is formed on the silicon oxide film 7 so that the opening 8a is formed above the high resistivity semiconductor diamond thin film 5. Is patterned.

Next, as shown in FIG. 4C, a metal Al film 9 is deposited to a thickness of 0.2 μm on the exposed portion of the silicon oxide film 7 and on the resist 8 by a sputtering method.

Next, as shown in FIG. 4D, the resist 8 is dissolved with acetone. At this time, only the Al film 9 deposited on the resist 8 is removed, and the Al film 9 remains above the high-resistivity semiconductor diamond thin film 5. The remaining Al film 9 becomes the gate electrode 9a.

Next, as shown in FIG. 5A, a resist 10 is formed on the exposed portion of the silicon oxide film 7 and the gate electrode 9a.
Is formed, and the resist 10 is patterned so that two openings 10a and 10b are respectively formed on the low-resistivity semiconductor diamond thin films 2a and 2b.

Next, as shown in FIG. 5B, using the resist 10 as a mask, the silicon oxide film 7 is etched with a 0.5 mass% HF aqueous solution. At this time, since the resist 10 is not etched by hydrofluoric acid (aqueous HF solution), it remains as it is.

Next, as shown in FIG. 5C, the exposed portions of the semiconductor diamond thin films 2a and 2b and the resist 10
A metal Pt film 11 is formed on the
Deposit to a thickness of m.

Next, as shown in FIG. 6, the resist 10 is dissolved with acetone. At this time, only the Pt film 11 deposited on the resist 10 is removed, and the Pt film 11 remains above the low-resistivity semiconductor diamond thin films 2a and 2b. These remaining Pt films 11 become the source electrode 11a and the drain electrode 11b, respectively. Thus, the field effect transistor 12 in which the insulating film 7, the gate electrode 9a, the source electrode 11a, and the drain electrode 11b are provided on the electronic element 6 can be manufactured.

Next, an electric field which is an electronic element according to the present embodiment is described.
The configuration of the effect transistor 12 will be described. In FIG.
As shown in FIG.
A carrier concentration of 10 on the edge diamond crystal substrate 1
²⁰cm^-3Above, low resistivity B-doped p-type semiconductor die
The diamond thin films 2a and 2b and the carrier concentration are 10 ^Fifteen
cm^-3High-resistivity B-doped p-type semiconductor diamond
A Monde thin film 5 is provided. Semiconductor diamond thin
The films 2a and 2b are connected to the semiconductor diamond thin film 5, respectively.
Are arranged so as to sandwich the semiconductor diamond thin film 5.
You. Further, on the semiconductor diamond thin films 2a and 2b,
Are connected to the semiconductor diamond thin films 2a and 2b, respectively.
The source electrode 11a made of Pt and the drain electrode
A pole 11b is provided. Furthermore, semiconductor diamond
The source electrodes 11a on the upper surfaces of the thin films 2a and 2b and
The region where the drain electrode 11b is not provided and the semiconductor
On the upper surface of the diamond thin film 5, silicon as an insulating film
An oxide film 7 is provided. Semiconductor diamond thin film 5
A gate made of Al on the silicon oxide film 7
An electrode 9a is provided.

In this embodiment, the silicon oxide film 3 used as a mask when etching the semiconductor diamond thin film 2 having a low resistivity is used as a mask when patterning the semiconductor diamond thin film 5 having a high resistivity by lift-off as it is. Therefore, the semiconductor diamond thin film 2 and the semiconductor diamond thin film 5 are aligned in a self-aligned manner.

Further, since the field effect transistor 12 is made of diamond, heat resistance, stability,
Excellent radiation resistance and dielectric breakdown electric field, that is, withstand voltage.
Further, the carrier concentration of the semiconductor diamond thin film 5 is 10
^Since it is ¹⁵ cm ⁻³ or less, the ohmic current can be reduced, and the rising electric field of the space charge limiting current can be reduced. In the field-effect transistor 12 according to the present embodiment, the threshold electric field at which the ohmic current equals the space charge limiting current is 1 × 10 ⁵ V / cm or less.
At this time, the applied voltage between the gate electrode 9a and the source electrode 11a or the drain electrode 11b mainly controls the electric field substantially applied to the high resistivity semiconductor diamond thin film 5. When the gate electrode 9a is not used, the applied voltage between the source electrode 11a and the drain electrode 11b controls the electric field substantially applied to the semiconductor diamond thin film 5.

Further, the semiconductor diamond thin films 2a and 2a
Since b is the same p-type semiconductor as the semiconductor diamond thin film 5 and has a lower resistivity than the semiconductor diamond thin film 5, the injection barrier energy of carriers (holes) flowing from the semiconductor diamond thin film 2 a to the semiconductor diamond thin film 5. Can be reduced. Furthermore, since the semiconductor diamond thin film 2 has a carrier concentration of 10 ²⁰ cm ⁻³ or more, the efficiency of the field effect transistor 12 can be improved.

Next, a second embodiment of the present invention will be described. 7A to 7D and 8A to 8C are cross-sectional views illustrating a method of manufacturing an electronic device according to the present embodiment in the order of steps.

First, as shown in FIG. 7A, a microwave plasma CV
A B-doped p-type semiconductor diamond thin film 22 as a first semiconductor region is formed to a thickness of 0.1 μm by a D method (Chemical Vapor Deposition method).
The film forming conditions are as follows. Hydrogen-diluted methane gas is used as a source gas. The composition is such that CH ₄ is 0.5% by volume and H ₂ is 99.5% by volume. B ₂ H ₆ gas is used as the doping gas, and the B / C ratio in the gas is 0.1 atom p.
pm. The total gas flow rate was 100 ml / min (standard state), and the gas pressure during film formation was 6.67 kP.
a, The substrate temperature is 800 ° C. The carrier concentration of the semiconductor diamond thin film 22 deposited under these conditions is 10
¹⁵ cm ^-3 or less.

Next, as shown in FIG. 7B, a silicon oxide film 23 having a thickness of 0.3 μm is deposited on the semiconductor diamond thin film 22.

Next, as shown in FIG. 7C, a resist 24 is formed on the silicon oxide film 23, and the resist 24 is patterned by electron beam lithography.

Next, as shown in FIG. 7D, the silicon oxide film 23 is etched and patterned using the resist 24 as a mask to form an insulating diamond crystal substrate 21.
A laminated body 25 composed of the semiconductor diamond thin film 22, the silicon oxide film 23 and the resist 24 is formed. The etching of the silicon oxide film 23 is performed by reactive ion etching using an etching gas as a mixed gas of CF ₄ and Ar and using inductively coupled plasma (ICP) as a plasma source.

Next, as shown in FIG. 8A, the upper surface of the stacked body 25 is irradiated with B ions 26 by an ion implantation method.
The ion implantation conditions are an acceleration energy of 60 keV and an ion dose of 3.5 × 10 ¹⁶ cm ⁻² . At this time, since the silicon oxide 23 acts as a mask for the B ions 26, the B ions 26 do not reach the region 27 of the semiconductor diamond thin film 22 that is covered with the silicon oxide film 23, B ions 26 are implanted only into regions 28a and 28b not covered by silicon oxide film 23. Thus, the regions 28a and 28b in the semiconductor diamond thin film 22
Since the ions 26 are implanted, the resistivity decreases, and the semiconductor diamond thin films 29a and 29b (second semiconductor region and third semiconductor region) have low resistivity, respectively.

Next, as shown in FIG. 8B, the laminate 25 into which the B ions 26 have been implanted is heated at a temperature of 950 in a vacuum.
A heat treatment is performed at 30 ° C. for 30 minutes to activate the implanted B. Since the surface layer portions (not shown) of the semiconductor diamond thin films 29a and 29b into which B has been implanted are graphitized by this heat treatment (annealing step), 200
This surface layer is removed by washing with a saturated solution of chromic sulfuric acid heated to ℃. According to the above method, the semiconductor diamond thin film 22 having a high resistivity and the semiconductor diamond thin film 22 are formed on the insulating diamond crystal substrate 21.
The electronic element 30 can be obtained in which the low-resistivity semiconductor diamond thin films 29a and 29b are formed in two regions connected to each other and sandwiching them.

The distribution of the B concentration in the depth direction of the semiconductor diamond thin films 29a and 29b having a low resistivity into which B was implanted was determined by SIMS (Secondary Ion Mass Spectrometer:
Secondary ion mass spectrometer),
A region having a B concentration of 10 ¹⁹ cm ⁻³ or more was observed over a depth of about 0.1 μm. Also, in Hall measurement,
The carrier concentration was 10 ¹⁷ cm ^-3 or more, and the resistivity was sufficiently low.

The structure of the electronic element 30 is the same as the structure of the electronic element 6 in the first embodiment. The insulating diamond crystal substrate 1, the low resistivity semiconductor diamond thin film 2a and the low resistivity semiconductor diamond thin film 2a and the high resistivity semiconductor diamond thin film 5 in the electronic element 6 are the insulating diamond crystal substrate 21 and the low resistivity semiconductor diamond thin film in the electronic element 30. 29a and 29b and the high resistivity semiconductor diamond thin film 22, respectively.

Next, using the electronic element 30, the method shown in FIGS. 4A to 4D, FIGS. 5A to 5C and FIG. The field effect transistor 31 as shown in FIG.

The field effect transistor 3 in this embodiment
The configuration of No. 1 is the same as the configuration of the field effect transistor 12 in the first embodiment.

In the present embodiment, the first resistive region is formed by using the ion implantation method for forming the low resistivity semiconductor region.
As compared with the method of forming a film while doping performed in the embodiment of the present invention (hereinafter, referred to as a doping method during film formation), the control of the dopant concentration is facilitated, and the concentration of the dopant is complicated, or the concentration is optimized for some application. It becomes easy to form a concentrated concentration distribution. In the doping method during film formation, the relationship between the charged concentration and the concentration actually taken into the film changes depending on the film forming conditions. However, the ion implantation method has an advantage that the concentration of the dopant taken in is uniquely determined by the charged amount. .

On the other hand, the first embodiment has the following advantages. In the ion implantation method of the second embodiment, since a crystal defect is inevitably induced, an annealing step for recovering the defect is required. If the semiconductor is silicon, defect recovery is easy, but diamond is relatively difficult to recover. The reason is that diamond has a high atomic bond energy, so it is necessary to anneal at as high a temperature as possible to recover defects, and it is necessary to anneal at least at 500 ° C. or higher. Is easy to change to graphite. However, in the doping method during film formation, an annealing step is not necessary because defects are hardly induced by doping.

[0083]

As described above in detail, according to the present invention, in an electronic device having two kinds of semiconductor regions having different carrier concentrations joined to each other, the carrier concentration of the low-concentration semiconductor region is reduced as much as possible. In addition, by making the conduction types of these semiconductor regions the same, it is possible to provide an electronic element that can reduce the difference in Fermi level while suppressing the ohmic current as much as possible. For this reason, the carrier injection barrier energy from the high-concentration side to the low-concentration side can be reduced, so that the rising electric field in the space charge limited current mode can be reduced and the carrier can be injected at a higher concentration at a lower electric field. Thus, a highly efficient electronic device can be formed on any substrate, and an electronic device using a wide band gap semiconductor such as diamond can be obtained. Thereby, a short-wavelength light-emitting device, a high-temperature device, a high-power device, and a high-frequency electronic device can be obtained.

[Brief description of the drawings]

FIG. 1A is a schematic diagram showing the magnitude of barrier energy in a conventional electronic device, and FIG. 1B is a schematic diagram showing the magnitude of barrier energy in an electronic device of the present invention.

FIGS. 2A to 2D are cross-sectional views illustrating a method of manufacturing an electronic device according to a first embodiment of the present invention in the order of steps.

FIGS. 3A to 3C are cross-sectional views illustrating a method of manufacturing the electronic device according to the present embodiment, which illustrate the next step of FIG.

FIGS. 4A to 4D are cross-sectional views illustrating a method of manufacturing the electronic device according to the present embodiment, which illustrate the next step of FIG.

FIGS. 5A to 5C are cross-sectional views illustrating a method of manufacturing the electronic device according to the present embodiment, which illustrate the next step of FIG.

FIG. 6 is a cross-sectional view showing the method for manufacturing the electronic device according to the present embodiment, which is a view showing the next step of FIG.

FIGS. 7A to 7D are cross-sectional views illustrating a method of manufacturing an electronic device according to a second embodiment of the present invention in the order of steps.

FIGS. 8A to 8C are cross-sectional views illustrating a method of manufacturing the electronic device according to the present embodiment, which illustrate the next step of FIG.

FIG. 9 is a cross-sectional view illustrating a configuration of a conventional field-effect transistor.

FIG. 10 is a schematic cross-sectional view illustrating a configuration of a conventional field-effect transistor.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1; Insulator diamond crystal substrate 2a, 2b; Low resistivity semiconductor diamond thin film 3: Silicon oxide film 3a; Opening of silicon oxide film 3; Resist 5; High resistivity semiconductor diamond thin film 6; Electronic element 7; Silicon oxide film 8; Resist 8a; Opening 9 of resist 8; Al film 9a; Gate electrode 10; Resist 10a, 10b; Opening of resist 10; Pt film 11a; Source electrode 11b; Drain electrode 12; 15; transition region 21; insulating diamond crystal substrate 22; high-resistivity semiconductor diamond thin film 23; silicon oxide film 24; resist 25; laminated body 26; B ions 27; Regions 28a, 28b; semiconductor diamond thin film 22 Regions 29a and 29b not covered by silicon oxide film 23; low-resistivity semiconductor diamond thin film 30; electronic element 31; field-effect transistor 41; Si substrate 42; diamond insulator base layer 43; p-type diamond semiconductor layer 44a 44b; n-type diamond semiconductor layer 45; diamond insulator layer 46S; source electrode 46G; gate electrode 46D; drain electrode 51; semiconductor diamond layer 52; high resistance diamond layer 53; semiconductor diamond layer 54; source electrode 55; 56; drain electrode 57; channel layer

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI theme coat ゛ (Reference) H01L 29/786 H01L 29/74 G 33/00 29/78 618B F term (Reference) 4M104 AA03 AA04 AA10 BB02 BB06 CC01 CC05 DD08 DD09 DD16 DD37 GG09 GG18 GG20 5F005 CA02 5F041 AA11 CA33 CA34 CA40 CA41 CA46 CA54 CA55 CA56 CA57 CA64 CA74 5F110 AA30 BB12 BB20 CC01 CC02 DD04 EE03 EE44 FF02 GG01 GG25 GG32. QQ11

Claims (24)

[Claims] A first semiconductor region serving as a current channel; and a second semiconductor region joined to the first semiconductor region and having the same conductivity type as the first semiconductor region and lower in resistivity than the first semiconductor region. A semiconductor region, wherein the first semiconductor region has a carrier concentration of 10 ¹⁵ cm ⁻³ or less in an equilibrium state at an operating temperature. 2. The electronic device according to claim 1, wherein a carrier concentration of the first semiconductor region in an equilibrium state at an operating temperature is 10 ¹³ cm ⁻³ or less. 3. The electronic device according to claim 1, wherein a band gap of the first semiconductor region is 2 eV or more. 4. The semiconductor device according to claim 1, wherein the first semiconductor region is selected from the group consisting of diamond, silicon carbide, gallium nitride, boron nitride, aluminum nitride, indium nitride, zinc oxide, titanium oxide, tin oxide and indium oxide.
4. The electronic device according to claim 1, wherein the electronic device is made of at least one kind of material or a mixture thereof. 5. The electronic device according to claim 1, wherein a band gap of the second semiconductor region is 2 eV or more. 6. The semiconductor device according to claim 1, wherein the second semiconductor region is selected from the group consisting of diamond, silicon carbide, gallium nitride, boron nitride, aluminum nitride, indium nitride, zinc oxide, titanium oxide, tin oxide and indium oxide.
The electronic device according to claim 1, wherein the electronic device is made of at least one kind of material or a mixture thereof. 7. The electronic device according to claim 1, wherein a dopant concentration in a host crystal in the first semiconductor region is 10 ppm or less in atomic ratio. 8. The electronic device according to claim 7, wherein the dopant concentration in the host crystal in the first semiconductor region is 0.1 ppm or less in atomic ratio. 9. The semiconductor device according to claim 1, wherein a dopant concentration of the second semiconductor region is equal to or higher than a Mott concentration.
An electronic device according to any one of claims 1 to 8, wherein 10. The electronic device according to claim 1, wherein the first semiconductor region and the second semiconductor region are made of diamond. 11. The electronic device according to claim 10, wherein the first semiconductor region and the second semiconductor region are made of boron-doped p-type diamond. 12. The n-type semiconductor device, wherein the first semiconductor region and the second semiconductor region are doped with at least one element selected from the group consisting of sulfur, phosphorus, nitrogen, oxygen and lithium.
The electronic device according to claim 10, wherein the electronic device is made of shaped diamond. 13. A first metal electrode connected to the first semiconductor region for inputting / outputting current to / from the first semiconductor region, and a current flowing to the second semiconductor region connected to the second semiconductor region. The electronic device according to claim 1, further comprising: a second metal electrode configured to input / output a signal. 14. The semiconductor device according to claim 1, further comprising: a third semiconductor region joined to a side of the first semiconductor region opposite to a side joined to the second semiconductor region.
14. The electronic device according to any one of claims 13 to 13. 15. The electronic device according to claim 14, wherein the third semiconductor region has the same conductivity type as the first semiconductor region and a lower resistivity than the first semiconductor region. 16. The electronic device according to claim 14, wherein the dopant concentration of the third semiconductor region is equal to or higher than the Mott concentration. 17. The electronic device according to claim 14, wherein the first semiconductor region, the second semiconductor region, and the third semiconductor region are made of diamond. . 18. The semiconductor device according to claim 1, wherein the first semiconductor region, the second semiconductor region, and the third semiconductor region are made of boron-doped p-type diamond.
8. The electronic element according to 7. 19. The first semiconductor region, the second semiconductor region, and the third semiconductor region are doped with at least one element selected from the group consisting of sulfur, phosphorus, nitrogen, oxygen, and lithium. The electronic device according to claim 17, comprising an n-type diamond formed as described above. 20. A second metal electrode connected to the second semiconductor region and flowing current through the second semiconductor region, and a current flowing through the third semiconductor region connected to the third semiconductor region. 20. The electronic device according to claim 14, further comprising a third metal electrode. 21. The semiconductor device according to claim 14, further comprising: an insulating film provided on the first semiconductor region; and an electrode provided on the insulating film. Electronic element. 22. A first semiconductor region serving as a current channel, and a second semiconductor region joined to the first semiconductor region and having the same conductivity type as the first semiconductor region and lower in resistivity than the first semiconductor region. And a semiconductor region, wherein the first semiconductor region has an electronic element having a carrier concentration of 10 ¹⁵ cm ⁻³ or less in an equilibrium state at its operating temperature. 23. A first semiconductor region serving as a current channel, and a second semiconductor region joined to the first semiconductor region and having the same conductivity type as the first semiconductor region and having a lower resistivity than the first semiconductor region. And a semiconductor region, wherein the first semiconductor region has an electronic element having a carrier concentration of 10 ¹⁵ cm ⁻³ or less in an equilibrium state at its operating temperature. 24. A first semiconductor region to be a current channel, and a second semiconductor region joined to the first semiconductor region and having the same conductivity type as the first semiconductor region and having a lower resistivity than the first semiconductor region. A thyristor, wherein the first semiconductor region includes an electronic element having a carrier concentration of 10 ¹⁵ cm ⁻³ or less in an equilibrium state at an operating temperature.